1*9374e8f5SOleksij Rempel // SPDX-License-Identifier: GPL-2.0 2*9374e8f5SOleksij Rempel /* 3*9374e8f5SOleksij Rempel * Texas Instruments TSC2046 SPI ADC driver 4*9374e8f5SOleksij Rempel * 5*9374e8f5SOleksij Rempel * Copyright (c) 2021 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix 6*9374e8f5SOleksij Rempel */ 7*9374e8f5SOleksij Rempel 8*9374e8f5SOleksij Rempel #include <linux/bitfield.h> 9*9374e8f5SOleksij Rempel #include <linux/delay.h> 10*9374e8f5SOleksij Rempel #include <linux/module.h> 11*9374e8f5SOleksij Rempel #include <linux/spi/spi.h> 12*9374e8f5SOleksij Rempel 13*9374e8f5SOleksij Rempel #include <asm/unaligned.h> 14*9374e8f5SOleksij Rempel 15*9374e8f5SOleksij Rempel #include <linux/iio/buffer.h> 16*9374e8f5SOleksij Rempel #include <linux/iio/trigger_consumer.h> 17*9374e8f5SOleksij Rempel #include <linux/iio/triggered_buffer.h> 18*9374e8f5SOleksij Rempel #include <linux/iio/trigger.h> 19*9374e8f5SOleksij Rempel 20*9374e8f5SOleksij Rempel /* 21*9374e8f5SOleksij Rempel * The PENIRQ of TSC2046 controller is implemented as level shifter attached to 22*9374e8f5SOleksij Rempel * the X+ line. If voltage of the X+ line reaches a specific level the IRQ will 23*9374e8f5SOleksij Rempel * be activated or deactivated. 24*9374e8f5SOleksij Rempel * To make this kind of IRQ reusable as trigger following additions were 25*9374e8f5SOleksij Rempel * implemented: 26*9374e8f5SOleksij Rempel * - rate limiting: 27*9374e8f5SOleksij Rempel * For typical touchscreen use case, we need to trigger about each 10ms. 28*9374e8f5SOleksij Rempel * - hrtimer: 29*9374e8f5SOleksij Rempel * Continue triggering at least once after the IRQ was deactivated. Then 30*9374e8f5SOleksij Rempel * deactivate this trigger to stop sampling in order to reduce power 31*9374e8f5SOleksij Rempel * consumption. 32*9374e8f5SOleksij Rempel */ 33*9374e8f5SOleksij Rempel 34*9374e8f5SOleksij Rempel #define TI_TSC2046_NAME "tsc2046" 35*9374e8f5SOleksij Rempel 36*9374e8f5SOleksij Rempel /* This driver doesn't aim at the peak continuous sample rate */ 37*9374e8f5SOleksij Rempel #define TI_TSC2046_MAX_SAMPLE_RATE 125000 38*9374e8f5SOleksij Rempel #define TI_TSC2046_SAMPLE_BITS \ 39*9374e8f5SOleksij Rempel BITS_PER_TYPE(struct tsc2046_adc_atom) 40*9374e8f5SOleksij Rempel #define TI_TSC2046_MAX_CLK_FREQ \ 41*9374e8f5SOleksij Rempel (TI_TSC2046_MAX_SAMPLE_RATE * TI_TSC2046_SAMPLE_BITS) 42*9374e8f5SOleksij Rempel 43*9374e8f5SOleksij Rempel #define TI_TSC2046_SAMPLE_INTERVAL_US 10000 44*9374e8f5SOleksij Rempel 45*9374e8f5SOleksij Rempel #define TI_TSC2046_START BIT(7) 46*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR GENMASK(6, 4) 47*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_TEMP1 7 48*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_AUX 6 49*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_X 5 50*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_Z2 4 51*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_Z1 3 52*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_VBAT 2 53*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_Y 1 54*9374e8f5SOleksij Rempel #define TI_TSC2046_ADDR_TEMP0 0 55*9374e8f5SOleksij Rempel 56*9374e8f5SOleksij Rempel /* 57*9374e8f5SOleksij Rempel * The mode bit sets the resolution of the ADC. With this bit low, the next 58*9374e8f5SOleksij Rempel * conversion has 12-bit resolution, whereas with this bit high, the next 59*9374e8f5SOleksij Rempel * conversion has 8-bit resolution. This driver is optimized for 12-bit mode. 60*9374e8f5SOleksij Rempel * So, for this driver, this bit should stay zero. 61*9374e8f5SOleksij Rempel */ 62*9374e8f5SOleksij Rempel #define TI_TSC2046_8BIT_MODE BIT(3) 63*9374e8f5SOleksij Rempel 64*9374e8f5SOleksij Rempel /* 65*9374e8f5SOleksij Rempel * SER/DFR - The SER/DFR bit controls the reference mode, either single-ended 66*9374e8f5SOleksij Rempel * (high) or differential (low). 67*9374e8f5SOleksij Rempel */ 68*9374e8f5SOleksij Rempel #define TI_TSC2046_SER BIT(2) 69*9374e8f5SOleksij Rempel 70*9374e8f5SOleksij Rempel /* 71*9374e8f5SOleksij Rempel * If VREF_ON and ADC_ON are both zero, then the chip operates in 72*9374e8f5SOleksij Rempel * auto-wake/suspend mode. In most case this bits should stay zero. 73*9374e8f5SOleksij Rempel */ 74*9374e8f5SOleksij Rempel #define TI_TSC2046_PD1_VREF_ON BIT(1) 75*9374e8f5SOleksij Rempel #define TI_TSC2046_PD0_ADC_ON BIT(0) 76*9374e8f5SOleksij Rempel 77*9374e8f5SOleksij Rempel /* 78*9374e8f5SOleksij Rempel * All supported devices can do 8 or 12bit resolution. This driver 79*9374e8f5SOleksij Rempel * supports only 12bit mode, here we have a 16bit data transfer, where 80*9374e8f5SOleksij Rempel * the MSB and the 3 LSB are 0. 81*9374e8f5SOleksij Rempel */ 82*9374e8f5SOleksij Rempel #define TI_TSC2046_DATA_12BIT GENMASK(14, 3) 83*9374e8f5SOleksij Rempel 84*9374e8f5SOleksij Rempel #define TI_TSC2046_MAX_CHAN 8 85*9374e8f5SOleksij Rempel 86*9374e8f5SOleksij Rempel /* Represents a HW sample */ 87*9374e8f5SOleksij Rempel struct tsc2046_adc_atom { 88*9374e8f5SOleksij Rempel /* 89*9374e8f5SOleksij Rempel * Command transmitted to the controller. This field is empty on the RX 90*9374e8f5SOleksij Rempel * buffer. 91*9374e8f5SOleksij Rempel */ 92*9374e8f5SOleksij Rempel u8 cmd; 93*9374e8f5SOleksij Rempel /* 94*9374e8f5SOleksij Rempel * Data received from the controller. This field is empty for the TX 95*9374e8f5SOleksij Rempel * buffer 96*9374e8f5SOleksij Rempel */ 97*9374e8f5SOleksij Rempel __be16 data; 98*9374e8f5SOleksij Rempel } __packed; 99*9374e8f5SOleksij Rempel 100*9374e8f5SOleksij Rempel /* Layout of atomic buffers within big buffer */ 101*9374e8f5SOleksij Rempel struct tsc2046_adc_group_layout { 102*9374e8f5SOleksij Rempel /* Group offset within the SPI RX buffer */ 103*9374e8f5SOleksij Rempel unsigned int offset; 104*9374e8f5SOleksij Rempel /* 105*9374e8f5SOleksij Rempel * Amount of tsc2046_adc_atom structs within the same command gathered 106*9374e8f5SOleksij Rempel * within same group. 107*9374e8f5SOleksij Rempel */ 108*9374e8f5SOleksij Rempel unsigned int count; 109*9374e8f5SOleksij Rempel /* 110*9374e8f5SOleksij Rempel * Settling samples (tsc2046_adc_atom structs) which should be skipped 111*9374e8f5SOleksij Rempel * before good samples will start. 112*9374e8f5SOleksij Rempel */ 113*9374e8f5SOleksij Rempel unsigned int skip; 114*9374e8f5SOleksij Rempel }; 115*9374e8f5SOleksij Rempel 116*9374e8f5SOleksij Rempel struct tsc2046_adc_dcfg { 117*9374e8f5SOleksij Rempel const struct iio_chan_spec *channels; 118*9374e8f5SOleksij Rempel unsigned int num_channels; 119*9374e8f5SOleksij Rempel }; 120*9374e8f5SOleksij Rempel 121*9374e8f5SOleksij Rempel struct tsc2046_adc_ch_cfg { 122*9374e8f5SOleksij Rempel unsigned int settling_time_us; 123*9374e8f5SOleksij Rempel unsigned int oversampling_ratio; 124*9374e8f5SOleksij Rempel }; 125*9374e8f5SOleksij Rempel 126*9374e8f5SOleksij Rempel struct tsc2046_adc_priv { 127*9374e8f5SOleksij Rempel struct spi_device *spi; 128*9374e8f5SOleksij Rempel const struct tsc2046_adc_dcfg *dcfg; 129*9374e8f5SOleksij Rempel 130*9374e8f5SOleksij Rempel struct iio_trigger *trig; 131*9374e8f5SOleksij Rempel struct hrtimer trig_timer; 132*9374e8f5SOleksij Rempel spinlock_t trig_lock; 133*9374e8f5SOleksij Rempel unsigned int trig_more_count; 134*9374e8f5SOleksij Rempel 135*9374e8f5SOleksij Rempel struct spi_transfer xfer; 136*9374e8f5SOleksij Rempel struct spi_message msg; 137*9374e8f5SOleksij Rempel 138*9374e8f5SOleksij Rempel struct { 139*9374e8f5SOleksij Rempel /* Scan data for each channel */ 140*9374e8f5SOleksij Rempel u16 data[TI_TSC2046_MAX_CHAN]; 141*9374e8f5SOleksij Rempel /* Timestamp */ 142*9374e8f5SOleksij Rempel s64 ts __aligned(8); 143*9374e8f5SOleksij Rempel } scan_buf; 144*9374e8f5SOleksij Rempel 145*9374e8f5SOleksij Rempel /* 146*9374e8f5SOleksij Rempel * Lock to protect the layout and the SPI transfer buffer. 147*9374e8f5SOleksij Rempel * tsc2046_adc_group_layout can be changed within update_scan_mode(), 148*9374e8f5SOleksij Rempel * in this case the l[] and tx/rx buffer will be out of sync to each 149*9374e8f5SOleksij Rempel * other. 150*9374e8f5SOleksij Rempel */ 151*9374e8f5SOleksij Rempel struct mutex slock; 152*9374e8f5SOleksij Rempel struct tsc2046_adc_group_layout l[TI_TSC2046_MAX_CHAN]; 153*9374e8f5SOleksij Rempel struct tsc2046_adc_atom *rx; 154*9374e8f5SOleksij Rempel struct tsc2046_adc_atom *tx; 155*9374e8f5SOleksij Rempel 156*9374e8f5SOleksij Rempel struct tsc2046_adc_atom *rx_one; 157*9374e8f5SOleksij Rempel struct tsc2046_adc_atom *tx_one; 158*9374e8f5SOleksij Rempel 159*9374e8f5SOleksij Rempel unsigned int count; 160*9374e8f5SOleksij Rempel unsigned int groups; 161*9374e8f5SOleksij Rempel u32 effective_speed_hz; 162*9374e8f5SOleksij Rempel u32 scan_interval_us; 163*9374e8f5SOleksij Rempel u32 time_per_scan_us; 164*9374e8f5SOleksij Rempel u32 time_per_bit_ns; 165*9374e8f5SOleksij Rempel 166*9374e8f5SOleksij Rempel struct tsc2046_adc_ch_cfg ch_cfg[TI_TSC2046_MAX_CHAN]; 167*9374e8f5SOleksij Rempel }; 168*9374e8f5SOleksij Rempel 169*9374e8f5SOleksij Rempel #define TI_TSC2046_V_CHAN(index, bits, name) \ 170*9374e8f5SOleksij Rempel { \ 171*9374e8f5SOleksij Rempel .type = IIO_VOLTAGE, \ 172*9374e8f5SOleksij Rempel .indexed = 1, \ 173*9374e8f5SOleksij Rempel .channel = index, \ 174*9374e8f5SOleksij Rempel .datasheet_name = "#name", \ 175*9374e8f5SOleksij Rempel .scan_index = index, \ 176*9374e8f5SOleksij Rempel .scan_type = { \ 177*9374e8f5SOleksij Rempel .sign = 'u', \ 178*9374e8f5SOleksij Rempel .realbits = bits, \ 179*9374e8f5SOleksij Rempel .storagebits = 16, \ 180*9374e8f5SOleksij Rempel .endianness = IIO_CPU, \ 181*9374e8f5SOleksij Rempel }, \ 182*9374e8f5SOleksij Rempel } 183*9374e8f5SOleksij Rempel 184*9374e8f5SOleksij Rempel #define DECLARE_TI_TSC2046_8_CHANNELS(name, bits) \ 185*9374e8f5SOleksij Rempel const struct iio_chan_spec name ## _channels[] = { \ 186*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(0, bits, TEMP0), \ 187*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(1, bits, Y), \ 188*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(2, bits, VBAT), \ 189*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(3, bits, Z1), \ 190*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(4, bits, Z2), \ 191*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(5, bits, X), \ 192*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(6, bits, AUX), \ 193*9374e8f5SOleksij Rempel TI_TSC2046_V_CHAN(7, bits, TEMP1), \ 194*9374e8f5SOleksij Rempel IIO_CHAN_SOFT_TIMESTAMP(8), \ 195*9374e8f5SOleksij Rempel } 196*9374e8f5SOleksij Rempel 197*9374e8f5SOleksij Rempel static DECLARE_TI_TSC2046_8_CHANNELS(tsc2046_adc, 12); 198*9374e8f5SOleksij Rempel 199*9374e8f5SOleksij Rempel static const struct tsc2046_adc_dcfg tsc2046_adc_dcfg_tsc2046e = { 200*9374e8f5SOleksij Rempel .channels = tsc2046_adc_channels, 201*9374e8f5SOleksij Rempel .num_channels = ARRAY_SIZE(tsc2046_adc_channels), 202*9374e8f5SOleksij Rempel }; 203*9374e8f5SOleksij Rempel 204*9374e8f5SOleksij Rempel /* 205*9374e8f5SOleksij Rempel * Convert time to a number of samples which can be transferred within this 206*9374e8f5SOleksij Rempel * time. 207*9374e8f5SOleksij Rempel */ 208*9374e8f5SOleksij Rempel static unsigned int tsc2046_adc_time_to_count(struct tsc2046_adc_priv *priv, 209*9374e8f5SOleksij Rempel unsigned long time) 210*9374e8f5SOleksij Rempel { 211*9374e8f5SOleksij Rempel unsigned int bit_count, sample_count; 212*9374e8f5SOleksij Rempel 213*9374e8f5SOleksij Rempel bit_count = DIV_ROUND_UP(time * NSEC_PER_USEC, priv->time_per_bit_ns); 214*9374e8f5SOleksij Rempel sample_count = DIV_ROUND_UP(bit_count, TI_TSC2046_SAMPLE_BITS); 215*9374e8f5SOleksij Rempel 216*9374e8f5SOleksij Rempel dev_dbg(&priv->spi->dev, "Effective speed %u, time per bit: %u, count bits: %u, count samples: %u\n", 217*9374e8f5SOleksij Rempel priv->effective_speed_hz, priv->time_per_bit_ns, 218*9374e8f5SOleksij Rempel bit_count, sample_count); 219*9374e8f5SOleksij Rempel 220*9374e8f5SOleksij Rempel return sample_count; 221*9374e8f5SOleksij Rempel } 222*9374e8f5SOleksij Rempel 223*9374e8f5SOleksij Rempel static u8 tsc2046_adc_get_cmd(struct tsc2046_adc_priv *priv, int ch_idx, 224*9374e8f5SOleksij Rempel bool keep_power) 225*9374e8f5SOleksij Rempel { 226*9374e8f5SOleksij Rempel u32 pd; 227*9374e8f5SOleksij Rempel 228*9374e8f5SOleksij Rempel /* 229*9374e8f5SOleksij Rempel * if PD bits are 0, controller will automatically disable ADC, VREF and 230*9374e8f5SOleksij Rempel * enable IRQ. 231*9374e8f5SOleksij Rempel */ 232*9374e8f5SOleksij Rempel if (keep_power) 233*9374e8f5SOleksij Rempel pd = TI_TSC2046_PD0_ADC_ON; 234*9374e8f5SOleksij Rempel else 235*9374e8f5SOleksij Rempel pd = 0; 236*9374e8f5SOleksij Rempel 237*9374e8f5SOleksij Rempel return TI_TSC2046_START | FIELD_PREP(TI_TSC2046_ADDR, ch_idx) | pd; 238*9374e8f5SOleksij Rempel } 239*9374e8f5SOleksij Rempel 240*9374e8f5SOleksij Rempel static u16 tsc2046_adc_get_value(struct tsc2046_adc_atom *buf) 241*9374e8f5SOleksij Rempel { 242*9374e8f5SOleksij Rempel return FIELD_GET(TI_TSC2046_DATA_12BIT, get_unaligned_be16(&buf->data)); 243*9374e8f5SOleksij Rempel } 244*9374e8f5SOleksij Rempel 245*9374e8f5SOleksij Rempel static int tsc2046_adc_read_one(struct tsc2046_adc_priv *priv, int ch_idx, 246*9374e8f5SOleksij Rempel u32 *effective_speed_hz) 247*9374e8f5SOleksij Rempel { 248*9374e8f5SOleksij Rempel struct spi_transfer xfer; 249*9374e8f5SOleksij Rempel struct spi_message msg; 250*9374e8f5SOleksij Rempel int ret; 251*9374e8f5SOleksij Rempel 252*9374e8f5SOleksij Rempel memset(&xfer, 0, sizeof(xfer)); 253*9374e8f5SOleksij Rempel priv->tx_one->cmd = tsc2046_adc_get_cmd(priv, ch_idx, false); 254*9374e8f5SOleksij Rempel priv->tx_one->data = 0; 255*9374e8f5SOleksij Rempel xfer.tx_buf = priv->tx_one; 256*9374e8f5SOleksij Rempel xfer.rx_buf = priv->rx_one; 257*9374e8f5SOleksij Rempel xfer.len = sizeof(*priv->tx_one); 258*9374e8f5SOleksij Rempel spi_message_init_with_transfers(&msg, &xfer, 1); 259*9374e8f5SOleksij Rempel 260*9374e8f5SOleksij Rempel /* 261*9374e8f5SOleksij Rempel * We aren't using spi_write_then_read() because we need to be able 262*9374e8f5SOleksij Rempel * to get hold of the effective_speed_hz from the xfer 263*9374e8f5SOleksij Rempel */ 264*9374e8f5SOleksij Rempel ret = spi_sync(priv->spi, &msg); 265*9374e8f5SOleksij Rempel if (ret) { 266*9374e8f5SOleksij Rempel dev_err_ratelimited(&priv->spi->dev, "SPI transfer failed %pe\n", 267*9374e8f5SOleksij Rempel ERR_PTR(ret)); 268*9374e8f5SOleksij Rempel return ret; 269*9374e8f5SOleksij Rempel } 270*9374e8f5SOleksij Rempel 271*9374e8f5SOleksij Rempel if (effective_speed_hz) 272*9374e8f5SOleksij Rempel *effective_speed_hz = xfer.effective_speed_hz; 273*9374e8f5SOleksij Rempel 274*9374e8f5SOleksij Rempel return tsc2046_adc_get_value(priv->rx_one); 275*9374e8f5SOleksij Rempel } 276*9374e8f5SOleksij Rempel 277*9374e8f5SOleksij Rempel static size_t tsc2046_adc_group_set_layout(struct tsc2046_adc_priv *priv, 278*9374e8f5SOleksij Rempel unsigned int group, 279*9374e8f5SOleksij Rempel unsigned int ch_idx) 280*9374e8f5SOleksij Rempel { 281*9374e8f5SOleksij Rempel struct tsc2046_adc_ch_cfg *ch = &priv->ch_cfg[ch_idx]; 282*9374e8f5SOleksij Rempel struct tsc2046_adc_group_layout *cur; 283*9374e8f5SOleksij Rempel unsigned int max_count, count_skip; 284*9374e8f5SOleksij Rempel unsigned int offset = 0; 285*9374e8f5SOleksij Rempel 286*9374e8f5SOleksij Rempel if (group) 287*9374e8f5SOleksij Rempel offset = priv->l[group - 1].offset + priv->l[group - 1].count; 288*9374e8f5SOleksij Rempel 289*9374e8f5SOleksij Rempel count_skip = tsc2046_adc_time_to_count(priv, ch->settling_time_us); 290*9374e8f5SOleksij Rempel max_count = count_skip + ch->oversampling_ratio; 291*9374e8f5SOleksij Rempel 292*9374e8f5SOleksij Rempel cur = &priv->l[group]; 293*9374e8f5SOleksij Rempel cur->offset = offset; 294*9374e8f5SOleksij Rempel cur->count = max_count; 295*9374e8f5SOleksij Rempel cur->skip = count_skip; 296*9374e8f5SOleksij Rempel 297*9374e8f5SOleksij Rempel return sizeof(*priv->tx) * max_count; 298*9374e8f5SOleksij Rempel } 299*9374e8f5SOleksij Rempel 300*9374e8f5SOleksij Rempel static void tsc2046_adc_group_set_cmd(struct tsc2046_adc_priv *priv, 301*9374e8f5SOleksij Rempel unsigned int group, int ch_idx) 302*9374e8f5SOleksij Rempel { 303*9374e8f5SOleksij Rempel struct tsc2046_adc_group_layout *l = &priv->l[group]; 304*9374e8f5SOleksij Rempel unsigned int i; 305*9374e8f5SOleksij Rempel u8 cmd; 306*9374e8f5SOleksij Rempel 307*9374e8f5SOleksij Rempel /* 308*9374e8f5SOleksij Rempel * Do not enable automatic power down on working samples. Otherwise the 309*9374e8f5SOleksij Rempel * plates will never be completely charged. 310*9374e8f5SOleksij Rempel */ 311*9374e8f5SOleksij Rempel cmd = tsc2046_adc_get_cmd(priv, ch_idx, true); 312*9374e8f5SOleksij Rempel 313*9374e8f5SOleksij Rempel for (i = 0; i < l->count - 1; i++) 314*9374e8f5SOleksij Rempel priv->tx[l->offset + i].cmd = cmd; 315*9374e8f5SOleksij Rempel 316*9374e8f5SOleksij Rempel /* automatically power down on last sample */ 317*9374e8f5SOleksij Rempel priv->tx[l->offset + i].cmd = tsc2046_adc_get_cmd(priv, ch_idx, false); 318*9374e8f5SOleksij Rempel } 319*9374e8f5SOleksij Rempel 320*9374e8f5SOleksij Rempel static u16 tsc2046_adc_get_val(struct tsc2046_adc_priv *priv, int group) 321*9374e8f5SOleksij Rempel { 322*9374e8f5SOleksij Rempel struct tsc2046_adc_group_layout *l; 323*9374e8f5SOleksij Rempel unsigned int val, val_normalized = 0; 324*9374e8f5SOleksij Rempel int valid_count, i; 325*9374e8f5SOleksij Rempel 326*9374e8f5SOleksij Rempel l = &priv->l[group]; 327*9374e8f5SOleksij Rempel valid_count = l->count - l->skip; 328*9374e8f5SOleksij Rempel 329*9374e8f5SOleksij Rempel for (i = 0; i < valid_count; i++) { 330*9374e8f5SOleksij Rempel val = tsc2046_adc_get_value(&priv->rx[l->offset + l->skip + i]); 331*9374e8f5SOleksij Rempel val_normalized += val; 332*9374e8f5SOleksij Rempel } 333*9374e8f5SOleksij Rempel 334*9374e8f5SOleksij Rempel return DIV_ROUND_UP(val_normalized, valid_count); 335*9374e8f5SOleksij Rempel } 336*9374e8f5SOleksij Rempel 337*9374e8f5SOleksij Rempel static int tsc2046_adc_scan(struct iio_dev *indio_dev) 338*9374e8f5SOleksij Rempel { 339*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv = iio_priv(indio_dev); 340*9374e8f5SOleksij Rempel struct device *dev = &priv->spi->dev; 341*9374e8f5SOleksij Rempel int group; 342*9374e8f5SOleksij Rempel int ret; 343*9374e8f5SOleksij Rempel 344*9374e8f5SOleksij Rempel ret = spi_sync(priv->spi, &priv->msg); 345*9374e8f5SOleksij Rempel if (ret < 0) { 346*9374e8f5SOleksij Rempel dev_err_ratelimited(dev, "SPI transfer failed: %pe\n", ERR_PTR(ret)); 347*9374e8f5SOleksij Rempel return ret; 348*9374e8f5SOleksij Rempel } 349*9374e8f5SOleksij Rempel 350*9374e8f5SOleksij Rempel for (group = 0; group < priv->groups; group++) 351*9374e8f5SOleksij Rempel priv->scan_buf.data[group] = tsc2046_adc_get_val(priv, group); 352*9374e8f5SOleksij Rempel 353*9374e8f5SOleksij Rempel ret = iio_push_to_buffers_with_timestamp(indio_dev, &priv->scan_buf, 354*9374e8f5SOleksij Rempel iio_get_time_ns(indio_dev)); 355*9374e8f5SOleksij Rempel /* If the consumer is kfifo, we may get a EBUSY here - ignore it. */ 356*9374e8f5SOleksij Rempel if (ret < 0 && ret != -EBUSY) { 357*9374e8f5SOleksij Rempel dev_err_ratelimited(dev, "Failed to push scan buffer %pe\n", 358*9374e8f5SOleksij Rempel ERR_PTR(ret)); 359*9374e8f5SOleksij Rempel 360*9374e8f5SOleksij Rempel return ret; 361*9374e8f5SOleksij Rempel } 362*9374e8f5SOleksij Rempel 363*9374e8f5SOleksij Rempel return 0; 364*9374e8f5SOleksij Rempel } 365*9374e8f5SOleksij Rempel 366*9374e8f5SOleksij Rempel static irqreturn_t tsc2046_adc_trigger_handler(int irq, void *p) 367*9374e8f5SOleksij Rempel { 368*9374e8f5SOleksij Rempel struct iio_poll_func *pf = p; 369*9374e8f5SOleksij Rempel struct iio_dev *indio_dev = pf->indio_dev; 370*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv = iio_priv(indio_dev); 371*9374e8f5SOleksij Rempel 372*9374e8f5SOleksij Rempel mutex_lock(&priv->slock); 373*9374e8f5SOleksij Rempel tsc2046_adc_scan(indio_dev); 374*9374e8f5SOleksij Rempel mutex_unlock(&priv->slock); 375*9374e8f5SOleksij Rempel 376*9374e8f5SOleksij Rempel iio_trigger_notify_done(indio_dev->trig); 377*9374e8f5SOleksij Rempel 378*9374e8f5SOleksij Rempel return IRQ_HANDLED; 379*9374e8f5SOleksij Rempel } 380*9374e8f5SOleksij Rempel 381*9374e8f5SOleksij Rempel static int tsc2046_adc_update_scan_mode(struct iio_dev *indio_dev, 382*9374e8f5SOleksij Rempel const unsigned long *active_scan_mask) 383*9374e8f5SOleksij Rempel { 384*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv = iio_priv(indio_dev); 385*9374e8f5SOleksij Rempel unsigned int ch_idx, group = 0; 386*9374e8f5SOleksij Rempel size_t size; 387*9374e8f5SOleksij Rempel 388*9374e8f5SOleksij Rempel mutex_lock(&priv->slock); 389*9374e8f5SOleksij Rempel 390*9374e8f5SOleksij Rempel size = 0; 391*9374e8f5SOleksij Rempel for_each_set_bit(ch_idx, active_scan_mask, indio_dev->num_channels) { 392*9374e8f5SOleksij Rempel size += tsc2046_adc_group_set_layout(priv, group, ch_idx); 393*9374e8f5SOleksij Rempel tsc2046_adc_group_set_cmd(priv, group, ch_idx); 394*9374e8f5SOleksij Rempel group++; 395*9374e8f5SOleksij Rempel } 396*9374e8f5SOleksij Rempel 397*9374e8f5SOleksij Rempel priv->groups = group; 398*9374e8f5SOleksij Rempel priv->xfer.len = size; 399*9374e8f5SOleksij Rempel priv->time_per_scan_us = size * 8 * priv->time_per_bit_ns / NSEC_PER_USEC; 400*9374e8f5SOleksij Rempel 401*9374e8f5SOleksij Rempel if ((priv->scan_interval_us - priv->time_per_scan_us) < 0) 402*9374e8f5SOleksij Rempel dev_warn(&priv->spi->dev, "The scan interval (%d) is less then calculated scan time (%d)\n", 403*9374e8f5SOleksij Rempel priv->scan_interval_us, priv->time_per_scan_us); 404*9374e8f5SOleksij Rempel 405*9374e8f5SOleksij Rempel mutex_unlock(&priv->slock); 406*9374e8f5SOleksij Rempel 407*9374e8f5SOleksij Rempel return 0; 408*9374e8f5SOleksij Rempel } 409*9374e8f5SOleksij Rempel 410*9374e8f5SOleksij Rempel static const struct iio_info tsc2046_adc_info = { 411*9374e8f5SOleksij Rempel .update_scan_mode = tsc2046_adc_update_scan_mode, 412*9374e8f5SOleksij Rempel }; 413*9374e8f5SOleksij Rempel 414*9374e8f5SOleksij Rempel static enum hrtimer_restart tsc2046_adc_trig_more(struct hrtimer *hrtimer) 415*9374e8f5SOleksij Rempel { 416*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv = container_of(hrtimer, 417*9374e8f5SOleksij Rempel struct tsc2046_adc_priv, 418*9374e8f5SOleksij Rempel trig_timer); 419*9374e8f5SOleksij Rempel unsigned long flags; 420*9374e8f5SOleksij Rempel 421*9374e8f5SOleksij Rempel spin_lock_irqsave(&priv->trig_lock, flags); 422*9374e8f5SOleksij Rempel 423*9374e8f5SOleksij Rempel disable_irq_nosync(priv->spi->irq); 424*9374e8f5SOleksij Rempel 425*9374e8f5SOleksij Rempel priv->trig_more_count++; 426*9374e8f5SOleksij Rempel iio_trigger_poll(priv->trig); 427*9374e8f5SOleksij Rempel 428*9374e8f5SOleksij Rempel spin_unlock_irqrestore(&priv->trig_lock, flags); 429*9374e8f5SOleksij Rempel 430*9374e8f5SOleksij Rempel return HRTIMER_NORESTART; 431*9374e8f5SOleksij Rempel } 432*9374e8f5SOleksij Rempel 433*9374e8f5SOleksij Rempel static irqreturn_t tsc2046_adc_irq(int irq, void *dev_id) 434*9374e8f5SOleksij Rempel { 435*9374e8f5SOleksij Rempel struct iio_dev *indio_dev = dev_id; 436*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv = iio_priv(indio_dev); 437*9374e8f5SOleksij Rempel 438*9374e8f5SOleksij Rempel spin_lock(&priv->trig_lock); 439*9374e8f5SOleksij Rempel 440*9374e8f5SOleksij Rempel hrtimer_try_to_cancel(&priv->trig_timer); 441*9374e8f5SOleksij Rempel 442*9374e8f5SOleksij Rempel priv->trig_more_count = 0; 443*9374e8f5SOleksij Rempel disable_irq_nosync(priv->spi->irq); 444*9374e8f5SOleksij Rempel iio_trigger_poll(priv->trig); 445*9374e8f5SOleksij Rempel 446*9374e8f5SOleksij Rempel spin_unlock(&priv->trig_lock); 447*9374e8f5SOleksij Rempel 448*9374e8f5SOleksij Rempel return IRQ_HANDLED; 449*9374e8f5SOleksij Rempel } 450*9374e8f5SOleksij Rempel 451*9374e8f5SOleksij Rempel static void tsc2046_adc_reenable_trigger(struct iio_trigger *trig) 452*9374e8f5SOleksij Rempel { 453*9374e8f5SOleksij Rempel struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 454*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv = iio_priv(indio_dev); 455*9374e8f5SOleksij Rempel unsigned long flags; 456*9374e8f5SOleksij Rempel int delta; 457*9374e8f5SOleksij Rempel 458*9374e8f5SOleksij Rempel /* 459*9374e8f5SOleksij Rempel * We can sample it as fast as we can, but usually we do not need so 460*9374e8f5SOleksij Rempel * many samples. Reduce the sample rate for default (touchscreen) use 461*9374e8f5SOleksij Rempel * case. 462*9374e8f5SOleksij Rempel * Currently we do not need a highly precise sample rate. It is enough 463*9374e8f5SOleksij Rempel * to have calculated numbers. 464*9374e8f5SOleksij Rempel */ 465*9374e8f5SOleksij Rempel delta = priv->scan_interval_us - priv->time_per_scan_us; 466*9374e8f5SOleksij Rempel if (delta > 0) 467*9374e8f5SOleksij Rempel fsleep(delta); 468*9374e8f5SOleksij Rempel 469*9374e8f5SOleksij Rempel spin_lock_irqsave(&priv->trig_lock, flags); 470*9374e8f5SOleksij Rempel 471*9374e8f5SOleksij Rempel /* 472*9374e8f5SOleksij Rempel * We need to trigger at least one extra sample to detect state 473*9374e8f5SOleksij Rempel * difference on ADC side. 474*9374e8f5SOleksij Rempel */ 475*9374e8f5SOleksij Rempel if (!priv->trig_more_count) { 476*9374e8f5SOleksij Rempel int timeout_ms = DIV_ROUND_UP(priv->scan_interval_us, 477*9374e8f5SOleksij Rempel USEC_PER_MSEC); 478*9374e8f5SOleksij Rempel 479*9374e8f5SOleksij Rempel hrtimer_start(&priv->trig_timer, ms_to_ktime(timeout_ms), 480*9374e8f5SOleksij Rempel HRTIMER_MODE_REL_SOFT); 481*9374e8f5SOleksij Rempel } 482*9374e8f5SOleksij Rempel 483*9374e8f5SOleksij Rempel enable_irq(priv->spi->irq); 484*9374e8f5SOleksij Rempel 485*9374e8f5SOleksij Rempel spin_unlock_irqrestore(&priv->trig_lock, flags); 486*9374e8f5SOleksij Rempel } 487*9374e8f5SOleksij Rempel 488*9374e8f5SOleksij Rempel static int tsc2046_adc_set_trigger_state(struct iio_trigger *trig, bool enable) 489*9374e8f5SOleksij Rempel { 490*9374e8f5SOleksij Rempel struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 491*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv = iio_priv(indio_dev); 492*9374e8f5SOleksij Rempel 493*9374e8f5SOleksij Rempel if (enable) { 494*9374e8f5SOleksij Rempel enable_irq(priv->spi->irq); 495*9374e8f5SOleksij Rempel } else { 496*9374e8f5SOleksij Rempel disable_irq(priv->spi->irq); 497*9374e8f5SOleksij Rempel hrtimer_try_to_cancel(&priv->trig_timer); 498*9374e8f5SOleksij Rempel } 499*9374e8f5SOleksij Rempel 500*9374e8f5SOleksij Rempel return 0; 501*9374e8f5SOleksij Rempel } 502*9374e8f5SOleksij Rempel 503*9374e8f5SOleksij Rempel static const struct iio_trigger_ops tsc2046_adc_trigger_ops = { 504*9374e8f5SOleksij Rempel .set_trigger_state = tsc2046_adc_set_trigger_state, 505*9374e8f5SOleksij Rempel .reenable = tsc2046_adc_reenable_trigger, 506*9374e8f5SOleksij Rempel }; 507*9374e8f5SOleksij Rempel 508*9374e8f5SOleksij Rempel static int tsc2046_adc_setup_spi_msg(struct tsc2046_adc_priv *priv) 509*9374e8f5SOleksij Rempel { 510*9374e8f5SOleksij Rempel unsigned int ch_idx; 511*9374e8f5SOleksij Rempel size_t size; 512*9374e8f5SOleksij Rempel int ret; 513*9374e8f5SOleksij Rempel 514*9374e8f5SOleksij Rempel priv->tx_one = devm_kzalloc(&priv->spi->dev, sizeof(*priv->tx_one), 515*9374e8f5SOleksij Rempel GFP_KERNEL); 516*9374e8f5SOleksij Rempel if (!priv->tx_one) 517*9374e8f5SOleksij Rempel return -ENOMEM; 518*9374e8f5SOleksij Rempel 519*9374e8f5SOleksij Rempel priv->rx_one = devm_kzalloc(&priv->spi->dev, sizeof(*priv->rx_one), 520*9374e8f5SOleksij Rempel GFP_KERNEL); 521*9374e8f5SOleksij Rempel if (!priv->rx_one) 522*9374e8f5SOleksij Rempel return -ENOMEM; 523*9374e8f5SOleksij Rempel 524*9374e8f5SOleksij Rempel /* 525*9374e8f5SOleksij Rempel * Make dummy read to set initial power state and get real SPI clock 526*9374e8f5SOleksij Rempel * freq. It seems to be not important which channel is used for this 527*9374e8f5SOleksij Rempel * case. 528*9374e8f5SOleksij Rempel */ 529*9374e8f5SOleksij Rempel ret = tsc2046_adc_read_one(priv, TI_TSC2046_ADDR_TEMP0, 530*9374e8f5SOleksij Rempel &priv->effective_speed_hz); 531*9374e8f5SOleksij Rempel if (ret < 0) 532*9374e8f5SOleksij Rempel return ret; 533*9374e8f5SOleksij Rempel 534*9374e8f5SOleksij Rempel /* 535*9374e8f5SOleksij Rempel * In case SPI controller do not report effective_speed_hz, use 536*9374e8f5SOleksij Rempel * configure value and hope it will match. 537*9374e8f5SOleksij Rempel */ 538*9374e8f5SOleksij Rempel if (!priv->effective_speed_hz) 539*9374e8f5SOleksij Rempel priv->effective_speed_hz = priv->spi->max_speed_hz; 540*9374e8f5SOleksij Rempel 541*9374e8f5SOleksij Rempel 542*9374e8f5SOleksij Rempel priv->scan_interval_us = TI_TSC2046_SAMPLE_INTERVAL_US; 543*9374e8f5SOleksij Rempel priv->time_per_bit_ns = DIV_ROUND_UP(NSEC_PER_SEC, 544*9374e8f5SOleksij Rempel priv->effective_speed_hz); 545*9374e8f5SOleksij Rempel 546*9374e8f5SOleksij Rempel /* 547*9374e8f5SOleksij Rempel * Calculate and allocate maximal size buffer if all channels are 548*9374e8f5SOleksij Rempel * enabled. 549*9374e8f5SOleksij Rempel */ 550*9374e8f5SOleksij Rempel size = 0; 551*9374e8f5SOleksij Rempel for (ch_idx = 0; ch_idx < priv->dcfg->num_channels; ch_idx++) 552*9374e8f5SOleksij Rempel size += tsc2046_adc_group_set_layout(priv, ch_idx, ch_idx); 553*9374e8f5SOleksij Rempel 554*9374e8f5SOleksij Rempel priv->tx = devm_kzalloc(&priv->spi->dev, size, GFP_KERNEL); 555*9374e8f5SOleksij Rempel if (!priv->tx) 556*9374e8f5SOleksij Rempel return -ENOMEM; 557*9374e8f5SOleksij Rempel 558*9374e8f5SOleksij Rempel priv->rx = devm_kzalloc(&priv->spi->dev, size, GFP_KERNEL); 559*9374e8f5SOleksij Rempel if (!priv->rx) 560*9374e8f5SOleksij Rempel return -ENOMEM; 561*9374e8f5SOleksij Rempel 562*9374e8f5SOleksij Rempel priv->xfer.tx_buf = priv->tx; 563*9374e8f5SOleksij Rempel priv->xfer.rx_buf = priv->rx; 564*9374e8f5SOleksij Rempel priv->xfer.len = size; 565*9374e8f5SOleksij Rempel spi_message_init_with_transfers(&priv->msg, &priv->xfer, 1); 566*9374e8f5SOleksij Rempel 567*9374e8f5SOleksij Rempel return 0; 568*9374e8f5SOleksij Rempel } 569*9374e8f5SOleksij Rempel 570*9374e8f5SOleksij Rempel static void tsc2046_adc_parse_fwnode(struct tsc2046_adc_priv *priv) 571*9374e8f5SOleksij Rempel { 572*9374e8f5SOleksij Rempel struct fwnode_handle *child; 573*9374e8f5SOleksij Rempel struct device *dev = &priv->spi->dev; 574*9374e8f5SOleksij Rempel unsigned int i; 575*9374e8f5SOleksij Rempel 576*9374e8f5SOleksij Rempel for (i = 0; i < ARRAY_SIZE(priv->ch_cfg); i++) { 577*9374e8f5SOleksij Rempel priv->ch_cfg[i].settling_time_us = 1; 578*9374e8f5SOleksij Rempel priv->ch_cfg[i].oversampling_ratio = 1; 579*9374e8f5SOleksij Rempel } 580*9374e8f5SOleksij Rempel 581*9374e8f5SOleksij Rempel device_for_each_child_node(dev, child) { 582*9374e8f5SOleksij Rempel u32 stl, overs, reg; 583*9374e8f5SOleksij Rempel int ret; 584*9374e8f5SOleksij Rempel 585*9374e8f5SOleksij Rempel ret = fwnode_property_read_u32(child, "reg", ®); 586*9374e8f5SOleksij Rempel if (ret) { 587*9374e8f5SOleksij Rempel dev_err(dev, "invalid reg on %pfw, err: %pe\n", child, 588*9374e8f5SOleksij Rempel ERR_PTR(ret)); 589*9374e8f5SOleksij Rempel continue; 590*9374e8f5SOleksij Rempel } 591*9374e8f5SOleksij Rempel 592*9374e8f5SOleksij Rempel if (reg >= ARRAY_SIZE(priv->ch_cfg)) { 593*9374e8f5SOleksij Rempel dev_err(dev, "%pfw: Unsupported reg value: %i, max supported is: %zu.\n", 594*9374e8f5SOleksij Rempel child, reg, ARRAY_SIZE(priv->ch_cfg)); 595*9374e8f5SOleksij Rempel continue; 596*9374e8f5SOleksij Rempel } 597*9374e8f5SOleksij Rempel 598*9374e8f5SOleksij Rempel ret = fwnode_property_read_u32(child, "settling-time-us", &stl); 599*9374e8f5SOleksij Rempel if (!ret) 600*9374e8f5SOleksij Rempel priv->ch_cfg[reg].settling_time_us = stl; 601*9374e8f5SOleksij Rempel 602*9374e8f5SOleksij Rempel ret = fwnode_property_read_u32(child, "oversampling-ratio", 603*9374e8f5SOleksij Rempel &overs); 604*9374e8f5SOleksij Rempel if (!ret) 605*9374e8f5SOleksij Rempel priv->ch_cfg[reg].oversampling_ratio = overs; 606*9374e8f5SOleksij Rempel } 607*9374e8f5SOleksij Rempel } 608*9374e8f5SOleksij Rempel 609*9374e8f5SOleksij Rempel static int tsc2046_adc_probe(struct spi_device *spi) 610*9374e8f5SOleksij Rempel { 611*9374e8f5SOleksij Rempel const struct tsc2046_adc_dcfg *dcfg; 612*9374e8f5SOleksij Rempel struct device *dev = &spi->dev; 613*9374e8f5SOleksij Rempel struct tsc2046_adc_priv *priv; 614*9374e8f5SOleksij Rempel struct iio_dev *indio_dev; 615*9374e8f5SOleksij Rempel struct iio_trigger *trig; 616*9374e8f5SOleksij Rempel int ret; 617*9374e8f5SOleksij Rempel 618*9374e8f5SOleksij Rempel if (spi->max_speed_hz > TI_TSC2046_MAX_CLK_FREQ) { 619*9374e8f5SOleksij Rempel dev_err(dev, "SPI max_speed_hz is too high: %d Hz. Max supported freq is %zu Hz\n", 620*9374e8f5SOleksij Rempel spi->max_speed_hz, TI_TSC2046_MAX_CLK_FREQ); 621*9374e8f5SOleksij Rempel return -EINVAL; 622*9374e8f5SOleksij Rempel } 623*9374e8f5SOleksij Rempel 624*9374e8f5SOleksij Rempel dcfg = device_get_match_data(dev); 625*9374e8f5SOleksij Rempel if (!dcfg) 626*9374e8f5SOleksij Rempel return -EINVAL; 627*9374e8f5SOleksij Rempel 628*9374e8f5SOleksij Rempel spi->bits_per_word = 8; 629*9374e8f5SOleksij Rempel spi->mode &= ~SPI_MODE_X_MASK; 630*9374e8f5SOleksij Rempel spi->mode |= SPI_MODE_0; 631*9374e8f5SOleksij Rempel ret = spi_setup(spi); 632*9374e8f5SOleksij Rempel if (ret < 0) 633*9374e8f5SOleksij Rempel return dev_err_probe(dev, ret, "Error in SPI setup\n"); 634*9374e8f5SOleksij Rempel 635*9374e8f5SOleksij Rempel indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); 636*9374e8f5SOleksij Rempel if (!indio_dev) 637*9374e8f5SOleksij Rempel return -ENOMEM; 638*9374e8f5SOleksij Rempel 639*9374e8f5SOleksij Rempel priv = iio_priv(indio_dev); 640*9374e8f5SOleksij Rempel priv->dcfg = dcfg; 641*9374e8f5SOleksij Rempel 642*9374e8f5SOleksij Rempel spi_set_drvdata(spi, indio_dev); 643*9374e8f5SOleksij Rempel 644*9374e8f5SOleksij Rempel priv->spi = spi; 645*9374e8f5SOleksij Rempel 646*9374e8f5SOleksij Rempel indio_dev->name = TI_TSC2046_NAME; 647*9374e8f5SOleksij Rempel indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_TRIGGERED; 648*9374e8f5SOleksij Rempel indio_dev->channels = dcfg->channels; 649*9374e8f5SOleksij Rempel indio_dev->num_channels = dcfg->num_channels; 650*9374e8f5SOleksij Rempel indio_dev->info = &tsc2046_adc_info; 651*9374e8f5SOleksij Rempel 652*9374e8f5SOleksij Rempel tsc2046_adc_parse_fwnode(priv); 653*9374e8f5SOleksij Rempel 654*9374e8f5SOleksij Rempel ret = tsc2046_adc_setup_spi_msg(priv); 655*9374e8f5SOleksij Rempel if (ret) 656*9374e8f5SOleksij Rempel return ret; 657*9374e8f5SOleksij Rempel 658*9374e8f5SOleksij Rempel mutex_init(&priv->slock); 659*9374e8f5SOleksij Rempel 660*9374e8f5SOleksij Rempel ret = devm_request_irq(dev, spi->irq, &tsc2046_adc_irq, 661*9374e8f5SOleksij Rempel IRQF_NO_AUTOEN, indio_dev->name, indio_dev); 662*9374e8f5SOleksij Rempel if (ret) 663*9374e8f5SOleksij Rempel return ret; 664*9374e8f5SOleksij Rempel 665*9374e8f5SOleksij Rempel trig = devm_iio_trigger_alloc(dev, "touchscreen-%s", indio_dev->name); 666*9374e8f5SOleksij Rempel if (!trig) 667*9374e8f5SOleksij Rempel return -ENOMEM; 668*9374e8f5SOleksij Rempel 669*9374e8f5SOleksij Rempel priv->trig = trig; 670*9374e8f5SOleksij Rempel iio_trigger_set_drvdata(trig, indio_dev); 671*9374e8f5SOleksij Rempel trig->ops = &tsc2046_adc_trigger_ops; 672*9374e8f5SOleksij Rempel 673*9374e8f5SOleksij Rempel spin_lock_init(&priv->trig_lock); 674*9374e8f5SOleksij Rempel hrtimer_init(&priv->trig_timer, CLOCK_MONOTONIC, 675*9374e8f5SOleksij Rempel HRTIMER_MODE_REL_SOFT); 676*9374e8f5SOleksij Rempel priv->trig_timer.function = tsc2046_adc_trig_more; 677*9374e8f5SOleksij Rempel 678*9374e8f5SOleksij Rempel ret = devm_iio_trigger_register(dev, trig); 679*9374e8f5SOleksij Rempel if (ret) { 680*9374e8f5SOleksij Rempel dev_err(dev, "failed to register trigger\n"); 681*9374e8f5SOleksij Rempel return ret; 682*9374e8f5SOleksij Rempel } 683*9374e8f5SOleksij Rempel 684*9374e8f5SOleksij Rempel ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, 685*9374e8f5SOleksij Rempel &tsc2046_adc_trigger_handler, NULL); 686*9374e8f5SOleksij Rempel if (ret) { 687*9374e8f5SOleksij Rempel dev_err(dev, "Failed to setup triggered buffer\n"); 688*9374e8f5SOleksij Rempel return ret; 689*9374e8f5SOleksij Rempel } 690*9374e8f5SOleksij Rempel 691*9374e8f5SOleksij Rempel /* set default trigger */ 692*9374e8f5SOleksij Rempel indio_dev->trig = iio_trigger_get(priv->trig); 693*9374e8f5SOleksij Rempel 694*9374e8f5SOleksij Rempel return devm_iio_device_register(dev, indio_dev); 695*9374e8f5SOleksij Rempel } 696*9374e8f5SOleksij Rempel 697*9374e8f5SOleksij Rempel static const struct of_device_id ads7950_of_table[] = { 698*9374e8f5SOleksij Rempel { .compatible = "ti,tsc2046e-adc", .data = &tsc2046_adc_dcfg_tsc2046e }, 699*9374e8f5SOleksij Rempel { } 700*9374e8f5SOleksij Rempel }; 701*9374e8f5SOleksij Rempel MODULE_DEVICE_TABLE(of, ads7950_of_table); 702*9374e8f5SOleksij Rempel 703*9374e8f5SOleksij Rempel static struct spi_driver tsc2046_adc_driver = { 704*9374e8f5SOleksij Rempel .driver = { 705*9374e8f5SOleksij Rempel .name = "tsc2046", 706*9374e8f5SOleksij Rempel .of_match_table = ads7950_of_table, 707*9374e8f5SOleksij Rempel }, 708*9374e8f5SOleksij Rempel .probe = tsc2046_adc_probe, 709*9374e8f5SOleksij Rempel }; 710*9374e8f5SOleksij Rempel module_spi_driver(tsc2046_adc_driver); 711*9374e8f5SOleksij Rempel 712*9374e8f5SOleksij Rempel MODULE_AUTHOR("Oleksij Rempel <kernel@pengutronix.de>"); 713*9374e8f5SOleksij Rempel MODULE_DESCRIPTION("TI TSC2046 ADC"); 714*9374e8f5SOleksij Rempel MODULE_LICENSE("GPL v2"); 715