1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Texas Instruments LMP92064 SPI ADC driver 4 * 5 * Copyright (c) 2022 Leonard Göhrs <kernel@pengutronix.de>, Pengutronix 6 * 7 * Based on linux/drivers/iio/adc/ti-tsc2046.c 8 * Copyright (c) 2021 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix 9 */ 10 11 #include <linux/delay.h> 12 #include <linux/gpio/consumer.h> 13 #include <linux/module.h> 14 #include <linux/regmap.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/spi/spi.h> 17 18 #include <linux/iio/iio.h> 19 #include <linux/iio/driver.h> 20 21 #define TI_LMP92064_REG_CONFIG_A 0x0000 22 #define TI_LMP92064_REG_CONFIG_B 0x0001 23 #define TI_LMP92064_REG_CHIP_REV 0x0006 24 25 #define TI_LMP92064_REG_MFR_ID1 0x000C 26 #define TI_LMP92064_REG_MFR_ID2 0x000D 27 28 #define TI_LMP92064_REG_REG_UPDATE 0x000F 29 #define TI_LMP92064_REG_CONFIG_REG 0x0100 30 #define TI_LMP92064_REG_STATUS 0x0103 31 32 #define TI_LMP92064_REG_DATA_VOUT_LSB 0x0200 33 #define TI_LMP92064_REG_DATA_VOUT_MSB 0x0201 34 #define TI_LMP92064_REG_DATA_COUT_LSB 0x0202 35 #define TI_LMP92064_REG_DATA_COUT_MSB 0x0203 36 37 #define TI_LMP92064_VAL_CONFIG_A 0x99 38 #define TI_LMP92064_VAL_CONFIG_B 0x00 39 #define TI_LMP92064_VAL_STATUS_OK 0x01 40 41 /* 42 * Channel number definitions for the two channels of the device 43 * - IN Current (INC) 44 * - IN Voltage (INV) 45 */ 46 #define TI_LMP92064_CHAN_INC 0 47 #define TI_LMP92064_CHAN_INV 1 48 49 static const struct regmap_range lmp92064_readable_reg_ranges[] = { 50 regmap_reg_range(TI_LMP92064_REG_CONFIG_A, TI_LMP92064_REG_CHIP_REV), 51 regmap_reg_range(TI_LMP92064_REG_MFR_ID1, TI_LMP92064_REG_MFR_ID2), 52 regmap_reg_range(TI_LMP92064_REG_REG_UPDATE, TI_LMP92064_REG_REG_UPDATE), 53 regmap_reg_range(TI_LMP92064_REG_CONFIG_REG, TI_LMP92064_REG_CONFIG_REG), 54 regmap_reg_range(TI_LMP92064_REG_STATUS, TI_LMP92064_REG_STATUS), 55 regmap_reg_range(TI_LMP92064_REG_DATA_VOUT_LSB, TI_LMP92064_REG_DATA_COUT_MSB), 56 }; 57 58 static const struct regmap_access_table lmp92064_readable_regs = { 59 .yes_ranges = lmp92064_readable_reg_ranges, 60 .n_yes_ranges = ARRAY_SIZE(lmp92064_readable_reg_ranges), 61 }; 62 63 static const struct regmap_range lmp92064_writable_reg_ranges[] = { 64 regmap_reg_range(TI_LMP92064_REG_CONFIG_A, TI_LMP92064_REG_CONFIG_B), 65 regmap_reg_range(TI_LMP92064_REG_REG_UPDATE, TI_LMP92064_REG_REG_UPDATE), 66 regmap_reg_range(TI_LMP92064_REG_CONFIG_REG, TI_LMP92064_REG_CONFIG_REG), 67 }; 68 69 static const struct regmap_access_table lmp92064_writable_regs = { 70 .yes_ranges = lmp92064_writable_reg_ranges, 71 .n_yes_ranges = ARRAY_SIZE(lmp92064_writable_reg_ranges), 72 }; 73 74 static const struct regmap_config lmp92064_spi_regmap_config = { 75 .reg_bits = 16, 76 .val_bits = 8, 77 .max_register = TI_LMP92064_REG_DATA_COUT_MSB, 78 .rd_table = &lmp92064_readable_regs, 79 .wr_table = &lmp92064_writable_regs, 80 }; 81 82 struct lmp92064_adc_priv { 83 int shunt_resistor_uohm; 84 struct spi_device *spi; 85 struct regmap *regmap; 86 }; 87 88 static const struct iio_chan_spec lmp92064_adc_channels[] = { 89 { 90 .type = IIO_CURRENT, 91 .address = TI_LMP92064_CHAN_INC, 92 .info_mask_separate = 93 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 94 .datasheet_name = "INC", 95 }, 96 { 97 .type = IIO_VOLTAGE, 98 .address = TI_LMP92064_CHAN_INV, 99 .info_mask_separate = 100 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 101 .datasheet_name = "INV", 102 }, 103 }; 104 105 static int lmp92064_read_meas(struct lmp92064_adc_priv *priv, u16 *res) 106 { 107 __be16 raw[2]; 108 int ret; 109 110 /* 111 * The ADC only latches in new samples if all DATA registers are read 112 * in descending sequential order. 113 * The ADC auto-decrements the register index with each clocked byte. 114 * Read both channels in single SPI transfer by selecting the highest 115 * register using the command below and clocking out all four data 116 * bytes. 117 */ 118 119 ret = regmap_bulk_read(priv->regmap, TI_LMP92064_REG_DATA_COUT_MSB, 120 &raw, sizeof(raw)); 121 122 if (ret) { 123 dev_err(&priv->spi->dev, "regmap_bulk_read failed: %pe\n", 124 ERR_PTR(ret)); 125 return ret; 126 } 127 128 res[0] = be16_to_cpu(raw[0]); 129 res[1] = be16_to_cpu(raw[1]); 130 131 return 0; 132 } 133 134 static int lmp92064_read_raw(struct iio_dev *indio_dev, 135 struct iio_chan_spec const *chan, int *val, 136 int *val2, long mask) 137 { 138 struct lmp92064_adc_priv *priv = iio_priv(indio_dev); 139 u16 raw[2]; 140 int ret; 141 142 switch (mask) { 143 case IIO_CHAN_INFO_RAW: 144 ret = lmp92064_read_meas(priv, raw); 145 if (ret < 0) 146 return ret; 147 148 *val = (chan->address == TI_LMP92064_CHAN_INC) ? raw[0] : raw[1]; 149 150 return IIO_VAL_INT; 151 case IIO_CHAN_INFO_SCALE: 152 if (chan->address == TI_LMP92064_CHAN_INC) { 153 /* 154 * processed (mA) = raw * current_lsb (mA) 155 * current_lsb (mA) = shunt_voltage_lsb (nV) / shunt_resistor (uOhm) 156 * shunt_voltage_lsb (nV) = 81920000 / 4096 = 20000 157 */ 158 *val = 20000; 159 *val2 = priv->shunt_resistor_uohm; 160 } else { 161 /* 162 * processed (mV) = raw * voltage_lsb (mV) 163 * voltage_lsb (mV) = 2048 / 4096 164 */ 165 *val = 2048; 166 *val2 = 4096; 167 } 168 return IIO_VAL_FRACTIONAL; 169 default: 170 return -EINVAL; 171 } 172 } 173 174 static int lmp92064_reset(struct lmp92064_adc_priv *priv, 175 struct gpio_desc *gpio_reset) 176 { 177 unsigned int status; 178 int ret, i; 179 180 if (gpio_reset) { 181 /* 182 * Perform a hard reset if gpio_reset is available. 183 * The datasheet specifies a very low 3.5ns reset pulse duration and does not 184 * specify how long to wait after a reset to access the device. 185 * Use more conservative pulse lengths to allow analog RC filtering of the 186 * reset line at the board level (as recommended in the datasheet). 187 */ 188 gpiod_set_value_cansleep(gpio_reset, 1); 189 usleep_range(1, 10); 190 gpiod_set_value_cansleep(gpio_reset, 0); 191 usleep_range(500, 750); 192 } else { 193 /* 194 * Perform a soft-reset if not. 195 * Also write default values to the config registers that are not 196 * affected by soft reset. 197 */ 198 ret = regmap_write(priv->regmap, TI_LMP92064_REG_CONFIG_A, 199 TI_LMP92064_VAL_CONFIG_A); 200 if (ret < 0) 201 return ret; 202 203 ret = regmap_write(priv->regmap, TI_LMP92064_REG_CONFIG_B, 204 TI_LMP92064_VAL_CONFIG_B); 205 if (ret < 0) 206 return ret; 207 } 208 209 /* 210 * Wait for the device to signal readiness to prevent reading bogus data 211 * and make sure device is actually connected. 212 * The datasheet does not specify how long this takes but usually it is 213 * not more than 3-4 iterations of this loop. 214 */ 215 for (i = 0; i < 10; i++) { 216 ret = regmap_read(priv->regmap, TI_LMP92064_REG_STATUS, &status); 217 if (ret < 0) 218 return ret; 219 220 if (status == TI_LMP92064_VAL_STATUS_OK) 221 return 0; 222 223 usleep_range(1000, 2000); 224 } 225 226 /* 227 * No (correct) response received. 228 * Device is mostly likely not connected to the bus. 229 */ 230 return -ENXIO; 231 } 232 233 static const struct iio_info lmp92064_adc_info = { 234 .read_raw = lmp92064_read_raw, 235 }; 236 237 static int lmp92064_adc_probe(struct spi_device *spi) 238 { 239 struct device *dev = &spi->dev; 240 struct lmp92064_adc_priv *priv; 241 struct gpio_desc *gpio_reset; 242 struct iio_dev *indio_dev; 243 u32 shunt_resistor_uohm; 244 struct regmap *regmap; 245 int ret; 246 247 ret = spi_setup(spi); 248 if (ret < 0) 249 return dev_err_probe(dev, ret, "Error in SPI setup\n"); 250 251 regmap = devm_regmap_init_spi(spi, &lmp92064_spi_regmap_config); 252 if (IS_ERR(regmap)) 253 return dev_err_probe(dev, PTR_ERR(regmap), 254 "Failed to set up SPI regmap\n"); 255 256 indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); 257 if (!indio_dev) 258 return -ENOMEM; 259 260 priv = iio_priv(indio_dev); 261 262 priv->spi = spi; 263 priv->regmap = regmap; 264 265 ret = device_property_read_u32(dev, "shunt-resistor-micro-ohms", 266 &shunt_resistor_uohm); 267 if (ret < 0) 268 return dev_err_probe(dev, ret, 269 "Failed to get shunt-resistor value\n"); 270 271 /* 272 * The shunt resistance is passed to userspace as the denominator of an iio 273 * fraction. Make sure it is in range for that. 274 */ 275 if (shunt_resistor_uohm == 0 || shunt_resistor_uohm > INT_MAX) { 276 dev_err(dev, "Shunt resistance is out of range\n"); 277 return -EINVAL; 278 } 279 280 priv->shunt_resistor_uohm = shunt_resistor_uohm; 281 282 ret = devm_regulator_get_enable(dev, "vdd"); 283 if (ret) 284 return ret; 285 286 ret = devm_regulator_get_enable(dev, "vdig"); 287 if (ret) 288 return ret; 289 290 gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); 291 if (IS_ERR(gpio_reset)) 292 return dev_err_probe(dev, PTR_ERR(gpio_reset), 293 "Failed to get GPIO reset pin\n"); 294 295 ret = lmp92064_reset(priv, gpio_reset); 296 if (ret < 0) 297 return dev_err_probe(dev, ret, "Failed to reset device\n"); 298 299 indio_dev->name = "lmp92064"; 300 indio_dev->modes = INDIO_DIRECT_MODE; 301 indio_dev->channels = lmp92064_adc_channels; 302 indio_dev->num_channels = ARRAY_SIZE(lmp92064_adc_channels); 303 indio_dev->info = &lmp92064_adc_info; 304 305 return devm_iio_device_register(dev, indio_dev); 306 } 307 308 static const struct spi_device_id lmp92064_id_table[] = { 309 { "lmp92064" }, 310 {} 311 }; 312 MODULE_DEVICE_TABLE(spi, lmp92064_id_table); 313 314 static const struct of_device_id lmp92064_of_table[] = { 315 { .compatible = "ti,lmp92064" }, 316 {} 317 }; 318 MODULE_DEVICE_TABLE(of, lmp92064_of_table); 319 320 static struct spi_driver lmp92064_adc_driver = { 321 .driver = { 322 .name = "lmp92064", 323 .of_match_table = lmp92064_of_table, 324 }, 325 .probe = lmp92064_adc_probe, 326 .id_table = lmp92064_id_table, 327 }; 328 module_spi_driver(lmp92064_adc_driver); 329 330 MODULE_AUTHOR("Leonard Göhrs <kernel@pengutronix.de>"); 331 MODULE_DESCRIPTION("TI LMP92064 ADC"); 332 MODULE_LICENSE("GPL"); 333