1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * STMicroelectronics STMPE811 IIO ADC Driver 4 * 5 * 4 channel, 10/12-bit ADC 6 * 7 * Copyright (C) 2013-2018 Toradex AG <stefan.agner@toradex.com> 8 */ 9 10 #include <linux/completion.h> 11 #include <linux/err.h> 12 #include <linux/iio/iio.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/mfd/stmpe.h> 16 #include <linux/module.h> 17 #include <linux/of_platform.h> 18 #include <linux/platform_device.h> 19 #include <linux/device.h> 20 21 #define STMPE_REG_INT_STA 0x0B 22 #define STMPE_REG_ADC_INT_EN 0x0E 23 #define STMPE_REG_ADC_INT_STA 0x0F 24 25 #define STMPE_REG_ADC_CTRL1 0x20 26 #define STMPE_REG_ADC_CTRL2 0x21 27 #define STMPE_REG_ADC_CAPT 0x22 28 #define STMPE_REG_ADC_DATA_CH(channel) (0x30 + 2 * (channel)) 29 30 #define STMPE_REG_TEMP_CTRL 0x60 31 #define STMPE_TEMP_CTRL_ENABLE BIT(0) 32 #define STMPE_TEMP_CTRL_ACQ BIT(1) 33 #define STMPE_TEMP_CTRL_THRES_EN BIT(3) 34 #define STMPE_START_ONE_TEMP_CONV (STMPE_TEMP_CTRL_ENABLE | \ 35 STMPE_TEMP_CTRL_ACQ | \ 36 STMPE_TEMP_CTRL_THRES_EN) 37 #define STMPE_REG_TEMP_DATA 0x61 38 #define STMPE_REG_TEMP_TH 0x63 39 #define STMPE_ADC_LAST_NR 7 40 #define STMPE_TEMP_CHANNEL (STMPE_ADC_LAST_NR + 1) 41 42 #define STMPE_ADC_CH(channel) ((1 << (channel)) & 0xff) 43 44 #define STMPE_ADC_TIMEOUT msecs_to_jiffies(1000) 45 46 struct stmpe_adc { 47 struct stmpe *stmpe; 48 struct clk *clk; 49 struct device *dev; 50 struct mutex lock; 51 52 /* We are allocating plus one for the temperature channel */ 53 struct iio_chan_spec stmpe_adc_iio_channels[STMPE_ADC_LAST_NR + 2]; 54 55 struct completion completion; 56 57 u8 channel; 58 u32 value; 59 }; 60 61 static int stmpe_read_voltage(struct stmpe_adc *info, 62 struct iio_chan_spec const *chan, int *val) 63 { 64 long ret; 65 66 mutex_lock(&info->lock); 67 68 info->channel = (u8)chan->channel; 69 70 if (info->channel > STMPE_ADC_LAST_NR) { 71 mutex_unlock(&info->lock); 72 return -EINVAL; 73 } 74 75 stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_EN, 76 STMPE_ADC_CH(info->channel)); 77 78 stmpe_reg_write(info->stmpe, STMPE_REG_ADC_CAPT, 79 STMPE_ADC_CH(info->channel)); 80 81 ret = wait_for_completion_interruptible_timeout 82 (&info->completion, STMPE_ADC_TIMEOUT); 83 84 if (ret <= 0) { 85 mutex_unlock(&info->lock); 86 if (ret == 0) 87 return -ETIMEDOUT; 88 else 89 return ret; 90 } 91 92 *val = info->value; 93 94 mutex_unlock(&info->lock); 95 96 return 0; 97 } 98 99 static int stmpe_read_temp(struct stmpe_adc *info, 100 struct iio_chan_spec const *chan, int *val) 101 { 102 long ret; 103 104 mutex_lock(&info->lock); 105 106 info->channel = (u8)chan->channel; 107 108 if (info->channel != STMPE_TEMP_CHANNEL) { 109 mutex_unlock(&info->lock); 110 return -EINVAL; 111 } 112 113 stmpe_reg_write(info->stmpe, STMPE_REG_TEMP_CTRL, 114 STMPE_START_ONE_TEMP_CONV); 115 116 ret = wait_for_completion_interruptible_timeout 117 (&info->completion, STMPE_ADC_TIMEOUT); 118 119 if (ret <= 0) { 120 mutex_unlock(&info->lock); 121 if (ret == 0) 122 return -ETIMEDOUT; 123 else 124 return ret; 125 } 126 127 /* 128 * absolute temp = +V3.3 * value /7.51 [K] 129 * scale to [milli °C] 130 */ 131 *val = ((449960l * info->value) / 1024l) - 273150; 132 133 mutex_unlock(&info->lock); 134 135 return 0; 136 } 137 138 static int stmpe_read_raw(struct iio_dev *indio_dev, 139 struct iio_chan_spec const *chan, 140 int *val, 141 int *val2, 142 long mask) 143 { 144 struct stmpe_adc *info = iio_priv(indio_dev); 145 long ret; 146 147 switch (mask) { 148 case IIO_CHAN_INFO_RAW: 149 case IIO_CHAN_INFO_PROCESSED: 150 151 switch (chan->type) { 152 case IIO_VOLTAGE: 153 ret = stmpe_read_voltage(info, chan, val); 154 break; 155 156 case IIO_TEMP: 157 ret = stmpe_read_temp(info, chan, val); 158 break; 159 default: 160 return -EINVAL; 161 } 162 163 if (ret < 0) 164 return ret; 165 166 return IIO_VAL_INT; 167 168 case IIO_CHAN_INFO_SCALE: 169 *val = 3300; 170 *val2 = info->stmpe->mod_12b ? 12 : 10; 171 return IIO_VAL_FRACTIONAL_LOG2; 172 173 default: 174 break; 175 } 176 177 return -EINVAL; 178 } 179 180 static irqreturn_t stmpe_adc_isr(int irq, void *dev_id) 181 { 182 struct stmpe_adc *info = (struct stmpe_adc *)dev_id; 183 u16 data; 184 185 if (info->channel <= STMPE_ADC_LAST_NR) { 186 int int_sta; 187 188 int_sta = stmpe_reg_read(info->stmpe, STMPE_REG_ADC_INT_STA); 189 190 /* Is the interrupt relevant */ 191 if (!(int_sta & STMPE_ADC_CH(info->channel))) 192 return IRQ_NONE; 193 194 /* Read value */ 195 stmpe_block_read(info->stmpe, 196 STMPE_REG_ADC_DATA_CH(info->channel), 2, (u8 *) &data); 197 198 stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA, int_sta); 199 } else if (info->channel == STMPE_TEMP_CHANNEL) { 200 /* Read value */ 201 stmpe_block_read(info->stmpe, STMPE_REG_TEMP_DATA, 2, 202 (u8 *) &data); 203 } else { 204 return IRQ_NONE; 205 } 206 207 info->value = (u32) be16_to_cpu(data); 208 complete(&info->completion); 209 210 return IRQ_HANDLED; 211 } 212 213 static const struct iio_info stmpe_adc_iio_info = { 214 .read_raw = &stmpe_read_raw, 215 }; 216 217 static void stmpe_adc_voltage_chan(struct iio_chan_spec *ics, int chan) 218 { 219 ics->type = IIO_VOLTAGE; 220 ics->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 221 ics->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 222 ics->indexed = 1; 223 ics->channel = chan; 224 } 225 226 static void stmpe_adc_temp_chan(struct iio_chan_spec *ics, int chan) 227 { 228 ics->type = IIO_TEMP; 229 ics->info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED); 230 ics->indexed = 1; 231 ics->channel = chan; 232 } 233 234 static int stmpe_adc_init_hw(struct stmpe_adc *adc) 235 { 236 int ret; 237 struct stmpe *stmpe = adc->stmpe; 238 239 ret = stmpe_enable(stmpe, STMPE_BLOCK_ADC); 240 if (ret) { 241 dev_err(stmpe->dev, "Could not enable clock for ADC\n"); 242 return ret; 243 } 244 245 ret = stmpe811_adc_common_init(stmpe); 246 if (ret) { 247 stmpe_disable(stmpe, STMPE_BLOCK_ADC); 248 return ret; 249 } 250 251 /* use temp irq for each conversion completion */ 252 stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH, 0); 253 stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH + 1, 0); 254 255 return 0; 256 } 257 258 static int stmpe_adc_probe(struct platform_device *pdev) 259 { 260 struct iio_dev *indio_dev; 261 struct stmpe_adc *info; 262 struct device_node *np; 263 u32 norequest_mask = 0; 264 int irq_temp, irq_adc; 265 int num_chan = 0; 266 int i = 0; 267 int ret; 268 269 irq_adc = platform_get_irq_byname(pdev, "STMPE_ADC"); 270 if (irq_adc < 0) 271 return irq_adc; 272 273 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(struct stmpe_adc)); 274 if (!indio_dev) { 275 dev_err(&pdev->dev, "failed allocating iio device\n"); 276 return -ENOMEM; 277 } 278 279 info = iio_priv(indio_dev); 280 mutex_init(&info->lock); 281 282 init_completion(&info->completion); 283 ret = devm_request_threaded_irq(&pdev->dev, irq_adc, NULL, 284 stmpe_adc_isr, IRQF_ONESHOT, 285 "stmpe-adc", info); 286 if (ret < 0) { 287 dev_err(&pdev->dev, "failed requesting irq, irq = %d\n", 288 irq_adc); 289 return ret; 290 } 291 292 irq_temp = platform_get_irq_byname(pdev, "STMPE_TEMP_SENS"); 293 if (irq_temp >= 0) { 294 ret = devm_request_threaded_irq(&pdev->dev, irq_temp, NULL, 295 stmpe_adc_isr, IRQF_ONESHOT, 296 "stmpe-adc", info); 297 if (ret < 0) 298 dev_warn(&pdev->dev, "failed requesting irq for" 299 " temp sensor, irq = %d\n", irq_temp); 300 } 301 302 platform_set_drvdata(pdev, indio_dev); 303 304 indio_dev->name = dev_name(&pdev->dev); 305 indio_dev->dev.parent = &pdev->dev; 306 indio_dev->info = &stmpe_adc_iio_info; 307 indio_dev->modes = INDIO_DIRECT_MODE; 308 309 info->stmpe = dev_get_drvdata(pdev->dev.parent); 310 311 np = pdev->dev.of_node; 312 313 if (!np) 314 dev_err(&pdev->dev, "no device tree node found\n"); 315 316 of_property_read_u32(np, "st,norequest-mask", &norequest_mask); 317 318 for_each_clear_bit(i, (unsigned long *) &norequest_mask, 319 (STMPE_ADC_LAST_NR + 1)) { 320 stmpe_adc_voltage_chan(&info->stmpe_adc_iio_channels[num_chan], i); 321 num_chan++; 322 } 323 stmpe_adc_temp_chan(&info->stmpe_adc_iio_channels[num_chan], i); 324 num_chan++; 325 indio_dev->channels = info->stmpe_adc_iio_channels; 326 indio_dev->num_channels = num_chan; 327 328 ret = stmpe_adc_init_hw(info); 329 if (ret) 330 return ret; 331 332 return devm_iio_device_register(&pdev->dev, indio_dev); 333 } 334 335 static int __maybe_unused stmpe_adc_resume(struct device *dev) 336 { 337 struct iio_dev *indio_dev = dev_get_drvdata(dev); 338 struct stmpe_adc *info = iio_priv(indio_dev); 339 340 stmpe_adc_init_hw(info); 341 342 return 0; 343 } 344 345 static SIMPLE_DEV_PM_OPS(stmpe_adc_pm_ops, NULL, stmpe_adc_resume); 346 347 static struct platform_driver stmpe_adc_driver = { 348 .probe = stmpe_adc_probe, 349 .driver = { 350 .name = "stmpe-adc", 351 .pm = &stmpe_adc_pm_ops, 352 }, 353 }; 354 module_platform_driver(stmpe_adc_driver); 355 356 static const struct of_device_id stmpe_adc_ids[] = { 357 { .compatible = "st,stmpe-adc", }, 358 { }, 359 }; 360 MODULE_DEVICE_TABLE(of, stmpe_adc_ids); 361 362 MODULE_AUTHOR("Stefan Agner <stefan.agner@toradex.com>"); 363 MODULE_DESCRIPTION("STMPEXXX ADC driver"); 364 MODULE_LICENSE("GPL v2"); 365 MODULE_ALIAS("platform:stmpe-adc"); 366