1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * STMicroelectronics STMPE811 IIO ADC Driver 4 * 5 * 4 channel, 10/12-bit ADC 6 * 7 * Copyright (C) 2013-2018 Toradex AG <stefan.agner@toradex.com> 8 */ 9 10 #include <linux/completion.h> 11 #include <linux/err.h> 12 #include <linux/iio/iio.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/mfd/stmpe.h> 16 #include <linux/module.h> 17 #include <linux/of_platform.h> 18 #include <linux/platform_device.h> 19 #include <linux/device.h> 20 21 #define STMPE_REG_INT_STA 0x0B 22 #define STMPE_REG_ADC_INT_EN 0x0E 23 #define STMPE_REG_ADC_INT_STA 0x0F 24 25 #define STMPE_REG_ADC_CTRL1 0x20 26 #define STMPE_REG_ADC_CTRL2 0x21 27 #define STMPE_REG_ADC_CAPT 0x22 28 #define STMPE_REG_ADC_DATA_CH(channel) (0x30 + 2 * (channel)) 29 30 #define STMPE_REG_TEMP_CTRL 0x60 31 #define STMPE_TEMP_CTRL_ENABLE BIT(0) 32 #define STMPE_TEMP_CTRL_ACQ BIT(1) 33 #define STMPE_TEMP_CTRL_THRES_EN BIT(3) 34 #define STMPE_START_ONE_TEMP_CONV (STMPE_TEMP_CTRL_ENABLE | \ 35 STMPE_TEMP_CTRL_ACQ | \ 36 STMPE_TEMP_CTRL_THRES_EN) 37 #define STMPE_REG_TEMP_DATA 0x61 38 #define STMPE_REG_TEMP_TH 0x63 39 #define STMPE_ADC_LAST_NR 7 40 #define STMPE_TEMP_CHANNEL (STMPE_ADC_LAST_NR + 1) 41 42 #define STMPE_ADC_CH(channel) ((1 << (channel)) & 0xff) 43 44 #define STMPE_ADC_TIMEOUT msecs_to_jiffies(1000) 45 46 struct stmpe_adc { 47 struct stmpe *stmpe; 48 struct clk *clk; 49 struct device *dev; 50 struct mutex lock; 51 52 /* We are allocating plus one for the temperature channel */ 53 struct iio_chan_spec stmpe_adc_iio_channels[STMPE_ADC_LAST_NR + 2]; 54 55 struct completion completion; 56 57 u8 channel; 58 u32 value; 59 }; 60 61 static int stmpe_read_voltage(struct stmpe_adc *info, 62 struct iio_chan_spec const *chan, int *val) 63 { 64 long ret; 65 66 mutex_lock(&info->lock); 67 68 info->channel = (u8)chan->channel; 69 70 if (info->channel > STMPE_ADC_LAST_NR) { 71 mutex_unlock(&info->lock); 72 return -EINVAL; 73 } 74 75 stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_EN, 76 STMPE_ADC_CH(info->channel)); 77 78 stmpe_reg_write(info->stmpe, STMPE_REG_ADC_CAPT, 79 STMPE_ADC_CH(info->channel)); 80 81 *val = info->value; 82 83 ret = wait_for_completion_interruptible_timeout 84 (&info->completion, STMPE_ADC_TIMEOUT); 85 86 if (ret <= 0) { 87 mutex_unlock(&info->lock); 88 if (ret == 0) 89 return -ETIMEDOUT; 90 else 91 return ret; 92 } 93 94 *val = info->value; 95 96 mutex_unlock(&info->lock); 97 98 return 0; 99 } 100 101 static int stmpe_read_temp(struct stmpe_adc *info, 102 struct iio_chan_spec const *chan, int *val) 103 { 104 long ret; 105 106 mutex_lock(&info->lock); 107 108 info->channel = (u8)chan->channel; 109 110 if (info->channel != STMPE_TEMP_CHANNEL) { 111 mutex_unlock(&info->lock); 112 return -EINVAL; 113 } 114 115 stmpe_reg_write(info->stmpe, STMPE_REG_TEMP_CTRL, 116 STMPE_START_ONE_TEMP_CONV); 117 118 ret = wait_for_completion_interruptible_timeout 119 (&info->completion, STMPE_ADC_TIMEOUT); 120 121 if (ret <= 0) { 122 mutex_unlock(&info->lock); 123 if (ret == 0) 124 return -ETIMEDOUT; 125 else 126 return ret; 127 } 128 129 /* 130 * absolute temp = +V3.3 * value /7.51 [K] 131 * scale to [milli °C] 132 */ 133 *val = ((449960l * info->value) / 1024l) - 273150; 134 135 mutex_unlock(&info->lock); 136 137 return 0; 138 } 139 140 static int stmpe_read_raw(struct iio_dev *indio_dev, 141 struct iio_chan_spec const *chan, 142 int *val, 143 int *val2, 144 long mask) 145 { 146 struct stmpe_adc *info = iio_priv(indio_dev); 147 long ret; 148 149 switch (mask) { 150 case IIO_CHAN_INFO_RAW: 151 case IIO_CHAN_INFO_PROCESSED: 152 153 switch (chan->type) { 154 case IIO_VOLTAGE: 155 ret = stmpe_read_voltage(info, chan, val); 156 break; 157 158 case IIO_TEMP: 159 ret = stmpe_read_temp(info, chan, val); 160 break; 161 default: 162 return -EINVAL; 163 } 164 165 if (ret < 0) 166 return ret; 167 168 return IIO_VAL_INT; 169 170 case IIO_CHAN_INFO_SCALE: 171 *val = 3300; 172 *val2 = info->stmpe->mod_12b ? 12 : 10; 173 return IIO_VAL_FRACTIONAL_LOG2; 174 175 default: 176 break; 177 } 178 179 return -EINVAL; 180 } 181 182 static irqreturn_t stmpe_adc_isr(int irq, void *dev_id) 183 { 184 struct stmpe_adc *info = (struct stmpe_adc *)dev_id; 185 u16 data; 186 187 if (info->channel <= STMPE_ADC_LAST_NR) { 188 int int_sta; 189 190 int_sta = stmpe_reg_read(info->stmpe, STMPE_REG_ADC_INT_STA); 191 192 /* Is the interrupt relevant */ 193 if (!(int_sta & STMPE_ADC_CH(info->channel))) 194 return IRQ_NONE; 195 196 /* Read value */ 197 stmpe_block_read(info->stmpe, 198 STMPE_REG_ADC_DATA_CH(info->channel), 2, (u8 *) &data); 199 200 stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA, int_sta); 201 } else if (info->channel == STMPE_TEMP_CHANNEL) { 202 /* Read value */ 203 stmpe_block_read(info->stmpe, STMPE_REG_TEMP_DATA, 2, 204 (u8 *) &data); 205 } else { 206 return IRQ_NONE; 207 } 208 209 info->value = (u32) be16_to_cpu(data); 210 complete(&info->completion); 211 212 return IRQ_HANDLED; 213 } 214 215 static const struct iio_info stmpe_adc_iio_info = { 216 .read_raw = &stmpe_read_raw, 217 }; 218 219 static void stmpe_adc_voltage_chan(struct iio_chan_spec *ics, int chan) 220 { 221 ics->type = IIO_VOLTAGE; 222 ics->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 223 ics->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 224 ics->indexed = 1; 225 ics->channel = chan; 226 } 227 228 static void stmpe_adc_temp_chan(struct iio_chan_spec *ics, int chan) 229 { 230 ics->type = IIO_TEMP; 231 ics->info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED); 232 ics->indexed = 1; 233 ics->channel = chan; 234 } 235 236 static int stmpe_adc_init_hw(struct stmpe_adc *adc) 237 { 238 int ret; 239 struct stmpe *stmpe = adc->stmpe; 240 241 ret = stmpe_enable(stmpe, STMPE_BLOCK_ADC); 242 if (ret) { 243 dev_err(stmpe->dev, "Could not enable clock for ADC\n"); 244 return ret; 245 } 246 247 ret = stmpe811_adc_common_init(stmpe); 248 if (ret) { 249 stmpe_disable(stmpe, STMPE_BLOCK_ADC); 250 return ret; 251 } 252 253 /* use temp irq for each conversion completion */ 254 stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH, 0); 255 stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH + 1, 0); 256 257 return 0; 258 } 259 260 static int stmpe_adc_probe(struct platform_device *pdev) 261 { 262 struct iio_dev *indio_dev; 263 struct stmpe_adc *info; 264 struct device_node *np; 265 u32 norequest_mask = 0; 266 int irq_temp, irq_adc; 267 int num_chan = 0; 268 int i = 0; 269 int ret; 270 271 irq_adc = platform_get_irq_byname(pdev, "STMPE_ADC"); 272 if (irq_adc < 0) 273 return irq_adc; 274 275 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(struct stmpe_adc)); 276 if (!indio_dev) { 277 dev_err(&pdev->dev, "failed allocating iio device\n"); 278 return -ENOMEM; 279 } 280 281 info = iio_priv(indio_dev); 282 mutex_init(&info->lock); 283 284 init_completion(&info->completion); 285 ret = devm_request_threaded_irq(&pdev->dev, irq_adc, NULL, 286 stmpe_adc_isr, IRQF_ONESHOT, 287 "stmpe-adc", info); 288 if (ret < 0) { 289 dev_err(&pdev->dev, "failed requesting irq, irq = %d\n", 290 irq_adc); 291 return ret; 292 } 293 294 irq_temp = platform_get_irq_byname(pdev, "STMPE_TEMP_SENS"); 295 if (irq_temp >= 0) { 296 ret = devm_request_threaded_irq(&pdev->dev, irq_temp, NULL, 297 stmpe_adc_isr, IRQF_ONESHOT, 298 "stmpe-adc", info); 299 if (ret < 0) 300 dev_warn(&pdev->dev, "failed requesting irq for" 301 " temp sensor, irq = %d\n", irq_temp); 302 } 303 304 platform_set_drvdata(pdev, indio_dev); 305 306 indio_dev->name = dev_name(&pdev->dev); 307 indio_dev->dev.parent = &pdev->dev; 308 indio_dev->info = &stmpe_adc_iio_info; 309 indio_dev->modes = INDIO_DIRECT_MODE; 310 311 info->stmpe = dev_get_drvdata(pdev->dev.parent); 312 313 np = pdev->dev.of_node; 314 315 if (!np) 316 dev_err(&pdev->dev, "no device tree node found\n"); 317 318 of_property_read_u32(np, "st,norequest-mask", &norequest_mask); 319 320 for_each_clear_bit(i, (unsigned long *) &norequest_mask, 321 (STMPE_ADC_LAST_NR + 1)) { 322 stmpe_adc_voltage_chan(&info->stmpe_adc_iio_channels[num_chan], i); 323 num_chan++; 324 } 325 stmpe_adc_temp_chan(&info->stmpe_adc_iio_channels[num_chan], i); 326 num_chan++; 327 indio_dev->channels = info->stmpe_adc_iio_channels; 328 indio_dev->num_channels = num_chan; 329 330 ret = stmpe_adc_init_hw(info); 331 if (ret) 332 return ret; 333 334 return devm_iio_device_register(&pdev->dev, indio_dev); 335 } 336 337 static int __maybe_unused stmpe_adc_resume(struct device *dev) 338 { 339 struct iio_dev *indio_dev = dev_get_drvdata(dev); 340 struct stmpe_adc *info = iio_priv(indio_dev); 341 342 stmpe_adc_init_hw(info); 343 344 return 0; 345 } 346 347 static SIMPLE_DEV_PM_OPS(stmpe_adc_pm_ops, NULL, stmpe_adc_resume); 348 349 static struct platform_driver stmpe_adc_driver = { 350 .probe = stmpe_adc_probe, 351 .driver = { 352 .name = "stmpe-adc", 353 .pm = &stmpe_adc_pm_ops, 354 }, 355 }; 356 357 module_platform_driver(stmpe_adc_driver); 358 359 MODULE_AUTHOR("Stefan Agner <stefan.agner@toradex.com>"); 360 MODULE_DESCRIPTION("STMPEXXX ADC driver"); 361 MODULE_LICENSE("GPL v2"); 362 MODULE_ALIAS("platform:stmpe-adc"); 363