1 /* 2 * Copyright (C) 2013 Oskar Andero <oskar.andero@gmail.com> 3 * Copyright (C) 2014 Rose Technology 4 * Allan Bendorff Jensen <abj@rosetechnology.dk> 5 * Soren Andersen <san@rosetechnology.dk> 6 * 7 * Driver for following ADC chips from Microchip Technology's: 8 * 10 Bit converter 9 * MCP3001 10 * MCP3002 11 * MCP3004 12 * MCP3008 13 * ------------ 14 * 12 bit converter 15 * MCP3201 16 * MCP3202 17 * MCP3204 18 * MCP3208 19 * ------------ 20 * 13 bit converter 21 * MCP3301 22 * 23 * Datasheet can be found here: 24 * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001 25 * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002 26 * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08 27 * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201 28 * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202 29 * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08 30 * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301 31 * 32 * This program is free software; you can redistribute it and/or modify 33 * it under the terms of the GNU General Public License version 2 as 34 * published by the Free Software Foundation. 35 */ 36 37 #include <linux/err.h> 38 #include <linux/delay.h> 39 #include <linux/spi/spi.h> 40 #include <linux/module.h> 41 #include <linux/iio/iio.h> 42 #include <linux/regulator/consumer.h> 43 44 enum { 45 mcp3001, 46 mcp3002, 47 mcp3004, 48 mcp3008, 49 mcp3201, 50 mcp3202, 51 mcp3204, 52 mcp3208, 53 mcp3301, 54 }; 55 56 struct mcp320x_chip_info { 57 const struct iio_chan_spec *channels; 58 unsigned int num_channels; 59 unsigned int resolution; 60 }; 61 62 struct mcp320x { 63 struct spi_device *spi; 64 struct spi_message msg; 65 struct spi_transfer transfer[2]; 66 67 struct regulator *reg; 68 struct mutex lock; 69 const struct mcp320x_chip_info *chip_info; 70 71 u8 tx_buf ____cacheline_aligned; 72 u8 rx_buf[2]; 73 }; 74 75 static int mcp320x_channel_to_tx_data(int device_index, 76 const unsigned int channel, bool differential) 77 { 78 int start_bit = 1; 79 80 switch (device_index) { 81 case mcp3001: 82 case mcp3201: 83 case mcp3301: 84 return 0; 85 case mcp3002: 86 case mcp3202: 87 return ((start_bit << 4) | (!differential << 3) | 88 (channel << 2)); 89 case mcp3004: 90 case mcp3204: 91 case mcp3008: 92 case mcp3208: 93 return ((start_bit << 6) | (!differential << 5) | 94 (channel << 2)); 95 default: 96 return -EINVAL; 97 } 98 } 99 100 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, 101 bool differential, int device_index, int *val) 102 { 103 int ret; 104 105 adc->rx_buf[0] = 0; 106 adc->rx_buf[1] = 0; 107 adc->tx_buf = mcp320x_channel_to_tx_data(device_index, 108 channel, differential); 109 110 if (device_index != mcp3001 && device_index != mcp3201 && device_index != mcp3301) { 111 ret = spi_sync(adc->spi, &adc->msg); 112 if (ret < 0) 113 return ret; 114 } else { 115 ret = spi_read(adc->spi, &adc->rx_buf, sizeof(adc->rx_buf)); 116 if (ret < 0) 117 return ret; 118 } 119 120 switch (device_index) { 121 case mcp3001: 122 *val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3); 123 return 0; 124 case mcp3002: 125 case mcp3004: 126 case mcp3008: 127 *val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6); 128 return 0; 129 case mcp3201: 130 *val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1); 131 return 0; 132 case mcp3202: 133 case mcp3204: 134 case mcp3208: 135 *val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4); 136 return 0; 137 case mcp3301: 138 *val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8 139 | adc->rx_buf[1], 12); 140 return 0; 141 default: 142 return -EINVAL; 143 } 144 } 145 146 static int mcp320x_read_raw(struct iio_dev *indio_dev, 147 struct iio_chan_spec const *channel, int *val, 148 int *val2, long mask) 149 { 150 struct mcp320x *adc = iio_priv(indio_dev); 151 int ret = -EINVAL; 152 int device_index = 0; 153 154 mutex_lock(&adc->lock); 155 156 device_index = spi_get_device_id(adc->spi)->driver_data; 157 158 switch (mask) { 159 case IIO_CHAN_INFO_RAW: 160 ret = mcp320x_adc_conversion(adc, channel->address, 161 channel->differential, device_index, val); 162 if (ret < 0) 163 goto out; 164 165 ret = IIO_VAL_INT; 166 break; 167 168 case IIO_CHAN_INFO_SCALE: 169 ret = regulator_get_voltage(adc->reg); 170 if (ret < 0) 171 goto out; 172 173 /* convert regulator output voltage to mV */ 174 *val = ret / 1000; 175 *val2 = adc->chip_info->resolution; 176 ret = IIO_VAL_FRACTIONAL_LOG2; 177 break; 178 } 179 180 out: 181 mutex_unlock(&adc->lock); 182 183 return ret; 184 } 185 186 #define MCP320X_VOLTAGE_CHANNEL(num) \ 187 { \ 188 .type = IIO_VOLTAGE, \ 189 .indexed = 1, \ 190 .channel = (num), \ 191 .address = (num), \ 192 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 193 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 194 } 195 196 #define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2) \ 197 { \ 198 .type = IIO_VOLTAGE, \ 199 .indexed = 1, \ 200 .channel = (chan1), \ 201 .channel2 = (chan2), \ 202 .address = (chan1), \ 203 .differential = 1, \ 204 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 205 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 206 } 207 208 static const struct iio_chan_spec mcp3201_channels[] = { 209 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1), 210 }; 211 212 static const struct iio_chan_spec mcp3202_channels[] = { 213 MCP320X_VOLTAGE_CHANNEL(0), 214 MCP320X_VOLTAGE_CHANNEL(1), 215 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1), 216 MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0), 217 }; 218 219 static const struct iio_chan_spec mcp3204_channels[] = { 220 MCP320X_VOLTAGE_CHANNEL(0), 221 MCP320X_VOLTAGE_CHANNEL(1), 222 MCP320X_VOLTAGE_CHANNEL(2), 223 MCP320X_VOLTAGE_CHANNEL(3), 224 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1), 225 MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0), 226 MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3), 227 MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2), 228 }; 229 230 static const struct iio_chan_spec mcp3208_channels[] = { 231 MCP320X_VOLTAGE_CHANNEL(0), 232 MCP320X_VOLTAGE_CHANNEL(1), 233 MCP320X_VOLTAGE_CHANNEL(2), 234 MCP320X_VOLTAGE_CHANNEL(3), 235 MCP320X_VOLTAGE_CHANNEL(4), 236 MCP320X_VOLTAGE_CHANNEL(5), 237 MCP320X_VOLTAGE_CHANNEL(6), 238 MCP320X_VOLTAGE_CHANNEL(7), 239 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1), 240 MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0), 241 MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3), 242 MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2), 243 MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5), 244 MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4), 245 MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7), 246 MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6), 247 }; 248 249 static const struct iio_info mcp320x_info = { 250 .read_raw = mcp320x_read_raw, 251 .driver_module = THIS_MODULE, 252 }; 253 254 static const struct mcp320x_chip_info mcp320x_chip_infos[] = { 255 [mcp3001] = { 256 .channels = mcp3201_channels, 257 .num_channels = ARRAY_SIZE(mcp3201_channels), 258 .resolution = 10 259 }, 260 [mcp3002] = { 261 .channels = mcp3202_channels, 262 .num_channels = ARRAY_SIZE(mcp3202_channels), 263 .resolution = 10 264 }, 265 [mcp3004] = { 266 .channels = mcp3204_channels, 267 .num_channels = ARRAY_SIZE(mcp3204_channels), 268 .resolution = 10 269 }, 270 [mcp3008] = { 271 .channels = mcp3208_channels, 272 .num_channels = ARRAY_SIZE(mcp3208_channels), 273 .resolution = 10 274 }, 275 [mcp3201] = { 276 .channels = mcp3201_channels, 277 .num_channels = ARRAY_SIZE(mcp3201_channels), 278 .resolution = 12 279 }, 280 [mcp3202] = { 281 .channels = mcp3202_channels, 282 .num_channels = ARRAY_SIZE(mcp3202_channels), 283 .resolution = 12 284 }, 285 [mcp3204] = { 286 .channels = mcp3204_channels, 287 .num_channels = ARRAY_SIZE(mcp3204_channels), 288 .resolution = 12 289 }, 290 [mcp3208] = { 291 .channels = mcp3208_channels, 292 .num_channels = ARRAY_SIZE(mcp3208_channels), 293 .resolution = 12 294 }, 295 [mcp3301] = { 296 .channels = mcp3201_channels, 297 .num_channels = ARRAY_SIZE(mcp3201_channels), 298 .resolution = 13 299 }, 300 }; 301 302 static int mcp320x_probe(struct spi_device *spi) 303 { 304 struct iio_dev *indio_dev; 305 struct mcp320x *adc; 306 const struct mcp320x_chip_info *chip_info; 307 int ret; 308 309 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); 310 if (!indio_dev) 311 return -ENOMEM; 312 313 adc = iio_priv(indio_dev); 314 adc->spi = spi; 315 316 indio_dev->dev.parent = &spi->dev; 317 indio_dev->dev.of_node = spi->dev.of_node; 318 indio_dev->name = spi_get_device_id(spi)->name; 319 indio_dev->modes = INDIO_DIRECT_MODE; 320 indio_dev->info = &mcp320x_info; 321 spi_set_drvdata(spi, indio_dev); 322 323 chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data]; 324 indio_dev->channels = chip_info->channels; 325 indio_dev->num_channels = chip_info->num_channels; 326 327 adc->chip_info = chip_info; 328 329 adc->transfer[0].tx_buf = &adc->tx_buf; 330 adc->transfer[0].len = sizeof(adc->tx_buf); 331 adc->transfer[1].rx_buf = adc->rx_buf; 332 adc->transfer[1].len = sizeof(adc->rx_buf); 333 334 spi_message_init_with_transfers(&adc->msg, adc->transfer, 335 ARRAY_SIZE(adc->transfer)); 336 337 adc->reg = devm_regulator_get(&spi->dev, "vref"); 338 if (IS_ERR(adc->reg)) 339 return PTR_ERR(adc->reg); 340 341 ret = regulator_enable(adc->reg); 342 if (ret < 0) 343 return ret; 344 345 mutex_init(&adc->lock); 346 347 ret = iio_device_register(indio_dev); 348 if (ret < 0) 349 goto reg_disable; 350 351 return 0; 352 353 reg_disable: 354 regulator_disable(adc->reg); 355 356 return ret; 357 } 358 359 static int mcp320x_remove(struct spi_device *spi) 360 { 361 struct iio_dev *indio_dev = spi_get_drvdata(spi); 362 struct mcp320x *adc = iio_priv(indio_dev); 363 364 iio_device_unregister(indio_dev); 365 regulator_disable(adc->reg); 366 367 return 0; 368 } 369 370 #if defined(CONFIG_OF) 371 static const struct of_device_id mcp320x_dt_ids[] = { 372 /* NOTE: The use of compatibles with no vendor prefix is deprecated. */ 373 { 374 .compatible = "mcp3001", 375 .data = &mcp320x_chip_infos[mcp3001], 376 }, { 377 .compatible = "mcp3002", 378 .data = &mcp320x_chip_infos[mcp3002], 379 }, { 380 .compatible = "mcp3004", 381 .data = &mcp320x_chip_infos[mcp3004], 382 }, { 383 .compatible = "mcp3008", 384 .data = &mcp320x_chip_infos[mcp3008], 385 }, { 386 .compatible = "mcp3201", 387 .data = &mcp320x_chip_infos[mcp3201], 388 }, { 389 .compatible = "mcp3202", 390 .data = &mcp320x_chip_infos[mcp3202], 391 }, { 392 .compatible = "mcp3204", 393 .data = &mcp320x_chip_infos[mcp3204], 394 }, { 395 .compatible = "mcp3208", 396 .data = &mcp320x_chip_infos[mcp3208], 397 }, { 398 .compatible = "mcp3301", 399 .data = &mcp320x_chip_infos[mcp3301], 400 }, { 401 .compatible = "microchip,mcp3001", 402 .data = &mcp320x_chip_infos[mcp3001], 403 }, { 404 .compatible = "microchip,mcp3002", 405 .data = &mcp320x_chip_infos[mcp3002], 406 }, { 407 .compatible = "microchip,mcp3004", 408 .data = &mcp320x_chip_infos[mcp3004], 409 }, { 410 .compatible = "microchip,mcp3008", 411 .data = &mcp320x_chip_infos[mcp3008], 412 }, { 413 .compatible = "microchip,mcp3201", 414 .data = &mcp320x_chip_infos[mcp3201], 415 }, { 416 .compatible = "microchip,mcp3202", 417 .data = &mcp320x_chip_infos[mcp3202], 418 }, { 419 .compatible = "microchip,mcp3204", 420 .data = &mcp320x_chip_infos[mcp3204], 421 }, { 422 .compatible = "microchip,mcp3208", 423 .data = &mcp320x_chip_infos[mcp3208], 424 }, { 425 .compatible = "microchip,mcp3301", 426 .data = &mcp320x_chip_infos[mcp3301], 427 }, { 428 } 429 }; 430 MODULE_DEVICE_TABLE(of, mcp320x_dt_ids); 431 #endif 432 433 static const struct spi_device_id mcp320x_id[] = { 434 { "mcp3001", mcp3001 }, 435 { "mcp3002", mcp3002 }, 436 { "mcp3004", mcp3004 }, 437 { "mcp3008", mcp3008 }, 438 { "mcp3201", mcp3201 }, 439 { "mcp3202", mcp3202 }, 440 { "mcp3204", mcp3204 }, 441 { "mcp3208", mcp3208 }, 442 { "mcp3301", mcp3301 }, 443 { } 444 }; 445 MODULE_DEVICE_TABLE(spi, mcp320x_id); 446 447 static struct spi_driver mcp320x_driver = { 448 .driver = { 449 .name = "mcp320x", 450 .of_match_table = of_match_ptr(mcp320x_dt_ids), 451 }, 452 .probe = mcp320x_probe, 453 .remove = mcp320x_remove, 454 .id_table = mcp320x_id, 455 }; 456 module_spi_driver(mcp320x_driver); 457 458 MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>"); 459 MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08"); 460 MODULE_LICENSE("GPL v2"); 461