xref: /openbmc/linux/drivers/iio/adc/max1118.c (revision 5f0ea0f5)
136edc939SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2a9e9c715SAkinobu Mita /*
3a9e9c715SAkinobu Mita  * MAX1117/MAX1118/MAX1119 8-bit, dual-channel ADCs driver
4a9e9c715SAkinobu Mita  *
5a9e9c715SAkinobu Mita  * Copyright (c) 2017 Akinobu Mita <akinobu.mita@gmail.com>
6a9e9c715SAkinobu Mita  *
7a9e9c715SAkinobu Mita  * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1117-MAX1119.pdf
8a9e9c715SAkinobu Mita  *
9a9e9c715SAkinobu Mita  * SPI interface connections
10a9e9c715SAkinobu Mita  *
11a9e9c715SAkinobu Mita  * SPI                MAXIM
12a9e9c715SAkinobu Mita  * Master  Direction  MAX1117/8/9
13a9e9c715SAkinobu Mita  * ------  ---------  -----------
14a9e9c715SAkinobu Mita  * nCS        -->     CNVST
15a9e9c715SAkinobu Mita  * SCK        -->     SCLK
16a9e9c715SAkinobu Mita  * MISO       <--     DOUT
17a9e9c715SAkinobu Mita  * ------  ---------  -----------
18a9e9c715SAkinobu Mita  */
19a9e9c715SAkinobu Mita 
20a9e9c715SAkinobu Mita #include <linux/module.h>
21a9e9c715SAkinobu Mita #include <linux/spi/spi.h>
22a9e9c715SAkinobu Mita #include <linux/iio/iio.h>
23a9e9c715SAkinobu Mita #include <linux/iio/buffer.h>
24a9e9c715SAkinobu Mita #include <linux/iio/triggered_buffer.h>
25a9e9c715SAkinobu Mita #include <linux/iio/trigger_consumer.h>
26a9e9c715SAkinobu Mita #include <linux/regulator/consumer.h>
27a9e9c715SAkinobu Mita 
28a9e9c715SAkinobu Mita enum max1118_id {
29a9e9c715SAkinobu Mita 	max1117,
30a9e9c715SAkinobu Mita 	max1118,
31a9e9c715SAkinobu Mita 	max1119,
32a9e9c715SAkinobu Mita };
33a9e9c715SAkinobu Mita 
34a9e9c715SAkinobu Mita struct max1118 {
35a9e9c715SAkinobu Mita 	struct spi_device *spi;
36a9e9c715SAkinobu Mita 	struct mutex lock;
37a9e9c715SAkinobu Mita 	struct regulator *reg;
38a9e9c715SAkinobu Mita 
39a9e9c715SAkinobu Mita 	u8 data ____cacheline_aligned;
40a9e9c715SAkinobu Mita };
41a9e9c715SAkinobu Mita 
42a9e9c715SAkinobu Mita #define MAX1118_CHANNEL(ch)						\
43a9e9c715SAkinobu Mita 	{								\
44a9e9c715SAkinobu Mita 		.type = IIO_VOLTAGE,					\
45a9e9c715SAkinobu Mita 		.indexed = 1,						\
46a9e9c715SAkinobu Mita 		.channel = (ch),					\
47a9e9c715SAkinobu Mita 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
48a9e9c715SAkinobu Mita 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
49a9e9c715SAkinobu Mita 		.scan_index = ch,					\
50a9e9c715SAkinobu Mita 		.scan_type = {						\
51a9e9c715SAkinobu Mita 			.sign = 'u',					\
52a9e9c715SAkinobu Mita 			.realbits = 8,					\
53a9e9c715SAkinobu Mita 			.storagebits = 8,				\
54a9e9c715SAkinobu Mita 		},							\
55a9e9c715SAkinobu Mita 	}
56a9e9c715SAkinobu Mita 
57a9e9c715SAkinobu Mita static const struct iio_chan_spec max1118_channels[] = {
58a9e9c715SAkinobu Mita 	MAX1118_CHANNEL(0),
59a9e9c715SAkinobu Mita 	MAX1118_CHANNEL(1),
60a9e9c715SAkinobu Mita 	IIO_CHAN_SOFT_TIMESTAMP(2),
61a9e9c715SAkinobu Mita };
62a9e9c715SAkinobu Mita 
63a9e9c715SAkinobu Mita static int max1118_read(struct spi_device *spi, int channel)
64a9e9c715SAkinobu Mita {
65a9e9c715SAkinobu Mita 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
66a9e9c715SAkinobu Mita 	struct max1118 *adc = iio_priv(indio_dev);
67a9e9c715SAkinobu Mita 	struct spi_transfer xfers[] = {
68a9e9c715SAkinobu Mita 		/*
69a9e9c715SAkinobu Mita 		 * To select CH1 for conversion, CNVST pin must be brought high
70a9e9c715SAkinobu Mita 		 * and low for a second time.
71a9e9c715SAkinobu Mita 		 */
72a9e9c715SAkinobu Mita 		{
73a9e9c715SAkinobu Mita 			.len = 0,
745f0ea0f5SSergiu Cuciurean 			.delay = {	/* > CNVST Low Time 100 ns */
755f0ea0f5SSergiu Cuciurean 				.value = 1,
765f0ea0f5SSergiu Cuciurean 				.unit = SPI_DELAY_UNIT_USECS
775f0ea0f5SSergiu Cuciurean 			},
78a9e9c715SAkinobu Mita 			.cs_change = 1,
79a9e9c715SAkinobu Mita 		},
80a9e9c715SAkinobu Mita 		/*
81a9e9c715SAkinobu Mita 		 * The acquisition interval begins with the falling edge of
82a9e9c715SAkinobu Mita 		 * CNVST.  The total acquisition and conversion process takes
83a9e9c715SAkinobu Mita 		 * <7.5us.
84a9e9c715SAkinobu Mita 		 */
85a9e9c715SAkinobu Mita 		{
86a9e9c715SAkinobu Mita 			.len = 0,
875f0ea0f5SSergiu Cuciurean 			.delay = {
885f0ea0f5SSergiu Cuciurean 				.value = 8,
895f0ea0f5SSergiu Cuciurean 				.unit = SPI_DELAY_UNIT_USECS
905f0ea0f5SSergiu Cuciurean 			},
91a9e9c715SAkinobu Mita 		},
92a9e9c715SAkinobu Mita 		{
93a9e9c715SAkinobu Mita 			.rx_buf = &adc->data,
94a9e9c715SAkinobu Mita 			.len = 1,
95a9e9c715SAkinobu Mita 		},
96a9e9c715SAkinobu Mita 	};
97a9e9c715SAkinobu Mita 	int ret;
98a9e9c715SAkinobu Mita 
99a9e9c715SAkinobu Mita 	if (channel == 0)
100a9e9c715SAkinobu Mita 		ret = spi_sync_transfer(spi, xfers + 1, 2);
101a9e9c715SAkinobu Mita 	else
102a9e9c715SAkinobu Mita 		ret = spi_sync_transfer(spi, xfers, 3);
103a9e9c715SAkinobu Mita 
104a9e9c715SAkinobu Mita 	if (ret)
105a9e9c715SAkinobu Mita 		return ret;
106a9e9c715SAkinobu Mita 
107a9e9c715SAkinobu Mita 	return adc->data;
108a9e9c715SAkinobu Mita }
109a9e9c715SAkinobu Mita 
110a9e9c715SAkinobu Mita static int max1118_get_vref_mV(struct spi_device *spi)
111a9e9c715SAkinobu Mita {
112a9e9c715SAkinobu Mita 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
113a9e9c715SAkinobu Mita 	struct max1118 *adc = iio_priv(indio_dev);
114a9e9c715SAkinobu Mita 	const struct spi_device_id *id = spi_get_device_id(spi);
115a9e9c715SAkinobu Mita 	int vref_uV;
116a9e9c715SAkinobu Mita 
117a9e9c715SAkinobu Mita 	switch (id->driver_data) {
118a9e9c715SAkinobu Mita 	case max1117:
119a9e9c715SAkinobu Mita 		return 2048;
120a9e9c715SAkinobu Mita 	case max1119:
121a9e9c715SAkinobu Mita 		return 4096;
122a9e9c715SAkinobu Mita 	case max1118:
123a9e9c715SAkinobu Mita 		vref_uV = regulator_get_voltage(adc->reg);
124a9e9c715SAkinobu Mita 		if (vref_uV < 0)
125a9e9c715SAkinobu Mita 			return vref_uV;
126a9e9c715SAkinobu Mita 		return vref_uV / 1000;
127a9e9c715SAkinobu Mita 	}
128a9e9c715SAkinobu Mita 
129a9e9c715SAkinobu Mita 	return -ENODEV;
130a9e9c715SAkinobu Mita }
131a9e9c715SAkinobu Mita 
132a9e9c715SAkinobu Mita static int max1118_read_raw(struct iio_dev *indio_dev,
133a9e9c715SAkinobu Mita 			struct iio_chan_spec const *chan,
134a9e9c715SAkinobu Mita 			int *val, int *val2, long mask)
135a9e9c715SAkinobu Mita {
136a9e9c715SAkinobu Mita 	struct max1118 *adc = iio_priv(indio_dev);
137a9e9c715SAkinobu Mita 
138a9e9c715SAkinobu Mita 	switch (mask) {
139a9e9c715SAkinobu Mita 	case IIO_CHAN_INFO_RAW:
140a9e9c715SAkinobu Mita 		mutex_lock(&adc->lock);
141a9e9c715SAkinobu Mita 		*val = max1118_read(adc->spi, chan->channel);
142a9e9c715SAkinobu Mita 		mutex_unlock(&adc->lock);
143a9e9c715SAkinobu Mita 		if (*val < 0)
144a9e9c715SAkinobu Mita 			return *val;
145a9e9c715SAkinobu Mita 
146a9e9c715SAkinobu Mita 		return IIO_VAL_INT;
147a9e9c715SAkinobu Mita 	case IIO_CHAN_INFO_SCALE:
148a9e9c715SAkinobu Mita 		*val = max1118_get_vref_mV(adc->spi);
149a9e9c715SAkinobu Mita 		if (*val < 0)
150a9e9c715SAkinobu Mita 			return *val;
151a9e9c715SAkinobu Mita 		*val2 = 8;
152a9e9c715SAkinobu Mita 
153a9e9c715SAkinobu Mita 		return IIO_VAL_FRACTIONAL_LOG2;
154a9e9c715SAkinobu Mita 	}
155a9e9c715SAkinobu Mita 
156a9e9c715SAkinobu Mita 	return -EINVAL;
157a9e9c715SAkinobu Mita }
158a9e9c715SAkinobu Mita 
159a9e9c715SAkinobu Mita static const struct iio_info max1118_info = {
160a9e9c715SAkinobu Mita 	.read_raw = max1118_read_raw,
161a9e9c715SAkinobu Mita };
162a9e9c715SAkinobu Mita 
163a9e9c715SAkinobu Mita static irqreturn_t max1118_trigger_handler(int irq, void *p)
164a9e9c715SAkinobu Mita {
165a9e9c715SAkinobu Mita 	struct iio_poll_func *pf = p;
166a9e9c715SAkinobu Mita 	struct iio_dev *indio_dev = pf->indio_dev;
167a9e9c715SAkinobu Mita 	struct max1118 *adc = iio_priv(indio_dev);
168a9e9c715SAkinobu Mita 	u8 data[16] = { }; /* 2x 8-bit ADC data + padding + 8 bytes timestamp */
169a9e9c715SAkinobu Mita 	int scan_index;
170a9e9c715SAkinobu Mita 	int i = 0;
171a9e9c715SAkinobu Mita 
172a9e9c715SAkinobu Mita 	mutex_lock(&adc->lock);
173a9e9c715SAkinobu Mita 
174a9e9c715SAkinobu Mita 	for_each_set_bit(scan_index, indio_dev->active_scan_mask,
175a9e9c715SAkinobu Mita 			indio_dev->masklength) {
176a9e9c715SAkinobu Mita 		const struct iio_chan_spec *scan_chan =
177a9e9c715SAkinobu Mita 				&indio_dev->channels[scan_index];
178a9e9c715SAkinobu Mita 		int ret = max1118_read(adc->spi, scan_chan->channel);
179a9e9c715SAkinobu Mita 
180a9e9c715SAkinobu Mita 		if (ret < 0) {
181a9e9c715SAkinobu Mita 			dev_warn(&adc->spi->dev,
182a9e9c715SAkinobu Mita 				"failed to get conversion data\n");
183a9e9c715SAkinobu Mita 			goto out;
184a9e9c715SAkinobu Mita 		}
185a9e9c715SAkinobu Mita 
186a9e9c715SAkinobu Mita 		data[i] = ret;
187a9e9c715SAkinobu Mita 		i++;
188a9e9c715SAkinobu Mita 	}
189a9e9c715SAkinobu Mita 	iio_push_to_buffers_with_timestamp(indio_dev, data,
190a9e9c715SAkinobu Mita 					   iio_get_time_ns(indio_dev));
191a9e9c715SAkinobu Mita out:
192a9e9c715SAkinobu Mita 	mutex_unlock(&adc->lock);
193a9e9c715SAkinobu Mita 
194a9e9c715SAkinobu Mita 	iio_trigger_notify_done(indio_dev->trig);
195a9e9c715SAkinobu Mita 
196a9e9c715SAkinobu Mita 	return IRQ_HANDLED;
197a9e9c715SAkinobu Mita }
198a9e9c715SAkinobu Mita 
199a9e9c715SAkinobu Mita static int max1118_probe(struct spi_device *spi)
200a9e9c715SAkinobu Mita {
201a9e9c715SAkinobu Mita 	struct iio_dev *indio_dev;
202a9e9c715SAkinobu Mita 	struct max1118 *adc;
203a9e9c715SAkinobu Mita 	const struct spi_device_id *id = spi_get_device_id(spi);
204a9e9c715SAkinobu Mita 	int ret;
205a9e9c715SAkinobu Mita 
206a9e9c715SAkinobu Mita 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
207a9e9c715SAkinobu Mita 	if (!indio_dev)
208a9e9c715SAkinobu Mita 		return -ENOMEM;
209a9e9c715SAkinobu Mita 
210a9e9c715SAkinobu Mita 	adc = iio_priv(indio_dev);
211a9e9c715SAkinobu Mita 	adc->spi = spi;
212a9e9c715SAkinobu Mita 	mutex_init(&adc->lock);
213a9e9c715SAkinobu Mita 
214a9e9c715SAkinobu Mita 	if (id->driver_data == max1118) {
215a9e9c715SAkinobu Mita 		adc->reg = devm_regulator_get(&spi->dev, "vref");
216a9e9c715SAkinobu Mita 		if (IS_ERR(adc->reg)) {
217a9e9c715SAkinobu Mita 			dev_err(&spi->dev, "failed to get vref regulator\n");
218a9e9c715SAkinobu Mita 			return PTR_ERR(adc->reg);
219a9e9c715SAkinobu Mita 		}
220a9e9c715SAkinobu Mita 		ret = regulator_enable(adc->reg);
221a9e9c715SAkinobu Mita 		if (ret)
222a9e9c715SAkinobu Mita 			return ret;
223a9e9c715SAkinobu Mita 	}
224a9e9c715SAkinobu Mita 
225a9e9c715SAkinobu Mita 	spi_set_drvdata(spi, indio_dev);
226a9e9c715SAkinobu Mita 
227a9e9c715SAkinobu Mita 	indio_dev->name = spi_get_device_id(spi)->name;
228a9e9c715SAkinobu Mita 	indio_dev->dev.parent = &spi->dev;
229a9e9c715SAkinobu Mita 	indio_dev->info = &max1118_info;
230a9e9c715SAkinobu Mita 	indio_dev->modes = INDIO_DIRECT_MODE;
231a9e9c715SAkinobu Mita 	indio_dev->channels = max1118_channels;
232a9e9c715SAkinobu Mita 	indio_dev->num_channels = ARRAY_SIZE(max1118_channels);
233a9e9c715SAkinobu Mita 
234a9e9c715SAkinobu Mita 	/*
235a9e9c715SAkinobu Mita 	 * To reinitiate a conversion on CH0, it is necessary to allow for a
236a9e9c715SAkinobu Mita 	 * conversion to be complete and all of the data to be read out.  Once
237a9e9c715SAkinobu Mita 	 * a conversion has been completed, the MAX1117/MAX1118/MAX1119 will go
238a9e9c715SAkinobu Mita 	 * into AutoShutdown mode until the next conversion is initiated.
239a9e9c715SAkinobu Mita 	 */
240a9e9c715SAkinobu Mita 	max1118_read(spi, 0);
241a9e9c715SAkinobu Mita 
242a9e9c715SAkinobu Mita 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
243a9e9c715SAkinobu Mita 					max1118_trigger_handler, NULL);
244a9e9c715SAkinobu Mita 	if (ret)
245a9e9c715SAkinobu Mita 		goto err_reg_disable;
246a9e9c715SAkinobu Mita 
247a9e9c715SAkinobu Mita 	ret = iio_device_register(indio_dev);
248a9e9c715SAkinobu Mita 	if (ret)
249a9e9c715SAkinobu Mita 		goto err_buffer_cleanup;
250a9e9c715SAkinobu Mita 
251a9e9c715SAkinobu Mita 	return 0;
252a9e9c715SAkinobu Mita 
253a9e9c715SAkinobu Mita err_buffer_cleanup:
254a9e9c715SAkinobu Mita 	iio_triggered_buffer_cleanup(indio_dev);
255a9e9c715SAkinobu Mita err_reg_disable:
256a9e9c715SAkinobu Mita 	if (id->driver_data == max1118)
257a9e9c715SAkinobu Mita 		regulator_disable(adc->reg);
258a9e9c715SAkinobu Mita 
259a9e9c715SAkinobu Mita 	return ret;
260a9e9c715SAkinobu Mita }
261a9e9c715SAkinobu Mita 
262a9e9c715SAkinobu Mita static int max1118_remove(struct spi_device *spi)
263a9e9c715SAkinobu Mita {
264a9e9c715SAkinobu Mita 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
265a9e9c715SAkinobu Mita 	struct max1118 *adc = iio_priv(indio_dev);
266a9e9c715SAkinobu Mita 	const struct spi_device_id *id = spi_get_device_id(spi);
267a9e9c715SAkinobu Mita 
268a9e9c715SAkinobu Mita 	iio_device_unregister(indio_dev);
269a9e9c715SAkinobu Mita 	iio_triggered_buffer_cleanup(indio_dev);
270a9e9c715SAkinobu Mita 	if (id->driver_data == max1118)
271a9e9c715SAkinobu Mita 		return regulator_disable(adc->reg);
272a9e9c715SAkinobu Mita 
273a9e9c715SAkinobu Mita 	return 0;
274a9e9c715SAkinobu Mita }
275a9e9c715SAkinobu Mita 
276a9e9c715SAkinobu Mita static const struct spi_device_id max1118_id[] = {
277a9e9c715SAkinobu Mita 	{ "max1117", max1117 },
278a9e9c715SAkinobu Mita 	{ "max1118", max1118 },
279a9e9c715SAkinobu Mita 	{ "max1119", max1119 },
280a9e9c715SAkinobu Mita 	{}
281a9e9c715SAkinobu Mita };
282a9e9c715SAkinobu Mita MODULE_DEVICE_TABLE(spi, max1118_id);
283a9e9c715SAkinobu Mita 
284a9e9c715SAkinobu Mita #ifdef CONFIG_OF
285a9e9c715SAkinobu Mita 
286a9e9c715SAkinobu Mita static const struct of_device_id max1118_dt_ids[] = {
287a9e9c715SAkinobu Mita 	{ .compatible = "maxim,max1117" },
288a9e9c715SAkinobu Mita 	{ .compatible = "maxim,max1118" },
289a9e9c715SAkinobu Mita 	{ .compatible = "maxim,max1119" },
290a9e9c715SAkinobu Mita 	{},
291a9e9c715SAkinobu Mita };
292a9e9c715SAkinobu Mita MODULE_DEVICE_TABLE(of, max1118_dt_ids);
293a9e9c715SAkinobu Mita 
294a9e9c715SAkinobu Mita #endif
295a9e9c715SAkinobu Mita 
296a9e9c715SAkinobu Mita static struct spi_driver max1118_spi_driver = {
297a9e9c715SAkinobu Mita 	.driver = {
298a9e9c715SAkinobu Mita 		.name = "max1118",
299a9e9c715SAkinobu Mita 		.of_match_table = of_match_ptr(max1118_dt_ids),
300a9e9c715SAkinobu Mita 	},
301a9e9c715SAkinobu Mita 	.probe = max1118_probe,
302a9e9c715SAkinobu Mita 	.remove = max1118_remove,
303a9e9c715SAkinobu Mita 	.id_table = max1118_id,
304a9e9c715SAkinobu Mita };
305a9e9c715SAkinobu Mita module_spi_driver(max1118_spi_driver);
306a9e9c715SAkinobu Mita 
307a9e9c715SAkinobu Mita MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
308a9e9c715SAkinobu Mita MODULE_DESCRIPTION("MAXIM MAX1117/MAX1118/MAX1119 ADCs driver");
309a9e9c715SAkinobu Mita MODULE_LICENSE("GPL v2");
310