1 /* 2 * lpc32xx_adc.c - Support for ADC in LPC32XX 3 * 4 * 3-channel, 10-bit ADC 5 * 6 * Copyright (C) 2011, 2012 Roland Stigge <stigge@antcom.de> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #include <linux/module.h> 24 #include <linux/platform_device.h> 25 #include <linux/interrupt.h> 26 #include <linux/device.h> 27 #include <linux/kernel.h> 28 #include <linux/slab.h> 29 #include <linux/io.h> 30 #include <linux/clk.h> 31 #include <linux/err.h> 32 #include <linux/completion.h> 33 #include <linux/of.h> 34 35 #include <linux/iio/iio.h> 36 #include <linux/iio/sysfs.h> 37 38 /* 39 * LPC32XX registers definitions 40 */ 41 #define LPC32XXAD_SELECT(x) ((x) + 0x04) 42 #define LPC32XXAD_CTRL(x) ((x) + 0x08) 43 #define LPC32XXAD_VALUE(x) ((x) + 0x48) 44 45 /* Bit definitions for LPC32XXAD_SELECT: */ 46 /* constant, always write this value! */ 47 #define LPC32XXAD_REFm 0x00000200 48 /* constant, always write this value! */ 49 #define LPC32XXAD_REFp 0x00000080 50 /* multiple of this is the channel number: 0, 1, 2 */ 51 #define LPC32XXAD_IN 0x00000010 52 /* constant, always write this value! */ 53 #define LPC32XXAD_INTERNAL 0x00000004 54 55 /* Bit definitions for LPC32XXAD_CTRL: */ 56 #define LPC32XXAD_STROBE 0x00000002 57 #define LPC32XXAD_PDN_CTRL 0x00000004 58 59 /* Bit definitions for LPC32XXAD_VALUE: */ 60 #define LPC32XXAD_VALUE_MASK 0x000003FF 61 62 #define LPC32XXAD_NAME "lpc32xx-adc" 63 64 struct lpc32xx_adc_state { 65 void __iomem *adc_base; 66 struct clk *clk; 67 struct completion completion; 68 69 u32 value; 70 }; 71 72 static int lpc32xx_read_raw(struct iio_dev *indio_dev, 73 struct iio_chan_spec const *chan, 74 int *val, 75 int *val2, 76 long mask) 77 { 78 struct lpc32xx_adc_state *st = iio_priv(indio_dev); 79 int ret; 80 if (mask == IIO_CHAN_INFO_RAW) { 81 mutex_lock(&indio_dev->mlock); 82 ret = clk_prepare_enable(st->clk); 83 if (ret) { 84 mutex_unlock(&indio_dev->mlock); 85 return ret; 86 } 87 /* Measurement setup */ 88 __raw_writel(LPC32XXAD_INTERNAL | (chan->address) | 89 LPC32XXAD_REFp | LPC32XXAD_REFm, 90 LPC32XXAD_SELECT(st->adc_base)); 91 /* Trigger conversion */ 92 __raw_writel(LPC32XXAD_PDN_CTRL | LPC32XXAD_STROBE, 93 LPC32XXAD_CTRL(st->adc_base)); 94 wait_for_completion(&st->completion); /* set by ISR */ 95 clk_disable_unprepare(st->clk); 96 *val = st->value; 97 mutex_unlock(&indio_dev->mlock); 98 99 return IIO_VAL_INT; 100 } 101 102 return -EINVAL; 103 } 104 105 static const struct iio_info lpc32xx_adc_iio_info = { 106 .read_raw = &lpc32xx_read_raw, 107 }; 108 109 #define LPC32XX_ADC_CHANNEL(_index) { \ 110 .type = IIO_VOLTAGE, \ 111 .indexed = 1, \ 112 .channel = _index, \ 113 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 114 .address = LPC32XXAD_IN * _index, \ 115 .scan_index = _index, \ 116 } 117 118 static const struct iio_chan_spec lpc32xx_adc_iio_channels[] = { 119 LPC32XX_ADC_CHANNEL(0), 120 LPC32XX_ADC_CHANNEL(1), 121 LPC32XX_ADC_CHANNEL(2), 122 }; 123 124 static irqreturn_t lpc32xx_adc_isr(int irq, void *dev_id) 125 { 126 struct lpc32xx_adc_state *st = dev_id; 127 128 /* Read value and clear irq */ 129 st->value = __raw_readl(LPC32XXAD_VALUE(st->adc_base)) & 130 LPC32XXAD_VALUE_MASK; 131 complete(&st->completion); 132 133 return IRQ_HANDLED; 134 } 135 136 static int lpc32xx_adc_probe(struct platform_device *pdev) 137 { 138 struct lpc32xx_adc_state *st = NULL; 139 struct resource *res; 140 int retval = -ENODEV; 141 struct iio_dev *iodev = NULL; 142 int irq; 143 144 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 145 if (!res) { 146 dev_err(&pdev->dev, "failed to get platform I/O memory\n"); 147 return -ENXIO; 148 } 149 150 iodev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); 151 if (!iodev) 152 return -ENOMEM; 153 154 st = iio_priv(iodev); 155 156 st->adc_base = devm_ioremap(&pdev->dev, res->start, 157 resource_size(res)); 158 if (!st->adc_base) { 159 dev_err(&pdev->dev, "failed mapping memory\n"); 160 return -EBUSY; 161 } 162 163 st->clk = devm_clk_get(&pdev->dev, NULL); 164 if (IS_ERR(st->clk)) { 165 dev_err(&pdev->dev, "failed getting clock\n"); 166 return PTR_ERR(st->clk); 167 } 168 169 irq = platform_get_irq(pdev, 0); 170 if (irq <= 0) { 171 dev_err(&pdev->dev, "failed getting interrupt resource\n"); 172 return -ENXIO; 173 } 174 175 retval = devm_request_irq(&pdev->dev, irq, lpc32xx_adc_isr, 0, 176 LPC32XXAD_NAME, st); 177 if (retval < 0) { 178 dev_err(&pdev->dev, "failed requesting interrupt\n"); 179 return retval; 180 } 181 182 platform_set_drvdata(pdev, iodev); 183 184 init_completion(&st->completion); 185 186 iodev->name = LPC32XXAD_NAME; 187 iodev->dev.parent = &pdev->dev; 188 iodev->info = &lpc32xx_adc_iio_info; 189 iodev->modes = INDIO_DIRECT_MODE; 190 iodev->channels = lpc32xx_adc_iio_channels; 191 iodev->num_channels = ARRAY_SIZE(lpc32xx_adc_iio_channels); 192 193 retval = devm_iio_device_register(&pdev->dev, iodev); 194 if (retval) 195 return retval; 196 197 dev_info(&pdev->dev, "LPC32XX ADC driver loaded, IRQ %d\n", irq); 198 199 return 0; 200 } 201 202 #ifdef CONFIG_OF 203 static const struct of_device_id lpc32xx_adc_match[] = { 204 { .compatible = "nxp,lpc3220-adc" }, 205 {}, 206 }; 207 MODULE_DEVICE_TABLE(of, lpc32xx_adc_match); 208 #endif 209 210 static struct platform_driver lpc32xx_adc_driver = { 211 .probe = lpc32xx_adc_probe, 212 .driver = { 213 .name = LPC32XXAD_NAME, 214 .of_match_table = of_match_ptr(lpc32xx_adc_match), 215 }, 216 }; 217 218 module_platform_driver(lpc32xx_adc_driver); 219 220 MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>"); 221 MODULE_DESCRIPTION("LPC32XX ADC driver"); 222 MODULE_LICENSE("GPL"); 223