xref: /openbmc/linux/drivers/iio/adc/ina2xx-adc.c (revision a06c488d) 
1 /*
2  * INA2XX Current and Power Monitors
3  *
4  * Copyright 2015 Baylibre SAS.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * Based on linux/drivers/iio/adc/ad7291.c
11  * Copyright 2010-2011 Analog Devices Inc.
12  *
13  * Based on linux/drivers/hwmon/ina2xx.c
14  * Copyright 2012 Lothar Felten <l-felten@ti.com>
15  *
16  * Licensed under the GPL-2 or later.
17  *
18  * IIO driver for INA219-220-226-230-231
19  *
20  * Configurable 7-bit I2C slave address from 0x40 to 0x4F
21  */
22 #include <linux/module.h>
23 #include <linux/kthread.h>
24 #include <linux/delay.h>
25 #include <linux/iio/kfifo_buf.h>
26 #include <linux/iio/sysfs.h>
27 #include <linux/i2c.h>
28 #include <linux/regmap.h>
29 #include <linux/platform_data/ina2xx.h>
30 
31 #include <linux/util_macros.h>
32 
33 /* INA2XX registers definition */
34 #define INA2XX_CONFIG                   0x00
35 #define INA2XX_SHUNT_VOLTAGE            0x01	/* readonly */
36 #define INA2XX_BUS_VOLTAGE              0x02	/* readonly */
37 #define INA2XX_POWER                    0x03	/* readonly */
38 #define INA2XX_CURRENT                  0x04	/* readonly */
39 #define INA2XX_CALIBRATION              0x05
40 
41 #define INA226_ALERT_MASK		0x06
42 #define INA266_CVRF			BIT(3)
43 
44 #define INA2XX_MAX_REGISTERS            8
45 
46 /* settings - depend on use case */
47 #define INA219_CONFIG_DEFAULT           0x399F	/* PGA=8 */
48 #define INA226_CONFIG_DEFAULT           0x4327
49 #define INA226_DEFAULT_AVG              4
50 #define INA226_DEFAULT_IT		1110
51 
52 #define INA2XX_RSHUNT_DEFAULT           10000
53 
54 /*
55  * bit mask for reading the averaging setting in the configuration register
56  * FIXME: use regmap_fields.
57  */
58 #define INA2XX_MODE_MASK	GENMASK(3, 0)
59 
60 #define INA226_AVG_MASK		GENMASK(11, 9)
61 #define INA226_SHIFT_AVG(val)	((val) << 9)
62 
63 /* Integration time for VBus */
64 #define INA226_ITB_MASK		GENMASK(8, 6)
65 #define INA226_SHIFT_ITB(val)	((val) << 6)
66 
67 /* Integration time for VShunt */
68 #define INA226_ITS_MASK		GENMASK(5, 3)
69 #define INA226_SHIFT_ITS(val)	((val) << 3)
70 
71 /* Cosmetic macro giving the sampling period for a full P=UxI cycle */
72 #define SAMPLING_PERIOD(c)	((c->int_time_vbus + c->int_time_vshunt) \
73 				 * c->avg)
74 
75 static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg)
76 {
77 	return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT);
78 }
79 
80 static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg)
81 {
82 	return (reg != INA2XX_CONFIG);
83 }
84 
85 static inline bool is_signed_reg(unsigned int reg)
86 {
87 	return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT);
88 }
89 
90 static const struct regmap_config ina2xx_regmap_config = {
91 	.reg_bits = 8,
92 	.val_bits = 16,
93 	.max_register = INA2XX_MAX_REGISTERS,
94 	.writeable_reg = ina2xx_is_writeable_reg,
95 	.volatile_reg = ina2xx_is_volatile_reg,
96 };
97 
98 enum ina2xx_ids { ina219, ina226 };
99 
100 struct ina2xx_config {
101 	u16 config_default;
102 	int calibration_factor;
103 	int shunt_div;
104 	int bus_voltage_shift;
105 	int bus_voltage_lsb;	/* uV */
106 	int power_lsb;		/* uW */
107 };
108 
109 struct ina2xx_chip_info {
110 	struct regmap *regmap;
111 	struct task_struct *task;
112 	const struct ina2xx_config *config;
113 	struct mutex state_lock;
114 	unsigned int shunt_resistor;
115 	int avg;
116 	s64 prev_ns;	/* track buffer capture time, check for underruns*/
117 	int int_time_vbus; /* Bus voltage integration time uS */
118 	int int_time_vshunt; /* Shunt voltage integration time uS */
119 	bool allow_async_readout;
120 };
121 
122 static const struct ina2xx_config ina2xx_config[] = {
123 	[ina219] = {
124 		    .config_default = INA219_CONFIG_DEFAULT,
125 		    .calibration_factor = 40960000,
126 		    .shunt_div = 100,
127 		    .bus_voltage_shift = 3,
128 		    .bus_voltage_lsb = 4000,
129 		    .power_lsb = 20000,
130 		    },
131 	[ina226] = {
132 		    .config_default = INA226_CONFIG_DEFAULT,
133 		    .calibration_factor = 5120000,
134 		    .shunt_div = 400,
135 		    .bus_voltage_shift = 0,
136 		    .bus_voltage_lsb = 1250,
137 		    .power_lsb = 25000,
138 		    },
139 };
140 
141 static int ina2xx_read_raw(struct iio_dev *indio_dev,
142 			   struct iio_chan_spec const *chan,
143 			   int *val, int *val2, long mask)
144 {
145 	int ret;
146 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
147 	unsigned int regval;
148 
149 	switch (mask) {
150 	case IIO_CHAN_INFO_RAW:
151 		ret = regmap_read(chip->regmap, chan->address, &regval);
152 		if (ret < 0)
153 			return ret;
154 
155 		if (is_signed_reg(chan->address))
156 			*val = (s16) regval;
157 		else
158 			*val  = regval;
159 
160 		return IIO_VAL_INT;
161 
162 	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
163 		*val = chip->avg;
164 		return IIO_VAL_INT;
165 
166 	case IIO_CHAN_INFO_INT_TIME:
167 		*val = 0;
168 		if (chan->address == INA2XX_SHUNT_VOLTAGE)
169 			*val2 = chip->int_time_vshunt;
170 		else
171 			*val2 = chip->int_time_vbus;
172 
173 		return IIO_VAL_INT_PLUS_MICRO;
174 
175 	case IIO_CHAN_INFO_SAMP_FREQ:
176 		/*
177 		 * Sample freq is read only, it is a consequence of
178 		 * 1/AVG*(CT_bus+CT_shunt).
179 		 */
180 		*val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip));
181 
182 		return IIO_VAL_INT;
183 
184 	case IIO_CHAN_INFO_SCALE:
185 		switch (chan->address) {
186 		case INA2XX_SHUNT_VOLTAGE:
187 			/* processed (mV) = raw*1000/shunt_div */
188 			*val2 = chip->config->shunt_div;
189 			*val = 1000;
190 			return IIO_VAL_FRACTIONAL;
191 
192 		case INA2XX_BUS_VOLTAGE:
193 			/* processed (mV) = raw*lsb (uV) / (1000 << shift) */
194 			*val = chip->config->bus_voltage_lsb;
195 			*val2 = 1000 << chip->config->bus_voltage_shift;
196 			return IIO_VAL_FRACTIONAL;
197 
198 		case INA2XX_POWER:
199 			/* processed (mW) = raw*lsb (uW) / 1000 */
200 			*val = chip->config->power_lsb;
201 			*val2 = 1000;
202 			return IIO_VAL_FRACTIONAL;
203 
204 		case INA2XX_CURRENT:
205 			/* processed (mA) = raw (mA) */
206 			*val = 1;
207 			return IIO_VAL_INT;
208 		}
209 	}
210 
211 	return -EINVAL;
212 }
213 
214 /*
215  * Available averaging rates for ina226. The indices correspond with
216  * the bit values expected by the chip (according to the ina226 datasheet,
217  * table 3 AVG bit settings, found at
218  * http://www.ti.com/lit/ds/symlink/ina226.pdf.
219  */
220 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
221 
222 static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val,
223 			      unsigned int *config)
224 {
225 	int bits;
226 
227 	if (val > 1024 || val < 1)
228 		return -EINVAL;
229 
230 	bits = find_closest(val, ina226_avg_tab,
231 			    ARRAY_SIZE(ina226_avg_tab));
232 
233 	chip->avg = ina226_avg_tab[bits];
234 
235 	*config &= ~INA226_AVG_MASK;
236 	*config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK;
237 
238 	return 0;
239 }
240 
241 /* Conversion times in uS */
242 static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100,
243 					    2116, 4156, 8244 };
244 
245 static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip,
246 				    unsigned int val_us, unsigned int *config)
247 {
248 	int bits;
249 
250 	if (val_us > 8244 || val_us < 140)
251 		return -EINVAL;
252 
253 	bits = find_closest(val_us, ina226_conv_time_tab,
254 			ARRAY_SIZE(ina226_conv_time_tab));
255 
256 	chip->int_time_vbus = ina226_conv_time_tab[bits];
257 
258 	*config &= ~INA226_ITB_MASK;
259 	*config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK;
260 
261 	return 0;
262 }
263 
264 static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip,
265 				      unsigned int val_us, unsigned int *config)
266 {
267 	int bits;
268 
269 	if (val_us > 8244 || val_us < 140)
270 		return -EINVAL;
271 
272 	bits = find_closest(val_us, ina226_conv_time_tab,
273 			ARRAY_SIZE(ina226_conv_time_tab));
274 
275 	chip->int_time_vshunt = ina226_conv_time_tab[bits];
276 
277 	*config &= ~INA226_ITS_MASK;
278 	*config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK;
279 
280 	return 0;
281 }
282 
283 static int ina2xx_write_raw(struct iio_dev *indio_dev,
284 			    struct iio_chan_spec const *chan,
285 			    int val, int val2, long mask)
286 {
287 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
288 	int ret;
289 	unsigned int config, tmp;
290 
291 	if (iio_buffer_enabled(indio_dev))
292 		return -EBUSY;
293 
294 	mutex_lock(&chip->state_lock);
295 
296 	ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config);
297 	if (ret < 0)
298 		goto _err;
299 
300 	tmp = config;
301 
302 	switch (mask) {
303 	case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
304 		ret = ina226_set_average(chip, val, &tmp);
305 		break;
306 
307 	case IIO_CHAN_INFO_INT_TIME:
308 		if (chan->address == INA2XX_SHUNT_VOLTAGE)
309 			ret = ina226_set_int_time_vshunt(chip, val2, &tmp);
310 		else
311 			ret = ina226_set_int_time_vbus(chip, val2, &tmp);
312 		break;
313 	default:
314 		ret = -EINVAL;
315 	}
316 
317 	if (!ret && (tmp != config))
318 		ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp);
319 _err:
320 	mutex_unlock(&chip->state_lock);
321 
322 	return ret;
323 }
324 
325 
326 static ssize_t ina2xx_allow_async_readout_show(struct device *dev,
327 					   struct device_attribute *attr,
328 					   char *buf)
329 {
330 	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
331 
332 	return sprintf(buf, "%d\n", chip->allow_async_readout);
333 }
334 
335 static ssize_t ina2xx_allow_async_readout_store(struct device *dev,
336 				struct device_attribute *attr,
337 				const char *buf, size_t len)
338 {
339 	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
340 	bool val;
341 	int ret;
342 
343 	ret = strtobool((const char *) buf, &val);
344 	if (ret)
345 		return ret;
346 
347 	chip->allow_async_readout = val;
348 
349 	return len;
350 }
351 
352 static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val)
353 {
354 	if (val <= 0 || val > chip->config->calibration_factor)
355 		return -EINVAL;
356 
357 	chip->shunt_resistor = val;
358 	return 0;
359 }
360 
361 static ssize_t ina2xx_shunt_resistor_show(struct device *dev,
362 					  struct device_attribute *attr,
363 					  char *buf)
364 {
365 	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
366 
367 	return sprintf(buf, "%d\n", chip->shunt_resistor);
368 }
369 
370 static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
371 					   struct device_attribute *attr,
372 					   const char *buf, size_t len)
373 {
374 	struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
375 	unsigned long val;
376 	int ret;
377 
378 	ret = kstrtoul((const char *) buf, 10, &val);
379 	if (ret)
380 		return ret;
381 
382 	ret = set_shunt_resistor(chip, val);
383 	if (ret)
384 		return ret;
385 
386 	return len;
387 }
388 
389 #define INA2XX_CHAN(_type, _index, _address) { \
390 	.type = (_type), \
391 	.address = (_address), \
392 	.indexed = 1, \
393 	.channel = (_index), \
394 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
395 	| BIT(IIO_CHAN_INFO_SCALE), \
396 	.info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
397 				   BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
398 	.scan_index = (_index), \
399 	.scan_type = { \
400 		.sign = 'u', \
401 		.realbits = 16, \
402 		.storagebits = 16, \
403 		.endianness = IIO_CPU, \
404 	} \
405 }
406 
407 /*
408  * Sampling Freq is a consequence of the integration times of
409  * the Voltage channels.
410  */
411 #define INA2XX_CHAN_VOLTAGE(_index, _address) { \
412 	.type = IIO_VOLTAGE, \
413 	.address = (_address), \
414 	.indexed = 1, \
415 	.channel = (_index), \
416 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
417 			      BIT(IIO_CHAN_INFO_SCALE) | \
418 			      BIT(IIO_CHAN_INFO_INT_TIME), \
419 	.scan_index = (_index), \
420 	.scan_type = { \
421 		.sign = 'u', \
422 		.realbits = 16, \
423 		.storagebits = 16, \
424 		.endianness = IIO_LE, \
425 	} \
426 }
427 
428 static const struct iio_chan_spec ina2xx_channels[] = {
429 	INA2XX_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE),
430 	INA2XX_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE),
431 	INA2XX_CHAN(IIO_POWER, 2, INA2XX_POWER),
432 	INA2XX_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT),
433 	IIO_CHAN_SOFT_TIMESTAMP(4),
434 };
435 
436 static int ina2xx_work_buffer(struct iio_dev *indio_dev)
437 {
438 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
439 	unsigned short data[8];
440 	int bit, ret, i = 0;
441 	unsigned long buffer_us, elapsed_us;
442 	s64 time_a, time_b;
443 	unsigned int alert;
444 
445 	time_a = iio_get_time_ns();
446 
447 	/*
448 	 * Because the timer thread and the chip conversion clock
449 	 * are asynchronous, the period difference will eventually
450 	 * result in reading V[k-1] again, or skip V[k] at time Tk.
451 	 * In order to resync the timer with the conversion process
452 	 * we check the ConVersionReadyFlag.
453 	 * On hardware that supports using the ALERT pin to toggle a
454 	 * GPIO a triggered buffer could be used instead.
455 	 * For now, we pay for that extra read of the ALERT register
456 	 */
457 	if (!chip->allow_async_readout)
458 		do {
459 			ret = regmap_read(chip->regmap, INA226_ALERT_MASK,
460 					  &alert);
461 			if (ret < 0)
462 				return ret;
463 
464 			alert &= INA266_CVRF;
465 			trace_printk("Conversion ready: %d\n", !!alert);
466 
467 		} while (!alert);
468 
469 	/*
470 	 * Single register reads: bulk_read will not work with ina226
471 	 * as there is no auto-increment of the address register for
472 	 * data length longer than 16bits.
473 	 */
474 	for_each_set_bit(bit, indio_dev->active_scan_mask,
475 			 indio_dev->masklength) {
476 		unsigned int val;
477 
478 		ret = regmap_read(chip->regmap,
479 				  INA2XX_SHUNT_VOLTAGE + bit, &val);
480 		if (ret < 0)
481 			return ret;
482 
483 		data[i++] = val;
484 	}
485 
486 	time_b = iio_get_time_ns();
487 
488 	iio_push_to_buffers_with_timestamp(indio_dev,
489 					   (unsigned int *)data, time_a);
490 
491 	buffer_us = (unsigned long)(time_b - time_a) / 1000;
492 	elapsed_us = (unsigned long)(time_a - chip->prev_ns) / 1000;
493 
494 	trace_printk("uS: elapsed: %lu, buf: %lu\n", elapsed_us, buffer_us);
495 
496 	chip->prev_ns = time_a;
497 
498 	return buffer_us;
499 };
500 
501 static int ina2xx_capture_thread(void *data)
502 {
503 	struct iio_dev *indio_dev = (struct iio_dev *)data;
504 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
505 	unsigned int sampling_us = SAMPLING_PERIOD(chip);
506 	int buffer_us;
507 
508 	/*
509 	 * Poll a bit faster than the chip internal Fs, in case
510 	 * we wish to sync with the conversion ready flag.
511 	 */
512 	if (!chip->allow_async_readout)
513 		sampling_us -= 200;
514 
515 	do {
516 		buffer_us = ina2xx_work_buffer(indio_dev);
517 		if (buffer_us < 0)
518 			return buffer_us;
519 
520 		if (sampling_us > buffer_us)
521 			udelay(sampling_us - buffer_us);
522 
523 	} while (!kthread_should_stop());
524 
525 	return 0;
526 }
527 
528 static int ina2xx_buffer_enable(struct iio_dev *indio_dev)
529 {
530 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
531 	unsigned int sampling_us = SAMPLING_PERIOD(chip);
532 
533 	trace_printk("Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n",
534 		     (unsigned int)(*indio_dev->active_scan_mask),
535 		     1000000/sampling_us, chip->avg);
536 
537 	trace_printk("Expected work period: %u us\n", sampling_us);
538 	trace_printk("Async readout mode: %d\n", chip->allow_async_readout);
539 
540 	chip->prev_ns = iio_get_time_ns();
541 
542 	chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev,
543 				 "%s:%d-%uus", indio_dev->name, indio_dev->id,
544 				 sampling_us);
545 
546 	return PTR_ERR_OR_ZERO(chip->task);
547 }
548 
549 static int ina2xx_buffer_disable(struct iio_dev *indio_dev)
550 {
551 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
552 
553 	if (chip->task) {
554 		kthread_stop(chip->task);
555 		chip->task = NULL;
556 	}
557 
558 	return 0;
559 }
560 
561 static const struct iio_buffer_setup_ops ina2xx_setup_ops = {
562 	.postenable = &ina2xx_buffer_enable,
563 	.predisable = &ina2xx_buffer_disable,
564 };
565 
566 static int ina2xx_debug_reg(struct iio_dev *indio_dev,
567 			    unsigned reg, unsigned writeval, unsigned *readval)
568 {
569 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
570 
571 	if (!readval)
572 		return regmap_write(chip->regmap, reg, writeval);
573 
574 	return regmap_read(chip->regmap, reg, readval);
575 }
576 
577 /* Possible integration times for vshunt and vbus */
578 static IIO_CONST_ATTR_INT_TIME_AVAIL \
579  ("0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244");
580 
581 static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR,
582 		       ina2xx_allow_async_readout_show,
583 		       ina2xx_allow_async_readout_store, 0);
584 
585 static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR,
586 		       ina2xx_shunt_resistor_show,
587 		       ina2xx_shunt_resistor_store, 0);
588 
589 static struct attribute *ina2xx_attributes[] = {
590 	&iio_dev_attr_in_allow_async_readout.dev_attr.attr,
591 	&iio_const_attr_integration_time_available.dev_attr.attr,
592 	&iio_dev_attr_in_shunt_resistor.dev_attr.attr,
593 	NULL,
594 };
595 
596 static const struct attribute_group ina2xx_attribute_group = {
597 	.attrs = ina2xx_attributes,
598 };
599 
600 static const struct iio_info ina2xx_info = {
601 	.debugfs_reg_access = &ina2xx_debug_reg,
602 	.read_raw = &ina2xx_read_raw,
603 	.write_raw = &ina2xx_write_raw,
604 	.attrs = &ina2xx_attribute_group,
605 	.driver_module = THIS_MODULE,
606 };
607 
608 /* Initialize the configuration and calibration registers. */
609 static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config)
610 {
611 	u16 regval;
612 	int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config);
613 
614 	if (ret < 0)
615 		return ret;
616 	/*
617 	 * Set current LSB to 1mA, shunt is in uOhms
618 	 * (equation 13 in datasheet). We hardcode a Current_LSB
619 	 * of 1.0 x10-6. The only remaining parameter is RShunt.
620 	 * There is no need to expose the CALIBRATION register
621 	 * to the user for now.
622 	 */
623 	regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor,
624 			    chip->shunt_resistor);
625 
626 	return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval);
627 }
628 
629 static int ina2xx_probe(struct i2c_client *client,
630 			const struct i2c_device_id *id)
631 {
632 	struct ina2xx_chip_info *chip;
633 	struct iio_dev *indio_dev;
634 	struct iio_buffer *buffer;
635 	int ret;
636 	unsigned int val;
637 
638 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
639 	if (!indio_dev)
640 		return -ENOMEM;
641 
642 	chip = iio_priv(indio_dev);
643 
644 	chip->config = &ina2xx_config[id->driver_data];
645 
646 	if (of_property_read_u32(client->dev.of_node,
647 				 "shunt-resistor", &val) < 0) {
648 		struct ina2xx_platform_data *pdata =
649 		    dev_get_platdata(&client->dev);
650 
651 		if (pdata)
652 			val = pdata->shunt_uohms;
653 		else
654 			val = INA2XX_RSHUNT_DEFAULT;
655 	}
656 
657 	ret = set_shunt_resistor(chip, val);
658 	if (ret)
659 		return ret;
660 
661 	mutex_init(&chip->state_lock);
662 
663 	/* This is only used for device removal purposes. */
664 	i2c_set_clientdata(client, indio_dev);
665 
666 	indio_dev->name = id->name;
667 	indio_dev->channels = ina2xx_channels;
668 	indio_dev->num_channels = ARRAY_SIZE(ina2xx_channels);
669 
670 	indio_dev->dev.parent = &client->dev;
671 	indio_dev->info = &ina2xx_info;
672 	indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
673 
674 	chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
675 	if (IS_ERR(chip->regmap)) {
676 		dev_err(&client->dev, "failed to allocate register map\n");
677 		return PTR_ERR(chip->regmap);
678 	}
679 
680 	/* Patch the current config register with default. */
681 	val = chip->config->config_default;
682 
683 	if (id->driver_data == ina226) {
684 		ina226_set_average(chip, INA226_DEFAULT_AVG, &val);
685 		ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val);
686 		ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val);
687 	}
688 
689 	ret = ina2xx_init(chip, val);
690 	if (ret < 0) {
691 		dev_err(&client->dev, "error configuring the device: %d\n",
692 			ret);
693 		return -ENODEV;
694 	}
695 
696 	buffer = devm_iio_kfifo_allocate(&indio_dev->dev);
697 	if (!buffer)
698 		return -ENOMEM;
699 
700 	indio_dev->setup_ops = &ina2xx_setup_ops;
701 
702 	iio_device_attach_buffer(indio_dev, buffer);
703 
704 	return iio_device_register(indio_dev);
705 }
706 
707 
708 static int ina2xx_remove(struct i2c_client *client)
709 {
710 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
711 	struct ina2xx_chip_info *chip = iio_priv(indio_dev);
712 
713 	iio_device_unregister(indio_dev);
714 
715 	/* Powerdown */
716 	return regmap_update_bits(chip->regmap, INA2XX_CONFIG,
717 				  INA2XX_MODE_MASK, 0);
718 }
719 
720 
721 static const struct i2c_device_id ina2xx_id[] = {
722 	{"ina219", ina219},
723 	{"ina220", ina219},
724 	{"ina226", ina226},
725 	{"ina230", ina226},
726 	{"ina231", ina226},
727 	{}
728 };
729 
730 MODULE_DEVICE_TABLE(i2c, ina2xx_id);
731 
732 static struct i2c_driver ina2xx_driver = {
733 	.driver = {
734 		   .name = KBUILD_MODNAME,
735 	},
736 	.probe = ina2xx_probe,
737 	.remove = ina2xx_remove,
738 	.id_table = ina2xx_id,
739 };
740 
741 module_i2c_driver(ina2xx_driver);
742 
743 MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>");
744 MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver");
745 MODULE_LICENSE("GPL v2");
746