1 /* 2 * INA2XX Current and Power Monitors 3 * 4 * Copyright 2015 Baylibre SAS. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Based on linux/drivers/iio/adc/ad7291.c 11 * Copyright 2010-2011 Analog Devices Inc. 12 * 13 * Based on linux/drivers/hwmon/ina2xx.c 14 * Copyright 2012 Lothar Felten <l-felten@ti.com> 15 * 16 * Licensed under the GPL-2 or later. 17 * 18 * IIO driver for INA219-220-226-230-231 19 * 20 * Configurable 7-bit I2C slave address from 0x40 to 0x4F 21 */ 22 23 #include <linux/delay.h> 24 #include <linux/i2c.h> 25 #include <linux/iio/iio.h> 26 #include <linux/iio/buffer.h> 27 #include <linux/iio/kfifo_buf.h> 28 #include <linux/iio/sysfs.h> 29 #include <linux/kthread.h> 30 #include <linux/module.h> 31 #include <linux/regmap.h> 32 #include <linux/util_macros.h> 33 34 #include <linux/platform_data/ina2xx.h> 35 36 /* INA2XX registers definition */ 37 #define INA2XX_CONFIG 0x00 38 #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */ 39 #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */ 40 #define INA2XX_POWER 0x03 /* readonly */ 41 #define INA2XX_CURRENT 0x04 /* readonly */ 42 #define INA2XX_CALIBRATION 0x05 43 44 #define INA226_ALERT_MASK GENMASK(2, 1) 45 #define INA266_CVRF BIT(3) 46 47 #define INA2XX_MAX_REGISTERS 8 48 49 /* settings - depend on use case */ 50 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */ 51 #define INA226_CONFIG_DEFAULT 0x4327 52 #define INA226_DEFAULT_AVG 4 53 #define INA226_DEFAULT_IT 1110 54 55 #define INA2XX_RSHUNT_DEFAULT 10000 56 57 /* 58 * bit mask for reading the averaging setting in the configuration register 59 * FIXME: use regmap_fields. 60 */ 61 #define INA2XX_MODE_MASK GENMASK(3, 0) 62 63 #define INA226_AVG_MASK GENMASK(11, 9) 64 #define INA226_SHIFT_AVG(val) ((val) << 9) 65 66 /* Integration time for VBus */ 67 #define INA226_ITB_MASK GENMASK(8, 6) 68 #define INA226_SHIFT_ITB(val) ((val) << 6) 69 70 /* Integration time for VShunt */ 71 #define INA226_ITS_MASK GENMASK(5, 3) 72 #define INA226_SHIFT_ITS(val) ((val) << 3) 73 74 /* Cosmetic macro giving the sampling period for a full P=UxI cycle */ 75 #define SAMPLING_PERIOD(c) ((c->int_time_vbus + c->int_time_vshunt) \ 76 * c->avg) 77 78 static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg) 79 { 80 return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT); 81 } 82 83 static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg) 84 { 85 return (reg != INA2XX_CONFIG); 86 } 87 88 static inline bool is_signed_reg(unsigned int reg) 89 { 90 return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT); 91 } 92 93 static const struct regmap_config ina2xx_regmap_config = { 94 .reg_bits = 8, 95 .val_bits = 16, 96 .max_register = INA2XX_MAX_REGISTERS, 97 .writeable_reg = ina2xx_is_writeable_reg, 98 .volatile_reg = ina2xx_is_volatile_reg, 99 }; 100 101 enum ina2xx_ids { ina219, ina226 }; 102 103 struct ina2xx_config { 104 u16 config_default; 105 int calibration_factor; 106 int shunt_div; 107 int bus_voltage_shift; 108 int bus_voltage_lsb; /* uV */ 109 int power_lsb; /* uW */ 110 }; 111 112 struct ina2xx_chip_info { 113 struct regmap *regmap; 114 struct task_struct *task; 115 const struct ina2xx_config *config; 116 struct mutex state_lock; 117 unsigned int shunt_resistor; 118 int avg; 119 int int_time_vbus; /* Bus voltage integration time uS */ 120 int int_time_vshunt; /* Shunt voltage integration time uS */ 121 bool allow_async_readout; 122 }; 123 124 static const struct ina2xx_config ina2xx_config[] = { 125 [ina219] = { 126 .config_default = INA219_CONFIG_DEFAULT, 127 .calibration_factor = 40960000, 128 .shunt_div = 100, 129 .bus_voltage_shift = 3, 130 .bus_voltage_lsb = 4000, 131 .power_lsb = 20000, 132 }, 133 [ina226] = { 134 .config_default = INA226_CONFIG_DEFAULT, 135 .calibration_factor = 5120000, 136 .shunt_div = 400, 137 .bus_voltage_shift = 0, 138 .bus_voltage_lsb = 1250, 139 .power_lsb = 25000, 140 }, 141 }; 142 143 static int ina2xx_read_raw(struct iio_dev *indio_dev, 144 struct iio_chan_spec const *chan, 145 int *val, int *val2, long mask) 146 { 147 int ret; 148 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 149 unsigned int regval; 150 151 switch (mask) { 152 case IIO_CHAN_INFO_RAW: 153 ret = regmap_read(chip->regmap, chan->address, ®val); 154 if (ret) 155 return ret; 156 157 if (is_signed_reg(chan->address)) 158 *val = (s16) regval; 159 else 160 *val = regval; 161 162 return IIO_VAL_INT; 163 164 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 165 *val = chip->avg; 166 return IIO_VAL_INT; 167 168 case IIO_CHAN_INFO_INT_TIME: 169 *val = 0; 170 if (chan->address == INA2XX_SHUNT_VOLTAGE) 171 *val2 = chip->int_time_vshunt; 172 else 173 *val2 = chip->int_time_vbus; 174 175 return IIO_VAL_INT_PLUS_MICRO; 176 177 case IIO_CHAN_INFO_SAMP_FREQ: 178 /* 179 * Sample freq is read only, it is a consequence of 180 * 1/AVG*(CT_bus+CT_shunt). 181 */ 182 *val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip)); 183 184 return IIO_VAL_INT; 185 186 case IIO_CHAN_INFO_SCALE: 187 switch (chan->address) { 188 case INA2XX_SHUNT_VOLTAGE: 189 /* processed (mV) = raw/shunt_div */ 190 *val2 = chip->config->shunt_div; 191 *val = 1; 192 return IIO_VAL_FRACTIONAL; 193 194 case INA2XX_BUS_VOLTAGE: 195 /* processed (mV) = raw*lsb (uV) / (1000 << shift) */ 196 *val = chip->config->bus_voltage_lsb; 197 *val2 = 1000 << chip->config->bus_voltage_shift; 198 return IIO_VAL_FRACTIONAL; 199 200 case INA2XX_POWER: 201 /* processed (mW) = raw*lsb (uW) / 1000 */ 202 *val = chip->config->power_lsb; 203 *val2 = 1000; 204 return IIO_VAL_FRACTIONAL; 205 206 case INA2XX_CURRENT: 207 /* processed (mA) = raw (mA) */ 208 *val = 1; 209 return IIO_VAL_INT; 210 } 211 } 212 213 return -EINVAL; 214 } 215 216 /* 217 * Available averaging rates for ina226. The indices correspond with 218 * the bit values expected by the chip (according to the ina226 datasheet, 219 * table 3 AVG bit settings, found at 220 * http://www.ti.com/lit/ds/symlink/ina226.pdf. 221 */ 222 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 }; 223 224 static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val, 225 unsigned int *config) 226 { 227 int bits; 228 229 if (val > 1024 || val < 1) 230 return -EINVAL; 231 232 bits = find_closest(val, ina226_avg_tab, 233 ARRAY_SIZE(ina226_avg_tab)); 234 235 chip->avg = ina226_avg_tab[bits]; 236 237 *config &= ~INA226_AVG_MASK; 238 *config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK; 239 240 return 0; 241 } 242 243 /* Conversion times in uS */ 244 static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100, 245 2116, 4156, 8244 }; 246 247 static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip, 248 unsigned int val_us, unsigned int *config) 249 { 250 int bits; 251 252 if (val_us > 8244 || val_us < 140) 253 return -EINVAL; 254 255 bits = find_closest(val_us, ina226_conv_time_tab, 256 ARRAY_SIZE(ina226_conv_time_tab)); 257 258 chip->int_time_vbus = ina226_conv_time_tab[bits]; 259 260 *config &= ~INA226_ITB_MASK; 261 *config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK; 262 263 return 0; 264 } 265 266 static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip, 267 unsigned int val_us, unsigned int *config) 268 { 269 int bits; 270 271 if (val_us > 8244 || val_us < 140) 272 return -EINVAL; 273 274 bits = find_closest(val_us, ina226_conv_time_tab, 275 ARRAY_SIZE(ina226_conv_time_tab)); 276 277 chip->int_time_vshunt = ina226_conv_time_tab[bits]; 278 279 *config &= ~INA226_ITS_MASK; 280 *config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK; 281 282 return 0; 283 } 284 285 static int ina2xx_write_raw(struct iio_dev *indio_dev, 286 struct iio_chan_spec const *chan, 287 int val, int val2, long mask) 288 { 289 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 290 unsigned int config, tmp; 291 int ret; 292 293 if (iio_buffer_enabled(indio_dev)) 294 return -EBUSY; 295 296 mutex_lock(&chip->state_lock); 297 298 ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config); 299 if (ret) 300 goto err; 301 302 tmp = config; 303 304 switch (mask) { 305 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 306 ret = ina226_set_average(chip, val, &tmp); 307 break; 308 309 case IIO_CHAN_INFO_INT_TIME: 310 if (chan->address == INA2XX_SHUNT_VOLTAGE) 311 ret = ina226_set_int_time_vshunt(chip, val2, &tmp); 312 else 313 ret = ina226_set_int_time_vbus(chip, val2, &tmp); 314 break; 315 316 default: 317 ret = -EINVAL; 318 } 319 320 if (!ret && (tmp != config)) 321 ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp); 322 err: 323 mutex_unlock(&chip->state_lock); 324 325 return ret; 326 } 327 328 static ssize_t ina2xx_allow_async_readout_show(struct device *dev, 329 struct device_attribute *attr, 330 char *buf) 331 { 332 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 333 334 return sprintf(buf, "%d\n", chip->allow_async_readout); 335 } 336 337 static ssize_t ina2xx_allow_async_readout_store(struct device *dev, 338 struct device_attribute *attr, 339 const char *buf, size_t len) 340 { 341 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 342 bool val; 343 int ret; 344 345 ret = strtobool((const char *) buf, &val); 346 if (ret) 347 return ret; 348 349 chip->allow_async_readout = val; 350 351 return len; 352 } 353 354 /* 355 * Set current LSB to 1mA, shunt is in uOhms 356 * (equation 13 in datasheet). We hardcode a Current_LSB 357 * of 1.0 x10-6. The only remaining parameter is RShunt. 358 * There is no need to expose the CALIBRATION register 359 * to the user for now. But we need to reset this register 360 * if the user updates RShunt after driver init, e.g upon 361 * reading an EEPROM/Probe-type value. 362 */ 363 static int ina2xx_set_calibration(struct ina2xx_chip_info *chip) 364 { 365 u16 regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor, 366 chip->shunt_resistor); 367 368 return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval); 369 } 370 371 static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val) 372 { 373 if (val <= 0 || val > chip->config->calibration_factor) 374 return -EINVAL; 375 376 chip->shunt_resistor = val; 377 378 return 0; 379 } 380 381 static ssize_t ina2xx_shunt_resistor_show(struct device *dev, 382 struct device_attribute *attr, 383 char *buf) 384 { 385 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 386 387 return sprintf(buf, "%d\n", chip->shunt_resistor); 388 } 389 390 static ssize_t ina2xx_shunt_resistor_store(struct device *dev, 391 struct device_attribute *attr, 392 const char *buf, size_t len) 393 { 394 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 395 unsigned long val; 396 int ret; 397 398 ret = kstrtoul((const char *) buf, 10, &val); 399 if (ret) 400 return ret; 401 402 ret = set_shunt_resistor(chip, val); 403 if (ret) 404 return ret; 405 406 /* Update the Calibration register */ 407 ret = ina2xx_set_calibration(chip); 408 if (ret) 409 return ret; 410 411 return len; 412 } 413 414 #define INA2XX_CHAN(_type, _index, _address) { \ 415 .type = (_type), \ 416 .address = (_address), \ 417 .indexed = 1, \ 418 .channel = (_index), \ 419 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 420 | BIT(IIO_CHAN_INFO_SCALE), \ 421 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 422 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 423 .scan_index = (_index), \ 424 .scan_type = { \ 425 .sign = 'u', \ 426 .realbits = 16, \ 427 .storagebits = 16, \ 428 .endianness = IIO_CPU, \ 429 } \ 430 } 431 432 /* 433 * Sampling Freq is a consequence of the integration times of 434 * the Voltage channels. 435 */ 436 #define INA2XX_CHAN_VOLTAGE(_index, _address) { \ 437 .type = IIO_VOLTAGE, \ 438 .address = (_address), \ 439 .indexed = 1, \ 440 .channel = (_index), \ 441 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 442 BIT(IIO_CHAN_INFO_SCALE) | \ 443 BIT(IIO_CHAN_INFO_INT_TIME), \ 444 .scan_index = (_index), \ 445 .scan_type = { \ 446 .sign = 'u', \ 447 .realbits = 16, \ 448 .storagebits = 16, \ 449 .endianness = IIO_LE, \ 450 } \ 451 } 452 453 static const struct iio_chan_spec ina2xx_channels[] = { 454 INA2XX_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE), 455 INA2XX_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE), 456 INA2XX_CHAN(IIO_POWER, 2, INA2XX_POWER), 457 INA2XX_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT), 458 IIO_CHAN_SOFT_TIMESTAMP(4), 459 }; 460 461 static int ina2xx_work_buffer(struct iio_dev *indio_dev) 462 { 463 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 464 unsigned short data[8]; 465 int bit, ret, i = 0; 466 s64 time_a, time_b; 467 unsigned int alert; 468 469 time_a = iio_get_time_ns(indio_dev); 470 471 /* 472 * Because the timer thread and the chip conversion clock 473 * are asynchronous, the period difference will eventually 474 * result in reading V[k-1] again, or skip V[k] at time Tk. 475 * In order to resync the timer with the conversion process 476 * we check the ConVersionReadyFlag. 477 * On hardware that supports using the ALERT pin to toggle a 478 * GPIO a triggered buffer could be used instead. 479 * For now, we pay for that extra read of the ALERT register 480 */ 481 if (!chip->allow_async_readout) 482 do { 483 ret = regmap_read(chip->regmap, INA226_ALERT_MASK, 484 &alert); 485 if (ret < 0) 486 return ret; 487 488 alert &= INA266_CVRF; 489 } while (!alert); 490 491 /* 492 * Single register reads: bulk_read will not work with ina226 493 * as there is no auto-increment of the address register for 494 * data length longer than 16bits. 495 */ 496 for_each_set_bit(bit, indio_dev->active_scan_mask, 497 indio_dev->masklength) { 498 unsigned int val; 499 500 ret = regmap_read(chip->regmap, 501 INA2XX_SHUNT_VOLTAGE + bit, &val); 502 if (ret < 0) 503 return ret; 504 505 data[i++] = val; 506 } 507 508 time_b = iio_get_time_ns(indio_dev); 509 510 iio_push_to_buffers_with_timestamp(indio_dev, 511 (unsigned int *)data, time_a); 512 513 return (unsigned long)(time_b - time_a) / 1000; 514 }; 515 516 static int ina2xx_capture_thread(void *data) 517 { 518 struct iio_dev *indio_dev = data; 519 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 520 unsigned int sampling_us = SAMPLING_PERIOD(chip); 521 int buffer_us; 522 523 /* 524 * Poll a bit faster than the chip internal Fs, in case 525 * we wish to sync with the conversion ready flag. 526 */ 527 if (!chip->allow_async_readout) 528 sampling_us -= 200; 529 530 do { 531 buffer_us = ina2xx_work_buffer(indio_dev); 532 if (buffer_us < 0) 533 return buffer_us; 534 535 if (sampling_us > buffer_us) 536 udelay(sampling_us - buffer_us); 537 538 } while (!kthread_should_stop()); 539 540 return 0; 541 } 542 543 static int ina2xx_buffer_enable(struct iio_dev *indio_dev) 544 { 545 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 546 unsigned int sampling_us = SAMPLING_PERIOD(chip); 547 548 dev_dbg(&indio_dev->dev, "Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n", 549 (unsigned int)(*indio_dev->active_scan_mask), 550 1000000 / sampling_us, chip->avg); 551 552 dev_dbg(&indio_dev->dev, "Expected work period: %u us\n", sampling_us); 553 dev_dbg(&indio_dev->dev, "Async readout mode: %d\n", 554 chip->allow_async_readout); 555 556 chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev, 557 "%s:%d-%uus", indio_dev->name, indio_dev->id, 558 sampling_us); 559 560 return PTR_ERR_OR_ZERO(chip->task); 561 } 562 563 static int ina2xx_buffer_disable(struct iio_dev *indio_dev) 564 { 565 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 566 567 if (chip->task) { 568 kthread_stop(chip->task); 569 chip->task = NULL; 570 } 571 572 return 0; 573 } 574 575 static const struct iio_buffer_setup_ops ina2xx_setup_ops = { 576 .postenable = &ina2xx_buffer_enable, 577 .predisable = &ina2xx_buffer_disable, 578 }; 579 580 static int ina2xx_debug_reg(struct iio_dev *indio_dev, 581 unsigned reg, unsigned writeval, unsigned *readval) 582 { 583 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 584 585 if (!readval) 586 return regmap_write(chip->regmap, reg, writeval); 587 588 return regmap_read(chip->regmap, reg, readval); 589 } 590 591 /* Possible integration times for vshunt and vbus */ 592 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244"); 593 594 static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR, 595 ina2xx_allow_async_readout_show, 596 ina2xx_allow_async_readout_store, 0); 597 598 static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR, 599 ina2xx_shunt_resistor_show, 600 ina2xx_shunt_resistor_store, 0); 601 602 static struct attribute *ina2xx_attributes[] = { 603 &iio_dev_attr_in_allow_async_readout.dev_attr.attr, 604 &iio_const_attr_integration_time_available.dev_attr.attr, 605 &iio_dev_attr_in_shunt_resistor.dev_attr.attr, 606 NULL, 607 }; 608 609 static const struct attribute_group ina2xx_attribute_group = { 610 .attrs = ina2xx_attributes, 611 }; 612 613 static const struct iio_info ina2xx_info = { 614 .driver_module = THIS_MODULE, 615 .attrs = &ina2xx_attribute_group, 616 .read_raw = ina2xx_read_raw, 617 .write_raw = ina2xx_write_raw, 618 .debugfs_reg_access = ina2xx_debug_reg, 619 }; 620 621 /* Initialize the configuration and calibration registers. */ 622 static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config) 623 { 624 int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config); 625 if (ret) 626 return ret; 627 628 return ina2xx_set_calibration(chip); 629 } 630 631 static int ina2xx_probe(struct i2c_client *client, 632 const struct i2c_device_id *id) 633 { 634 struct ina2xx_chip_info *chip; 635 struct iio_dev *indio_dev; 636 struct iio_buffer *buffer; 637 unsigned int val; 638 int ret; 639 640 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); 641 if (!indio_dev) 642 return -ENOMEM; 643 644 chip = iio_priv(indio_dev); 645 646 /* This is only used for device removal purposes. */ 647 i2c_set_clientdata(client, indio_dev); 648 649 chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config); 650 if (IS_ERR(chip->regmap)) { 651 dev_err(&client->dev, "failed to allocate register map\n"); 652 return PTR_ERR(chip->regmap); 653 } 654 655 chip->config = &ina2xx_config[id->driver_data]; 656 657 mutex_init(&chip->state_lock); 658 659 if (of_property_read_u32(client->dev.of_node, 660 "shunt-resistor", &val) < 0) { 661 struct ina2xx_platform_data *pdata = 662 dev_get_platdata(&client->dev); 663 664 if (pdata) 665 val = pdata->shunt_uohms; 666 else 667 val = INA2XX_RSHUNT_DEFAULT; 668 } 669 670 ret = set_shunt_resistor(chip, val); 671 if (ret) 672 return ret; 673 674 /* Patch the current config register with default. */ 675 val = chip->config->config_default; 676 677 if (id->driver_data == ina226) { 678 ina226_set_average(chip, INA226_DEFAULT_AVG, &val); 679 ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val); 680 ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val); 681 } 682 683 ret = ina2xx_init(chip, val); 684 if (ret) { 685 dev_err(&client->dev, "error configuring the device\n"); 686 return ret; 687 } 688 689 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 690 indio_dev->dev.parent = &client->dev; 691 indio_dev->dev.of_node = client->dev.of_node; 692 indio_dev->channels = ina2xx_channels; 693 indio_dev->num_channels = ARRAY_SIZE(ina2xx_channels); 694 indio_dev->name = id->name; 695 indio_dev->info = &ina2xx_info; 696 indio_dev->setup_ops = &ina2xx_setup_ops; 697 698 buffer = devm_iio_kfifo_allocate(&indio_dev->dev); 699 if (!buffer) 700 return -ENOMEM; 701 702 iio_device_attach_buffer(indio_dev, buffer); 703 704 return iio_device_register(indio_dev); 705 } 706 707 static int ina2xx_remove(struct i2c_client *client) 708 { 709 struct iio_dev *indio_dev = i2c_get_clientdata(client); 710 struct ina2xx_chip_info *chip = iio_priv(indio_dev); 711 712 iio_device_unregister(indio_dev); 713 714 /* Powerdown */ 715 return regmap_update_bits(chip->regmap, INA2XX_CONFIG, 716 INA2XX_MODE_MASK, 0); 717 } 718 719 static const struct i2c_device_id ina2xx_id[] = { 720 {"ina219", ina219}, 721 {"ina220", ina219}, 722 {"ina226", ina226}, 723 {"ina230", ina226}, 724 {"ina231", ina226}, 725 {} 726 }; 727 MODULE_DEVICE_TABLE(i2c, ina2xx_id); 728 729 static struct i2c_driver ina2xx_driver = { 730 .driver = { 731 .name = KBUILD_MODNAME, 732 }, 733 .probe = ina2xx_probe, 734 .remove = ina2xx_remove, 735 .id_table = ina2xx_id, 736 }; 737 module_i2c_driver(ina2xx_driver); 738 739 MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>"); 740 MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver"); 741 MODULE_LICENSE("GPL v2"); 742