1 /* ADC driver for AXP20X and AXP22X PMICs 2 * 3 * Copyright (c) 2016 Free Electrons NextThing Co. 4 * Quentin Schulz <quentin.schulz@free-electrons.com> 5 * 6 * This program is free software; you can redistribute it and/or modify it under 7 * the terms of the GNU General Public License version 2 as published by the 8 * Free Software Foundation. 9 */ 10 11 #include <linux/completion.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/platform_device.h> 18 #include <linux/pm_runtime.h> 19 #include <linux/regmap.h> 20 #include <linux/thermal.h> 21 22 #include <linux/iio/iio.h> 23 #include <linux/iio/driver.h> 24 #include <linux/iio/machine.h> 25 #include <linux/mfd/axp20x.h> 26 27 #define AXP20X_ADC_EN1_MASK GENMASK(7, 0) 28 29 #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7)) 30 #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0)) 31 32 #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0) 33 #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1) 34 #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0)) 35 #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1) 36 37 #define AXP20X_ADC_RATE_MASK GENMASK(7, 6) 38 #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK) 39 #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK) 40 41 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \ 42 { \ 43 .type = _type, \ 44 .indexed = 1, \ 45 .channel = _channel, \ 46 .address = _reg, \ 47 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 48 BIT(IIO_CHAN_INFO_SCALE), \ 49 .datasheet_name = _name, \ 50 } 51 52 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \ 53 { \ 54 .type = _type, \ 55 .indexed = 1, \ 56 .channel = _channel, \ 57 .address = _reg, \ 58 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 59 BIT(IIO_CHAN_INFO_SCALE) |\ 60 BIT(IIO_CHAN_INFO_OFFSET),\ 61 .datasheet_name = _name, \ 62 } 63 64 struct axp_data; 65 66 struct axp20x_adc_iio { 67 struct regmap *regmap; 68 struct axp_data *data; 69 }; 70 71 enum axp20x_adc_channel_v { 72 AXP20X_ACIN_V = 0, 73 AXP20X_VBUS_V, 74 AXP20X_TS_IN, 75 AXP20X_GPIO0_V, 76 AXP20X_GPIO1_V, 77 AXP20X_IPSOUT_V, 78 AXP20X_BATT_V, 79 }; 80 81 enum axp20x_adc_channel_i { 82 AXP20X_ACIN_I = 0, 83 AXP20X_VBUS_I, 84 AXP20X_BATT_CHRG_I, 85 AXP20X_BATT_DISCHRG_I, 86 }; 87 88 enum axp22x_adc_channel_v { 89 AXP22X_TS_IN = 0, 90 AXP22X_BATT_V, 91 }; 92 93 enum axp22x_adc_channel_i { 94 AXP22X_BATT_CHRG_I = 1, 95 AXP22X_BATT_DISCHRG_I, 96 }; 97 98 static struct iio_map axp20x_maps[] = { 99 { 100 .consumer_dev_name = "axp20x-usb-power-supply", 101 .consumer_channel = "vbus_v", 102 .adc_channel_label = "vbus_v", 103 }, { 104 .consumer_dev_name = "axp20x-usb-power-supply", 105 .consumer_channel = "vbus_i", 106 .adc_channel_label = "vbus_i", 107 }, { 108 .consumer_dev_name = "axp20x-ac-power-supply", 109 .consumer_channel = "acin_v", 110 .adc_channel_label = "acin_v", 111 }, { 112 .consumer_dev_name = "axp20x-ac-power-supply", 113 .consumer_channel = "acin_i", 114 .adc_channel_label = "acin_i", 115 }, { 116 .consumer_dev_name = "axp20x-battery-power-supply", 117 .consumer_channel = "batt_v", 118 .adc_channel_label = "batt_v", 119 }, { 120 .consumer_dev_name = "axp20x-battery-power-supply", 121 .consumer_channel = "batt_chrg_i", 122 .adc_channel_label = "batt_chrg_i", 123 }, { 124 .consumer_dev_name = "axp20x-battery-power-supply", 125 .consumer_channel = "batt_dischrg_i", 126 .adc_channel_label = "batt_dischrg_i", 127 }, { /* sentinel */ } 128 }; 129 130 static struct iio_map axp22x_maps[] = { 131 { 132 .consumer_dev_name = "axp20x-battery-power-supply", 133 .consumer_channel = "batt_v", 134 .adc_channel_label = "batt_v", 135 }, { 136 .consumer_dev_name = "axp20x-battery-power-supply", 137 .consumer_channel = "batt_chrg_i", 138 .adc_channel_label = "batt_chrg_i", 139 }, { 140 .consumer_dev_name = "axp20x-battery-power-supply", 141 .consumer_channel = "batt_dischrg_i", 142 .adc_channel_label = "batt_dischrg_i", 143 }, { /* sentinel */ } 144 }; 145 146 /* 147 * Channels are mapped by physical system. Their channels share the same index. 148 * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw. 149 * The only exception is for the battery. batt_v will be in_voltage6_raw and 150 * charge current in_current6_raw and discharge current will be in_current7_raw. 151 */ 152 static const struct iio_chan_spec axp20x_adc_channels[] = { 153 AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE, 154 AXP20X_ACIN_V_ADC_H), 155 AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT, 156 AXP20X_ACIN_I_ADC_H), 157 AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE, 158 AXP20X_VBUS_V_ADC_H), 159 AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT, 160 AXP20X_VBUS_I_ADC_H), 161 { 162 .type = IIO_TEMP, 163 .address = AXP20X_TEMP_ADC_H, 164 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 165 BIT(IIO_CHAN_INFO_SCALE) | 166 BIT(IIO_CHAN_INFO_OFFSET), 167 .datasheet_name = "pmic_temp", 168 }, 169 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE, 170 AXP20X_GPIO0_V_ADC_H), 171 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE, 172 AXP20X_GPIO1_V_ADC_H), 173 AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE, 174 AXP20X_IPSOUT_V_HIGH_H), 175 AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE, 176 AXP20X_BATT_V_H), 177 AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 178 AXP20X_BATT_CHRG_I_H), 179 AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 180 AXP20X_BATT_DISCHRG_I_H), 181 }; 182 183 static const struct iio_chan_spec axp22x_adc_channels[] = { 184 { 185 .type = IIO_TEMP, 186 .address = AXP22X_PMIC_TEMP_H, 187 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 188 BIT(IIO_CHAN_INFO_SCALE) | 189 BIT(IIO_CHAN_INFO_OFFSET), 190 .datasheet_name = "pmic_temp", 191 }, 192 AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE, 193 AXP20X_BATT_V_H), 194 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 195 AXP20X_BATT_CHRG_I_H), 196 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 197 AXP20X_BATT_DISCHRG_I_H), 198 }; 199 200 static int axp20x_adc_raw(struct iio_dev *indio_dev, 201 struct iio_chan_spec const *chan, int *val) 202 { 203 struct axp20x_adc_iio *info = iio_priv(indio_dev); 204 int size = 12; 205 206 /* 207 * N.B.: Unlike the Chinese datasheets tell, the charging current is 208 * stored on 12 bits, not 13 bits. Only discharging current is on 13 209 * bits. 210 */ 211 if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I) 212 size = 13; 213 else 214 size = 12; 215 216 *val = axp20x_read_variable_width(info->regmap, chan->address, size); 217 if (*val < 0) 218 return *val; 219 220 return IIO_VAL_INT; 221 } 222 223 static int axp22x_adc_raw(struct iio_dev *indio_dev, 224 struct iio_chan_spec const *chan, int *val) 225 { 226 struct axp20x_adc_iio *info = iio_priv(indio_dev); 227 int size; 228 229 /* 230 * N.B.: Unlike the Chinese datasheets tell, the charging current is 231 * stored on 12 bits, not 13 bits. Only discharging current is on 13 232 * bits. 233 */ 234 if (chan->type == IIO_CURRENT && chan->channel == AXP22X_BATT_DISCHRG_I) 235 size = 13; 236 else 237 size = 12; 238 239 *val = axp20x_read_variable_width(info->regmap, chan->address, size); 240 if (*val < 0) 241 return *val; 242 243 return IIO_VAL_INT; 244 } 245 246 static int axp20x_adc_scale_voltage(int channel, int *val, int *val2) 247 { 248 switch (channel) { 249 case AXP20X_ACIN_V: 250 case AXP20X_VBUS_V: 251 *val = 1; 252 *val2 = 700000; 253 return IIO_VAL_INT_PLUS_MICRO; 254 255 case AXP20X_GPIO0_V: 256 case AXP20X_GPIO1_V: 257 *val = 0; 258 *val2 = 500000; 259 return IIO_VAL_INT_PLUS_MICRO; 260 261 case AXP20X_BATT_V: 262 *val = 1; 263 *val2 = 100000; 264 return IIO_VAL_INT_PLUS_MICRO; 265 266 case AXP20X_IPSOUT_V: 267 *val = 1; 268 *val2 = 400000; 269 return IIO_VAL_INT_PLUS_MICRO; 270 271 default: 272 return -EINVAL; 273 } 274 } 275 276 static int axp20x_adc_scale_current(int channel, int *val, int *val2) 277 { 278 switch (channel) { 279 case AXP20X_ACIN_I: 280 *val = 0; 281 *val2 = 625000; 282 return IIO_VAL_INT_PLUS_MICRO; 283 284 case AXP20X_VBUS_I: 285 *val = 0; 286 *val2 = 375000; 287 return IIO_VAL_INT_PLUS_MICRO; 288 289 case AXP20X_BATT_DISCHRG_I: 290 case AXP20X_BATT_CHRG_I: 291 *val = 0; 292 *val2 = 500000; 293 return IIO_VAL_INT_PLUS_MICRO; 294 295 default: 296 return -EINVAL; 297 } 298 } 299 300 static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val, 301 int *val2) 302 { 303 switch (chan->type) { 304 case IIO_VOLTAGE: 305 return axp20x_adc_scale_voltage(chan->channel, val, val2); 306 307 case IIO_CURRENT: 308 return axp20x_adc_scale_current(chan->channel, val, val2); 309 310 case IIO_TEMP: 311 *val = 100; 312 return IIO_VAL_INT; 313 314 default: 315 return -EINVAL; 316 } 317 } 318 319 static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val, 320 int *val2) 321 { 322 switch (chan->type) { 323 case IIO_VOLTAGE: 324 if (chan->channel != AXP22X_BATT_V) 325 return -EINVAL; 326 327 *val = 1; 328 *val2 = 100000; 329 return IIO_VAL_INT_PLUS_MICRO; 330 331 case IIO_CURRENT: 332 *val = 0; 333 *val2 = 500000; 334 return IIO_VAL_INT_PLUS_MICRO; 335 336 case IIO_TEMP: 337 *val = 100; 338 return IIO_VAL_INT; 339 340 default: 341 return -EINVAL; 342 } 343 } 344 345 static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel, 346 int *val) 347 { 348 struct axp20x_adc_iio *info = iio_priv(indio_dev); 349 int ret; 350 351 ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val); 352 if (ret < 0) 353 return ret; 354 355 switch (channel) { 356 case AXP20X_GPIO0_V: 357 *val &= AXP20X_GPIO10_IN_RANGE_GPIO0; 358 break; 359 360 case AXP20X_GPIO1_V: 361 *val &= AXP20X_GPIO10_IN_RANGE_GPIO1; 362 break; 363 364 default: 365 return -EINVAL; 366 } 367 368 *val = !!(*val) * 700000; 369 370 return IIO_VAL_INT; 371 } 372 373 static int axp20x_adc_offset(struct iio_dev *indio_dev, 374 struct iio_chan_spec const *chan, int *val) 375 { 376 switch (chan->type) { 377 case IIO_VOLTAGE: 378 return axp20x_adc_offset_voltage(indio_dev, chan->channel, val); 379 380 case IIO_TEMP: 381 *val = -1447; 382 return IIO_VAL_INT; 383 384 default: 385 return -EINVAL; 386 } 387 } 388 389 static int axp20x_read_raw(struct iio_dev *indio_dev, 390 struct iio_chan_spec const *chan, int *val, 391 int *val2, long mask) 392 { 393 switch (mask) { 394 case IIO_CHAN_INFO_OFFSET: 395 return axp20x_adc_offset(indio_dev, chan, val); 396 397 case IIO_CHAN_INFO_SCALE: 398 return axp20x_adc_scale(chan, val, val2); 399 400 case IIO_CHAN_INFO_RAW: 401 return axp20x_adc_raw(indio_dev, chan, val); 402 403 default: 404 return -EINVAL; 405 } 406 } 407 408 static int axp22x_read_raw(struct iio_dev *indio_dev, 409 struct iio_chan_spec const *chan, int *val, 410 int *val2, long mask) 411 { 412 switch (mask) { 413 case IIO_CHAN_INFO_OFFSET: 414 *val = -2677; 415 return IIO_VAL_INT; 416 417 case IIO_CHAN_INFO_SCALE: 418 return axp22x_adc_scale(chan, val, val2); 419 420 case IIO_CHAN_INFO_RAW: 421 return axp22x_adc_raw(indio_dev, chan, val); 422 423 default: 424 return -EINVAL; 425 } 426 } 427 428 static int axp20x_write_raw(struct iio_dev *indio_dev, 429 struct iio_chan_spec const *chan, int val, int val2, 430 long mask) 431 { 432 struct axp20x_adc_iio *info = iio_priv(indio_dev); 433 unsigned int reg, regval; 434 435 /* 436 * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets 437 * for (independently) GPIO0 and GPIO1 when in ADC mode. 438 */ 439 if (mask != IIO_CHAN_INFO_OFFSET) 440 return -EINVAL; 441 442 if (val != 0 && val != 700000) 443 return -EINVAL; 444 445 switch (chan->channel) { 446 case AXP20X_GPIO0_V: 447 reg = AXP20X_GPIO10_IN_RANGE_GPIO0; 448 regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(!!val); 449 break; 450 451 case AXP20X_GPIO1_V: 452 reg = AXP20X_GPIO10_IN_RANGE_GPIO1; 453 regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(!!val); 454 break; 455 456 default: 457 return -EINVAL; 458 } 459 460 return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg, 461 regval); 462 } 463 464 static const struct iio_info axp20x_adc_iio_info = { 465 .read_raw = axp20x_read_raw, 466 .write_raw = axp20x_write_raw, 467 }; 468 469 static const struct iio_info axp22x_adc_iio_info = { 470 .read_raw = axp22x_read_raw, 471 }; 472 473 static int axp20x_adc_rate(int rate) 474 { 475 return AXP20X_ADC_RATE_HZ(rate); 476 } 477 478 static int axp22x_adc_rate(int rate) 479 { 480 return AXP22X_ADC_RATE_HZ(rate); 481 } 482 483 struct axp_data { 484 const struct iio_info *iio_info; 485 int num_channels; 486 struct iio_chan_spec const *channels; 487 unsigned long adc_en1_mask; 488 int (*adc_rate)(int rate); 489 bool adc_en2; 490 struct iio_map *maps; 491 }; 492 493 static const struct axp_data axp20x_data = { 494 .iio_info = &axp20x_adc_iio_info, 495 .num_channels = ARRAY_SIZE(axp20x_adc_channels), 496 .channels = axp20x_adc_channels, 497 .adc_en1_mask = AXP20X_ADC_EN1_MASK, 498 .adc_rate = axp20x_adc_rate, 499 .adc_en2 = true, 500 .maps = axp20x_maps, 501 }; 502 503 static const struct axp_data axp22x_data = { 504 .iio_info = &axp22x_adc_iio_info, 505 .num_channels = ARRAY_SIZE(axp22x_adc_channels), 506 .channels = axp22x_adc_channels, 507 .adc_en1_mask = AXP22X_ADC_EN1_MASK, 508 .adc_rate = axp22x_adc_rate, 509 .adc_en2 = false, 510 .maps = axp22x_maps, 511 }; 512 513 static const struct platform_device_id axp20x_adc_id_match[] = { 514 { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, }, 515 { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, }, 516 { /* sentinel */ }, 517 }; 518 MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match); 519 520 static int axp20x_probe(struct platform_device *pdev) 521 { 522 struct axp20x_adc_iio *info; 523 struct iio_dev *indio_dev; 524 struct axp20x_dev *axp20x_dev; 525 int ret; 526 527 axp20x_dev = dev_get_drvdata(pdev->dev.parent); 528 529 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); 530 if (!indio_dev) 531 return -ENOMEM; 532 533 info = iio_priv(indio_dev); 534 platform_set_drvdata(pdev, indio_dev); 535 536 info->regmap = axp20x_dev->regmap; 537 indio_dev->dev.parent = &pdev->dev; 538 indio_dev->dev.of_node = pdev->dev.of_node; 539 indio_dev->modes = INDIO_DIRECT_MODE; 540 541 info->data = (struct axp_data *)platform_get_device_id(pdev)->driver_data; 542 543 indio_dev->name = platform_get_device_id(pdev)->name; 544 indio_dev->info = info->data->iio_info; 545 indio_dev->num_channels = info->data->num_channels; 546 indio_dev->channels = info->data->channels; 547 548 /* Enable the ADCs on IP */ 549 regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask); 550 551 if (info->data->adc_en2) 552 /* Enable GPIO0/1 and internal temperature ADCs */ 553 regmap_update_bits(info->regmap, AXP20X_ADC_EN2, 554 AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK); 555 556 /* Configure ADCs rate */ 557 regmap_update_bits(info->regmap, AXP20X_ADC_RATE, AXP20X_ADC_RATE_MASK, 558 info->data->adc_rate(100)); 559 560 ret = iio_map_array_register(indio_dev, info->data->maps); 561 if (ret < 0) { 562 dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret); 563 goto fail_map; 564 } 565 566 ret = iio_device_register(indio_dev); 567 if (ret < 0) { 568 dev_err(&pdev->dev, "could not register the device\n"); 569 goto fail_register; 570 } 571 572 return 0; 573 574 fail_register: 575 iio_map_array_unregister(indio_dev); 576 577 fail_map: 578 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 579 580 if (info->data->adc_en2) 581 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 582 583 return ret; 584 } 585 586 static int axp20x_remove(struct platform_device *pdev) 587 { 588 struct iio_dev *indio_dev = platform_get_drvdata(pdev); 589 struct axp20x_adc_iio *info = iio_priv(indio_dev); 590 591 iio_device_unregister(indio_dev); 592 iio_map_array_unregister(indio_dev); 593 594 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 595 596 if (info->data->adc_en2) 597 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 598 599 return 0; 600 } 601 602 static struct platform_driver axp20x_adc_driver = { 603 .driver = { 604 .name = "axp20x-adc", 605 }, 606 .id_table = axp20x_adc_id_match, 607 .probe = axp20x_probe, 608 .remove = axp20x_remove, 609 }; 610 611 module_platform_driver(axp20x_adc_driver); 612 613 MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs"); 614 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 615 MODULE_LICENSE("GPL"); 616