1 // SPDX-License-Identifier: GPL-2.0-only 2 /* ADC driver for AXP20X and AXP22X PMICs 3 * 4 * Copyright (c) 2016 Free Electrons NextThing Co. 5 * Quentin Schulz <quentin.schulz@free-electrons.com> 6 */ 7 8 #include <linux/completion.h> 9 #include <linux/interrupt.h> 10 #include <linux/io.h> 11 #include <linux/module.h> 12 #include <linux/mod_devicetable.h> 13 #include <linux/platform_device.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/property.h> 16 #include <linux/regmap.h> 17 #include <linux/thermal.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/driver.h> 21 #include <linux/iio/machine.h> 22 #include <linux/mfd/axp20x.h> 23 24 #define AXP20X_ADC_EN1_MASK GENMASK(7, 0) 25 26 #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7)) 27 #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0)) 28 29 #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0) 30 #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1) 31 #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0)) 32 #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1) 33 34 #define AXP20X_ADC_RATE_MASK GENMASK(7, 6) 35 #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4) 36 #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK) 37 #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK) 38 #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK) 39 #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x) 40 #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK) 41 #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x)) 42 43 #define AXP20X_ADC_CHANNEL(_channel, _name, _type, _reg) \ 44 { \ 45 .type = _type, \ 46 .indexed = 1, \ 47 .channel = _channel, \ 48 .address = _reg, \ 49 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 50 BIT(IIO_CHAN_INFO_SCALE), \ 51 .datasheet_name = _name, \ 52 } 53 54 #define AXP20X_ADC_CHANNEL_OFFSET(_channel, _name, _type, _reg) \ 55 { \ 56 .type = _type, \ 57 .indexed = 1, \ 58 .channel = _channel, \ 59 .address = _reg, \ 60 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 61 BIT(IIO_CHAN_INFO_SCALE) |\ 62 BIT(IIO_CHAN_INFO_OFFSET),\ 63 .datasheet_name = _name, \ 64 } 65 66 struct axp_data; 67 68 struct axp20x_adc_iio { 69 struct regmap *regmap; 70 const struct axp_data *data; 71 }; 72 73 enum axp20x_adc_channel_v { 74 AXP20X_ACIN_V = 0, 75 AXP20X_VBUS_V, 76 AXP20X_TS_IN, 77 AXP20X_GPIO0_V, 78 AXP20X_GPIO1_V, 79 AXP20X_IPSOUT_V, 80 AXP20X_BATT_V, 81 }; 82 83 enum axp20x_adc_channel_i { 84 AXP20X_ACIN_I = 0, 85 AXP20X_VBUS_I, 86 AXP20X_BATT_CHRG_I, 87 AXP20X_BATT_DISCHRG_I, 88 }; 89 90 enum axp22x_adc_channel_v { 91 AXP22X_TS_IN = 0, 92 AXP22X_BATT_V, 93 }; 94 95 enum axp22x_adc_channel_i { 96 AXP22X_BATT_CHRG_I = 1, 97 AXP22X_BATT_DISCHRG_I, 98 }; 99 100 enum axp813_adc_channel_v { 101 AXP813_TS_IN = 0, 102 AXP813_GPIO0_V, 103 AXP813_BATT_V, 104 }; 105 106 static struct iio_map axp20x_maps[] = { 107 { 108 .consumer_dev_name = "axp20x-usb-power-supply", 109 .consumer_channel = "vbus_v", 110 .adc_channel_label = "vbus_v", 111 }, { 112 .consumer_dev_name = "axp20x-usb-power-supply", 113 .consumer_channel = "vbus_i", 114 .adc_channel_label = "vbus_i", 115 }, { 116 .consumer_dev_name = "axp20x-ac-power-supply", 117 .consumer_channel = "acin_v", 118 .adc_channel_label = "acin_v", 119 }, { 120 .consumer_dev_name = "axp20x-ac-power-supply", 121 .consumer_channel = "acin_i", 122 .adc_channel_label = "acin_i", 123 }, { 124 .consumer_dev_name = "axp20x-battery-power-supply", 125 .consumer_channel = "batt_v", 126 .adc_channel_label = "batt_v", 127 }, { 128 .consumer_dev_name = "axp20x-battery-power-supply", 129 .consumer_channel = "batt_chrg_i", 130 .adc_channel_label = "batt_chrg_i", 131 }, { 132 .consumer_dev_name = "axp20x-battery-power-supply", 133 .consumer_channel = "batt_dischrg_i", 134 .adc_channel_label = "batt_dischrg_i", 135 }, { /* sentinel */ } 136 }; 137 138 static struct iio_map axp22x_maps[] = { 139 { 140 .consumer_dev_name = "axp20x-battery-power-supply", 141 .consumer_channel = "batt_v", 142 .adc_channel_label = "batt_v", 143 }, { 144 .consumer_dev_name = "axp20x-battery-power-supply", 145 .consumer_channel = "batt_chrg_i", 146 .adc_channel_label = "batt_chrg_i", 147 }, { 148 .consumer_dev_name = "axp20x-battery-power-supply", 149 .consumer_channel = "batt_dischrg_i", 150 .adc_channel_label = "batt_dischrg_i", 151 }, { /* sentinel */ } 152 }; 153 154 /* 155 * Channels are mapped by physical system. Their channels share the same index. 156 * i.e. acin_i is in_current0_raw and acin_v is in_voltage0_raw. 157 * The only exception is for the battery. batt_v will be in_voltage6_raw and 158 * charge current in_current6_raw and discharge current will be in_current7_raw. 159 */ 160 static const struct iio_chan_spec axp20x_adc_channels[] = { 161 AXP20X_ADC_CHANNEL(AXP20X_ACIN_V, "acin_v", IIO_VOLTAGE, 162 AXP20X_ACIN_V_ADC_H), 163 AXP20X_ADC_CHANNEL(AXP20X_ACIN_I, "acin_i", IIO_CURRENT, 164 AXP20X_ACIN_I_ADC_H), 165 AXP20X_ADC_CHANNEL(AXP20X_VBUS_V, "vbus_v", IIO_VOLTAGE, 166 AXP20X_VBUS_V_ADC_H), 167 AXP20X_ADC_CHANNEL(AXP20X_VBUS_I, "vbus_i", IIO_CURRENT, 168 AXP20X_VBUS_I_ADC_H), 169 { 170 .type = IIO_TEMP, 171 .address = AXP20X_TEMP_ADC_H, 172 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 173 BIT(IIO_CHAN_INFO_SCALE) | 174 BIT(IIO_CHAN_INFO_OFFSET), 175 .datasheet_name = "pmic_temp", 176 }, 177 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO0_V, "gpio0_v", IIO_VOLTAGE, 178 AXP20X_GPIO0_V_ADC_H), 179 AXP20X_ADC_CHANNEL_OFFSET(AXP20X_GPIO1_V, "gpio1_v", IIO_VOLTAGE, 180 AXP20X_GPIO1_V_ADC_H), 181 AXP20X_ADC_CHANNEL(AXP20X_IPSOUT_V, "ipsout_v", IIO_VOLTAGE, 182 AXP20X_IPSOUT_V_HIGH_H), 183 AXP20X_ADC_CHANNEL(AXP20X_BATT_V, "batt_v", IIO_VOLTAGE, 184 AXP20X_BATT_V_H), 185 AXP20X_ADC_CHANNEL(AXP20X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 186 AXP20X_BATT_CHRG_I_H), 187 AXP20X_ADC_CHANNEL(AXP20X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 188 AXP20X_BATT_DISCHRG_I_H), 189 }; 190 191 static const struct iio_chan_spec axp22x_adc_channels[] = { 192 { 193 .type = IIO_TEMP, 194 .address = AXP22X_PMIC_TEMP_H, 195 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 196 BIT(IIO_CHAN_INFO_SCALE) | 197 BIT(IIO_CHAN_INFO_OFFSET), 198 .datasheet_name = "pmic_temp", 199 }, 200 AXP20X_ADC_CHANNEL(AXP22X_BATT_V, "batt_v", IIO_VOLTAGE, 201 AXP20X_BATT_V_H), 202 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 203 AXP20X_BATT_CHRG_I_H), 204 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 205 AXP20X_BATT_DISCHRG_I_H), 206 }; 207 208 static const struct iio_chan_spec axp813_adc_channels[] = { 209 { 210 .type = IIO_TEMP, 211 .address = AXP22X_PMIC_TEMP_H, 212 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 213 BIT(IIO_CHAN_INFO_SCALE) | 214 BIT(IIO_CHAN_INFO_OFFSET), 215 .datasheet_name = "pmic_temp", 216 }, 217 AXP20X_ADC_CHANNEL(AXP813_GPIO0_V, "gpio0_v", IIO_VOLTAGE, 218 AXP288_GP_ADC_H), 219 AXP20X_ADC_CHANNEL(AXP813_BATT_V, "batt_v", IIO_VOLTAGE, 220 AXP20X_BATT_V_H), 221 AXP20X_ADC_CHANNEL(AXP22X_BATT_CHRG_I, "batt_chrg_i", IIO_CURRENT, 222 AXP20X_BATT_CHRG_I_H), 223 AXP20X_ADC_CHANNEL(AXP22X_BATT_DISCHRG_I, "batt_dischrg_i", IIO_CURRENT, 224 AXP20X_BATT_DISCHRG_I_H), 225 }; 226 227 static int axp20x_adc_raw(struct iio_dev *indio_dev, 228 struct iio_chan_spec const *chan, int *val) 229 { 230 struct axp20x_adc_iio *info = iio_priv(indio_dev); 231 int size = 12; 232 233 /* 234 * N.B.: Unlike the Chinese datasheets tell, the charging current is 235 * stored on 12 bits, not 13 bits. Only discharging current is on 13 236 * bits. 237 */ 238 if (chan->type == IIO_CURRENT && chan->channel == AXP20X_BATT_DISCHRG_I) 239 size = 13; 240 else 241 size = 12; 242 243 *val = axp20x_read_variable_width(info->regmap, chan->address, size); 244 if (*val < 0) 245 return *val; 246 247 return IIO_VAL_INT; 248 } 249 250 static int axp22x_adc_raw(struct iio_dev *indio_dev, 251 struct iio_chan_spec const *chan, int *val) 252 { 253 struct axp20x_adc_iio *info = iio_priv(indio_dev); 254 int size; 255 256 /* 257 * N.B.: Unlike the Chinese datasheets tell, the charging current is 258 * stored on 12 bits, not 13 bits. Only discharging current is on 13 259 * bits. 260 */ 261 if (chan->type == IIO_CURRENT && chan->channel == AXP22X_BATT_DISCHRG_I) 262 size = 13; 263 else 264 size = 12; 265 266 *val = axp20x_read_variable_width(info->regmap, chan->address, size); 267 if (*val < 0) 268 return *val; 269 270 return IIO_VAL_INT; 271 } 272 273 static int axp813_adc_raw(struct iio_dev *indio_dev, 274 struct iio_chan_spec const *chan, int *val) 275 { 276 struct axp20x_adc_iio *info = iio_priv(indio_dev); 277 278 *val = axp20x_read_variable_width(info->regmap, chan->address, 12); 279 if (*val < 0) 280 return *val; 281 282 return IIO_VAL_INT; 283 } 284 285 static int axp20x_adc_scale_voltage(int channel, int *val, int *val2) 286 { 287 switch (channel) { 288 case AXP20X_ACIN_V: 289 case AXP20X_VBUS_V: 290 *val = 1; 291 *val2 = 700000; 292 return IIO_VAL_INT_PLUS_MICRO; 293 294 case AXP20X_GPIO0_V: 295 case AXP20X_GPIO1_V: 296 *val = 0; 297 *val2 = 500000; 298 return IIO_VAL_INT_PLUS_MICRO; 299 300 case AXP20X_BATT_V: 301 *val = 1; 302 *val2 = 100000; 303 return IIO_VAL_INT_PLUS_MICRO; 304 305 case AXP20X_IPSOUT_V: 306 *val = 1; 307 *val2 = 400000; 308 return IIO_VAL_INT_PLUS_MICRO; 309 310 default: 311 return -EINVAL; 312 } 313 } 314 315 static int axp813_adc_scale_voltage(int channel, int *val, int *val2) 316 { 317 switch (channel) { 318 case AXP813_GPIO0_V: 319 *val = 0; 320 *val2 = 800000; 321 return IIO_VAL_INT_PLUS_MICRO; 322 323 case AXP813_BATT_V: 324 *val = 1; 325 *val2 = 100000; 326 return IIO_VAL_INT_PLUS_MICRO; 327 328 default: 329 return -EINVAL; 330 } 331 } 332 333 static int axp20x_adc_scale_current(int channel, int *val, int *val2) 334 { 335 switch (channel) { 336 case AXP20X_ACIN_I: 337 *val = 0; 338 *val2 = 625000; 339 return IIO_VAL_INT_PLUS_MICRO; 340 341 case AXP20X_VBUS_I: 342 *val = 0; 343 *val2 = 375000; 344 return IIO_VAL_INT_PLUS_MICRO; 345 346 case AXP20X_BATT_DISCHRG_I: 347 case AXP20X_BATT_CHRG_I: 348 *val = 0; 349 *val2 = 500000; 350 return IIO_VAL_INT_PLUS_MICRO; 351 352 default: 353 return -EINVAL; 354 } 355 } 356 357 static int axp20x_adc_scale(struct iio_chan_spec const *chan, int *val, 358 int *val2) 359 { 360 switch (chan->type) { 361 case IIO_VOLTAGE: 362 return axp20x_adc_scale_voltage(chan->channel, val, val2); 363 364 case IIO_CURRENT: 365 return axp20x_adc_scale_current(chan->channel, val, val2); 366 367 case IIO_TEMP: 368 *val = 100; 369 return IIO_VAL_INT; 370 371 default: 372 return -EINVAL; 373 } 374 } 375 376 static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val, 377 int *val2) 378 { 379 switch (chan->type) { 380 case IIO_VOLTAGE: 381 if (chan->channel != AXP22X_BATT_V) 382 return -EINVAL; 383 384 *val = 1; 385 *val2 = 100000; 386 return IIO_VAL_INT_PLUS_MICRO; 387 388 case IIO_CURRENT: 389 *val = 0; 390 *val2 = 500000; 391 return IIO_VAL_INT_PLUS_MICRO; 392 393 case IIO_TEMP: 394 *val = 100; 395 return IIO_VAL_INT; 396 397 default: 398 return -EINVAL; 399 } 400 } 401 402 static int axp813_adc_scale(struct iio_chan_spec const *chan, int *val, 403 int *val2) 404 { 405 switch (chan->type) { 406 case IIO_VOLTAGE: 407 return axp813_adc_scale_voltage(chan->channel, val, val2); 408 409 case IIO_CURRENT: 410 *val = 1; 411 return IIO_VAL_INT; 412 413 case IIO_TEMP: 414 *val = 100; 415 return IIO_VAL_INT; 416 417 default: 418 return -EINVAL; 419 } 420 } 421 422 static int axp20x_adc_offset_voltage(struct iio_dev *indio_dev, int channel, 423 int *val) 424 { 425 struct axp20x_adc_iio *info = iio_priv(indio_dev); 426 int ret; 427 428 ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val); 429 if (ret < 0) 430 return ret; 431 432 switch (channel) { 433 case AXP20X_GPIO0_V: 434 *val &= AXP20X_GPIO10_IN_RANGE_GPIO0; 435 break; 436 437 case AXP20X_GPIO1_V: 438 *val &= AXP20X_GPIO10_IN_RANGE_GPIO1; 439 break; 440 441 default: 442 return -EINVAL; 443 } 444 445 *val = *val ? 700000 : 0; 446 447 return IIO_VAL_INT; 448 } 449 450 static int axp20x_adc_offset(struct iio_dev *indio_dev, 451 struct iio_chan_spec const *chan, int *val) 452 { 453 switch (chan->type) { 454 case IIO_VOLTAGE: 455 return axp20x_adc_offset_voltage(indio_dev, chan->channel, val); 456 457 case IIO_TEMP: 458 *val = -1447; 459 return IIO_VAL_INT; 460 461 default: 462 return -EINVAL; 463 } 464 } 465 466 static int axp20x_read_raw(struct iio_dev *indio_dev, 467 struct iio_chan_spec const *chan, int *val, 468 int *val2, long mask) 469 { 470 switch (mask) { 471 case IIO_CHAN_INFO_OFFSET: 472 return axp20x_adc_offset(indio_dev, chan, val); 473 474 case IIO_CHAN_INFO_SCALE: 475 return axp20x_adc_scale(chan, val, val2); 476 477 case IIO_CHAN_INFO_RAW: 478 return axp20x_adc_raw(indio_dev, chan, val); 479 480 default: 481 return -EINVAL; 482 } 483 } 484 485 static int axp22x_read_raw(struct iio_dev *indio_dev, 486 struct iio_chan_spec const *chan, int *val, 487 int *val2, long mask) 488 { 489 switch (mask) { 490 case IIO_CHAN_INFO_OFFSET: 491 *val = -2677; 492 return IIO_VAL_INT; 493 494 case IIO_CHAN_INFO_SCALE: 495 return axp22x_adc_scale(chan, val, val2); 496 497 case IIO_CHAN_INFO_RAW: 498 return axp22x_adc_raw(indio_dev, chan, val); 499 500 default: 501 return -EINVAL; 502 } 503 } 504 505 static int axp813_read_raw(struct iio_dev *indio_dev, 506 struct iio_chan_spec const *chan, int *val, 507 int *val2, long mask) 508 { 509 switch (mask) { 510 case IIO_CHAN_INFO_OFFSET: 511 *val = -2667; 512 return IIO_VAL_INT; 513 514 case IIO_CHAN_INFO_SCALE: 515 return axp813_adc_scale(chan, val, val2); 516 517 case IIO_CHAN_INFO_RAW: 518 return axp813_adc_raw(indio_dev, chan, val); 519 520 default: 521 return -EINVAL; 522 } 523 } 524 525 static int axp20x_write_raw(struct iio_dev *indio_dev, 526 struct iio_chan_spec const *chan, int val, int val2, 527 long mask) 528 { 529 struct axp20x_adc_iio *info = iio_priv(indio_dev); 530 unsigned int reg, regval; 531 532 /* 533 * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets 534 * for (independently) GPIO0 and GPIO1 when in ADC mode. 535 */ 536 if (mask != IIO_CHAN_INFO_OFFSET) 537 return -EINVAL; 538 539 if (val != 0 && val != 700000) 540 return -EINVAL; 541 542 val = val ? 1 : 0; 543 544 switch (chan->channel) { 545 case AXP20X_GPIO0_V: 546 reg = AXP20X_GPIO10_IN_RANGE_GPIO0; 547 regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(val); 548 break; 549 550 case AXP20X_GPIO1_V: 551 reg = AXP20X_GPIO10_IN_RANGE_GPIO1; 552 regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(val); 553 break; 554 555 default: 556 return -EINVAL; 557 } 558 559 return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg, 560 regval); 561 } 562 563 static const struct iio_info axp20x_adc_iio_info = { 564 .read_raw = axp20x_read_raw, 565 .write_raw = axp20x_write_raw, 566 }; 567 568 static const struct iio_info axp22x_adc_iio_info = { 569 .read_raw = axp22x_read_raw, 570 }; 571 572 static const struct iio_info axp813_adc_iio_info = { 573 .read_raw = axp813_read_raw, 574 }; 575 576 static int axp20x_adc_rate(struct axp20x_adc_iio *info, int rate) 577 { 578 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE, 579 AXP20X_ADC_RATE_MASK, 580 AXP20X_ADC_RATE_HZ(rate)); 581 } 582 583 static int axp22x_adc_rate(struct axp20x_adc_iio *info, int rate) 584 { 585 return regmap_update_bits(info->regmap, AXP20X_ADC_RATE, 586 AXP20X_ADC_RATE_MASK, 587 AXP22X_ADC_RATE_HZ(rate)); 588 } 589 590 static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate) 591 { 592 return regmap_update_bits(info->regmap, AXP813_ADC_RATE, 593 AXP813_ADC_RATE_MASK, 594 AXP813_ADC_RATE_HZ(rate)); 595 } 596 597 struct axp_data { 598 const struct iio_info *iio_info; 599 int num_channels; 600 struct iio_chan_spec const *channels; 601 unsigned long adc_en1_mask; 602 int (*adc_rate)(struct axp20x_adc_iio *info, 603 int rate); 604 bool adc_en2; 605 struct iio_map *maps; 606 }; 607 608 static const struct axp_data axp20x_data = { 609 .iio_info = &axp20x_adc_iio_info, 610 .num_channels = ARRAY_SIZE(axp20x_adc_channels), 611 .channels = axp20x_adc_channels, 612 .adc_en1_mask = AXP20X_ADC_EN1_MASK, 613 .adc_rate = axp20x_adc_rate, 614 .adc_en2 = true, 615 .maps = axp20x_maps, 616 }; 617 618 static const struct axp_data axp22x_data = { 619 .iio_info = &axp22x_adc_iio_info, 620 .num_channels = ARRAY_SIZE(axp22x_adc_channels), 621 .channels = axp22x_adc_channels, 622 .adc_en1_mask = AXP22X_ADC_EN1_MASK, 623 .adc_rate = axp22x_adc_rate, 624 .adc_en2 = false, 625 .maps = axp22x_maps, 626 }; 627 628 static const struct axp_data axp813_data = { 629 .iio_info = &axp813_adc_iio_info, 630 .num_channels = ARRAY_SIZE(axp813_adc_channels), 631 .channels = axp813_adc_channels, 632 .adc_en1_mask = AXP22X_ADC_EN1_MASK, 633 .adc_rate = axp813_adc_rate, 634 .adc_en2 = false, 635 .maps = axp22x_maps, 636 }; 637 638 static const struct of_device_id axp20x_adc_of_match[] = { 639 { .compatible = "x-powers,axp209-adc", .data = (void *)&axp20x_data, }, 640 { .compatible = "x-powers,axp221-adc", .data = (void *)&axp22x_data, }, 641 { .compatible = "x-powers,axp813-adc", .data = (void *)&axp813_data, }, 642 { /* sentinel */ } 643 }; 644 MODULE_DEVICE_TABLE(of, axp20x_adc_of_match); 645 646 static const struct platform_device_id axp20x_adc_id_match[] = { 647 { .name = "axp20x-adc", .driver_data = (kernel_ulong_t)&axp20x_data, }, 648 { .name = "axp22x-adc", .driver_data = (kernel_ulong_t)&axp22x_data, }, 649 { .name = "axp813-adc", .driver_data = (kernel_ulong_t)&axp813_data, }, 650 { /* sentinel */ }, 651 }; 652 MODULE_DEVICE_TABLE(platform, axp20x_adc_id_match); 653 654 static int axp20x_probe(struct platform_device *pdev) 655 { 656 struct axp20x_adc_iio *info; 657 struct iio_dev *indio_dev; 658 struct axp20x_dev *axp20x_dev; 659 int ret; 660 661 axp20x_dev = dev_get_drvdata(pdev->dev.parent); 662 663 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info)); 664 if (!indio_dev) 665 return -ENOMEM; 666 667 info = iio_priv(indio_dev); 668 platform_set_drvdata(pdev, indio_dev); 669 670 info->regmap = axp20x_dev->regmap; 671 indio_dev->modes = INDIO_DIRECT_MODE; 672 673 if (!dev_fwnode(&pdev->dev)) { 674 const struct platform_device_id *id; 675 676 id = platform_get_device_id(pdev); 677 info->data = (const struct axp_data *)id->driver_data; 678 } else { 679 struct device *dev = &pdev->dev; 680 681 info->data = device_get_match_data(dev); 682 } 683 684 indio_dev->name = platform_get_device_id(pdev)->name; 685 indio_dev->info = info->data->iio_info; 686 indio_dev->num_channels = info->data->num_channels; 687 indio_dev->channels = info->data->channels; 688 689 /* Enable the ADCs on IP */ 690 regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask); 691 692 if (info->data->adc_en2) 693 /* Enable GPIO0/1 and internal temperature ADCs */ 694 regmap_update_bits(info->regmap, AXP20X_ADC_EN2, 695 AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK); 696 697 /* Configure ADCs rate */ 698 info->data->adc_rate(info, 100); 699 700 ret = iio_map_array_register(indio_dev, info->data->maps); 701 if (ret < 0) { 702 dev_err(&pdev->dev, "failed to register IIO maps: %d\n", ret); 703 goto fail_map; 704 } 705 706 ret = iio_device_register(indio_dev); 707 if (ret < 0) { 708 dev_err(&pdev->dev, "could not register the device\n"); 709 goto fail_register; 710 } 711 712 return 0; 713 714 fail_register: 715 iio_map_array_unregister(indio_dev); 716 717 fail_map: 718 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 719 720 if (info->data->adc_en2) 721 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 722 723 return ret; 724 } 725 726 static int axp20x_remove(struct platform_device *pdev) 727 { 728 struct iio_dev *indio_dev = platform_get_drvdata(pdev); 729 struct axp20x_adc_iio *info = iio_priv(indio_dev); 730 731 iio_device_unregister(indio_dev); 732 iio_map_array_unregister(indio_dev); 733 734 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 735 736 if (info->data->adc_en2) 737 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 738 739 return 0; 740 } 741 742 static struct platform_driver axp20x_adc_driver = { 743 .driver = { 744 .name = "axp20x-adc", 745 .of_match_table = axp20x_adc_of_match, 746 }, 747 .id_table = axp20x_adc_id_match, 748 .probe = axp20x_probe, 749 .remove = axp20x_remove, 750 }; 751 752 module_platform_driver(axp20x_adc_driver); 753 754 MODULE_DESCRIPTION("ADC driver for AXP20X and AXP22X PMICs"); 755 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); 756 MODULE_LICENSE("GPL"); 757