1 /* 2 * Driver for the ADC present in the Atmel AT91 evaluation boards. 3 * 4 * Copyright 2011 Free Electrons 5 * 6 * Licensed under the GPLv2 or later. 7 */ 8 9 #include <linux/bitmap.h> 10 #include <linux/bitops.h> 11 #include <linux/clk.h> 12 #include <linux/err.h> 13 #include <linux/io.h> 14 #include <linux/interrupt.h> 15 #include <linux/jiffies.h> 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/of_device.h> 20 #include <linux/platform_device.h> 21 #include <linux/sched.h> 22 #include <linux/slab.h> 23 #include <linux/wait.h> 24 25 #include <linux/platform_data/at91_adc.h> 26 27 #include <linux/iio/iio.h> 28 #include <linux/iio/buffer.h> 29 #include <linux/iio/kfifo_buf.h> 30 #include <linux/iio/trigger.h> 31 #include <linux/iio/trigger_consumer.h> 32 33 #include <mach/at91_adc.h> 34 35 #define AT91_ADC_CHAN(st, ch) \ 36 (st->registers->channel_base + (ch * 4)) 37 #define at91_adc_readl(st, reg) \ 38 (readl_relaxed(st->reg_base + reg)) 39 #define at91_adc_writel(st, reg, val) \ 40 (writel_relaxed(val, st->reg_base + reg)) 41 42 struct at91_adc_state { 43 struct clk *adc_clk; 44 u16 *buffer; 45 unsigned long channels_mask; 46 struct clk *clk; 47 bool done; 48 int irq; 49 bool irq_enabled; 50 u16 last_value; 51 struct mutex lock; 52 u8 num_channels; 53 void __iomem *reg_base; 54 struct at91_adc_reg_desc *registers; 55 u8 startup_time; 56 struct iio_trigger **trig; 57 struct at91_adc_trigger *trigger_list; 58 u32 trigger_number; 59 bool use_external; 60 u32 vref_mv; 61 wait_queue_head_t wq_data_avail; 62 }; 63 64 static irqreturn_t at91_adc_trigger_handler(int irq, void *p) 65 { 66 struct iio_poll_func *pf = p; 67 struct iio_dev *idev = pf->indio_dev; 68 struct at91_adc_state *st = iio_priv(idev); 69 struct iio_buffer *buffer = idev->buffer; 70 int i, j = 0; 71 72 for (i = 0; i < idev->masklength; i++) { 73 if (!test_bit(i, idev->active_scan_mask)) 74 continue; 75 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i)); 76 j++; 77 } 78 79 if (idev->scan_timestamp) { 80 s64 *timestamp = (s64 *)((u8 *)st->buffer + 81 ALIGN(j, sizeof(s64))); 82 *timestamp = pf->timestamp; 83 } 84 85 buffer->access->store_to(buffer, (u8 *)st->buffer, pf->timestamp); 86 87 iio_trigger_notify_done(idev->trig); 88 st->irq_enabled = true; 89 90 /* Needed to ACK the DRDY interruption */ 91 at91_adc_readl(st, AT91_ADC_LCDR); 92 93 enable_irq(st->irq); 94 95 return IRQ_HANDLED; 96 } 97 98 static irqreturn_t at91_adc_eoc_trigger(int irq, void *private) 99 { 100 struct iio_dev *idev = private; 101 struct at91_adc_state *st = iio_priv(idev); 102 u32 status = at91_adc_readl(st, st->registers->status_register); 103 104 if (!(status & st->registers->drdy_mask)) 105 return IRQ_HANDLED; 106 107 if (iio_buffer_enabled(idev)) { 108 disable_irq_nosync(irq); 109 st->irq_enabled = false; 110 iio_trigger_poll(idev->trig, iio_get_time_ns()); 111 } else { 112 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR); 113 st->done = true; 114 wake_up_interruptible(&st->wq_data_avail); 115 } 116 117 return IRQ_HANDLED; 118 } 119 120 static int at91_adc_channel_init(struct iio_dev *idev) 121 { 122 struct at91_adc_state *st = iio_priv(idev); 123 struct iio_chan_spec *chan_array, *timestamp; 124 int bit, idx = 0; 125 126 idev->num_channels = bitmap_weight(&st->channels_mask, 127 st->num_channels) + 1; 128 129 chan_array = devm_kzalloc(&idev->dev, 130 ((idev->num_channels + 1) * 131 sizeof(struct iio_chan_spec)), 132 GFP_KERNEL); 133 134 if (!chan_array) 135 return -ENOMEM; 136 137 for_each_set_bit(bit, &st->channels_mask, st->num_channels) { 138 struct iio_chan_spec *chan = chan_array + idx; 139 140 chan->type = IIO_VOLTAGE; 141 chan->indexed = 1; 142 chan->channel = bit; 143 chan->scan_index = idx; 144 chan->scan_type.sign = 'u'; 145 chan->scan_type.realbits = 10; 146 chan->scan_type.storagebits = 16; 147 chan->info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT | 148 IIO_CHAN_INFO_RAW_SEPARATE_BIT; 149 idx++; 150 } 151 timestamp = chan_array + idx; 152 153 timestamp->type = IIO_TIMESTAMP; 154 timestamp->channel = -1; 155 timestamp->scan_index = idx; 156 timestamp->scan_type.sign = 's'; 157 timestamp->scan_type.realbits = 64; 158 timestamp->scan_type.storagebits = 64; 159 160 idev->channels = chan_array; 161 return idev->num_channels; 162 } 163 164 static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev, 165 struct at91_adc_trigger *triggers, 166 const char *trigger_name) 167 { 168 struct at91_adc_state *st = iio_priv(idev); 169 u8 value = 0; 170 int i; 171 172 for (i = 0; i < st->trigger_number; i++) { 173 char *name = kasprintf(GFP_KERNEL, 174 "%s-dev%d-%s", 175 idev->name, 176 idev->id, 177 triggers[i].name); 178 if (!name) 179 return -ENOMEM; 180 181 if (strcmp(trigger_name, name) == 0) { 182 value = triggers[i].value; 183 kfree(name); 184 break; 185 } 186 187 kfree(name); 188 } 189 190 return value; 191 } 192 193 static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) 194 { 195 struct iio_dev *idev = trig->private_data; 196 struct at91_adc_state *st = iio_priv(idev); 197 struct iio_buffer *buffer = idev->buffer; 198 struct at91_adc_reg_desc *reg = st->registers; 199 u32 status = at91_adc_readl(st, reg->trigger_register); 200 u8 value; 201 u8 bit; 202 203 value = at91_adc_get_trigger_value_by_name(idev, 204 st->trigger_list, 205 idev->trig->name); 206 if (value == 0) 207 return -EINVAL; 208 209 if (state) { 210 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL); 211 if (st->buffer == NULL) 212 return -ENOMEM; 213 214 at91_adc_writel(st, reg->trigger_register, 215 status | value); 216 217 for_each_set_bit(bit, buffer->scan_mask, 218 st->num_channels) { 219 struct iio_chan_spec const *chan = idev->channels + bit; 220 at91_adc_writel(st, AT91_ADC_CHER, 221 AT91_ADC_CH(chan->channel)); 222 } 223 224 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask); 225 226 } else { 227 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask); 228 229 at91_adc_writel(st, reg->trigger_register, 230 status & ~value); 231 232 for_each_set_bit(bit, buffer->scan_mask, 233 st->num_channels) { 234 struct iio_chan_spec const *chan = idev->channels + bit; 235 at91_adc_writel(st, AT91_ADC_CHDR, 236 AT91_ADC_CH(chan->channel)); 237 } 238 kfree(st->buffer); 239 } 240 241 return 0; 242 } 243 244 static const struct iio_trigger_ops at91_adc_trigger_ops = { 245 .owner = THIS_MODULE, 246 .set_trigger_state = &at91_adc_configure_trigger, 247 }; 248 249 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev, 250 struct at91_adc_trigger *trigger) 251 { 252 struct iio_trigger *trig; 253 int ret; 254 255 trig = iio_trigger_alloc("%s-dev%d-%s", idev->name, 256 idev->id, trigger->name); 257 if (trig == NULL) 258 return NULL; 259 260 trig->dev.parent = idev->dev.parent; 261 trig->private_data = idev; 262 trig->ops = &at91_adc_trigger_ops; 263 264 ret = iio_trigger_register(trig); 265 if (ret) 266 return NULL; 267 268 return trig; 269 } 270 271 static int at91_adc_trigger_init(struct iio_dev *idev) 272 { 273 struct at91_adc_state *st = iio_priv(idev); 274 int i, ret; 275 276 st->trig = devm_kzalloc(&idev->dev, 277 st->trigger_number * sizeof(st->trig), 278 GFP_KERNEL); 279 280 if (st->trig == NULL) { 281 ret = -ENOMEM; 282 goto error_ret; 283 } 284 285 for (i = 0; i < st->trigger_number; i++) { 286 if (st->trigger_list[i].is_external && !(st->use_external)) 287 continue; 288 289 st->trig[i] = at91_adc_allocate_trigger(idev, 290 st->trigger_list + i); 291 if (st->trig[i] == NULL) { 292 dev_err(&idev->dev, 293 "Could not allocate trigger %d\n", i); 294 ret = -ENOMEM; 295 goto error_trigger; 296 } 297 } 298 299 return 0; 300 301 error_trigger: 302 for (i--; i >= 0; i--) { 303 iio_trigger_unregister(st->trig[i]); 304 iio_trigger_free(st->trig[i]); 305 } 306 error_ret: 307 return ret; 308 } 309 310 static void at91_adc_trigger_remove(struct iio_dev *idev) 311 { 312 struct at91_adc_state *st = iio_priv(idev); 313 int i; 314 315 for (i = 0; i < st->trigger_number; i++) { 316 iio_trigger_unregister(st->trig[i]); 317 iio_trigger_free(st->trig[i]); 318 } 319 } 320 321 static const struct iio_buffer_setup_ops at91_adc_buffer_ops = { 322 .preenable = &iio_sw_buffer_preenable, 323 .postenable = &iio_triggered_buffer_postenable, 324 .predisable = &iio_triggered_buffer_predisable, 325 }; 326 327 static int at91_adc_buffer_init(struct iio_dev *idev) 328 { 329 int ret; 330 331 idev->buffer = iio_kfifo_allocate(idev); 332 if (!idev->buffer) { 333 ret = -ENOMEM; 334 goto error_ret; 335 } 336 337 idev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time, 338 &at91_adc_trigger_handler, 339 IRQF_ONESHOT, 340 idev, 341 "%s-consumer%d", 342 idev->name, 343 idev->id); 344 if (idev->pollfunc == NULL) { 345 ret = -ENOMEM; 346 goto error_pollfunc; 347 } 348 349 idev->setup_ops = &at91_adc_buffer_ops; 350 idev->modes |= INDIO_BUFFER_TRIGGERED; 351 352 ret = iio_buffer_register(idev, 353 idev->channels, 354 idev->num_channels); 355 if (ret) 356 goto error_register; 357 358 return 0; 359 360 error_register: 361 iio_dealloc_pollfunc(idev->pollfunc); 362 error_pollfunc: 363 iio_kfifo_free(idev->buffer); 364 error_ret: 365 return ret; 366 } 367 368 static void at91_adc_buffer_remove(struct iio_dev *idev) 369 { 370 iio_buffer_unregister(idev); 371 iio_dealloc_pollfunc(idev->pollfunc); 372 iio_kfifo_free(idev->buffer); 373 } 374 375 static int at91_adc_read_raw(struct iio_dev *idev, 376 struct iio_chan_spec const *chan, 377 int *val, int *val2, long mask) 378 { 379 struct at91_adc_state *st = iio_priv(idev); 380 int ret; 381 382 switch (mask) { 383 case IIO_CHAN_INFO_RAW: 384 mutex_lock(&st->lock); 385 386 at91_adc_writel(st, AT91_ADC_CHER, 387 AT91_ADC_CH(chan->channel)); 388 at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask); 389 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START); 390 391 ret = wait_event_interruptible_timeout(st->wq_data_avail, 392 st->done, 393 msecs_to_jiffies(1000)); 394 if (ret == 0) 395 return -ETIMEDOUT; 396 else if (ret < 0) 397 return ret; 398 399 *val = st->last_value; 400 401 at91_adc_writel(st, AT91_ADC_CHDR, 402 AT91_ADC_CH(chan->channel)); 403 at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask); 404 405 st->last_value = 0; 406 st->done = false; 407 mutex_unlock(&st->lock); 408 return IIO_VAL_INT; 409 410 case IIO_CHAN_INFO_SCALE: 411 *val = (st->vref_mv * 1000) >> chan->scan_type.realbits; 412 *val2 = 0; 413 return IIO_VAL_INT_PLUS_MICRO; 414 default: 415 break; 416 } 417 return -EINVAL; 418 } 419 420 static int at91_adc_probe_dt(struct at91_adc_state *st, 421 struct platform_device *pdev) 422 { 423 struct iio_dev *idev = iio_priv_to_dev(st); 424 struct device_node *node = pdev->dev.of_node; 425 struct device_node *trig_node; 426 int i = 0, ret; 427 u32 prop; 428 429 if (!node) 430 return -EINVAL; 431 432 st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers"); 433 434 if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) { 435 dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n"); 436 ret = -EINVAL; 437 goto error_ret; 438 } 439 st->channels_mask = prop; 440 441 if (of_property_read_u32(node, "atmel,adc-num-channels", &prop)) { 442 dev_err(&idev->dev, "Missing adc-num-channels property in the DT.\n"); 443 ret = -EINVAL; 444 goto error_ret; 445 } 446 st->num_channels = prop; 447 448 if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) { 449 dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n"); 450 ret = -EINVAL; 451 goto error_ret; 452 } 453 st->startup_time = prop; 454 455 456 if (of_property_read_u32(node, "atmel,adc-vref", &prop)) { 457 dev_err(&idev->dev, "Missing adc-vref property in the DT.\n"); 458 ret = -EINVAL; 459 goto error_ret; 460 } 461 st->vref_mv = prop; 462 463 st->registers = devm_kzalloc(&idev->dev, 464 sizeof(struct at91_adc_reg_desc), 465 GFP_KERNEL); 466 if (!st->registers) { 467 dev_err(&idev->dev, "Could not allocate register memory.\n"); 468 ret = -ENOMEM; 469 goto error_ret; 470 } 471 472 if (of_property_read_u32(node, "atmel,adc-channel-base", &prop)) { 473 dev_err(&idev->dev, "Missing adc-channel-base property in the DT.\n"); 474 ret = -EINVAL; 475 goto error_ret; 476 } 477 st->registers->channel_base = prop; 478 479 if (of_property_read_u32(node, "atmel,adc-drdy-mask", &prop)) { 480 dev_err(&idev->dev, "Missing adc-drdy-mask property in the DT.\n"); 481 ret = -EINVAL; 482 goto error_ret; 483 } 484 st->registers->drdy_mask = prop; 485 486 if (of_property_read_u32(node, "atmel,adc-status-register", &prop)) { 487 dev_err(&idev->dev, "Missing adc-status-register property in the DT.\n"); 488 ret = -EINVAL; 489 goto error_ret; 490 } 491 st->registers->status_register = prop; 492 493 if (of_property_read_u32(node, "atmel,adc-trigger-register", &prop)) { 494 dev_err(&idev->dev, "Missing adc-trigger-register property in the DT.\n"); 495 ret = -EINVAL; 496 goto error_ret; 497 } 498 st->registers->trigger_register = prop; 499 500 st->trigger_number = of_get_child_count(node); 501 st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number * 502 sizeof(struct at91_adc_trigger), 503 GFP_KERNEL); 504 if (!st->trigger_list) { 505 dev_err(&idev->dev, "Could not allocate trigger list memory.\n"); 506 ret = -ENOMEM; 507 goto error_ret; 508 } 509 510 for_each_child_of_node(node, trig_node) { 511 struct at91_adc_trigger *trig = st->trigger_list + i; 512 const char *name; 513 514 if (of_property_read_string(trig_node, "trigger-name", &name)) { 515 dev_err(&idev->dev, "Missing trigger-name property in the DT.\n"); 516 ret = -EINVAL; 517 goto error_ret; 518 } 519 trig->name = name; 520 521 if (of_property_read_u32(trig_node, "trigger-value", &prop)) { 522 dev_err(&idev->dev, "Missing trigger-value property in the DT.\n"); 523 ret = -EINVAL; 524 goto error_ret; 525 } 526 trig->value = prop; 527 trig->is_external = of_property_read_bool(trig_node, "trigger-external"); 528 i++; 529 } 530 531 return 0; 532 533 error_ret: 534 return ret; 535 } 536 537 static int at91_adc_probe_pdata(struct at91_adc_state *st, 538 struct platform_device *pdev) 539 { 540 struct at91_adc_data *pdata = pdev->dev.platform_data; 541 542 if (!pdata) 543 return -EINVAL; 544 545 st->use_external = pdata->use_external_triggers; 546 st->vref_mv = pdata->vref; 547 st->channels_mask = pdata->channels_used; 548 st->num_channels = pdata->num_channels; 549 st->startup_time = pdata->startup_time; 550 st->trigger_number = pdata->trigger_number; 551 st->trigger_list = pdata->trigger_list; 552 st->registers = pdata->registers; 553 554 return 0; 555 } 556 557 static const struct iio_info at91_adc_info = { 558 .driver_module = THIS_MODULE, 559 .read_raw = &at91_adc_read_raw, 560 }; 561 562 static int __devinit at91_adc_probe(struct platform_device *pdev) 563 { 564 unsigned int prsc, mstrclk, ticks, adc_clk; 565 int ret; 566 struct iio_dev *idev; 567 struct at91_adc_state *st; 568 struct resource *res; 569 570 idev = iio_device_alloc(sizeof(struct at91_adc_state)); 571 if (idev == NULL) { 572 ret = -ENOMEM; 573 goto error_ret; 574 } 575 576 st = iio_priv(idev); 577 578 if (pdev->dev.of_node) 579 ret = at91_adc_probe_dt(st, pdev); 580 else 581 ret = at91_adc_probe_pdata(st, pdev); 582 583 if (ret) { 584 dev_err(&pdev->dev, "No platform data available.\n"); 585 ret = -EINVAL; 586 goto error_free_device; 587 } 588 589 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 590 if (!res) { 591 dev_err(&pdev->dev, "No resource defined\n"); 592 ret = -ENXIO; 593 goto error_ret; 594 } 595 596 platform_set_drvdata(pdev, idev); 597 598 idev->dev.parent = &pdev->dev; 599 idev->name = dev_name(&pdev->dev); 600 idev->modes = INDIO_DIRECT_MODE; 601 idev->info = &at91_adc_info; 602 603 st->irq = platform_get_irq(pdev, 0); 604 if (st->irq < 0) { 605 dev_err(&pdev->dev, "No IRQ ID is designated\n"); 606 ret = -ENODEV; 607 goto error_free_device; 608 } 609 610 if (!request_mem_region(res->start, resource_size(res), 611 "AT91 adc registers")) { 612 dev_err(&pdev->dev, "Resources are unavailable.\n"); 613 ret = -EBUSY; 614 goto error_free_device; 615 } 616 617 st->reg_base = ioremap(res->start, resource_size(res)); 618 if (!st->reg_base) { 619 dev_err(&pdev->dev, "Failed to map registers.\n"); 620 ret = -ENOMEM; 621 goto error_release_mem; 622 } 623 624 /* 625 * Disable all IRQs before setting up the handler 626 */ 627 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST); 628 at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF); 629 ret = request_irq(st->irq, 630 at91_adc_eoc_trigger, 631 0, 632 pdev->dev.driver->name, 633 idev); 634 if (ret) { 635 dev_err(&pdev->dev, "Failed to allocate IRQ.\n"); 636 goto error_unmap_reg; 637 } 638 639 st->clk = clk_get(&pdev->dev, "adc_clk"); 640 if (IS_ERR(st->clk)) { 641 dev_err(&pdev->dev, "Failed to get the clock.\n"); 642 ret = PTR_ERR(st->clk); 643 goto error_free_irq; 644 } 645 646 ret = clk_prepare(st->clk); 647 if (ret) { 648 dev_err(&pdev->dev, "Could not prepare the clock.\n"); 649 goto error_free_clk; 650 } 651 652 ret = clk_enable(st->clk); 653 if (ret) { 654 dev_err(&pdev->dev, "Could not enable the clock.\n"); 655 goto error_unprepare_clk; 656 } 657 658 st->adc_clk = clk_get(&pdev->dev, "adc_op_clk"); 659 if (IS_ERR(st->adc_clk)) { 660 dev_err(&pdev->dev, "Failed to get the ADC clock.\n"); 661 ret = PTR_ERR(st->clk); 662 goto error_disable_clk; 663 } 664 665 ret = clk_prepare(st->adc_clk); 666 if (ret) { 667 dev_err(&pdev->dev, "Could not prepare the ADC clock.\n"); 668 goto error_free_adc_clk; 669 } 670 671 ret = clk_enable(st->adc_clk); 672 if (ret) { 673 dev_err(&pdev->dev, "Could not enable the ADC clock.\n"); 674 goto error_unprepare_adc_clk; 675 } 676 677 /* 678 * Prescaler rate computation using the formula from the Atmel's 679 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being 680 * specified by the electrical characteristics of the board. 681 */ 682 mstrclk = clk_get_rate(st->clk); 683 adc_clk = clk_get_rate(st->adc_clk); 684 prsc = (mstrclk / (2 * adc_clk)) - 1; 685 686 if (!st->startup_time) { 687 dev_err(&pdev->dev, "No startup time available.\n"); 688 ret = -EINVAL; 689 goto error_disable_adc_clk; 690 } 691 692 /* 693 * Number of ticks needed to cover the startup time of the ADC as 694 * defined in the electrical characteristics of the board, divided by 8. 695 * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock 696 */ 697 ticks = round_up((st->startup_time * adc_clk / 698 1000000) - 1, 8) / 8; 699 at91_adc_writel(st, AT91_ADC_MR, 700 (AT91_ADC_PRESCAL_(prsc) & AT91_ADC_PRESCAL) | 701 (AT91_ADC_STARTUP_(ticks) & AT91_ADC_STARTUP)); 702 703 /* Setup the ADC channels available on the board */ 704 ret = at91_adc_channel_init(idev); 705 if (ret < 0) { 706 dev_err(&pdev->dev, "Couldn't initialize the channels.\n"); 707 goto error_disable_adc_clk; 708 } 709 710 init_waitqueue_head(&st->wq_data_avail); 711 mutex_init(&st->lock); 712 713 ret = at91_adc_buffer_init(idev); 714 if (ret < 0) { 715 dev_err(&pdev->dev, "Couldn't initialize the buffer.\n"); 716 goto error_disable_adc_clk; 717 } 718 719 ret = at91_adc_trigger_init(idev); 720 if (ret < 0) { 721 dev_err(&pdev->dev, "Couldn't setup the triggers.\n"); 722 goto error_unregister_buffer; 723 } 724 725 ret = iio_device_register(idev); 726 if (ret < 0) { 727 dev_err(&pdev->dev, "Couldn't register the device.\n"); 728 goto error_remove_triggers; 729 } 730 731 return 0; 732 733 error_remove_triggers: 734 at91_adc_trigger_remove(idev); 735 error_unregister_buffer: 736 at91_adc_buffer_remove(idev); 737 error_disable_adc_clk: 738 clk_disable(st->adc_clk); 739 error_unprepare_adc_clk: 740 clk_unprepare(st->adc_clk); 741 error_free_adc_clk: 742 clk_put(st->adc_clk); 743 error_disable_clk: 744 clk_disable(st->clk); 745 error_unprepare_clk: 746 clk_unprepare(st->clk); 747 error_free_clk: 748 clk_put(st->clk); 749 error_free_irq: 750 free_irq(st->irq, idev); 751 error_unmap_reg: 752 iounmap(st->reg_base); 753 error_release_mem: 754 release_mem_region(res->start, resource_size(res)); 755 error_free_device: 756 iio_device_free(idev); 757 error_ret: 758 return ret; 759 } 760 761 static int __devexit at91_adc_remove(struct platform_device *pdev) 762 { 763 struct iio_dev *idev = platform_get_drvdata(pdev); 764 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 765 struct at91_adc_state *st = iio_priv(idev); 766 767 iio_device_unregister(idev); 768 at91_adc_trigger_remove(idev); 769 at91_adc_buffer_remove(idev); 770 clk_disable_unprepare(st->adc_clk); 771 clk_put(st->adc_clk); 772 clk_disable(st->clk); 773 clk_unprepare(st->clk); 774 clk_put(st->clk); 775 free_irq(st->irq, idev); 776 iounmap(st->reg_base); 777 release_mem_region(res->start, resource_size(res)); 778 iio_device_free(idev); 779 780 return 0; 781 } 782 783 static const struct of_device_id at91_adc_dt_ids[] = { 784 { .compatible = "atmel,at91sam9260-adc" }, 785 {}, 786 }; 787 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids); 788 789 static struct platform_driver at91_adc_driver = { 790 .probe = at91_adc_probe, 791 .remove = __devexit_p(at91_adc_remove), 792 .driver = { 793 .name = "at91_adc", 794 .of_match_table = of_match_ptr(at91_adc_dt_ids), 795 }, 796 }; 797 798 module_platform_driver(at91_adc_driver); 799 800 MODULE_LICENSE("GPL"); 801 MODULE_DESCRIPTION("Atmel AT91 ADC Driver"); 802 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 803