xref: /openbmc/linux/drivers/iio/adc/at91_adc.c (revision 467a44b0)
10e589d5fSMaxime Ripard /*
20e589d5fSMaxime Ripard  * Driver for the ADC present in the Atmel AT91 evaluation boards.
30e589d5fSMaxime Ripard  *
40e589d5fSMaxime Ripard  * Copyright 2011 Free Electrons
50e589d5fSMaxime Ripard  *
60e589d5fSMaxime Ripard  * Licensed under the GPLv2 or later.
70e589d5fSMaxime Ripard  */
80e589d5fSMaxime Ripard 
90e589d5fSMaxime Ripard #include <linux/bitmap.h>
100e589d5fSMaxime Ripard #include <linux/bitops.h>
110e589d5fSMaxime Ripard #include <linux/clk.h>
120e589d5fSMaxime Ripard #include <linux/err.h>
130e589d5fSMaxime Ripard #include <linux/io.h>
14c8b11de0SJosh Wu #include <linux/input.h>
150e589d5fSMaxime Ripard #include <linux/interrupt.h>
160e589d5fSMaxime Ripard #include <linux/jiffies.h>
170e589d5fSMaxime Ripard #include <linux/kernel.h>
180e589d5fSMaxime Ripard #include <linux/module.h>
19e364185fSMaxime Ripard #include <linux/of.h>
20e364185fSMaxime Ripard #include <linux/of_device.h>
210e589d5fSMaxime Ripard #include <linux/platform_device.h>
220e589d5fSMaxime Ripard #include <linux/sched.h>
230e589d5fSMaxime Ripard #include <linux/slab.h>
240e589d5fSMaxime Ripard #include <linux/wait.h>
250e589d5fSMaxime Ripard 
260e589d5fSMaxime Ripard #include <linux/platform_data/at91_adc.h>
270e589d5fSMaxime Ripard 
280e589d5fSMaxime Ripard #include <linux/iio/iio.h>
290e589d5fSMaxime Ripard #include <linux/iio/buffer.h>
300e589d5fSMaxime Ripard #include <linux/iio/trigger.h>
310e589d5fSMaxime Ripard #include <linux/iio/trigger_consumer.h>
3290032e4eSLars-Peter Clausen #include <linux/iio/triggered_buffer.h>
330e589d5fSMaxime Ripard 
340e589d5fSMaxime Ripard #include <mach/at91_adc.h>
350e589d5fSMaxime Ripard 
360e589d5fSMaxime Ripard #define AT91_ADC_CHAN(st, ch) \
370e589d5fSMaxime Ripard 	(st->registers->channel_base + (ch * 4))
380e589d5fSMaxime Ripard #define at91_adc_readl(st, reg) \
390e589d5fSMaxime Ripard 	(readl_relaxed(st->reg_base + reg))
400e589d5fSMaxime Ripard #define at91_adc_writel(st, reg, val) \
410e589d5fSMaxime Ripard 	(writel_relaxed(val, st->reg_base + reg))
420e589d5fSMaxime Ripard 
43c8b11de0SJosh Wu #define DRIVER_NAME		"at91_adc"
44c8b11de0SJosh Wu #define MAX_POS_BITS		12
45c8b11de0SJosh Wu 
46c8b11de0SJosh Wu #define TOUCH_SAMPLE_PERIOD_US		2000	/* 2ms */
47c8b11de0SJosh Wu #define TOUCH_PEN_DETECT_DEBOUNCE_US	200
48c8b11de0SJosh Wu 
49e1811f97SJosh Wu struct at91_adc_caps {
50c8b11de0SJosh Wu 	bool	has_ts;		/* Support touch screen */
51c8b11de0SJosh Wu 	bool	has_tsmr;	/* only at91sam9x5, sama5d3 have TSMR reg */
52c8b11de0SJosh Wu 	/*
53c8b11de0SJosh Wu 	 * Numbers of sampling data will be averaged. Can be 0~3.
54c8b11de0SJosh Wu 	 * Hardware can average (2 ^ ts_filter_average) sample data.
55c8b11de0SJosh Wu 	 */
56c8b11de0SJosh Wu 	u8	ts_filter_average;
57c8b11de0SJosh Wu 	/* Pen Detection input pull-up resistor, can be 0~3 */
58c8b11de0SJosh Wu 	u8	ts_pen_detect_sensitivity;
59c8b11de0SJosh Wu 
60c4601666SJosh Wu 	/* startup time calculate function */
61c4601666SJosh Wu 	u32 (*calc_startup_ticks)(u8 startup_time, u32 adc_clk_khz);
62c4601666SJosh Wu 
632b6d598bSJosh Wu 	u8	num_channels;
64e1811f97SJosh Wu 	struct at91_adc_reg_desc registers;
65e1811f97SJosh Wu };
66e1811f97SJosh Wu 
67c8b11de0SJosh Wu enum atmel_adc_ts_type {
68c8b11de0SJosh Wu 	ATMEL_ADC_TOUCHSCREEN_NONE = 0,
69c8b11de0SJosh Wu 	ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
70c8b11de0SJosh Wu 	ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
71c8b11de0SJosh Wu };
72c8b11de0SJosh Wu 
730e589d5fSMaxime Ripard struct at91_adc_state {
740e589d5fSMaxime Ripard 	struct clk		*adc_clk;
750e589d5fSMaxime Ripard 	u16			*buffer;
760e589d5fSMaxime Ripard 	unsigned long		channels_mask;
770e589d5fSMaxime Ripard 	struct clk		*clk;
780e589d5fSMaxime Ripard 	bool			done;
790e589d5fSMaxime Ripard 	int			irq;
800e589d5fSMaxime Ripard 	u16			last_value;
810e589d5fSMaxime Ripard 	struct mutex		lock;
820e589d5fSMaxime Ripard 	u8			num_channels;
830e589d5fSMaxime Ripard 	void __iomem		*reg_base;
840e589d5fSMaxime Ripard 	struct at91_adc_reg_desc *registers;
850e589d5fSMaxime Ripard 	u8			startup_time;
86beca9e76SJean-Christophe PLAGNIOL-VILLARD 	u8			sample_hold_time;
87e748783cSJean-Christophe PLAGNIOL-VILLARD 	bool			sleep_mode;
880e589d5fSMaxime Ripard 	struct iio_trigger	**trig;
890e589d5fSMaxime Ripard 	struct at91_adc_trigger	*trigger_list;
900e589d5fSMaxime Ripard 	u32			trigger_number;
910e589d5fSMaxime Ripard 	bool			use_external;
920e589d5fSMaxime Ripard 	u32			vref_mv;
9347be16b6SLudovic Desroches 	u32			res;		/* resolution used for convertions */
9447be16b6SLudovic Desroches 	bool			low_res;	/* the resolution corresponds to the lowest one */
950e589d5fSMaxime Ripard 	wait_queue_head_t	wq_data_avail;
96e1811f97SJosh Wu 	struct at91_adc_caps	*caps;
97c8b11de0SJosh Wu 
98c8b11de0SJosh Wu 	/*
99c8b11de0SJosh Wu 	 * Following ADC channels are shared by touchscreen:
100c8b11de0SJosh Wu 	 *
101c8b11de0SJosh Wu 	 * CH0 -- Touch screen XP/UL
102c8b11de0SJosh Wu 	 * CH1 -- Touch screen XM/UR
103c8b11de0SJosh Wu 	 * CH2 -- Touch screen YP/LL
104c8b11de0SJosh Wu 	 * CH3 -- Touch screen YM/Sense
105c8b11de0SJosh Wu 	 * CH4 -- Touch screen LR(5-wire only)
106c8b11de0SJosh Wu 	 *
107c8b11de0SJosh Wu 	 * The bitfields below represents the reserved channel in the
108c8b11de0SJosh Wu 	 * touchscreen mode.
109c8b11de0SJosh Wu 	 */
110c8b11de0SJosh Wu #define CHAN_MASK_TOUCHSCREEN_4WIRE	(0xf << 0)
111c8b11de0SJosh Wu #define CHAN_MASK_TOUCHSCREEN_5WIRE	(0x1f << 0)
112c8b11de0SJosh Wu 	enum atmel_adc_ts_type	touchscreen_type;
113c8b11de0SJosh Wu 	struct input_dev	*ts_input;
114c8b11de0SJosh Wu 
115c8b11de0SJosh Wu 	u16			ts_sample_period_val;
116c8b11de0SJosh Wu 	u32			ts_pressure_threshold;
1170e589d5fSMaxime Ripard };
1180e589d5fSMaxime Ripard 
1190e589d5fSMaxime Ripard static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
1200e589d5fSMaxime Ripard {
1210e589d5fSMaxime Ripard 	struct iio_poll_func *pf = p;
1220e589d5fSMaxime Ripard 	struct iio_dev *idev = pf->indio_dev;
1230e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
1240e589d5fSMaxime Ripard 	int i, j = 0;
1250e589d5fSMaxime Ripard 
1260e589d5fSMaxime Ripard 	for (i = 0; i < idev->masklength; i++) {
1270e589d5fSMaxime Ripard 		if (!test_bit(i, idev->active_scan_mask))
1280e589d5fSMaxime Ripard 			continue;
1290e589d5fSMaxime Ripard 		st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
1300e589d5fSMaxime Ripard 		j++;
1310e589d5fSMaxime Ripard 	}
1320e589d5fSMaxime Ripard 
133e79cece0SLars-Peter Clausen 	iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);
1340e589d5fSMaxime Ripard 
1350e589d5fSMaxime Ripard 	iio_trigger_notify_done(idev->trig);
1360e589d5fSMaxime Ripard 
1370e589d5fSMaxime Ripard 	/* Needed to ACK the DRDY interruption */
1380e589d5fSMaxime Ripard 	at91_adc_readl(st, AT91_ADC_LCDR);
1390e589d5fSMaxime Ripard 
1400e589d5fSMaxime Ripard 	enable_irq(st->irq);
1410e589d5fSMaxime Ripard 
1420e589d5fSMaxime Ripard 	return IRQ_HANDLED;
1430e589d5fSMaxime Ripard }
1440e589d5fSMaxime Ripard 
145c8b11de0SJosh Wu /* Handler for classic adc channel eoc trigger */
146c8b11de0SJosh Wu void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
1470e589d5fSMaxime Ripard {
1480e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
1490e589d5fSMaxime Ripard 
1500e589d5fSMaxime Ripard 	if (iio_buffer_enabled(idev)) {
1510e589d5fSMaxime Ripard 		disable_irq_nosync(irq);
1520e589d5fSMaxime Ripard 		iio_trigger_poll(idev->trig, iio_get_time_ns());
1530e589d5fSMaxime Ripard 	} else {
1540e589d5fSMaxime Ripard 		st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
1550e589d5fSMaxime Ripard 		st->done = true;
1560e589d5fSMaxime Ripard 		wake_up_interruptible(&st->wq_data_avail);
1570e589d5fSMaxime Ripard 	}
158c8b11de0SJosh Wu }
159c8b11de0SJosh Wu 
160c8b11de0SJosh Wu static int at91_ts_sample(struct at91_adc_state *st)
161c8b11de0SJosh Wu {
162c8b11de0SJosh Wu 	unsigned int xscale, yscale, reg, z1, z2;
163c8b11de0SJosh Wu 	unsigned int x, y, pres, xpos, ypos;
164c8b11de0SJosh Wu 	unsigned int rxp = 1;
165c8b11de0SJosh Wu 	unsigned int factor = 1000;
166c8b11de0SJosh Wu 	struct iio_dev *idev = iio_priv_to_dev(st);
167c8b11de0SJosh Wu 
168c8b11de0SJosh Wu 	unsigned int xyz_mask_bits = st->res;
169c8b11de0SJosh Wu 	unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;
170c8b11de0SJosh Wu 
171c8b11de0SJosh Wu 	/* calculate position */
172c8b11de0SJosh Wu 	/* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */
173c8b11de0SJosh Wu 	reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);
174c8b11de0SJosh Wu 	xpos = reg & xyz_mask;
175c8b11de0SJosh Wu 	x = (xpos << MAX_POS_BITS) - xpos;
176c8b11de0SJosh Wu 	xscale = (reg >> 16) & xyz_mask;
177c8b11de0SJosh Wu 	if (xscale == 0) {
178c8b11de0SJosh Wu 		dev_err(&idev->dev, "Error: xscale == 0!\n");
179c8b11de0SJosh Wu 		return -1;
180c8b11de0SJosh Wu 	}
181c8b11de0SJosh Wu 	x /= xscale;
182c8b11de0SJosh Wu 
183c8b11de0SJosh Wu 	/* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */
184c8b11de0SJosh Wu 	reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);
185c8b11de0SJosh Wu 	ypos = reg & xyz_mask;
186c8b11de0SJosh Wu 	y = (ypos << MAX_POS_BITS) - ypos;
187c8b11de0SJosh Wu 	yscale = (reg >> 16) & xyz_mask;
188c8b11de0SJosh Wu 	if (yscale == 0) {
189c8b11de0SJosh Wu 		dev_err(&idev->dev, "Error: yscale == 0!\n");
190c8b11de0SJosh Wu 		return -1;
191c8b11de0SJosh Wu 	}
192c8b11de0SJosh Wu 	y /= yscale;
193c8b11de0SJosh Wu 
194c8b11de0SJosh Wu 	/* calculate the pressure */
195c8b11de0SJosh Wu 	reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);
196c8b11de0SJosh Wu 	z1 = reg & xyz_mask;
197c8b11de0SJosh Wu 	z2 = (reg >> 16) & xyz_mask;
198c8b11de0SJosh Wu 
199c8b11de0SJosh Wu 	if (z1 != 0)
200c8b11de0SJosh Wu 		pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor)
201c8b11de0SJosh Wu 			/ factor;
202c8b11de0SJosh Wu 	else
203c8b11de0SJosh Wu 		pres = st->ts_pressure_threshold;	/* no pen contacted */
204c8b11de0SJosh Wu 
205c8b11de0SJosh Wu 	dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\n",
206c8b11de0SJosh Wu 				xpos, xscale, ypos, yscale, z1, z2, pres);
207c8b11de0SJosh Wu 
208c8b11de0SJosh Wu 	if (pres < st->ts_pressure_threshold) {
209c8b11de0SJosh Wu 		dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n",
210c8b11de0SJosh Wu 					x, y, pres / factor);
211c8b11de0SJosh Wu 		input_report_abs(st->ts_input, ABS_X, x);
212c8b11de0SJosh Wu 		input_report_abs(st->ts_input, ABS_Y, y);
213c8b11de0SJosh Wu 		input_report_abs(st->ts_input, ABS_PRESSURE, pres);
214c8b11de0SJosh Wu 		input_report_key(st->ts_input, BTN_TOUCH, 1);
215c8b11de0SJosh Wu 		input_sync(st->ts_input);
216c8b11de0SJosh Wu 	} else {
217c8b11de0SJosh Wu 		dev_dbg(&idev->dev, "pressure too low: not reporting\n");
218c8b11de0SJosh Wu 	}
219c8b11de0SJosh Wu 
220c8b11de0SJosh Wu 	return 0;
221c8b11de0SJosh Wu }
222c8b11de0SJosh Wu 
223c8b11de0SJosh Wu static irqreturn_t at91_adc_interrupt(int irq, void *private)
224c8b11de0SJosh Wu {
225c8b11de0SJosh Wu 	struct iio_dev *idev = private;
226c8b11de0SJosh Wu 	struct at91_adc_state *st = iio_priv(idev);
227c8b11de0SJosh Wu 	u32 status = at91_adc_readl(st, st->registers->status_register);
228c8b11de0SJosh Wu 	const uint32_t ts_data_irq_mask =
229c8b11de0SJosh Wu 		AT91_ADC_IER_XRDY |
230c8b11de0SJosh Wu 		AT91_ADC_IER_YRDY |
231c8b11de0SJosh Wu 		AT91_ADC_IER_PRDY;
232c8b11de0SJosh Wu 
233c8b11de0SJosh Wu 	if (status & st->registers->drdy_mask)
234c8b11de0SJosh Wu 		handle_adc_eoc_trigger(irq, idev);
235c8b11de0SJosh Wu 
236c8b11de0SJosh Wu 	if (status & AT91_ADC_IER_PEN) {
237c8b11de0SJosh Wu 		at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
238c8b11de0SJosh Wu 		at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |
239c8b11de0SJosh Wu 			ts_data_irq_mask);
240c8b11de0SJosh Wu 		/* Set up period trigger for sampling */
241c8b11de0SJosh Wu 		at91_adc_writel(st, st->registers->trigger_register,
242c8b11de0SJosh Wu 			AT91_ADC_TRGR_MOD_PERIOD_TRIG |
243c8b11de0SJosh Wu 			AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
244c8b11de0SJosh Wu 	} else if (status & AT91_ADC_IER_NOPEN) {
245c8b11de0SJosh Wu 		at91_adc_writel(st, st->registers->trigger_register, 0);
246c8b11de0SJosh Wu 		at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_NOPEN |
247c8b11de0SJosh Wu 			ts_data_irq_mask);
248c8b11de0SJosh Wu 		at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
249c8b11de0SJosh Wu 
250c8b11de0SJosh Wu 		input_report_key(st->ts_input, BTN_TOUCH, 0);
251c8b11de0SJosh Wu 		input_sync(st->ts_input);
252c8b11de0SJosh Wu 	} else if ((status & ts_data_irq_mask) == ts_data_irq_mask) {
253c8b11de0SJosh Wu 		/* Now all touchscreen data is ready */
254c8b11de0SJosh Wu 
255c8b11de0SJosh Wu 		if (status & AT91_ADC_ISR_PENS) {
256c8b11de0SJosh Wu 			/* validate data by pen contact */
257c8b11de0SJosh Wu 			at91_ts_sample(st);
258c8b11de0SJosh Wu 		} else {
259c8b11de0SJosh Wu 			/* triggered by event that is no pen contact, just read
260c8b11de0SJosh Wu 			 * them to clean the interrupt and discard all.
261c8b11de0SJosh Wu 			 */
262c8b11de0SJosh Wu 			at91_adc_readl(st, AT91_ADC_TSXPOSR);
263c8b11de0SJosh Wu 			at91_adc_readl(st, AT91_ADC_TSYPOSR);
264c8b11de0SJosh Wu 			at91_adc_readl(st, AT91_ADC_TSPRESSR);
265c8b11de0SJosh Wu 		}
266c8b11de0SJosh Wu 	}
2670e589d5fSMaxime Ripard 
2680e589d5fSMaxime Ripard 	return IRQ_HANDLED;
2690e589d5fSMaxime Ripard }
2700e589d5fSMaxime Ripard 
2710e589d5fSMaxime Ripard static int at91_adc_channel_init(struct iio_dev *idev)
2720e589d5fSMaxime Ripard {
2730e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
2740e589d5fSMaxime Ripard 	struct iio_chan_spec *chan_array, *timestamp;
2750e589d5fSMaxime Ripard 	int bit, idx = 0;
276c8b11de0SJosh Wu 	unsigned long rsvd_mask = 0;
277c8b11de0SJosh Wu 
278c8b11de0SJosh Wu 	/* If touchscreen is enable, then reserve the adc channels */
279c8b11de0SJosh Wu 	if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
280c8b11de0SJosh Wu 		rsvd_mask = CHAN_MASK_TOUCHSCREEN_4WIRE;
281c8b11de0SJosh Wu 	else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)
282c8b11de0SJosh Wu 		rsvd_mask = CHAN_MASK_TOUCHSCREEN_5WIRE;
283c8b11de0SJosh Wu 
284c8b11de0SJosh Wu 	/* set up the channel mask to reserve touchscreen channels */
285c8b11de0SJosh Wu 	st->channels_mask &= ~rsvd_mask;
2860e589d5fSMaxime Ripard 
2870e589d5fSMaxime Ripard 	idev->num_channels = bitmap_weight(&st->channels_mask,
2880e589d5fSMaxime Ripard 					   st->num_channels) + 1;
2890e589d5fSMaxime Ripard 
2906b3aa313SAxel Lin 	chan_array = devm_kzalloc(&idev->dev,
2916b3aa313SAxel Lin 				  ((idev->num_channels + 1) *
2926b3aa313SAxel Lin 					sizeof(struct iio_chan_spec)),
2936b3aa313SAxel Lin 				  GFP_KERNEL);
2940e589d5fSMaxime Ripard 
2950e589d5fSMaxime Ripard 	if (!chan_array)
2960e589d5fSMaxime Ripard 		return -ENOMEM;
2970e589d5fSMaxime Ripard 
2980e589d5fSMaxime Ripard 	for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
2990e589d5fSMaxime Ripard 		struct iio_chan_spec *chan = chan_array + idx;
3000e589d5fSMaxime Ripard 
3010e589d5fSMaxime Ripard 		chan->type = IIO_VOLTAGE;
3020e589d5fSMaxime Ripard 		chan->indexed = 1;
3030e589d5fSMaxime Ripard 		chan->channel = bit;
3040e589d5fSMaxime Ripard 		chan->scan_index = idx;
3050e589d5fSMaxime Ripard 		chan->scan_type.sign = 'u';
30647be16b6SLudovic Desroches 		chan->scan_type.realbits = st->res;
3070e589d5fSMaxime Ripard 		chan->scan_type.storagebits = 16;
30801bdab66SJonathan Cameron 		chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
30901bdab66SJonathan Cameron 		chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
3100e589d5fSMaxime Ripard 		idx++;
3110e589d5fSMaxime Ripard 	}
3120e589d5fSMaxime Ripard 	timestamp = chan_array + idx;
3130e589d5fSMaxime Ripard 
3140e589d5fSMaxime Ripard 	timestamp->type = IIO_TIMESTAMP;
3150e589d5fSMaxime Ripard 	timestamp->channel = -1;
3160e589d5fSMaxime Ripard 	timestamp->scan_index = idx;
3170e589d5fSMaxime Ripard 	timestamp->scan_type.sign = 's';
3180e589d5fSMaxime Ripard 	timestamp->scan_type.realbits = 64;
3190e589d5fSMaxime Ripard 	timestamp->scan_type.storagebits = 64;
3200e589d5fSMaxime Ripard 
3210e589d5fSMaxime Ripard 	idev->channels = chan_array;
3220e589d5fSMaxime Ripard 	return idev->num_channels;
3230e589d5fSMaxime Ripard }
3240e589d5fSMaxime Ripard 
3250e589d5fSMaxime Ripard static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
3260e589d5fSMaxime Ripard 					     struct at91_adc_trigger *triggers,
3270e589d5fSMaxime Ripard 					     const char *trigger_name)
3280e589d5fSMaxime Ripard {
3290e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
3300e589d5fSMaxime Ripard 	u8 value = 0;
3310e589d5fSMaxime Ripard 	int i;
3320e589d5fSMaxime Ripard 
3330e589d5fSMaxime Ripard 	for (i = 0; i < st->trigger_number; i++) {
3340e589d5fSMaxime Ripard 		char *name = kasprintf(GFP_KERNEL,
3350e589d5fSMaxime Ripard 				"%s-dev%d-%s",
3360e589d5fSMaxime Ripard 				idev->name,
3370e589d5fSMaxime Ripard 				idev->id,
3380e589d5fSMaxime Ripard 				triggers[i].name);
3390e589d5fSMaxime Ripard 		if (!name)
3400e589d5fSMaxime Ripard 			return -ENOMEM;
3410e589d5fSMaxime Ripard 
3420e589d5fSMaxime Ripard 		if (strcmp(trigger_name, name) == 0) {
3430e589d5fSMaxime Ripard 			value = triggers[i].value;
3440e589d5fSMaxime Ripard 			kfree(name);
3450e589d5fSMaxime Ripard 			break;
3460e589d5fSMaxime Ripard 		}
3470e589d5fSMaxime Ripard 
3480e589d5fSMaxime Ripard 		kfree(name);
3490e589d5fSMaxime Ripard 	}
3500e589d5fSMaxime Ripard 
3510e589d5fSMaxime Ripard 	return value;
3520e589d5fSMaxime Ripard }
3530e589d5fSMaxime Ripard 
3540e589d5fSMaxime Ripard static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
3550e589d5fSMaxime Ripard {
3561e9663c6SLars-Peter Clausen 	struct iio_dev *idev = iio_trigger_get_drvdata(trig);
3570e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
3580e589d5fSMaxime Ripard 	struct iio_buffer *buffer = idev->buffer;
3590e589d5fSMaxime Ripard 	struct at91_adc_reg_desc *reg = st->registers;
3600e589d5fSMaxime Ripard 	u32 status = at91_adc_readl(st, reg->trigger_register);
3610e589d5fSMaxime Ripard 	u8 value;
3620e589d5fSMaxime Ripard 	u8 bit;
3630e589d5fSMaxime Ripard 
3640e589d5fSMaxime Ripard 	value = at91_adc_get_trigger_value_by_name(idev,
3650e589d5fSMaxime Ripard 						   st->trigger_list,
3660e589d5fSMaxime Ripard 						   idev->trig->name);
3670e589d5fSMaxime Ripard 	if (value == 0)
3680e589d5fSMaxime Ripard 		return -EINVAL;
3690e589d5fSMaxime Ripard 
3700e589d5fSMaxime Ripard 	if (state) {
3710e589d5fSMaxime Ripard 		st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
3720e589d5fSMaxime Ripard 		if (st->buffer == NULL)
3730e589d5fSMaxime Ripard 			return -ENOMEM;
3740e589d5fSMaxime Ripard 
3750e589d5fSMaxime Ripard 		at91_adc_writel(st, reg->trigger_register,
3760e589d5fSMaxime Ripard 				status | value);
3770e589d5fSMaxime Ripard 
3780e589d5fSMaxime Ripard 		for_each_set_bit(bit, buffer->scan_mask,
3790e589d5fSMaxime Ripard 				 st->num_channels) {
3800e589d5fSMaxime Ripard 			struct iio_chan_spec const *chan = idev->channels + bit;
3810e589d5fSMaxime Ripard 			at91_adc_writel(st, AT91_ADC_CHER,
3820e589d5fSMaxime Ripard 					AT91_ADC_CH(chan->channel));
3830e589d5fSMaxime Ripard 		}
3840e589d5fSMaxime Ripard 
3850e589d5fSMaxime Ripard 		at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
3860e589d5fSMaxime Ripard 
3870e589d5fSMaxime Ripard 	} else {
3880e589d5fSMaxime Ripard 		at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
3890e589d5fSMaxime Ripard 
3900e589d5fSMaxime Ripard 		at91_adc_writel(st, reg->trigger_register,
3910e589d5fSMaxime Ripard 				status & ~value);
3920e589d5fSMaxime Ripard 
3930e589d5fSMaxime Ripard 		for_each_set_bit(bit, buffer->scan_mask,
3940e589d5fSMaxime Ripard 				 st->num_channels) {
3950e589d5fSMaxime Ripard 			struct iio_chan_spec const *chan = idev->channels + bit;
3960e589d5fSMaxime Ripard 			at91_adc_writel(st, AT91_ADC_CHDR,
3970e589d5fSMaxime Ripard 					AT91_ADC_CH(chan->channel));
3980e589d5fSMaxime Ripard 		}
3990e589d5fSMaxime Ripard 		kfree(st->buffer);
4000e589d5fSMaxime Ripard 	}
4010e589d5fSMaxime Ripard 
4020e589d5fSMaxime Ripard 	return 0;
4030e589d5fSMaxime Ripard }
4040e589d5fSMaxime Ripard 
4050e589d5fSMaxime Ripard static const struct iio_trigger_ops at91_adc_trigger_ops = {
4060e589d5fSMaxime Ripard 	.owner = THIS_MODULE,
4070e589d5fSMaxime Ripard 	.set_trigger_state = &at91_adc_configure_trigger,
4080e589d5fSMaxime Ripard };
4090e589d5fSMaxime Ripard 
4100e589d5fSMaxime Ripard static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
4110e589d5fSMaxime Ripard 						     struct at91_adc_trigger *trigger)
4120e589d5fSMaxime Ripard {
4130e589d5fSMaxime Ripard 	struct iio_trigger *trig;
4140e589d5fSMaxime Ripard 	int ret;
4150e589d5fSMaxime Ripard 
4160e589d5fSMaxime Ripard 	trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
4170e589d5fSMaxime Ripard 				 idev->id, trigger->name);
4180e589d5fSMaxime Ripard 	if (trig == NULL)
4190e589d5fSMaxime Ripard 		return NULL;
4200e589d5fSMaxime Ripard 
4210e589d5fSMaxime Ripard 	trig->dev.parent = idev->dev.parent;
4221e9663c6SLars-Peter Clausen 	iio_trigger_set_drvdata(trig, idev);
4230e589d5fSMaxime Ripard 	trig->ops = &at91_adc_trigger_ops;
4240e589d5fSMaxime Ripard 
4250e589d5fSMaxime Ripard 	ret = iio_trigger_register(trig);
4260e589d5fSMaxime Ripard 	if (ret)
4270e589d5fSMaxime Ripard 		return NULL;
4280e589d5fSMaxime Ripard 
4290e589d5fSMaxime Ripard 	return trig;
4300e589d5fSMaxime Ripard }
4310e589d5fSMaxime Ripard 
4320e589d5fSMaxime Ripard static int at91_adc_trigger_init(struct iio_dev *idev)
4330e589d5fSMaxime Ripard {
4340e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
4350e589d5fSMaxime Ripard 	int i, ret;
4360e589d5fSMaxime Ripard 
4376b3aa313SAxel Lin 	st->trig = devm_kzalloc(&idev->dev,
43842877236SThomas Meyer 				st->trigger_number * sizeof(*st->trig),
4396b3aa313SAxel Lin 				GFP_KERNEL);
4400e589d5fSMaxime Ripard 
4410e589d5fSMaxime Ripard 	if (st->trig == NULL) {
4420e589d5fSMaxime Ripard 		ret = -ENOMEM;
4430e589d5fSMaxime Ripard 		goto error_ret;
4440e589d5fSMaxime Ripard 	}
4450e589d5fSMaxime Ripard 
4460e589d5fSMaxime Ripard 	for (i = 0; i < st->trigger_number; i++) {
4470e589d5fSMaxime Ripard 		if (st->trigger_list[i].is_external && !(st->use_external))
4480e589d5fSMaxime Ripard 			continue;
4490e589d5fSMaxime Ripard 
4500e589d5fSMaxime Ripard 		st->trig[i] = at91_adc_allocate_trigger(idev,
4510e589d5fSMaxime Ripard 							st->trigger_list + i);
4520e589d5fSMaxime Ripard 		if (st->trig[i] == NULL) {
4530e589d5fSMaxime Ripard 			dev_err(&idev->dev,
4540e589d5fSMaxime Ripard 				"Could not allocate trigger %d\n", i);
4550e589d5fSMaxime Ripard 			ret = -ENOMEM;
4560e589d5fSMaxime Ripard 			goto error_trigger;
4570e589d5fSMaxime Ripard 		}
4580e589d5fSMaxime Ripard 	}
4590e589d5fSMaxime Ripard 
4600e589d5fSMaxime Ripard 	return 0;
4610e589d5fSMaxime Ripard 
4620e589d5fSMaxime Ripard error_trigger:
4630e589d5fSMaxime Ripard 	for (i--; i >= 0; i--) {
4640e589d5fSMaxime Ripard 		iio_trigger_unregister(st->trig[i]);
4650e589d5fSMaxime Ripard 		iio_trigger_free(st->trig[i]);
4660e589d5fSMaxime Ripard 	}
4670e589d5fSMaxime Ripard error_ret:
4680e589d5fSMaxime Ripard 	return ret;
4690e589d5fSMaxime Ripard }
4700e589d5fSMaxime Ripard 
4710e589d5fSMaxime Ripard static void at91_adc_trigger_remove(struct iio_dev *idev)
4720e589d5fSMaxime Ripard {
4730e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
4740e589d5fSMaxime Ripard 	int i;
4750e589d5fSMaxime Ripard 
4760e589d5fSMaxime Ripard 	for (i = 0; i < st->trigger_number; i++) {
4770e589d5fSMaxime Ripard 		iio_trigger_unregister(st->trig[i]);
4780e589d5fSMaxime Ripard 		iio_trigger_free(st->trig[i]);
4790e589d5fSMaxime Ripard 	}
4800e589d5fSMaxime Ripard }
4810e589d5fSMaxime Ripard 
4820e589d5fSMaxime Ripard static int at91_adc_buffer_init(struct iio_dev *idev)
4830e589d5fSMaxime Ripard {
48490032e4eSLars-Peter Clausen 	return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
48590032e4eSLars-Peter Clausen 		&at91_adc_trigger_handler, NULL);
4860e589d5fSMaxime Ripard }
4870e589d5fSMaxime Ripard 
4880e589d5fSMaxime Ripard static void at91_adc_buffer_remove(struct iio_dev *idev)
4890e589d5fSMaxime Ripard {
49090032e4eSLars-Peter Clausen 	iio_triggered_buffer_cleanup(idev);
4910e589d5fSMaxime Ripard }
4920e589d5fSMaxime Ripard 
4930e589d5fSMaxime Ripard static int at91_adc_read_raw(struct iio_dev *idev,
4940e589d5fSMaxime Ripard 			     struct iio_chan_spec const *chan,
4950e589d5fSMaxime Ripard 			     int *val, int *val2, long mask)
4960e589d5fSMaxime Ripard {
4970e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
4980e589d5fSMaxime Ripard 	int ret;
4990e589d5fSMaxime Ripard 
5000e589d5fSMaxime Ripard 	switch (mask) {
5010e589d5fSMaxime Ripard 	case IIO_CHAN_INFO_RAW:
5020e589d5fSMaxime Ripard 		mutex_lock(&st->lock);
5030e589d5fSMaxime Ripard 
5040e589d5fSMaxime Ripard 		at91_adc_writel(st, AT91_ADC_CHER,
5050e589d5fSMaxime Ripard 				AT91_ADC_CH(chan->channel));
5060e589d5fSMaxime Ripard 		at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
5070e589d5fSMaxime Ripard 		at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
5080e589d5fSMaxime Ripard 
5090e589d5fSMaxime Ripard 		ret = wait_event_interruptible_timeout(st->wq_data_avail,
5100e589d5fSMaxime Ripard 						       st->done,
5110e589d5fSMaxime Ripard 						       msecs_to_jiffies(1000));
5120e589d5fSMaxime Ripard 		if (ret == 0)
51390e6dc7cSLars-Peter Clausen 			ret = -ETIMEDOUT;
51490e6dc7cSLars-Peter Clausen 		if (ret < 0) {
51590e6dc7cSLars-Peter Clausen 			mutex_unlock(&st->lock);
5160e589d5fSMaxime Ripard 			return ret;
51790e6dc7cSLars-Peter Clausen 		}
5180e589d5fSMaxime Ripard 
5190e589d5fSMaxime Ripard 		*val = st->last_value;
5200e589d5fSMaxime Ripard 
5210e589d5fSMaxime Ripard 		at91_adc_writel(st, AT91_ADC_CHDR,
5220e589d5fSMaxime Ripard 				AT91_ADC_CH(chan->channel));
5230e589d5fSMaxime Ripard 		at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
5240e589d5fSMaxime Ripard 
5250e589d5fSMaxime Ripard 		st->last_value = 0;
5260e589d5fSMaxime Ripard 		st->done = false;
5270e589d5fSMaxime Ripard 		mutex_unlock(&st->lock);
5280e589d5fSMaxime Ripard 		return IIO_VAL_INT;
5290e589d5fSMaxime Ripard 
5300e589d5fSMaxime Ripard 	case IIO_CHAN_INFO_SCALE:
531c45e561eSLars-Peter Clausen 		*val = st->vref_mv;
532c45e561eSLars-Peter Clausen 		*val2 = chan->scan_type.realbits;
533c45e561eSLars-Peter Clausen 		return IIO_VAL_FRACTIONAL_LOG2;
5340e589d5fSMaxime Ripard 	default:
5350e589d5fSMaxime Ripard 		break;
5360e589d5fSMaxime Ripard 	}
5370e589d5fSMaxime Ripard 	return -EINVAL;
5380e589d5fSMaxime Ripard }
5390e589d5fSMaxime Ripard 
54047be16b6SLudovic Desroches static int at91_adc_of_get_resolution(struct at91_adc_state *st,
54147be16b6SLudovic Desroches 				      struct platform_device *pdev)
54247be16b6SLudovic Desroches {
54347be16b6SLudovic Desroches 	struct iio_dev *idev = iio_priv_to_dev(st);
54447be16b6SLudovic Desroches 	struct device_node *np = pdev->dev.of_node;
54547be16b6SLudovic Desroches 	int count, i, ret = 0;
54647be16b6SLudovic Desroches 	char *res_name, *s;
54747be16b6SLudovic Desroches 	u32 *resolutions;
54847be16b6SLudovic Desroches 
54947be16b6SLudovic Desroches 	count = of_property_count_strings(np, "atmel,adc-res-names");
55047be16b6SLudovic Desroches 	if (count < 2) {
55147be16b6SLudovic Desroches 		dev_err(&idev->dev, "You must specified at least two resolution names for "
55247be16b6SLudovic Desroches 				    "adc-res-names property in the DT\n");
55347be16b6SLudovic Desroches 		return count;
55447be16b6SLudovic Desroches 	}
55547be16b6SLudovic Desroches 
55647be16b6SLudovic Desroches 	resolutions = kmalloc(count * sizeof(*resolutions), GFP_KERNEL);
55747be16b6SLudovic Desroches 	if (!resolutions)
55847be16b6SLudovic Desroches 		return -ENOMEM;
55947be16b6SLudovic Desroches 
56047be16b6SLudovic Desroches 	if (of_property_read_u32_array(np, "atmel,adc-res", resolutions, count)) {
56147be16b6SLudovic Desroches 		dev_err(&idev->dev, "Missing adc-res property in the DT.\n");
56247be16b6SLudovic Desroches 		ret = -ENODEV;
56347be16b6SLudovic Desroches 		goto ret;
56447be16b6SLudovic Desroches 	}
56547be16b6SLudovic Desroches 
56647be16b6SLudovic Desroches 	if (of_property_read_string(np, "atmel,adc-use-res", (const char **)&res_name))
56747be16b6SLudovic Desroches 		res_name = "highres";
56847be16b6SLudovic Desroches 
56947be16b6SLudovic Desroches 	for (i = 0; i < count; i++) {
57047be16b6SLudovic Desroches 		if (of_property_read_string_index(np, "atmel,adc-res-names", i, (const char **)&s))
57147be16b6SLudovic Desroches 			continue;
57247be16b6SLudovic Desroches 
57347be16b6SLudovic Desroches 		if (strcmp(res_name, s))
57447be16b6SLudovic Desroches 			continue;
57547be16b6SLudovic Desroches 
57647be16b6SLudovic Desroches 		st->res = resolutions[i];
57747be16b6SLudovic Desroches 		if (!strcmp(res_name, "lowres"))
57847be16b6SLudovic Desroches 			st->low_res = true;
57947be16b6SLudovic Desroches 		else
58047be16b6SLudovic Desroches 			st->low_res = false;
58147be16b6SLudovic Desroches 
58247be16b6SLudovic Desroches 		dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
58347be16b6SLudovic Desroches 		goto ret;
58447be16b6SLudovic Desroches 	}
58547be16b6SLudovic Desroches 
58647be16b6SLudovic Desroches 	dev_err(&idev->dev, "There is no resolution for %s\n", res_name);
58747be16b6SLudovic Desroches 
58847be16b6SLudovic Desroches ret:
58947be16b6SLudovic Desroches 	kfree(resolutions);
59047be16b6SLudovic Desroches 	return ret;
59147be16b6SLudovic Desroches }
59247be16b6SLudovic Desroches 
593c4601666SJosh Wu static u32 calc_startup_ticks_9260(u8 startup_time, u32 adc_clk_khz)
594c4601666SJosh Wu {
595c4601666SJosh Wu 	/*
596c4601666SJosh Wu 	 * Number of ticks needed to cover the startup time of the ADC
597c4601666SJosh Wu 	 * as defined in the electrical characteristics of the board,
598c4601666SJosh Wu 	 * divided by 8. The formula thus is :
599c4601666SJosh Wu 	 *   Startup Time = (ticks + 1) * 8 / ADC Clock
600c4601666SJosh Wu 	 */
601c4601666SJosh Wu 	return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;
602c4601666SJosh Wu }
603c4601666SJosh Wu 
604c4601666SJosh Wu static u32 calc_startup_ticks_9x5(u8 startup_time, u32 adc_clk_khz)
605c4601666SJosh Wu {
606c4601666SJosh Wu 	/*
607c4601666SJosh Wu 	 * For sama5d3x and at91sam9x5, the formula changes to:
608c4601666SJosh Wu 	 * Startup Time = <lookup_table_value> / ADC Clock
609c4601666SJosh Wu 	 */
610c4601666SJosh Wu 	const int startup_lookup[] = {
611c4601666SJosh Wu 		0  , 8  , 16 , 24 ,
612c4601666SJosh Wu 		64 , 80 , 96 , 112,
613c4601666SJosh Wu 		512, 576, 640, 704,
614c4601666SJosh Wu 		768, 832, 896, 960
615c4601666SJosh Wu 		};
616c4601666SJosh Wu 	int i, size = ARRAY_SIZE(startup_lookup);
617c4601666SJosh Wu 	unsigned int ticks;
618c4601666SJosh Wu 
619c4601666SJosh Wu 	ticks = startup_time * adc_clk_khz / 1000;
620c4601666SJosh Wu 	for (i = 0; i < size; i++)
621c4601666SJosh Wu 		if (ticks < startup_lookup[i])
622c4601666SJosh Wu 			break;
623c4601666SJosh Wu 
624c4601666SJosh Wu 	ticks = i;
625c4601666SJosh Wu 	if (ticks == size)
626c4601666SJosh Wu 		/* Reach the end of lookup table */
627c4601666SJosh Wu 		ticks = size - 1;
628c4601666SJosh Wu 
629c4601666SJosh Wu 	return ticks;
630c4601666SJosh Wu }
631c4601666SJosh Wu 
632e1811f97SJosh Wu static const struct of_device_id at91_adc_dt_ids[];
633e1811f97SJosh Wu 
634c8b11de0SJosh Wu static int at91_adc_probe_dt_ts(struct device_node *node,
635c8b11de0SJosh Wu 	struct at91_adc_state *st, struct device *dev)
636c8b11de0SJosh Wu {
637c8b11de0SJosh Wu 	int ret;
638c8b11de0SJosh Wu 	u32 prop;
639c8b11de0SJosh Wu 
640c8b11de0SJosh Wu 	ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop);
641c8b11de0SJosh Wu 	if (ret) {
642c8b11de0SJosh Wu 		dev_info(dev, "ADC Touch screen is disabled.\n");
643c8b11de0SJosh Wu 		return 0;
644c8b11de0SJosh Wu 	}
645c8b11de0SJosh Wu 
646c8b11de0SJosh Wu 	switch (prop) {
647c8b11de0SJosh Wu 	case 4:
648c8b11de0SJosh Wu 	case 5:
649c8b11de0SJosh Wu 		st->touchscreen_type = prop;
650c8b11de0SJosh Wu 		break;
651c8b11de0SJosh Wu 	default:
652c8b11de0SJosh Wu 		dev_err(dev, "Unsupported number of touchscreen wires (%d). Should be 4 or 5.\n", prop);
653c8b11de0SJosh Wu 		return -EINVAL;
654c8b11de0SJosh Wu 	}
655c8b11de0SJosh Wu 
656c8b11de0SJosh Wu 	prop = 0;
657c8b11de0SJosh Wu 	of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
658c8b11de0SJosh Wu 	st->ts_pressure_threshold = prop;
659c8b11de0SJosh Wu 	if (st->ts_pressure_threshold) {
660c8b11de0SJosh Wu 		return 0;
661c8b11de0SJosh Wu 	} else {
662c8b11de0SJosh Wu 		dev_err(dev, "Invalid pressure threshold for the touchscreen\n");
663c8b11de0SJosh Wu 		return -EINVAL;
664c8b11de0SJosh Wu 	}
665c8b11de0SJosh Wu }
666c8b11de0SJosh Wu 
667e364185fSMaxime Ripard static int at91_adc_probe_dt(struct at91_adc_state *st,
668e364185fSMaxime Ripard 			     struct platform_device *pdev)
669e364185fSMaxime Ripard {
670e364185fSMaxime Ripard 	struct iio_dev *idev = iio_priv_to_dev(st);
671e364185fSMaxime Ripard 	struct device_node *node = pdev->dev.of_node;
672e364185fSMaxime Ripard 	struct device_node *trig_node;
673e364185fSMaxime Ripard 	int i = 0, ret;
674e364185fSMaxime Ripard 	u32 prop;
675e364185fSMaxime Ripard 
676e364185fSMaxime Ripard 	if (!node)
677e364185fSMaxime Ripard 		return -EINVAL;
678e364185fSMaxime Ripard 
679e1811f97SJosh Wu 	st->caps = (struct at91_adc_caps *)
680e1811f97SJosh Wu 		of_match_device(at91_adc_dt_ids, &pdev->dev)->data;
681e1811f97SJosh Wu 
682e364185fSMaxime Ripard 	st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
683e364185fSMaxime Ripard 
684e364185fSMaxime Ripard 	if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
685e364185fSMaxime Ripard 		dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
686e364185fSMaxime Ripard 		ret = -EINVAL;
687e364185fSMaxime Ripard 		goto error_ret;
688e364185fSMaxime Ripard 	}
689e364185fSMaxime Ripard 	st->channels_mask = prop;
690e364185fSMaxime Ripard 
691e748783cSJean-Christophe PLAGNIOL-VILLARD 	st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
692e748783cSJean-Christophe PLAGNIOL-VILLARD 
693e364185fSMaxime Ripard 	if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
694e364185fSMaxime Ripard 		dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
695e364185fSMaxime Ripard 		ret = -EINVAL;
696e364185fSMaxime Ripard 		goto error_ret;
697e364185fSMaxime Ripard 	}
698e364185fSMaxime Ripard 	st->startup_time = prop;
699e364185fSMaxime Ripard 
700beca9e76SJean-Christophe PLAGNIOL-VILLARD 	prop = 0;
701beca9e76SJean-Christophe PLAGNIOL-VILLARD 	of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
702beca9e76SJean-Christophe PLAGNIOL-VILLARD 	st->sample_hold_time = prop;
703e364185fSMaxime Ripard 
704e364185fSMaxime Ripard 	if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
705e364185fSMaxime Ripard 		dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
706e364185fSMaxime Ripard 		ret = -EINVAL;
707e364185fSMaxime Ripard 		goto error_ret;
708e364185fSMaxime Ripard 	}
709e364185fSMaxime Ripard 	st->vref_mv = prop;
710e364185fSMaxime Ripard 
71147be16b6SLudovic Desroches 	ret = at91_adc_of_get_resolution(st, pdev);
71247be16b6SLudovic Desroches 	if (ret)
71347be16b6SLudovic Desroches 		goto error_ret;
71447be16b6SLudovic Desroches 
715e1811f97SJosh Wu 	st->registers = &st->caps->registers;
7162b6d598bSJosh Wu 	st->num_channels = st->caps->num_channels;
717e364185fSMaxime Ripard 	st->trigger_number = of_get_child_count(node);
7186b3aa313SAxel Lin 	st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
7196b3aa313SAxel Lin 					sizeof(struct at91_adc_trigger),
7206b3aa313SAxel Lin 					GFP_KERNEL);
721e364185fSMaxime Ripard 	if (!st->trigger_list) {
722e364185fSMaxime Ripard 		dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
723e364185fSMaxime Ripard 		ret = -ENOMEM;
724e364185fSMaxime Ripard 		goto error_ret;
725e364185fSMaxime Ripard 	}
726e364185fSMaxime Ripard 
727e364185fSMaxime Ripard 	for_each_child_of_node(node, trig_node) {
728e364185fSMaxime Ripard 		struct at91_adc_trigger *trig = st->trigger_list + i;
729e364185fSMaxime Ripard 		const char *name;
730e364185fSMaxime Ripard 
731e364185fSMaxime Ripard 		if (of_property_read_string(trig_node, "trigger-name", &name)) {
732e364185fSMaxime Ripard 			dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
733e364185fSMaxime Ripard 			ret = -EINVAL;
734e364185fSMaxime Ripard 			goto error_ret;
735e364185fSMaxime Ripard 		}
736e364185fSMaxime Ripard 	        trig->name = name;
737e364185fSMaxime Ripard 
738e364185fSMaxime Ripard 		if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
739e364185fSMaxime Ripard 			dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
740e364185fSMaxime Ripard 			ret = -EINVAL;
741e364185fSMaxime Ripard 			goto error_ret;
742e364185fSMaxime Ripard 		}
743e364185fSMaxime Ripard 	        trig->value = prop;
744e364185fSMaxime Ripard 		trig->is_external = of_property_read_bool(trig_node, "trigger-external");
745e364185fSMaxime Ripard 		i++;
746e364185fSMaxime Ripard 	}
747e364185fSMaxime Ripard 
748c8b11de0SJosh Wu 	/* Check if touchscreen is supported. */
749c8b11de0SJosh Wu 	if (st->caps->has_ts)
750c8b11de0SJosh Wu 		return at91_adc_probe_dt_ts(node, st, &idev->dev);
751c8b11de0SJosh Wu 	else
752c8b11de0SJosh Wu 		dev_info(&idev->dev, "not support touchscreen in the adc compatible string.\n");
753c8b11de0SJosh Wu 
754e364185fSMaxime Ripard 	return 0;
755e364185fSMaxime Ripard 
756e364185fSMaxime Ripard error_ret:
757e364185fSMaxime Ripard 	return ret;
758e364185fSMaxime Ripard }
759e364185fSMaxime Ripard 
7600e589d5fSMaxime Ripard static int at91_adc_probe_pdata(struct at91_adc_state *st,
7610e589d5fSMaxime Ripard 				struct platform_device *pdev)
7620e589d5fSMaxime Ripard {
7630e589d5fSMaxime Ripard 	struct at91_adc_data *pdata = pdev->dev.platform_data;
7640e589d5fSMaxime Ripard 
7650e589d5fSMaxime Ripard 	if (!pdata)
7660e589d5fSMaxime Ripard 		return -EINVAL;
7670e589d5fSMaxime Ripard 
768467a44b0SAlexandre Belloni 	st->caps = (struct at91_adc_caps *)
769467a44b0SAlexandre Belloni 			platform_get_device_id(pdev)->driver_data;
770467a44b0SAlexandre Belloni 
7710e589d5fSMaxime Ripard 	st->use_external = pdata->use_external_triggers;
7720e589d5fSMaxime Ripard 	st->vref_mv = pdata->vref;
7730e589d5fSMaxime Ripard 	st->channels_mask = pdata->channels_used;
774467a44b0SAlexandre Belloni 	st->num_channels = st->caps->num_channels;
7750e589d5fSMaxime Ripard 	st->startup_time = pdata->startup_time;
7760e589d5fSMaxime Ripard 	st->trigger_number = pdata->trigger_number;
7770e589d5fSMaxime Ripard 	st->trigger_list = pdata->trigger_list;
778467a44b0SAlexandre Belloni 	st->registers = &st->caps->registers;
7790e589d5fSMaxime Ripard 
7800e589d5fSMaxime Ripard 	return 0;
7810e589d5fSMaxime Ripard }
7820e589d5fSMaxime Ripard 
7830e589d5fSMaxime Ripard static const struct iio_info at91_adc_info = {
7840e589d5fSMaxime Ripard 	.driver_module = THIS_MODULE,
7850e589d5fSMaxime Ripard 	.read_raw = &at91_adc_read_raw,
7860e589d5fSMaxime Ripard };
7870e589d5fSMaxime Ripard 
788c8b11de0SJosh Wu /* Touchscreen related functions */
789c8b11de0SJosh Wu static int atmel_ts_open(struct input_dev *dev)
790c8b11de0SJosh Wu {
791c8b11de0SJosh Wu 	struct at91_adc_state *st = input_get_drvdata(dev);
792c8b11de0SJosh Wu 
793c8b11de0SJosh Wu 	at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
794c8b11de0SJosh Wu 	return 0;
795c8b11de0SJosh Wu }
796c8b11de0SJosh Wu 
797c8b11de0SJosh Wu static void atmel_ts_close(struct input_dev *dev)
798c8b11de0SJosh Wu {
799c8b11de0SJosh Wu 	struct at91_adc_state *st = input_get_drvdata(dev);
800c8b11de0SJosh Wu 
801c8b11de0SJosh Wu 	at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
802c8b11de0SJosh Wu }
803c8b11de0SJosh Wu 
804c8b11de0SJosh Wu static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
805c8b11de0SJosh Wu {
806c8b11de0SJosh Wu 	u32 reg = 0, pendbc;
807c8b11de0SJosh Wu 	int i = 0;
808c8b11de0SJosh Wu 
809c8b11de0SJosh Wu 	if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
810c8b11de0SJosh Wu 		reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
811c8b11de0SJosh Wu 	else
812c8b11de0SJosh Wu 		reg = AT91_ADC_TSMR_TSMODE_5WIRE;
813c8b11de0SJosh Wu 
814c8b11de0SJosh Wu 	/* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
815c8b11de0SJosh Wu 	 * pen detect noise.
816c8b11de0SJosh Wu 	 * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
817c8b11de0SJosh Wu 	 */
818c8b11de0SJosh Wu 	pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1);
819c8b11de0SJosh Wu 
820c8b11de0SJosh Wu 	while (pendbc >> ++i)
821c8b11de0SJosh Wu 		;	/* Empty! Find the shift offset */
822c8b11de0SJosh Wu 	if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1))))
823c8b11de0SJosh Wu 		pendbc = i;
824c8b11de0SJosh Wu 	else
825c8b11de0SJosh Wu 		pendbc = i - 1;
826c8b11de0SJosh Wu 
827c8b11de0SJosh Wu 	if (st->caps->has_tsmr) {
828c8b11de0SJosh Wu 		reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
829c8b11de0SJosh Wu 				& AT91_ADC_TSMR_TSAV;
830c8b11de0SJosh Wu 		reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC;
831c8b11de0SJosh Wu 		reg |= AT91_ADC_TSMR_NOTSDMA;
832c8b11de0SJosh Wu 		reg |= AT91_ADC_TSMR_PENDET_ENA;
833c8b11de0SJosh Wu 		reg |= 0x03 << 8;	/* TSFREQ, need bigger than TSAV */
834c8b11de0SJosh Wu 
835c8b11de0SJosh Wu 		at91_adc_writel(st, AT91_ADC_TSMR, reg);
836c8b11de0SJosh Wu 	} else {
837c8b11de0SJosh Wu 		/* TODO: for 9g45 which has no TSMR */
838c8b11de0SJosh Wu 	}
839c8b11de0SJosh Wu 
840c8b11de0SJosh Wu 	/* Change adc internal resistor value for better pen detection,
841c8b11de0SJosh Wu 	 * default value is 100 kOhm.
842c8b11de0SJosh Wu 	 * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
843c8b11de0SJosh Wu 	 * option only available on ES2 and higher
844c8b11de0SJosh Wu 	 */
845c8b11de0SJosh Wu 	at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
846c8b11de0SJosh Wu 			& AT91_ADC_ACR_PENDETSENS);
847c8b11de0SJosh Wu 
848c8b11de0SJosh Wu 	/* Sample Peroid Time = (TRGPER + 1) / ADCClock */
849c8b11de0SJosh Wu 	st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
850c8b11de0SJosh Wu 			adc_clk_khz / 1000) - 1, 1);
851c8b11de0SJosh Wu 
852c8b11de0SJosh Wu 	return 0;
853c8b11de0SJosh Wu }
854c8b11de0SJosh Wu 
855c8b11de0SJosh Wu static int at91_ts_register(struct at91_adc_state *st,
856c8b11de0SJosh Wu 		struct platform_device *pdev)
857c8b11de0SJosh Wu {
858c8b11de0SJosh Wu 	struct input_dev *input;
859c8b11de0SJosh Wu 	struct iio_dev *idev = iio_priv_to_dev(st);
860c8b11de0SJosh Wu 	int ret;
861c8b11de0SJosh Wu 
862c8b11de0SJosh Wu 	input = input_allocate_device();
863c8b11de0SJosh Wu 	if (!input) {
864c8b11de0SJosh Wu 		dev_err(&idev->dev, "Failed to allocate TS device!\n");
865c8b11de0SJosh Wu 		return -ENOMEM;
866c8b11de0SJosh Wu 	}
867c8b11de0SJosh Wu 
868c8b11de0SJosh Wu 	input->name = DRIVER_NAME;
869c8b11de0SJosh Wu 	input->id.bustype = BUS_HOST;
870c8b11de0SJosh Wu 	input->dev.parent = &pdev->dev;
871c8b11de0SJosh Wu 	input->open = atmel_ts_open;
872c8b11de0SJosh Wu 	input->close = atmel_ts_close;
873c8b11de0SJosh Wu 
874c8b11de0SJosh Wu 	__set_bit(EV_ABS, input->evbit);
875c8b11de0SJosh Wu 	__set_bit(EV_KEY, input->evbit);
876c8b11de0SJosh Wu 	__set_bit(BTN_TOUCH, input->keybit);
877c8b11de0SJosh Wu 	input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
878c8b11de0SJosh Wu 	input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
879c8b11de0SJosh Wu 	input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
880c8b11de0SJosh Wu 
881c8b11de0SJosh Wu 	st->ts_input = input;
882c8b11de0SJosh Wu 	input_set_drvdata(input, st);
883c8b11de0SJosh Wu 
884c8b11de0SJosh Wu 	ret = input_register_device(input);
885c8b11de0SJosh Wu 	if (ret)
886c8b11de0SJosh Wu 		input_free_device(st->ts_input);
887c8b11de0SJosh Wu 
888c8b11de0SJosh Wu 	return ret;
889c8b11de0SJosh Wu }
890c8b11de0SJosh Wu 
891c8b11de0SJosh Wu static void at91_ts_unregister(struct at91_adc_state *st)
892c8b11de0SJosh Wu {
893c8b11de0SJosh Wu 	input_unregister_device(st->ts_input);
894c8b11de0SJosh Wu }
895c8b11de0SJosh Wu 
896fc52692cSGreg Kroah-Hartman static int at91_adc_probe(struct platform_device *pdev)
8970e589d5fSMaxime Ripard {
898db10e201SJosh Wu 	unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;
8990e589d5fSMaxime Ripard 	int ret;
9000e589d5fSMaxime Ripard 	struct iio_dev *idev;
9010e589d5fSMaxime Ripard 	struct at91_adc_state *st;
9020e589d5fSMaxime Ripard 	struct resource *res;
903e748783cSJean-Christophe PLAGNIOL-VILLARD 	u32 reg;
9040e589d5fSMaxime Ripard 
905f8837532SSachin Kamat 	idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));
906f8837532SSachin Kamat 	if (!idev)
907f8837532SSachin Kamat 		return -ENOMEM;
9080e589d5fSMaxime Ripard 
9090e589d5fSMaxime Ripard 	st = iio_priv(idev);
9100e589d5fSMaxime Ripard 
911e364185fSMaxime Ripard 	if (pdev->dev.of_node)
912e364185fSMaxime Ripard 		ret = at91_adc_probe_dt(st, pdev);
913e364185fSMaxime Ripard 	else
9140e589d5fSMaxime Ripard 		ret = at91_adc_probe_pdata(st, pdev);
915e364185fSMaxime Ripard 
9160e589d5fSMaxime Ripard 	if (ret) {
9170e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "No platform data available.\n");
918f8837532SSachin Kamat 		return -EINVAL;
9190e589d5fSMaxime Ripard 	}
9200e589d5fSMaxime Ripard 
9210e589d5fSMaxime Ripard 	platform_set_drvdata(pdev, idev);
9220e589d5fSMaxime Ripard 
9230e589d5fSMaxime Ripard 	idev->dev.parent = &pdev->dev;
9240e589d5fSMaxime Ripard 	idev->name = dev_name(&pdev->dev);
9250e589d5fSMaxime Ripard 	idev->modes = INDIO_DIRECT_MODE;
9260e589d5fSMaxime Ripard 	idev->info = &at91_adc_info;
9270e589d5fSMaxime Ripard 
9280e589d5fSMaxime Ripard 	st->irq = platform_get_irq(pdev, 0);
9290e589d5fSMaxime Ripard 	if (st->irq < 0) {
9300e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "No IRQ ID is designated\n");
931f8837532SSachin Kamat 		return -ENODEV;
9320e589d5fSMaxime Ripard 	}
9330e589d5fSMaxime Ripard 
934390d75c1SJulia Lawall 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
9350e589d5fSMaxime Ripard 
9365fd98466SThierry Reding 	st->reg_base = devm_ioremap_resource(&pdev->dev, res);
9375fd98466SThierry Reding 	if (IS_ERR(st->reg_base)) {
938f8837532SSachin Kamat 		return PTR_ERR(st->reg_base);
9390e589d5fSMaxime Ripard 	}
9400e589d5fSMaxime Ripard 
9410e589d5fSMaxime Ripard 	/*
9420e589d5fSMaxime Ripard 	 * Disable all IRQs before setting up the handler
9430e589d5fSMaxime Ripard 	 */
9440e589d5fSMaxime Ripard 	at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
9450e589d5fSMaxime Ripard 	at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
9460e589d5fSMaxime Ripard 	ret = request_irq(st->irq,
947c8b11de0SJosh Wu 			  at91_adc_interrupt,
9480e589d5fSMaxime Ripard 			  0,
9490e589d5fSMaxime Ripard 			  pdev->dev.driver->name,
9500e589d5fSMaxime Ripard 			  idev);
9510e589d5fSMaxime Ripard 	if (ret) {
9520e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
953f8837532SSachin Kamat 		return ret;
9540e589d5fSMaxime Ripard 	}
9550e589d5fSMaxime Ripard 
956390d75c1SJulia Lawall 	st->clk = devm_clk_get(&pdev->dev, "adc_clk");
9570e589d5fSMaxime Ripard 	if (IS_ERR(st->clk)) {
9580e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "Failed to get the clock.\n");
9590e589d5fSMaxime Ripard 		ret = PTR_ERR(st->clk);
9600e589d5fSMaxime Ripard 		goto error_free_irq;
9610e589d5fSMaxime Ripard 	}
9620e589d5fSMaxime Ripard 
96300062a9cSJulia Lawall 	ret = clk_prepare_enable(st->clk);
9640e589d5fSMaxime Ripard 	if (ret) {
96500062a9cSJulia Lawall 		dev_err(&pdev->dev,
96600062a9cSJulia Lawall 			"Could not prepare or enable the clock.\n");
967390d75c1SJulia Lawall 		goto error_free_irq;
9680e589d5fSMaxime Ripard 	}
9690e589d5fSMaxime Ripard 
970390d75c1SJulia Lawall 	st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
9710e589d5fSMaxime Ripard 	if (IS_ERR(st->adc_clk)) {
9720e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
973f755bbbfSJulia Lawall 		ret = PTR_ERR(st->adc_clk);
9740e589d5fSMaxime Ripard 		goto error_disable_clk;
9750e589d5fSMaxime Ripard 	}
9760e589d5fSMaxime Ripard 
97700062a9cSJulia Lawall 	ret = clk_prepare_enable(st->adc_clk);
9780e589d5fSMaxime Ripard 	if (ret) {
97900062a9cSJulia Lawall 		dev_err(&pdev->dev,
98000062a9cSJulia Lawall 			"Could not prepare or enable the ADC clock.\n");
981390d75c1SJulia Lawall 		goto error_disable_clk;
9820e589d5fSMaxime Ripard 	}
9830e589d5fSMaxime Ripard 
9840e589d5fSMaxime Ripard 	/*
9850e589d5fSMaxime Ripard 	 * Prescaler rate computation using the formula from the Atmel's
9860e589d5fSMaxime Ripard 	 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
9870e589d5fSMaxime Ripard 	 * specified by the electrical characteristics of the board.
9880e589d5fSMaxime Ripard 	 */
9890e589d5fSMaxime Ripard 	mstrclk = clk_get_rate(st->clk);
9900e589d5fSMaxime Ripard 	adc_clk = clk_get_rate(st->adc_clk);
991db10e201SJosh Wu 	adc_clk_khz = adc_clk / 1000;
992c8b11de0SJosh Wu 
993c8b11de0SJosh Wu 	dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n",
994c8b11de0SJosh Wu 		mstrclk, adc_clk);
995c8b11de0SJosh Wu 
9960e589d5fSMaxime Ripard 	prsc = (mstrclk / (2 * adc_clk)) - 1;
9970e589d5fSMaxime Ripard 
9980e589d5fSMaxime Ripard 	if (!st->startup_time) {
9990e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "No startup time available.\n");
10000e589d5fSMaxime Ripard 		ret = -EINVAL;
10010e589d5fSMaxime Ripard 		goto error_disable_adc_clk;
10020e589d5fSMaxime Ripard 	}
1003c4601666SJosh Wu 	ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);
10040e589d5fSMaxime Ripard 
10050e589d5fSMaxime Ripard 	/*
1006beca9e76SJean-Christophe PLAGNIOL-VILLARD 	 * a minimal Sample and Hold Time is necessary for the ADC to guarantee
1007beca9e76SJean-Christophe PLAGNIOL-VILLARD 	 * the best converted final value between two channels selection
1008beca9e76SJean-Christophe PLAGNIOL-VILLARD 	 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
1009beca9e76SJean-Christophe PLAGNIOL-VILLARD 	 */
1010db10e201SJosh Wu 	shtim = round_up((st->sample_hold_time * adc_clk_khz /
1011db10e201SJosh Wu 			  1000) - 1, 1);
1012beca9e76SJean-Christophe PLAGNIOL-VILLARD 
10139120c0beSJosh Wu 	reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
10149120c0beSJosh Wu 	reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
101547be16b6SLudovic Desroches 	if (st->low_res)
1016e748783cSJean-Christophe PLAGNIOL-VILLARD 		reg |= AT91_ADC_LOWRES;
1017e748783cSJean-Christophe PLAGNIOL-VILLARD 	if (st->sleep_mode)
1018e748783cSJean-Christophe PLAGNIOL-VILLARD 		reg |= AT91_ADC_SLEEP;
1019beca9e76SJean-Christophe PLAGNIOL-VILLARD 	reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;
1020e748783cSJean-Christophe PLAGNIOL-VILLARD 	at91_adc_writel(st, AT91_ADC_MR, reg);
10210e589d5fSMaxime Ripard 
10220e589d5fSMaxime Ripard 	/* Setup the ADC channels available on the board */
10230e589d5fSMaxime Ripard 	ret = at91_adc_channel_init(idev);
10240e589d5fSMaxime Ripard 	if (ret < 0) {
10250e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
10260e589d5fSMaxime Ripard 		goto error_disable_adc_clk;
10270e589d5fSMaxime Ripard 	}
10280e589d5fSMaxime Ripard 
10290e589d5fSMaxime Ripard 	init_waitqueue_head(&st->wq_data_avail);
10300e589d5fSMaxime Ripard 	mutex_init(&st->lock);
10310e589d5fSMaxime Ripard 
1032c8b11de0SJosh Wu 	/*
1033c8b11de0SJosh Wu 	 * Since touch screen will set trigger register as period trigger. So
1034c8b11de0SJosh Wu 	 * when touch screen is enabled, then we have to disable hardware
1035c8b11de0SJosh Wu 	 * trigger for classic adc.
1036c8b11de0SJosh Wu 	 */
1037c8b11de0SJosh Wu 	if (!st->touchscreen_type) {
10380e589d5fSMaxime Ripard 		ret = at91_adc_buffer_init(idev);
10390e589d5fSMaxime Ripard 		if (ret < 0) {
10400e589d5fSMaxime Ripard 			dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
10410e589d5fSMaxime Ripard 			goto error_disable_adc_clk;
10420e589d5fSMaxime Ripard 		}
10430e589d5fSMaxime Ripard 
10440e589d5fSMaxime Ripard 		ret = at91_adc_trigger_init(idev);
10450e589d5fSMaxime Ripard 		if (ret < 0) {
10460e589d5fSMaxime Ripard 			dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
1047c8b11de0SJosh Wu 			at91_adc_buffer_remove(idev);
1048c8b11de0SJosh Wu 			goto error_disable_adc_clk;
1049c8b11de0SJosh Wu 		}
1050c8b11de0SJosh Wu 	} else {
1051c8b11de0SJosh Wu 		if (!st->caps->has_tsmr) {
1052c8b11de0SJosh Wu 			dev_err(&pdev->dev, "We don't support non-TSMR adc\n");
105300582bf8SWei Yongjun 			ret = -ENODEV;
1054c8b11de0SJosh Wu 			goto error_disable_adc_clk;
1055c8b11de0SJosh Wu 		}
1056c8b11de0SJosh Wu 
1057c8b11de0SJosh Wu 		ret = at91_ts_register(st, pdev);
1058c8b11de0SJosh Wu 		if (ret)
1059c8b11de0SJosh Wu 			goto error_disable_adc_clk;
1060c8b11de0SJosh Wu 
1061c8b11de0SJosh Wu 		at91_ts_hw_init(st, adc_clk_khz);
10620e589d5fSMaxime Ripard 	}
10630e589d5fSMaxime Ripard 
10640e589d5fSMaxime Ripard 	ret = iio_device_register(idev);
10650e589d5fSMaxime Ripard 	if (ret < 0) {
10660e589d5fSMaxime Ripard 		dev_err(&pdev->dev, "Couldn't register the device.\n");
1067c8b11de0SJosh Wu 		goto error_iio_device_register;
10680e589d5fSMaxime Ripard 	}
10690e589d5fSMaxime Ripard 
10700e589d5fSMaxime Ripard 	return 0;
10710e589d5fSMaxime Ripard 
1072c8b11de0SJosh Wu error_iio_device_register:
1073c8b11de0SJosh Wu 	if (!st->touchscreen_type) {
10740e589d5fSMaxime Ripard 		at91_adc_trigger_remove(idev);
10750e589d5fSMaxime Ripard 		at91_adc_buffer_remove(idev);
1076c8b11de0SJosh Wu 	} else {
1077c8b11de0SJosh Wu 		at91_ts_unregister(st);
1078c8b11de0SJosh Wu 	}
10790e589d5fSMaxime Ripard error_disable_adc_clk:
108000062a9cSJulia Lawall 	clk_disable_unprepare(st->adc_clk);
10810e589d5fSMaxime Ripard error_disable_clk:
108200062a9cSJulia Lawall 	clk_disable_unprepare(st->clk);
10830e589d5fSMaxime Ripard error_free_irq:
10840e589d5fSMaxime Ripard 	free_irq(st->irq, idev);
10850e589d5fSMaxime Ripard 	return ret;
10860e589d5fSMaxime Ripard }
10870e589d5fSMaxime Ripard 
1088fc52692cSGreg Kroah-Hartman static int at91_adc_remove(struct platform_device *pdev)
10890e589d5fSMaxime Ripard {
10900e589d5fSMaxime Ripard 	struct iio_dev *idev = platform_get_drvdata(pdev);
10910e589d5fSMaxime Ripard 	struct at91_adc_state *st = iio_priv(idev);
10920e589d5fSMaxime Ripard 
10930e589d5fSMaxime Ripard 	iio_device_unregister(idev);
1094c8b11de0SJosh Wu 	if (!st->touchscreen_type) {
10950e589d5fSMaxime Ripard 		at91_adc_trigger_remove(idev);
10960e589d5fSMaxime Ripard 		at91_adc_buffer_remove(idev);
1097c8b11de0SJosh Wu 	} else {
1098c8b11de0SJosh Wu 		at91_ts_unregister(st);
1099c8b11de0SJosh Wu 	}
11000e589d5fSMaxime Ripard 	clk_disable_unprepare(st->adc_clk);
110100062a9cSJulia Lawall 	clk_disable_unprepare(st->clk);
11020e589d5fSMaxime Ripard 	free_irq(st->irq, idev);
11030e589d5fSMaxime Ripard 
11040e589d5fSMaxime Ripard 	return 0;
11050e589d5fSMaxime Ripard }
11060e589d5fSMaxime Ripard 
1107e1811f97SJosh Wu static struct at91_adc_caps at91sam9260_caps = {
1108c4601666SJosh Wu 	.calc_startup_ticks = calc_startup_ticks_9260,
11092b6d598bSJosh Wu 	.num_channels = 4,
1110e1811f97SJosh Wu 	.registers = {
1111e1811f97SJosh Wu 		.channel_base = AT91_ADC_CHR(0),
1112e1811f97SJosh Wu 		.drdy_mask = AT91_ADC_DRDY,
1113e1811f97SJosh Wu 		.status_register = AT91_ADC_SR,
1114e1811f97SJosh Wu 		.trigger_register = AT91_ADC_TRGR_9260,
11159120c0beSJosh Wu 		.mr_prescal_mask = AT91_ADC_PRESCAL_9260,
11169120c0beSJosh Wu 		.mr_startup_mask = AT91_ADC_STARTUP_9260,
1117e1811f97SJosh Wu 	},
1118e1811f97SJosh Wu };
1119e1811f97SJosh Wu 
1120e1811f97SJosh Wu static struct at91_adc_caps at91sam9g45_caps = {
1121c8b11de0SJosh Wu 	.has_ts = true,
1122c4601666SJosh Wu 	.calc_startup_ticks = calc_startup_ticks_9260,	/* same as 9260 */
11232b6d598bSJosh Wu 	.num_channels = 8,
1124e1811f97SJosh Wu 	.registers = {
1125e1811f97SJosh Wu 		.channel_base = AT91_ADC_CHR(0),
1126e1811f97SJosh Wu 		.drdy_mask = AT91_ADC_DRDY,
1127e1811f97SJosh Wu 		.status_register = AT91_ADC_SR,
1128e1811f97SJosh Wu 		.trigger_register = AT91_ADC_TRGR_9G45,
11299120c0beSJosh Wu 		.mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
11309120c0beSJosh Wu 		.mr_startup_mask = AT91_ADC_STARTUP_9G45,
1131e1811f97SJosh Wu 	},
1132e1811f97SJosh Wu };
1133e1811f97SJosh Wu 
1134e1811f97SJosh Wu static struct at91_adc_caps at91sam9x5_caps = {
1135c8b11de0SJosh Wu 	.has_ts = true,
1136c8b11de0SJosh Wu 	.has_tsmr = true,
1137c8b11de0SJosh Wu 	.ts_filter_average = 3,
1138c8b11de0SJosh Wu 	.ts_pen_detect_sensitivity = 2,
1139c4601666SJosh Wu 	.calc_startup_ticks = calc_startup_ticks_9x5,
11402b6d598bSJosh Wu 	.num_channels = 12,
1141e1811f97SJosh Wu 	.registers = {
1142e1811f97SJosh Wu 		.channel_base = AT91_ADC_CDR0_9X5,
1143e1811f97SJosh Wu 		.drdy_mask = AT91_ADC_SR_DRDY_9X5,
1144e1811f97SJosh Wu 		.status_register = AT91_ADC_SR_9X5,
1145e1811f97SJosh Wu 		.trigger_register = AT91_ADC_TRGR_9X5,
11469120c0beSJosh Wu 		/* prescal mask is same as 9G45 */
11479120c0beSJosh Wu 		.mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
11489120c0beSJosh Wu 		.mr_startup_mask = AT91_ADC_STARTUP_9X5,
1149e1811f97SJosh Wu 	},
1150e1811f97SJosh Wu };
1151e1811f97SJosh Wu 
1152e364185fSMaxime Ripard static const struct of_device_id at91_adc_dt_ids[] = {
1153e1811f97SJosh Wu 	{ .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1154e1811f97SJosh Wu 	{ .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1155e1811f97SJosh Wu 	{ .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1156e364185fSMaxime Ripard 	{},
1157e364185fSMaxime Ripard };
1158e364185fSMaxime Ripard MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
1159467a44b0SAlexandre Belloni 
1160467a44b0SAlexandre Belloni static const struct platform_device_id at91_adc_ids[] = {
1161467a44b0SAlexandre Belloni 	{
1162467a44b0SAlexandre Belloni 		.name = "at91sam9260-adc",
1163467a44b0SAlexandre Belloni 		.driver_data = (unsigned long)&at91sam9260_caps,
1164467a44b0SAlexandre Belloni 	}, {
1165467a44b0SAlexandre Belloni 		.name = "at91sam9g45-adc",
1166467a44b0SAlexandre Belloni 		.driver_data = (unsigned long)&at91sam9g45_caps,
1167467a44b0SAlexandre Belloni 	}, {
1168467a44b0SAlexandre Belloni 		.name = "at91sam9x5-adc",
1169467a44b0SAlexandre Belloni 		.driver_data = (unsigned long)&at91sam9x5_caps,
1170467a44b0SAlexandre Belloni 	}, {
1171467a44b0SAlexandre Belloni 		/* terminator */
1172467a44b0SAlexandre Belloni 	}
1173467a44b0SAlexandre Belloni };
1174467a44b0SAlexandre Belloni MODULE_DEVICE_TABLE(platform, at91_adc_ids);
1175e364185fSMaxime Ripard 
11760e589d5fSMaxime Ripard static struct platform_driver at91_adc_driver = {
11770e589d5fSMaxime Ripard 	.probe = at91_adc_probe,
1178fc52692cSGreg Kroah-Hartman 	.remove = at91_adc_remove,
1179467a44b0SAlexandre Belloni 	.id_table = at91_adc_ids,
11800e589d5fSMaxime Ripard 	.driver = {
1181c8b11de0SJosh Wu 		   .name = DRIVER_NAME,
1182e364185fSMaxime Ripard 		   .of_match_table = of_match_ptr(at91_adc_dt_ids),
11830e589d5fSMaxime Ripard 	},
11840e589d5fSMaxime Ripard };
11850e589d5fSMaxime Ripard 
11860e589d5fSMaxime Ripard module_platform_driver(at91_adc_driver);
11870e589d5fSMaxime Ripard 
11880e589d5fSMaxime Ripard MODULE_LICENSE("GPL");
11890e589d5fSMaxime Ripard MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
11900e589d5fSMaxime Ripard MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1191