1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog Devices Generic AXI ADC IP core 4 * Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 5 * 6 * Copyright 2012-2020 Analog Devices Inc. 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/clk.h> 11 #include <linux/io.h> 12 #include <linux/delay.h> 13 #include <linux/module.h> 14 #include <linux/of_device.h> 15 #include <linux/platform_device.h> 16 #include <linux/slab.h> 17 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 #include <linux/iio/buffer.h> 21 #include <linux/iio/buffer-dmaengine.h> 22 23 #include <linux/fpga/adi-axi-common.h> 24 #include <linux/iio/adc/adi-axi-adc.h> 25 26 /* 27 * Register definitions: 28 * https://wiki.analog.com/resources/fpga/docs/axi_adc_ip#register_map 29 */ 30 31 /* ADC controls */ 32 33 #define ADI_AXI_REG_RSTN 0x0040 34 #define ADI_AXI_REG_RSTN_CE_N BIT(2) 35 #define ADI_AXI_REG_RSTN_MMCM_RSTN BIT(1) 36 #define ADI_AXI_REG_RSTN_RSTN BIT(0) 37 38 /* ADC Channel controls */ 39 40 #define ADI_AXI_REG_CHAN_CTRL(c) (0x0400 + (c) * 0x40) 41 #define ADI_AXI_REG_CHAN_CTRL_LB_OWR BIT(11) 42 #define ADI_AXI_REG_CHAN_CTRL_PN_SEL_OWR BIT(10) 43 #define ADI_AXI_REG_CHAN_CTRL_IQCOR_EN BIT(9) 44 #define ADI_AXI_REG_CHAN_CTRL_DCFILT_EN BIT(8) 45 #define ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT BIT(6) 46 #define ADI_AXI_REG_CHAN_CTRL_FMT_TYPE BIT(5) 47 #define ADI_AXI_REG_CHAN_CTRL_FMT_EN BIT(4) 48 #define ADI_AXI_REG_CHAN_CTRL_PN_TYPE_OWR BIT(1) 49 #define ADI_AXI_REG_CHAN_CTRL_ENABLE BIT(0) 50 51 #define ADI_AXI_REG_CHAN_CTRL_DEFAULTS \ 52 (ADI_AXI_REG_CHAN_CTRL_FMT_SIGNEXT | \ 53 ADI_AXI_REG_CHAN_CTRL_FMT_EN | \ 54 ADI_AXI_REG_CHAN_CTRL_ENABLE) 55 56 struct adi_axi_adc_core_info { 57 unsigned int version; 58 }; 59 60 struct adi_axi_adc_state { 61 struct mutex lock; 62 63 struct adi_axi_adc_client *client; 64 void __iomem *regs; 65 }; 66 67 struct adi_axi_adc_client { 68 struct list_head entry; 69 struct adi_axi_adc_conv conv; 70 struct adi_axi_adc_state *state; 71 struct device *dev; 72 const struct adi_axi_adc_core_info *info; 73 }; 74 75 static LIST_HEAD(registered_clients); 76 static DEFINE_MUTEX(registered_clients_lock); 77 78 static struct adi_axi_adc_client *conv_to_client(struct adi_axi_adc_conv *conv) 79 { 80 return container_of(conv, struct adi_axi_adc_client, conv); 81 } 82 83 void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv) 84 { 85 struct adi_axi_adc_client *cl = conv_to_client(conv); 86 87 return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN); 88 } 89 EXPORT_SYMBOL_GPL(adi_axi_adc_conv_priv); 90 91 static void adi_axi_adc_write(struct adi_axi_adc_state *st, 92 unsigned int reg, 93 unsigned int val) 94 { 95 iowrite32(val, st->regs + reg); 96 } 97 98 static unsigned int adi_axi_adc_read(struct adi_axi_adc_state *st, 99 unsigned int reg) 100 { 101 return ioread32(st->regs + reg); 102 } 103 104 static int adi_axi_adc_config_dma_buffer(struct device *dev, 105 struct iio_dev *indio_dev) 106 { 107 const char *dma_name; 108 109 if (!device_property_present(dev, "dmas")) 110 return 0; 111 112 if (device_property_read_string(dev, "dma-names", &dma_name)) 113 dma_name = "rx"; 114 115 return devm_iio_dmaengine_buffer_setup(indio_dev->dev.parent, 116 indio_dev, dma_name); 117 } 118 119 static int adi_axi_adc_read_raw(struct iio_dev *indio_dev, 120 struct iio_chan_spec const *chan, 121 int *val, int *val2, long mask) 122 { 123 struct adi_axi_adc_state *st = iio_priv(indio_dev); 124 struct adi_axi_adc_conv *conv = &st->client->conv; 125 126 if (!conv->read_raw) 127 return -EOPNOTSUPP; 128 129 return conv->read_raw(conv, chan, val, val2, mask); 130 } 131 132 static int adi_axi_adc_write_raw(struct iio_dev *indio_dev, 133 struct iio_chan_spec const *chan, 134 int val, int val2, long mask) 135 { 136 struct adi_axi_adc_state *st = iio_priv(indio_dev); 137 struct adi_axi_adc_conv *conv = &st->client->conv; 138 139 if (!conv->write_raw) 140 return -EOPNOTSUPP; 141 142 return conv->write_raw(conv, chan, val, val2, mask); 143 } 144 145 static int adi_axi_adc_update_scan_mode(struct iio_dev *indio_dev, 146 const unsigned long *scan_mask) 147 { 148 struct adi_axi_adc_state *st = iio_priv(indio_dev); 149 struct adi_axi_adc_conv *conv = &st->client->conv; 150 unsigned int i, ctrl; 151 152 for (i = 0; i < conv->chip_info->num_channels; i++) { 153 ctrl = adi_axi_adc_read(st, ADI_AXI_REG_CHAN_CTRL(i)); 154 155 if (test_bit(i, scan_mask)) 156 ctrl |= ADI_AXI_REG_CHAN_CTRL_ENABLE; 157 else 158 ctrl &= ~ADI_AXI_REG_CHAN_CTRL_ENABLE; 159 160 adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), ctrl); 161 } 162 163 return 0; 164 } 165 166 static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev, 167 size_t sizeof_priv) 168 { 169 struct adi_axi_adc_client *cl; 170 size_t alloc_size; 171 172 alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN); 173 if (sizeof_priv) 174 alloc_size += ALIGN(sizeof_priv, IIO_ALIGN); 175 176 cl = kzalloc(alloc_size, GFP_KERNEL); 177 if (!cl) 178 return ERR_PTR(-ENOMEM); 179 180 mutex_lock(®istered_clients_lock); 181 182 cl->dev = get_device(dev); 183 184 list_add_tail(&cl->entry, ®istered_clients); 185 186 mutex_unlock(®istered_clients_lock); 187 188 return &cl->conv; 189 } 190 191 static void adi_axi_adc_conv_unregister(struct adi_axi_adc_conv *conv) 192 { 193 struct adi_axi_adc_client *cl = conv_to_client(conv); 194 195 mutex_lock(®istered_clients_lock); 196 197 list_del(&cl->entry); 198 put_device(cl->dev); 199 200 mutex_unlock(®istered_clients_lock); 201 202 kfree(cl); 203 } 204 205 static void devm_adi_axi_adc_conv_release(struct device *dev, void *res) 206 { 207 adi_axi_adc_conv_unregister(*(struct adi_axi_adc_conv **)res); 208 } 209 210 struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev, 211 size_t sizeof_priv) 212 { 213 struct adi_axi_adc_conv **ptr, *conv; 214 215 ptr = devres_alloc(devm_adi_axi_adc_conv_release, sizeof(*ptr), 216 GFP_KERNEL); 217 if (!ptr) 218 return ERR_PTR(-ENOMEM); 219 220 conv = adi_axi_adc_conv_register(dev, sizeof_priv); 221 if (IS_ERR(conv)) { 222 devres_free(ptr); 223 return ERR_CAST(conv); 224 } 225 226 *ptr = conv; 227 devres_add(dev, ptr); 228 229 return conv; 230 } 231 EXPORT_SYMBOL_GPL(devm_adi_axi_adc_conv_register); 232 233 static ssize_t in_voltage_scale_available_show(struct device *dev, 234 struct device_attribute *attr, 235 char *buf) 236 { 237 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 238 struct adi_axi_adc_state *st = iio_priv(indio_dev); 239 struct adi_axi_adc_conv *conv = &st->client->conv; 240 size_t len = 0; 241 int i; 242 243 for (i = 0; i < conv->chip_info->num_scales; i++) { 244 const unsigned int *s = conv->chip_info->scale_table[i]; 245 246 len += scnprintf(buf + len, PAGE_SIZE - len, 247 "%u.%06u ", s[0], s[1]); 248 } 249 buf[len - 1] = '\n'; 250 251 return len; 252 } 253 254 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); 255 256 enum { 257 ADI_AXI_ATTR_SCALE_AVAIL, 258 }; 259 260 #define ADI_AXI_ATTR(_en_, _file_) \ 261 [ADI_AXI_ATTR_##_en_] = &iio_dev_attr_##_file_.dev_attr.attr 262 263 static struct attribute *adi_axi_adc_attributes[] = { 264 ADI_AXI_ATTR(SCALE_AVAIL, in_voltage_scale_available), 265 NULL 266 }; 267 268 static umode_t axi_adc_attr_is_visible(struct kobject *kobj, 269 struct attribute *attr, int n) 270 { 271 struct device *dev = kobj_to_dev(kobj); 272 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 273 struct adi_axi_adc_state *st = iio_priv(indio_dev); 274 struct adi_axi_adc_conv *conv = &st->client->conv; 275 276 switch (n) { 277 case ADI_AXI_ATTR_SCALE_AVAIL: 278 if (!conv->chip_info->num_scales) 279 return 0; 280 return attr->mode; 281 default: 282 return attr->mode; 283 } 284 } 285 286 static const struct attribute_group adi_axi_adc_attribute_group = { 287 .attrs = adi_axi_adc_attributes, 288 .is_visible = axi_adc_attr_is_visible, 289 }; 290 291 static const struct iio_info adi_axi_adc_info = { 292 .read_raw = &adi_axi_adc_read_raw, 293 .write_raw = &adi_axi_adc_write_raw, 294 .attrs = &adi_axi_adc_attribute_group, 295 .update_scan_mode = &adi_axi_adc_update_scan_mode, 296 }; 297 298 static const struct adi_axi_adc_core_info adi_axi_adc_10_0_a_info = { 299 .version = ADI_AXI_PCORE_VER(10, 0, 'a'), 300 }; 301 302 static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev) 303 { 304 const struct adi_axi_adc_core_info *info; 305 struct adi_axi_adc_client *cl; 306 struct device_node *cln; 307 308 info = of_device_get_match_data(dev); 309 if (!info) 310 return ERR_PTR(-ENODEV); 311 312 cln = of_parse_phandle(dev->of_node, "adi,adc-dev", 0); 313 if (!cln) { 314 dev_err(dev, "No 'adi,adc-dev' node defined\n"); 315 return ERR_PTR(-ENODEV); 316 } 317 318 mutex_lock(®istered_clients_lock); 319 320 list_for_each_entry(cl, ®istered_clients, entry) { 321 if (!cl->dev) 322 continue; 323 324 if (cl->dev->of_node != cln) 325 continue; 326 327 if (!try_module_get(cl->dev->driver->owner)) { 328 mutex_unlock(®istered_clients_lock); 329 return ERR_PTR(-ENODEV); 330 } 331 332 get_device(cl->dev); 333 cl->info = info; 334 mutex_unlock(®istered_clients_lock); 335 return cl; 336 } 337 338 mutex_unlock(®istered_clients_lock); 339 340 return ERR_PTR(-EPROBE_DEFER); 341 } 342 343 static int adi_axi_adc_setup_channels(struct device *dev, 344 struct adi_axi_adc_state *st) 345 { 346 struct adi_axi_adc_conv *conv = &st->client->conv; 347 int i, ret; 348 349 if (conv->preenable_setup) { 350 ret = conv->preenable_setup(conv); 351 if (ret) 352 return ret; 353 } 354 355 for (i = 0; i < conv->chip_info->num_channels; i++) { 356 adi_axi_adc_write(st, ADI_AXI_REG_CHAN_CTRL(i), 357 ADI_AXI_REG_CHAN_CTRL_DEFAULTS); 358 } 359 360 return 0; 361 } 362 363 static void axi_adc_reset(struct adi_axi_adc_state *st) 364 { 365 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 0); 366 mdelay(10); 367 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, ADI_AXI_REG_RSTN_MMCM_RSTN); 368 mdelay(10); 369 adi_axi_adc_write(st, ADI_AXI_REG_RSTN, 370 ADI_AXI_REG_RSTN_RSTN | ADI_AXI_REG_RSTN_MMCM_RSTN); 371 } 372 373 static void adi_axi_adc_cleanup(void *data) 374 { 375 struct adi_axi_adc_client *cl = data; 376 377 put_device(cl->dev); 378 module_put(cl->dev->driver->owner); 379 } 380 381 static int adi_axi_adc_probe(struct platform_device *pdev) 382 { 383 struct adi_axi_adc_conv *conv; 384 struct iio_dev *indio_dev; 385 struct adi_axi_adc_client *cl; 386 struct adi_axi_adc_state *st; 387 unsigned int ver; 388 int ret; 389 390 cl = adi_axi_adc_attach_client(&pdev->dev); 391 if (IS_ERR(cl)) 392 return PTR_ERR(cl); 393 394 ret = devm_add_action_or_reset(&pdev->dev, adi_axi_adc_cleanup, cl); 395 if (ret) 396 return ret; 397 398 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); 399 if (indio_dev == NULL) 400 return -ENOMEM; 401 402 st = iio_priv(indio_dev); 403 st->client = cl; 404 cl->state = st; 405 mutex_init(&st->lock); 406 407 st->regs = devm_platform_ioremap_resource(pdev, 0); 408 if (IS_ERR(st->regs)) 409 return PTR_ERR(st->regs); 410 411 conv = &st->client->conv; 412 413 axi_adc_reset(st); 414 415 ver = adi_axi_adc_read(st, ADI_AXI_REG_VERSION); 416 417 if (cl->info->version > ver) { 418 dev_err(&pdev->dev, 419 "IP core version is too old. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n", 420 ADI_AXI_PCORE_VER_MAJOR(cl->info->version), 421 ADI_AXI_PCORE_VER_MINOR(cl->info->version), 422 ADI_AXI_PCORE_VER_PATCH(cl->info->version), 423 ADI_AXI_PCORE_VER_MAJOR(ver), 424 ADI_AXI_PCORE_VER_MINOR(ver), 425 ADI_AXI_PCORE_VER_PATCH(ver)); 426 return -ENODEV; 427 } 428 429 indio_dev->info = &adi_axi_adc_info; 430 indio_dev->name = "adi-axi-adc"; 431 indio_dev->modes = INDIO_DIRECT_MODE; 432 indio_dev->num_channels = conv->chip_info->num_channels; 433 indio_dev->channels = conv->chip_info->channels; 434 435 ret = adi_axi_adc_config_dma_buffer(&pdev->dev, indio_dev); 436 if (ret) 437 return ret; 438 439 ret = adi_axi_adc_setup_channels(&pdev->dev, st); 440 if (ret) 441 return ret; 442 443 ret = devm_iio_device_register(&pdev->dev, indio_dev); 444 if (ret) 445 return ret; 446 447 dev_info(&pdev->dev, "AXI ADC IP core (%d.%.2d.%c) probed\n", 448 ADI_AXI_PCORE_VER_MAJOR(ver), 449 ADI_AXI_PCORE_VER_MINOR(ver), 450 ADI_AXI_PCORE_VER_PATCH(ver)); 451 452 return 0; 453 } 454 455 /* Match table for of_platform binding */ 456 static const struct of_device_id adi_axi_adc_of_match[] = { 457 { .compatible = "adi,axi-adc-10.0.a", .data = &adi_axi_adc_10_0_a_info }, 458 { /* end of list */ } 459 }; 460 MODULE_DEVICE_TABLE(of, adi_axi_adc_of_match); 461 462 static struct platform_driver adi_axi_adc_driver = { 463 .driver = { 464 .name = KBUILD_MODNAME, 465 .of_match_table = adi_axi_adc_of_match, 466 }, 467 .probe = adi_axi_adc_probe, 468 }; 469 module_platform_driver(adi_axi_adc_driver); 470 471 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 472 MODULE_DESCRIPTION("Analog Devices Generic AXI ADC IP core driver"); 473 MODULE_LICENSE("GPL v2"); 474