1 /* 2 * iio/adc/ad799x.c 3 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc. 4 * 5 * based on iio/adc/max1363 6 * Copyright (C) 2008-2010 Jonathan Cameron 7 * 8 * based on linux/drivers/i2c/chips/max123x 9 * Copyright (C) 2002-2004 Stefan Eletzhofer 10 * 11 * based on linux/drivers/acron/char/pcf8583.c 12 * Copyright (C) 2000 Russell King 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 * 18 * ad799x.c 19 * 20 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997, 21 * ad7998 and similar chips. 22 * 23 */ 24 25 #include <linux/interrupt.h> 26 #include <linux/device.h> 27 #include <linux/kernel.h> 28 #include <linux/sysfs.h> 29 #include <linux/i2c.h> 30 #include <linux/regulator/consumer.h> 31 #include <linux/slab.h> 32 #include <linux/types.h> 33 #include <linux/err.h> 34 #include <linux/module.h> 35 36 #include <linux/iio/iio.h> 37 #include <linux/iio/sysfs.h> 38 #include <linux/iio/events.h> 39 #include <linux/iio/buffer.h> 40 #include <linux/iio/trigger_consumer.h> 41 #include <linux/iio/triggered_buffer.h> 42 43 #define AD799X_CHANNEL_SHIFT 4 44 #define AD799X_STORAGEBITS 16 45 /* 46 * AD7991, AD7995 and AD7999 defines 47 */ 48 49 #define AD7991_REF_SEL 0x08 50 #define AD7991_FLTR 0x04 51 #define AD7991_BIT_TRIAL_DELAY 0x02 52 #define AD7991_SAMPLE_DELAY 0x01 53 54 /* 55 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines 56 */ 57 58 #define AD7998_FLTR 0x08 59 #define AD7998_ALERT_EN 0x04 60 #define AD7998_BUSY_ALERT 0x02 61 #define AD7998_BUSY_ALERT_POL 0x01 62 63 #define AD7998_CONV_RES_REG 0x0 64 #define AD7998_ALERT_STAT_REG 0x1 65 #define AD7998_CONF_REG 0x2 66 #define AD7998_CYCLE_TMR_REG 0x3 67 68 #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4) 69 #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5) 70 #define AD7998_HYST_REG(x) ((x) * 3 + 0x6) 71 72 #define AD7998_CYC_MASK 0x7 73 #define AD7998_CYC_DIS 0x0 74 #define AD7998_CYC_TCONF_32 0x1 75 #define AD7998_CYC_TCONF_64 0x2 76 #define AD7998_CYC_TCONF_128 0x3 77 #define AD7998_CYC_TCONF_256 0x4 78 #define AD7998_CYC_TCONF_512 0x5 79 #define AD7998_CYC_TCONF_1024 0x6 80 #define AD7998_CYC_TCONF_2048 0x7 81 82 #define AD7998_ALERT_STAT_CLEAR 0xFF 83 84 /* 85 * AD7997 and AD7997 defines 86 */ 87 88 #define AD7997_8_READ_SINGLE 0x80 89 #define AD7997_8_READ_SEQUENCE 0x70 90 /* TODO: move this into a common header */ 91 #define RES_MASK(bits) ((1 << (bits)) - 1) 92 93 enum { 94 ad7991, 95 ad7995, 96 ad7999, 97 ad7992, 98 ad7993, 99 ad7994, 100 ad7997, 101 ad7998 102 }; 103 104 /** 105 * struct ad799x_chip_info - chip specific information 106 * @channel: channel specification 107 * @num_channels: number of channels 108 * @monitor_mode: whether the chip supports monitor interrupts 109 * @default_config: device default configuration 110 * @event_attrs: pointer to the monitor event attribute group 111 */ 112 struct ad799x_chip_info { 113 struct iio_chan_spec channel[9]; 114 int num_channels; 115 u16 default_config; 116 const struct iio_info *info; 117 }; 118 119 struct ad799x_state { 120 struct i2c_client *client; 121 const struct ad799x_chip_info *chip_info; 122 struct regulator *reg; 123 struct regulator *vref; 124 unsigned id; 125 u16 config; 126 127 u8 *rx_buf; 128 unsigned int transfer_size; 129 }; 130 131 /** 132 * ad799x_trigger_handler() bh of trigger launched polling to ring buffer 133 * 134 * Currently there is no option in this driver to disable the saving of 135 * timestamps within the ring. 136 **/ 137 static irqreturn_t ad799x_trigger_handler(int irq, void *p) 138 { 139 struct iio_poll_func *pf = p; 140 struct iio_dev *indio_dev = pf->indio_dev; 141 struct ad799x_state *st = iio_priv(indio_dev); 142 int b_sent; 143 u8 cmd; 144 145 switch (st->id) { 146 case ad7991: 147 case ad7995: 148 case ad7999: 149 cmd = st->config | 150 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT); 151 break; 152 case ad7992: 153 case ad7993: 154 case ad7994: 155 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) | 156 AD7998_CONV_RES_REG; 157 break; 158 case ad7997: 159 case ad7998: 160 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG; 161 break; 162 default: 163 cmd = 0; 164 } 165 166 b_sent = i2c_smbus_read_i2c_block_data(st->client, 167 cmd, st->transfer_size, st->rx_buf); 168 if (b_sent < 0) 169 goto out; 170 171 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, 172 iio_get_time_ns()); 173 out: 174 iio_trigger_notify_done(indio_dev->trig); 175 176 return IRQ_HANDLED; 177 } 178 179 /* 180 * ad799x register access by I2C 181 */ 182 static int ad799x_i2c_read16(struct ad799x_state *st, u8 reg, u16 *data) 183 { 184 struct i2c_client *client = st->client; 185 int ret = 0; 186 187 ret = i2c_smbus_read_word_swapped(client, reg); 188 if (ret < 0) { 189 dev_err(&client->dev, "I2C read error\n"); 190 return ret; 191 } 192 193 *data = (u16)ret; 194 195 return 0; 196 } 197 198 static int ad799x_i2c_read8(struct ad799x_state *st, u8 reg, u8 *data) 199 { 200 struct i2c_client *client = st->client; 201 int ret = 0; 202 203 ret = i2c_smbus_read_byte_data(client, reg); 204 if (ret < 0) { 205 dev_err(&client->dev, "I2C read error\n"); 206 return ret; 207 } 208 209 *data = (u8)ret; 210 211 return 0; 212 } 213 214 static int ad799x_i2c_write16(struct ad799x_state *st, u8 reg, u16 data) 215 { 216 struct i2c_client *client = st->client; 217 int ret = 0; 218 219 ret = i2c_smbus_write_word_swapped(client, reg, data); 220 if (ret < 0) 221 dev_err(&client->dev, "I2C write error\n"); 222 223 return ret; 224 } 225 226 static int ad799x_i2c_write8(struct ad799x_state *st, u8 reg, u8 data) 227 { 228 struct i2c_client *client = st->client; 229 int ret = 0; 230 231 ret = i2c_smbus_write_byte_data(client, reg, data); 232 if (ret < 0) 233 dev_err(&client->dev, "I2C write error\n"); 234 235 return ret; 236 } 237 238 static int ad7997_8_update_scan_mode(struct iio_dev *indio_dev, 239 const unsigned long *scan_mask) 240 { 241 struct ad799x_state *st = iio_priv(indio_dev); 242 243 kfree(st->rx_buf); 244 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL); 245 if (!st->rx_buf) 246 return -ENOMEM; 247 248 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2; 249 250 switch (st->id) { 251 case ad7997: 252 case ad7998: 253 return ad799x_i2c_write16(st, AD7998_CONF_REG, 254 st->config | (*scan_mask << AD799X_CHANNEL_SHIFT)); 255 default: 256 break; 257 } 258 259 return 0; 260 } 261 262 static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch) 263 { 264 u16 rxbuf; 265 u8 cmd; 266 int ret; 267 268 switch (st->id) { 269 case ad7991: 270 case ad7995: 271 case ad7999: 272 cmd = st->config | ((1 << ch) << AD799X_CHANNEL_SHIFT); 273 break; 274 case ad7992: 275 case ad7993: 276 case ad7994: 277 cmd = (1 << ch) << AD799X_CHANNEL_SHIFT; 278 break; 279 case ad7997: 280 case ad7998: 281 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE; 282 break; 283 default: 284 return -EINVAL; 285 } 286 287 ret = ad799x_i2c_read16(st, cmd, &rxbuf); 288 if (ret < 0) 289 return ret; 290 291 return rxbuf; 292 } 293 294 static int ad799x_read_raw(struct iio_dev *indio_dev, 295 struct iio_chan_spec const *chan, 296 int *val, 297 int *val2, 298 long m) 299 { 300 int ret; 301 struct ad799x_state *st = iio_priv(indio_dev); 302 303 switch (m) { 304 case IIO_CHAN_INFO_RAW: 305 mutex_lock(&indio_dev->mlock); 306 if (iio_buffer_enabled(indio_dev)) 307 ret = -EBUSY; 308 else 309 ret = ad799x_scan_direct(st, chan->scan_index); 310 mutex_unlock(&indio_dev->mlock); 311 312 if (ret < 0) 313 return ret; 314 *val = (ret >> chan->scan_type.shift) & 315 RES_MASK(chan->scan_type.realbits); 316 return IIO_VAL_INT; 317 case IIO_CHAN_INFO_SCALE: 318 ret = regulator_get_voltage(st->vref); 319 if (ret < 0) 320 return ret; 321 *val = ret / 1000; 322 *val2 = chan->scan_type.realbits; 323 return IIO_VAL_FRACTIONAL_LOG2; 324 } 325 return -EINVAL; 326 } 327 static const unsigned int ad7998_frequencies[] = { 328 [AD7998_CYC_DIS] = 0, 329 [AD7998_CYC_TCONF_32] = 15625, 330 [AD7998_CYC_TCONF_64] = 7812, 331 [AD7998_CYC_TCONF_128] = 3906, 332 [AD7998_CYC_TCONF_512] = 976, 333 [AD7998_CYC_TCONF_1024] = 488, 334 [AD7998_CYC_TCONF_2048] = 244, 335 }; 336 static ssize_t ad799x_read_frequency(struct device *dev, 337 struct device_attribute *attr, 338 char *buf) 339 { 340 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 341 struct ad799x_state *st = iio_priv(indio_dev); 342 343 int ret; 344 u8 val; 345 ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &val); 346 if (ret) 347 return ret; 348 349 val &= AD7998_CYC_MASK; 350 351 return sprintf(buf, "%u\n", ad7998_frequencies[val]); 352 } 353 354 static ssize_t ad799x_write_frequency(struct device *dev, 355 struct device_attribute *attr, 356 const char *buf, 357 size_t len) 358 { 359 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 360 struct ad799x_state *st = iio_priv(indio_dev); 361 362 long val; 363 int ret, i; 364 u8 t; 365 366 ret = kstrtol(buf, 10, &val); 367 if (ret) 368 return ret; 369 370 mutex_lock(&indio_dev->mlock); 371 ret = ad799x_i2c_read8(st, AD7998_CYCLE_TMR_REG, &t); 372 if (ret) 373 goto error_ret_mutex; 374 /* Wipe the bits clean */ 375 t &= ~AD7998_CYC_MASK; 376 377 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++) 378 if (val == ad7998_frequencies[i]) 379 break; 380 if (i == ARRAY_SIZE(ad7998_frequencies)) { 381 ret = -EINVAL; 382 goto error_ret_mutex; 383 } 384 t |= i; 385 ret = ad799x_i2c_write8(st, AD7998_CYCLE_TMR_REG, t); 386 387 error_ret_mutex: 388 mutex_unlock(&indio_dev->mlock); 389 390 return ret ? ret : len; 391 } 392 393 static int ad799x_read_event_config(struct iio_dev *indio_dev, 394 const struct iio_chan_spec *chan, 395 enum iio_event_type type, 396 enum iio_event_direction dir) 397 { 398 return 1; 399 } 400 401 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan, 402 enum iio_event_direction dir, 403 enum iio_event_info info) 404 { 405 switch (info) { 406 case IIO_EV_INFO_VALUE: 407 if (dir == IIO_EV_DIR_FALLING) 408 return AD7998_DATALOW_REG(chan->channel); 409 else 410 return AD7998_DATAHIGH_REG(chan->channel); 411 case IIO_EV_INFO_HYSTERESIS: 412 return AD7998_HYST_REG(chan->channel); 413 default: 414 return -EINVAL; 415 } 416 417 return 0; 418 } 419 420 static int ad799x_write_event_value(struct iio_dev *indio_dev, 421 const struct iio_chan_spec *chan, 422 enum iio_event_type type, 423 enum iio_event_direction dir, 424 enum iio_event_info info, 425 int val, int val2) 426 { 427 int ret; 428 struct ad799x_state *st = iio_priv(indio_dev); 429 430 mutex_lock(&indio_dev->mlock); 431 ret = ad799x_i2c_write16(st, ad799x_threshold_reg(chan, dir, info), 432 val); 433 mutex_unlock(&indio_dev->mlock); 434 435 return ret; 436 } 437 438 static int ad799x_read_event_value(struct iio_dev *indio_dev, 439 const struct iio_chan_spec *chan, 440 enum iio_event_type type, 441 enum iio_event_direction dir, 442 enum iio_event_info info, 443 int *val, int *val2) 444 { 445 int ret; 446 struct ad799x_state *st = iio_priv(indio_dev); 447 u16 valin; 448 449 mutex_lock(&indio_dev->mlock); 450 ret = ad799x_i2c_read16(st, ad799x_threshold_reg(chan, dir, info), 451 &valin); 452 mutex_unlock(&indio_dev->mlock); 453 if (ret < 0) 454 return ret; 455 *val = valin; 456 457 return IIO_VAL_INT; 458 } 459 460 static irqreturn_t ad799x_event_handler(int irq, void *private) 461 { 462 struct iio_dev *indio_dev = private; 463 struct ad799x_state *st = iio_priv(private); 464 u8 status; 465 int i, ret; 466 467 ret = ad799x_i2c_read8(st, AD7998_ALERT_STAT_REG, &status); 468 if (ret) 469 goto done; 470 471 if (!status) 472 goto done; 473 474 ad799x_i2c_write8(st, AD7998_ALERT_STAT_REG, AD7998_ALERT_STAT_CLEAR); 475 476 for (i = 0; i < 8; i++) { 477 if (status & (1 << i)) 478 iio_push_event(indio_dev, 479 i & 0x1 ? 480 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 481 (i >> 1), 482 IIO_EV_TYPE_THRESH, 483 IIO_EV_DIR_RISING) : 484 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 485 (i >> 1), 486 IIO_EV_TYPE_THRESH, 487 IIO_EV_DIR_FALLING), 488 iio_get_time_ns()); 489 } 490 491 done: 492 return IRQ_HANDLED; 493 } 494 495 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 496 ad799x_read_frequency, 497 ad799x_write_frequency); 498 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0"); 499 500 static struct attribute *ad799x_event_attributes[] = { 501 &iio_dev_attr_sampling_frequency.dev_attr.attr, 502 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 503 NULL, 504 }; 505 506 static struct attribute_group ad799x_event_attrs_group = { 507 .attrs = ad799x_event_attributes, 508 .name = "events", 509 }; 510 511 static const struct iio_info ad7991_info = { 512 .read_raw = &ad799x_read_raw, 513 .driver_module = THIS_MODULE, 514 }; 515 516 static const struct iio_info ad7993_4_7_8_info = { 517 .read_raw = &ad799x_read_raw, 518 .event_attrs = &ad799x_event_attrs_group, 519 .read_event_config = &ad799x_read_event_config, 520 .read_event_value = &ad799x_read_event_value, 521 .write_event_value = &ad799x_write_event_value, 522 .driver_module = THIS_MODULE, 523 .update_scan_mode = ad7997_8_update_scan_mode, 524 }; 525 526 static const struct iio_event_spec ad799x_events[] = { 527 { 528 .type = IIO_EV_TYPE_THRESH, 529 .dir = IIO_EV_DIR_RISING, 530 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 531 BIT(IIO_EV_INFO_ENABLE), 532 }, { 533 .type = IIO_EV_TYPE_THRESH, 534 .dir = IIO_EV_DIR_FALLING, 535 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 536 BIT(IIO_EV_INFO_ENABLE), 537 }, { 538 .type = IIO_EV_TYPE_THRESH, 539 .dir = IIO_EV_DIR_EITHER, 540 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS), 541 }, 542 }; 543 544 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \ 545 .type = IIO_VOLTAGE, \ 546 .indexed = 1, \ 547 .channel = (_index), \ 548 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 549 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 550 .scan_index = (_index), \ 551 .scan_type = { \ 552 .sign = 'u', \ 553 .realbits = (_realbits), \ 554 .storagebits = 16, \ 555 .shift = 12 - (_realbits), \ 556 .endianness = IIO_BE, \ 557 }, \ 558 .event_spec = _ev_spec, \ 559 .num_event_specs = _num_ev_spec, \ 560 } 561 562 #define AD799X_CHANNEL(_index, _realbits) \ 563 _AD799X_CHANNEL(_index, _realbits, NULL, 0) 564 565 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \ 566 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \ 567 ARRAY_SIZE(ad799x_events)) 568 569 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = { 570 [ad7991] = { 571 .channel = { 572 AD799X_CHANNEL(0, 12), 573 AD799X_CHANNEL(1, 12), 574 AD799X_CHANNEL(2, 12), 575 AD799X_CHANNEL(3, 12), 576 IIO_CHAN_SOFT_TIMESTAMP(4), 577 }, 578 .num_channels = 5, 579 .info = &ad7991_info, 580 }, 581 [ad7995] = { 582 .channel = { 583 AD799X_CHANNEL(0, 10), 584 AD799X_CHANNEL(1, 10), 585 AD799X_CHANNEL(2, 10), 586 AD799X_CHANNEL(3, 10), 587 IIO_CHAN_SOFT_TIMESTAMP(4), 588 }, 589 .num_channels = 5, 590 .info = &ad7991_info, 591 }, 592 [ad7999] = { 593 .channel = { 594 AD799X_CHANNEL(0, 8), 595 AD799X_CHANNEL(1, 8), 596 AD799X_CHANNEL(2, 8), 597 AD799X_CHANNEL(3, 8), 598 IIO_CHAN_SOFT_TIMESTAMP(4), 599 }, 600 .num_channels = 5, 601 .info = &ad7991_info, 602 }, 603 [ad7992] = { 604 .channel = { 605 AD799X_CHANNEL_WITH_EVENTS(0, 12), 606 AD799X_CHANNEL_WITH_EVENTS(1, 12), 607 IIO_CHAN_SOFT_TIMESTAMP(3), 608 }, 609 .num_channels = 3, 610 .default_config = AD7998_ALERT_EN, 611 .info = &ad7993_4_7_8_info, 612 }, 613 [ad7993] = { 614 .channel = { 615 AD799X_CHANNEL_WITH_EVENTS(0, 10), 616 AD799X_CHANNEL_WITH_EVENTS(1, 10), 617 AD799X_CHANNEL_WITH_EVENTS(2, 10), 618 AD799X_CHANNEL_WITH_EVENTS(3, 10), 619 IIO_CHAN_SOFT_TIMESTAMP(4), 620 }, 621 .num_channels = 5, 622 .default_config = AD7998_ALERT_EN, 623 .info = &ad7993_4_7_8_info, 624 }, 625 [ad7994] = { 626 .channel = { 627 AD799X_CHANNEL_WITH_EVENTS(0, 12), 628 AD799X_CHANNEL_WITH_EVENTS(1, 12), 629 AD799X_CHANNEL_WITH_EVENTS(2, 12), 630 AD799X_CHANNEL_WITH_EVENTS(3, 12), 631 IIO_CHAN_SOFT_TIMESTAMP(4), 632 }, 633 .num_channels = 5, 634 .default_config = AD7998_ALERT_EN, 635 .info = &ad7993_4_7_8_info, 636 }, 637 [ad7997] = { 638 .channel = { 639 AD799X_CHANNEL_WITH_EVENTS(0, 10), 640 AD799X_CHANNEL_WITH_EVENTS(1, 10), 641 AD799X_CHANNEL_WITH_EVENTS(2, 10), 642 AD799X_CHANNEL_WITH_EVENTS(3, 10), 643 AD799X_CHANNEL(4, 10), 644 AD799X_CHANNEL(5, 10), 645 AD799X_CHANNEL(6, 10), 646 AD799X_CHANNEL(7, 10), 647 IIO_CHAN_SOFT_TIMESTAMP(8), 648 }, 649 .num_channels = 9, 650 .default_config = AD7998_ALERT_EN, 651 .info = &ad7993_4_7_8_info, 652 }, 653 [ad7998] = { 654 .channel = { 655 AD799X_CHANNEL_WITH_EVENTS(0, 12), 656 AD799X_CHANNEL_WITH_EVENTS(1, 12), 657 AD799X_CHANNEL_WITH_EVENTS(2, 12), 658 AD799X_CHANNEL_WITH_EVENTS(3, 12), 659 AD799X_CHANNEL(4, 12), 660 AD799X_CHANNEL(5, 12), 661 AD799X_CHANNEL(6, 12), 662 AD799X_CHANNEL(7, 12), 663 IIO_CHAN_SOFT_TIMESTAMP(8), 664 }, 665 .num_channels = 9, 666 .default_config = AD7998_ALERT_EN, 667 .info = &ad7993_4_7_8_info, 668 }, 669 }; 670 671 static int ad799x_probe(struct i2c_client *client, 672 const struct i2c_device_id *id) 673 { 674 int ret; 675 struct ad799x_state *st; 676 struct iio_dev *indio_dev; 677 678 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); 679 if (indio_dev == NULL) 680 return -ENOMEM; 681 682 st = iio_priv(indio_dev); 683 /* this is only used for device removal purposes */ 684 i2c_set_clientdata(client, indio_dev); 685 686 st->id = id->driver_data; 687 st->chip_info = &ad799x_chip_info_tbl[st->id]; 688 st->config = st->chip_info->default_config; 689 690 /* TODO: Add pdata options for filtering and bit delay */ 691 692 st->reg = devm_regulator_get(&client->dev, "vcc"); 693 if (IS_ERR(st->reg)) 694 return PTR_ERR(st->reg); 695 ret = regulator_enable(st->reg); 696 if (ret) 697 return ret; 698 st->vref = devm_regulator_get(&client->dev, "vref"); 699 if (IS_ERR(st->vref)) { 700 ret = PTR_ERR(st->vref); 701 goto error_disable_reg; 702 } 703 ret = regulator_enable(st->vref); 704 if (ret) 705 goto error_disable_reg; 706 707 st->client = client; 708 709 indio_dev->dev.parent = &client->dev; 710 indio_dev->name = id->name; 711 indio_dev->info = st->chip_info->info; 712 713 indio_dev->modes = INDIO_DIRECT_MODE; 714 indio_dev->channels = st->chip_info->channel; 715 indio_dev->num_channels = st->chip_info->num_channels; 716 717 ret = iio_triggered_buffer_setup(indio_dev, NULL, 718 &ad799x_trigger_handler, NULL); 719 if (ret) 720 goto error_disable_vref; 721 722 if (client->irq > 0) { 723 ret = devm_request_threaded_irq(&client->dev, 724 client->irq, 725 NULL, 726 ad799x_event_handler, 727 IRQF_TRIGGER_FALLING | 728 IRQF_ONESHOT, 729 client->name, 730 indio_dev); 731 if (ret) 732 goto error_cleanup_ring; 733 } 734 ret = iio_device_register(indio_dev); 735 if (ret) 736 goto error_cleanup_ring; 737 738 return 0; 739 740 error_cleanup_ring: 741 iio_triggered_buffer_cleanup(indio_dev); 742 error_disable_vref: 743 regulator_disable(st->vref); 744 error_disable_reg: 745 regulator_disable(st->reg); 746 747 return ret; 748 } 749 750 static int ad799x_remove(struct i2c_client *client) 751 { 752 struct iio_dev *indio_dev = i2c_get_clientdata(client); 753 struct ad799x_state *st = iio_priv(indio_dev); 754 755 iio_device_unregister(indio_dev); 756 757 iio_triggered_buffer_cleanup(indio_dev); 758 regulator_disable(st->vref); 759 regulator_disable(st->reg); 760 kfree(st->rx_buf); 761 762 return 0; 763 } 764 765 static const struct i2c_device_id ad799x_id[] = { 766 { "ad7991", ad7991 }, 767 { "ad7995", ad7995 }, 768 { "ad7999", ad7999 }, 769 { "ad7992", ad7992 }, 770 { "ad7993", ad7993 }, 771 { "ad7994", ad7994 }, 772 { "ad7997", ad7997 }, 773 { "ad7998", ad7998 }, 774 {} 775 }; 776 777 MODULE_DEVICE_TABLE(i2c, ad799x_id); 778 779 static struct i2c_driver ad799x_driver = { 780 .driver = { 781 .name = "ad799x", 782 }, 783 .probe = ad799x_probe, 784 .remove = ad799x_remove, 785 .id_table = ad799x_id, 786 }; 787 module_i2c_driver(ad799x_driver); 788 789 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 790 MODULE_DESCRIPTION("Analog Devices AD799x ADC"); 791 MODULE_LICENSE("GPL v2"); 792