1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * iio/adc/ad799x.c 4 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc. 5 * 6 * based on iio/adc/max1363 7 * Copyright (C) 2008-2010 Jonathan Cameron 8 * 9 * based on linux/drivers/i2c/chips/max123x 10 * Copyright (C) 2002-2004 Stefan Eletzhofer 11 * 12 * based on linux/drivers/acron/char/pcf8583.c 13 * Copyright (C) 2000 Russell King 14 * 15 * ad799x.c 16 * 17 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997, 18 * ad7998 and similar chips. 19 */ 20 21 #include <linux/interrupt.h> 22 #include <linux/device.h> 23 #include <linux/kernel.h> 24 #include <linux/sysfs.h> 25 #include <linux/i2c.h> 26 #include <linux/regulator/consumer.h> 27 #include <linux/slab.h> 28 #include <linux/types.h> 29 #include <linux/err.h> 30 #include <linux/module.h> 31 #include <linux/bitops.h> 32 33 #include <linux/iio/iio.h> 34 #include <linux/iio/sysfs.h> 35 #include <linux/iio/events.h> 36 #include <linux/iio/buffer.h> 37 #include <linux/iio/trigger_consumer.h> 38 #include <linux/iio/triggered_buffer.h> 39 40 #define AD799X_CHANNEL_SHIFT 4 41 42 /* 43 * AD7991, AD7995 and AD7999 defines 44 */ 45 46 #define AD7991_REF_SEL 0x08 47 #define AD7991_FLTR 0x04 48 #define AD7991_BIT_TRIAL_DELAY 0x02 49 #define AD7991_SAMPLE_DELAY 0x01 50 51 /* 52 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines 53 */ 54 55 #define AD7998_FLTR BIT(3) 56 #define AD7998_ALERT_EN BIT(2) 57 #define AD7998_BUSY_ALERT BIT(1) 58 #define AD7998_BUSY_ALERT_POL BIT(0) 59 60 #define AD7998_CONV_RES_REG 0x0 61 #define AD7998_ALERT_STAT_REG 0x1 62 #define AD7998_CONF_REG 0x2 63 #define AD7998_CYCLE_TMR_REG 0x3 64 65 #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4) 66 #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5) 67 #define AD7998_HYST_REG(x) ((x) * 3 + 0x6) 68 69 #define AD7998_CYC_MASK GENMASK(2, 0) 70 #define AD7998_CYC_DIS 0x0 71 #define AD7998_CYC_TCONF_32 0x1 72 #define AD7998_CYC_TCONF_64 0x2 73 #define AD7998_CYC_TCONF_128 0x3 74 #define AD7998_CYC_TCONF_256 0x4 75 #define AD7998_CYC_TCONF_512 0x5 76 #define AD7998_CYC_TCONF_1024 0x6 77 #define AD7998_CYC_TCONF_2048 0x7 78 79 #define AD7998_ALERT_STAT_CLEAR 0xFF 80 81 /* 82 * AD7997 and AD7997 defines 83 */ 84 85 #define AD7997_8_READ_SINGLE BIT(7) 86 #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4)) 87 88 enum { 89 ad7991, 90 ad7995, 91 ad7999, 92 ad7992, 93 ad7993, 94 ad7994, 95 ad7997, 96 ad7998 97 }; 98 99 /** 100 * struct ad799x_chip_config - chip specific information 101 * @channel: channel specification 102 * @default_config: device default configuration 103 * @info: pointer to iio_info struct 104 */ 105 struct ad799x_chip_config { 106 const struct iio_chan_spec channel[9]; 107 u16 default_config; 108 const struct iio_info *info; 109 }; 110 111 /** 112 * struct ad799x_chip_info - chip specific information 113 * @num_channels: number of channels 114 * @noirq_config: device configuration w/o IRQ 115 * @irq_config: device configuration w/IRQ 116 */ 117 struct ad799x_chip_info { 118 int num_channels; 119 const struct ad799x_chip_config noirq_config; 120 const struct ad799x_chip_config irq_config; 121 }; 122 123 struct ad799x_state { 124 struct i2c_client *client; 125 const struct ad799x_chip_config *chip_config; 126 struct regulator *reg; 127 struct regulator *vref; 128 unsigned id; 129 u16 config; 130 131 u8 *rx_buf; 132 unsigned int transfer_size; 133 }; 134 135 static int ad799x_write_config(struct ad799x_state *st, u16 val) 136 { 137 switch (st->id) { 138 case ad7997: 139 case ad7998: 140 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG, 141 val); 142 case ad7992: 143 case ad7993: 144 case ad7994: 145 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG, 146 val); 147 default: 148 /* Will be written when doing a conversion */ 149 st->config = val; 150 return 0; 151 } 152 } 153 154 static int ad799x_read_config(struct ad799x_state *st) 155 { 156 switch (st->id) { 157 case ad7997: 158 case ad7998: 159 return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG); 160 case ad7992: 161 case ad7993: 162 case ad7994: 163 return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG); 164 default: 165 /* No readback support */ 166 return st->config; 167 } 168 } 169 170 static int ad799x_update_config(struct ad799x_state *st, u16 config) 171 { 172 int ret; 173 174 ret = ad799x_write_config(st, config); 175 if (ret < 0) 176 return ret; 177 ret = ad799x_read_config(st); 178 if (ret < 0) 179 return ret; 180 st->config = ret; 181 182 return 0; 183 } 184 185 /** 186 * ad799x_trigger_handler() bh of trigger launched polling to ring buffer 187 * 188 * Currently there is no option in this driver to disable the saving of 189 * timestamps within the ring. 190 **/ 191 static irqreturn_t ad799x_trigger_handler(int irq, void *p) 192 { 193 struct iio_poll_func *pf = p; 194 struct iio_dev *indio_dev = pf->indio_dev; 195 struct ad799x_state *st = iio_priv(indio_dev); 196 int b_sent; 197 u8 cmd; 198 199 switch (st->id) { 200 case ad7991: 201 case ad7995: 202 case ad7999: 203 cmd = st->config | 204 (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT); 205 break; 206 case ad7992: 207 case ad7993: 208 case ad7994: 209 cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) | 210 AD7998_CONV_RES_REG; 211 break; 212 case ad7997: 213 case ad7998: 214 cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG; 215 break; 216 default: 217 cmd = 0; 218 } 219 220 b_sent = i2c_smbus_read_i2c_block_data(st->client, 221 cmd, st->transfer_size, st->rx_buf); 222 if (b_sent < 0) 223 goto out; 224 225 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, 226 iio_get_time_ns(indio_dev)); 227 out: 228 iio_trigger_notify_done(indio_dev->trig); 229 230 return IRQ_HANDLED; 231 } 232 233 static int ad799x_update_scan_mode(struct iio_dev *indio_dev, 234 const unsigned long *scan_mask) 235 { 236 struct ad799x_state *st = iio_priv(indio_dev); 237 238 kfree(st->rx_buf); 239 st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL); 240 if (!st->rx_buf) 241 return -ENOMEM; 242 243 st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2; 244 245 switch (st->id) { 246 case ad7992: 247 case ad7993: 248 case ad7994: 249 case ad7997: 250 case ad7998: 251 st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT); 252 st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT); 253 return ad799x_write_config(st, st->config); 254 default: 255 return 0; 256 } 257 } 258 259 static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch) 260 { 261 u8 cmd; 262 263 switch (st->id) { 264 case ad7991: 265 case ad7995: 266 case ad7999: 267 cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT); 268 break; 269 case ad7992: 270 case ad7993: 271 case ad7994: 272 cmd = BIT(ch) << AD799X_CHANNEL_SHIFT; 273 break; 274 case ad7997: 275 case ad7998: 276 cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE; 277 break; 278 default: 279 return -EINVAL; 280 } 281 282 return i2c_smbus_read_word_swapped(st->client, cmd); 283 } 284 285 static int ad799x_read_raw(struct iio_dev *indio_dev, 286 struct iio_chan_spec const *chan, 287 int *val, 288 int *val2, 289 long m) 290 { 291 int ret; 292 struct ad799x_state *st = iio_priv(indio_dev); 293 294 switch (m) { 295 case IIO_CHAN_INFO_RAW: 296 ret = iio_device_claim_direct_mode(indio_dev); 297 if (ret) 298 return ret; 299 ret = ad799x_scan_direct(st, chan->scan_index); 300 iio_device_release_direct_mode(indio_dev); 301 302 if (ret < 0) 303 return ret; 304 *val = (ret >> chan->scan_type.shift) & 305 GENMASK(chan->scan_type.realbits - 1, 0); 306 return IIO_VAL_INT; 307 case IIO_CHAN_INFO_SCALE: 308 ret = regulator_get_voltage(st->vref); 309 if (ret < 0) 310 return ret; 311 *val = ret / 1000; 312 *val2 = chan->scan_type.realbits; 313 return IIO_VAL_FRACTIONAL_LOG2; 314 } 315 return -EINVAL; 316 } 317 static const unsigned int ad7998_frequencies[] = { 318 [AD7998_CYC_DIS] = 0, 319 [AD7998_CYC_TCONF_32] = 15625, 320 [AD7998_CYC_TCONF_64] = 7812, 321 [AD7998_CYC_TCONF_128] = 3906, 322 [AD7998_CYC_TCONF_512] = 976, 323 [AD7998_CYC_TCONF_1024] = 488, 324 [AD7998_CYC_TCONF_2048] = 244, 325 }; 326 327 static ssize_t ad799x_read_frequency(struct device *dev, 328 struct device_attribute *attr, 329 char *buf) 330 { 331 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 332 struct ad799x_state *st = iio_priv(indio_dev); 333 334 int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG); 335 if (ret < 0) 336 return ret; 337 338 return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]); 339 } 340 341 static ssize_t ad799x_write_frequency(struct device *dev, 342 struct device_attribute *attr, 343 const char *buf, 344 size_t len) 345 { 346 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 347 struct ad799x_state *st = iio_priv(indio_dev); 348 349 long val; 350 int ret, i; 351 352 ret = kstrtol(buf, 10, &val); 353 if (ret) 354 return ret; 355 356 mutex_lock(&indio_dev->mlock); 357 ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG); 358 if (ret < 0) 359 goto error_ret_mutex; 360 /* Wipe the bits clean */ 361 ret &= ~AD7998_CYC_MASK; 362 363 for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++) 364 if (val == ad7998_frequencies[i]) 365 break; 366 if (i == ARRAY_SIZE(ad7998_frequencies)) { 367 ret = -EINVAL; 368 goto error_ret_mutex; 369 } 370 371 ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG, 372 ret | i); 373 if (ret < 0) 374 goto error_ret_mutex; 375 ret = len; 376 377 error_ret_mutex: 378 mutex_unlock(&indio_dev->mlock); 379 380 return ret; 381 } 382 383 static int ad799x_read_event_config(struct iio_dev *indio_dev, 384 const struct iio_chan_spec *chan, 385 enum iio_event_type type, 386 enum iio_event_direction dir) 387 { 388 struct ad799x_state *st = iio_priv(indio_dev); 389 390 if (!(st->config & AD7998_ALERT_EN)) 391 return 0; 392 393 if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index)) 394 return 1; 395 396 return 0; 397 } 398 399 static int ad799x_write_event_config(struct iio_dev *indio_dev, 400 const struct iio_chan_spec *chan, 401 enum iio_event_type type, 402 enum iio_event_direction dir, 403 int state) 404 { 405 struct ad799x_state *st = iio_priv(indio_dev); 406 int ret; 407 408 ret = iio_device_claim_direct_mode(indio_dev); 409 if (ret) 410 return ret; 411 412 if (state) 413 st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT; 414 else 415 st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT); 416 417 if (st->config >> AD799X_CHANNEL_SHIFT) 418 st->config |= AD7998_ALERT_EN; 419 else 420 st->config &= ~AD7998_ALERT_EN; 421 422 ret = ad799x_write_config(st, st->config); 423 iio_device_release_direct_mode(indio_dev); 424 return ret; 425 } 426 427 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan, 428 enum iio_event_direction dir, 429 enum iio_event_info info) 430 { 431 switch (info) { 432 case IIO_EV_INFO_VALUE: 433 if (dir == IIO_EV_DIR_FALLING) 434 return AD7998_DATALOW_REG(chan->channel); 435 else 436 return AD7998_DATAHIGH_REG(chan->channel); 437 case IIO_EV_INFO_HYSTERESIS: 438 return AD7998_HYST_REG(chan->channel); 439 default: 440 return -EINVAL; 441 } 442 443 return 0; 444 } 445 446 static int ad799x_write_event_value(struct iio_dev *indio_dev, 447 const struct iio_chan_spec *chan, 448 enum iio_event_type type, 449 enum iio_event_direction dir, 450 enum iio_event_info info, 451 int val, int val2) 452 { 453 int ret; 454 struct ad799x_state *st = iio_priv(indio_dev); 455 456 if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0)) 457 return -EINVAL; 458 459 mutex_lock(&indio_dev->mlock); 460 ret = i2c_smbus_write_word_swapped(st->client, 461 ad799x_threshold_reg(chan, dir, info), 462 val << chan->scan_type.shift); 463 mutex_unlock(&indio_dev->mlock); 464 465 return ret; 466 } 467 468 static int ad799x_read_event_value(struct iio_dev *indio_dev, 469 const struct iio_chan_spec *chan, 470 enum iio_event_type type, 471 enum iio_event_direction dir, 472 enum iio_event_info info, 473 int *val, int *val2) 474 { 475 int ret; 476 struct ad799x_state *st = iio_priv(indio_dev); 477 478 mutex_lock(&indio_dev->mlock); 479 ret = i2c_smbus_read_word_swapped(st->client, 480 ad799x_threshold_reg(chan, dir, info)); 481 mutex_unlock(&indio_dev->mlock); 482 if (ret < 0) 483 return ret; 484 *val = (ret >> chan->scan_type.shift) & 485 GENMASK(chan->scan_type.realbits - 1, 0); 486 487 return IIO_VAL_INT; 488 } 489 490 static irqreturn_t ad799x_event_handler(int irq, void *private) 491 { 492 struct iio_dev *indio_dev = private; 493 struct ad799x_state *st = iio_priv(private); 494 int i, ret; 495 496 ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG); 497 if (ret <= 0) 498 goto done; 499 500 if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG, 501 AD7998_ALERT_STAT_CLEAR) < 0) 502 goto done; 503 504 for (i = 0; i < 8; i++) { 505 if (ret & BIT(i)) 506 iio_push_event(indio_dev, 507 i & 0x1 ? 508 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 509 (i >> 1), 510 IIO_EV_TYPE_THRESH, 511 IIO_EV_DIR_RISING) : 512 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 513 (i >> 1), 514 IIO_EV_TYPE_THRESH, 515 IIO_EV_DIR_FALLING), 516 iio_get_time_ns(indio_dev)); 517 } 518 519 done: 520 return IRQ_HANDLED; 521 } 522 523 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 524 ad799x_read_frequency, 525 ad799x_write_frequency); 526 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0"); 527 528 static struct attribute *ad799x_event_attributes[] = { 529 &iio_dev_attr_sampling_frequency.dev_attr.attr, 530 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 531 NULL, 532 }; 533 534 static const struct attribute_group ad799x_event_attrs_group = { 535 .attrs = ad799x_event_attributes, 536 }; 537 538 static const struct iio_info ad7991_info = { 539 .read_raw = &ad799x_read_raw, 540 .update_scan_mode = ad799x_update_scan_mode, 541 }; 542 543 static const struct iio_info ad7993_4_7_8_noirq_info = { 544 .read_raw = &ad799x_read_raw, 545 .update_scan_mode = ad799x_update_scan_mode, 546 }; 547 548 static const struct iio_info ad7993_4_7_8_irq_info = { 549 .read_raw = &ad799x_read_raw, 550 .event_attrs = &ad799x_event_attrs_group, 551 .read_event_config = &ad799x_read_event_config, 552 .write_event_config = &ad799x_write_event_config, 553 .read_event_value = &ad799x_read_event_value, 554 .write_event_value = &ad799x_write_event_value, 555 .update_scan_mode = ad799x_update_scan_mode, 556 }; 557 558 static const struct iio_event_spec ad799x_events[] = { 559 { 560 .type = IIO_EV_TYPE_THRESH, 561 .dir = IIO_EV_DIR_RISING, 562 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 563 BIT(IIO_EV_INFO_ENABLE), 564 }, { 565 .type = IIO_EV_TYPE_THRESH, 566 .dir = IIO_EV_DIR_FALLING, 567 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 568 BIT(IIO_EV_INFO_ENABLE), 569 }, { 570 .type = IIO_EV_TYPE_THRESH, 571 .dir = IIO_EV_DIR_EITHER, 572 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS), 573 }, 574 }; 575 576 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \ 577 .type = IIO_VOLTAGE, \ 578 .indexed = 1, \ 579 .channel = (_index), \ 580 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 581 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 582 .scan_index = (_index), \ 583 .scan_type = { \ 584 .sign = 'u', \ 585 .realbits = (_realbits), \ 586 .storagebits = 16, \ 587 .shift = 12 - (_realbits), \ 588 .endianness = IIO_BE, \ 589 }, \ 590 .event_spec = _ev_spec, \ 591 .num_event_specs = _num_ev_spec, \ 592 } 593 594 #define AD799X_CHANNEL(_index, _realbits) \ 595 _AD799X_CHANNEL(_index, _realbits, NULL, 0) 596 597 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \ 598 _AD799X_CHANNEL(_index, _realbits, ad799x_events, \ 599 ARRAY_SIZE(ad799x_events)) 600 601 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = { 602 [ad7991] = { 603 .num_channels = 5, 604 .noirq_config = { 605 .channel = { 606 AD799X_CHANNEL(0, 12), 607 AD799X_CHANNEL(1, 12), 608 AD799X_CHANNEL(2, 12), 609 AD799X_CHANNEL(3, 12), 610 IIO_CHAN_SOFT_TIMESTAMP(4), 611 }, 612 .info = &ad7991_info, 613 }, 614 }, 615 [ad7995] = { 616 .num_channels = 5, 617 .noirq_config = { 618 .channel = { 619 AD799X_CHANNEL(0, 10), 620 AD799X_CHANNEL(1, 10), 621 AD799X_CHANNEL(2, 10), 622 AD799X_CHANNEL(3, 10), 623 IIO_CHAN_SOFT_TIMESTAMP(4), 624 }, 625 .info = &ad7991_info, 626 }, 627 }, 628 [ad7999] = { 629 .num_channels = 5, 630 .noirq_config = { 631 .channel = { 632 AD799X_CHANNEL(0, 8), 633 AD799X_CHANNEL(1, 8), 634 AD799X_CHANNEL(2, 8), 635 AD799X_CHANNEL(3, 8), 636 IIO_CHAN_SOFT_TIMESTAMP(4), 637 }, 638 .info = &ad7991_info, 639 }, 640 }, 641 [ad7992] = { 642 .num_channels = 3, 643 .noirq_config = { 644 .channel = { 645 AD799X_CHANNEL(0, 12), 646 AD799X_CHANNEL(1, 12), 647 IIO_CHAN_SOFT_TIMESTAMP(3), 648 }, 649 .info = &ad7993_4_7_8_noirq_info, 650 }, 651 .irq_config = { 652 .channel = { 653 AD799X_CHANNEL_WITH_EVENTS(0, 12), 654 AD799X_CHANNEL_WITH_EVENTS(1, 12), 655 IIO_CHAN_SOFT_TIMESTAMP(3), 656 }, 657 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 658 .info = &ad7993_4_7_8_irq_info, 659 }, 660 }, 661 [ad7993] = { 662 .num_channels = 5, 663 .noirq_config = { 664 .channel = { 665 AD799X_CHANNEL(0, 10), 666 AD799X_CHANNEL(1, 10), 667 AD799X_CHANNEL(2, 10), 668 AD799X_CHANNEL(3, 10), 669 IIO_CHAN_SOFT_TIMESTAMP(4), 670 }, 671 .info = &ad7993_4_7_8_noirq_info, 672 }, 673 .irq_config = { 674 .channel = { 675 AD799X_CHANNEL_WITH_EVENTS(0, 10), 676 AD799X_CHANNEL_WITH_EVENTS(1, 10), 677 AD799X_CHANNEL_WITH_EVENTS(2, 10), 678 AD799X_CHANNEL_WITH_EVENTS(3, 10), 679 IIO_CHAN_SOFT_TIMESTAMP(4), 680 }, 681 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 682 .info = &ad7993_4_7_8_irq_info, 683 }, 684 }, 685 [ad7994] = { 686 .num_channels = 5, 687 .noirq_config = { 688 .channel = { 689 AD799X_CHANNEL(0, 12), 690 AD799X_CHANNEL(1, 12), 691 AD799X_CHANNEL(2, 12), 692 AD799X_CHANNEL(3, 12), 693 IIO_CHAN_SOFT_TIMESTAMP(4), 694 }, 695 .info = &ad7993_4_7_8_noirq_info, 696 }, 697 .irq_config = { 698 .channel = { 699 AD799X_CHANNEL_WITH_EVENTS(0, 12), 700 AD799X_CHANNEL_WITH_EVENTS(1, 12), 701 AD799X_CHANNEL_WITH_EVENTS(2, 12), 702 AD799X_CHANNEL_WITH_EVENTS(3, 12), 703 IIO_CHAN_SOFT_TIMESTAMP(4), 704 }, 705 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 706 .info = &ad7993_4_7_8_irq_info, 707 }, 708 }, 709 [ad7997] = { 710 .num_channels = 9, 711 .noirq_config = { 712 .channel = { 713 AD799X_CHANNEL(0, 10), 714 AD799X_CHANNEL(1, 10), 715 AD799X_CHANNEL(2, 10), 716 AD799X_CHANNEL(3, 10), 717 AD799X_CHANNEL(4, 10), 718 AD799X_CHANNEL(5, 10), 719 AD799X_CHANNEL(6, 10), 720 AD799X_CHANNEL(7, 10), 721 IIO_CHAN_SOFT_TIMESTAMP(8), 722 }, 723 .info = &ad7993_4_7_8_noirq_info, 724 }, 725 .irq_config = { 726 .channel = { 727 AD799X_CHANNEL_WITH_EVENTS(0, 10), 728 AD799X_CHANNEL_WITH_EVENTS(1, 10), 729 AD799X_CHANNEL_WITH_EVENTS(2, 10), 730 AD799X_CHANNEL_WITH_EVENTS(3, 10), 731 AD799X_CHANNEL(4, 10), 732 AD799X_CHANNEL(5, 10), 733 AD799X_CHANNEL(6, 10), 734 AD799X_CHANNEL(7, 10), 735 IIO_CHAN_SOFT_TIMESTAMP(8), 736 }, 737 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 738 .info = &ad7993_4_7_8_irq_info, 739 }, 740 }, 741 [ad7998] = { 742 .num_channels = 9, 743 .noirq_config = { 744 .channel = { 745 AD799X_CHANNEL(0, 12), 746 AD799X_CHANNEL(1, 12), 747 AD799X_CHANNEL(2, 12), 748 AD799X_CHANNEL(3, 12), 749 AD799X_CHANNEL(4, 12), 750 AD799X_CHANNEL(5, 12), 751 AD799X_CHANNEL(6, 12), 752 AD799X_CHANNEL(7, 12), 753 IIO_CHAN_SOFT_TIMESTAMP(8), 754 }, 755 .info = &ad7993_4_7_8_noirq_info, 756 }, 757 .irq_config = { 758 .channel = { 759 AD799X_CHANNEL_WITH_EVENTS(0, 12), 760 AD799X_CHANNEL_WITH_EVENTS(1, 12), 761 AD799X_CHANNEL_WITH_EVENTS(2, 12), 762 AD799X_CHANNEL_WITH_EVENTS(3, 12), 763 AD799X_CHANNEL(4, 12), 764 AD799X_CHANNEL(5, 12), 765 AD799X_CHANNEL(6, 12), 766 AD799X_CHANNEL(7, 12), 767 IIO_CHAN_SOFT_TIMESTAMP(8), 768 }, 769 .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT, 770 .info = &ad7993_4_7_8_irq_info, 771 }, 772 }, 773 }; 774 775 static int ad799x_probe(struct i2c_client *client, 776 const struct i2c_device_id *id) 777 { 778 int ret; 779 struct ad799x_state *st; 780 struct iio_dev *indio_dev; 781 const struct ad799x_chip_info *chip_info = 782 &ad799x_chip_info_tbl[id->driver_data]; 783 784 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); 785 if (indio_dev == NULL) 786 return -ENOMEM; 787 788 st = iio_priv(indio_dev); 789 /* this is only used for device removal purposes */ 790 i2c_set_clientdata(client, indio_dev); 791 792 st->id = id->driver_data; 793 if (client->irq > 0 && chip_info->irq_config.info) 794 st->chip_config = &chip_info->irq_config; 795 else 796 st->chip_config = &chip_info->noirq_config; 797 798 /* TODO: Add pdata options for filtering and bit delay */ 799 800 st->reg = devm_regulator_get(&client->dev, "vcc"); 801 if (IS_ERR(st->reg)) 802 return PTR_ERR(st->reg); 803 ret = regulator_enable(st->reg); 804 if (ret) 805 return ret; 806 st->vref = devm_regulator_get(&client->dev, "vref"); 807 if (IS_ERR(st->vref)) { 808 ret = PTR_ERR(st->vref); 809 goto error_disable_reg; 810 } 811 ret = regulator_enable(st->vref); 812 if (ret) 813 goto error_disable_reg; 814 815 st->client = client; 816 817 indio_dev->dev.parent = &client->dev; 818 indio_dev->dev.of_node = client->dev.of_node; 819 indio_dev->name = id->name; 820 indio_dev->info = st->chip_config->info; 821 822 indio_dev->modes = INDIO_DIRECT_MODE; 823 indio_dev->channels = st->chip_config->channel; 824 indio_dev->num_channels = chip_info->num_channels; 825 826 ret = ad799x_update_config(st, st->chip_config->default_config); 827 if (ret) 828 goto error_disable_vref; 829 830 ret = iio_triggered_buffer_setup(indio_dev, NULL, 831 &ad799x_trigger_handler, NULL); 832 if (ret) 833 goto error_disable_vref; 834 835 if (client->irq > 0) { 836 ret = devm_request_threaded_irq(&client->dev, 837 client->irq, 838 NULL, 839 ad799x_event_handler, 840 IRQF_TRIGGER_FALLING | 841 IRQF_ONESHOT, 842 client->name, 843 indio_dev); 844 if (ret) 845 goto error_cleanup_ring; 846 } 847 ret = iio_device_register(indio_dev); 848 if (ret) 849 goto error_cleanup_ring; 850 851 return 0; 852 853 error_cleanup_ring: 854 iio_triggered_buffer_cleanup(indio_dev); 855 error_disable_vref: 856 regulator_disable(st->vref); 857 error_disable_reg: 858 regulator_disable(st->reg); 859 860 return ret; 861 } 862 863 static int ad799x_remove(struct i2c_client *client) 864 { 865 struct iio_dev *indio_dev = i2c_get_clientdata(client); 866 struct ad799x_state *st = iio_priv(indio_dev); 867 868 iio_device_unregister(indio_dev); 869 870 iio_triggered_buffer_cleanup(indio_dev); 871 regulator_disable(st->vref); 872 regulator_disable(st->reg); 873 kfree(st->rx_buf); 874 875 return 0; 876 } 877 878 static int __maybe_unused ad799x_suspend(struct device *dev) 879 { 880 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 881 struct ad799x_state *st = iio_priv(indio_dev); 882 883 regulator_disable(st->vref); 884 regulator_disable(st->reg); 885 886 return 0; 887 } 888 889 static int __maybe_unused ad799x_resume(struct device *dev) 890 { 891 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 892 struct ad799x_state *st = iio_priv(indio_dev); 893 int ret; 894 895 ret = regulator_enable(st->reg); 896 if (ret) { 897 dev_err(dev, "Unable to enable vcc regulator\n"); 898 return ret; 899 } 900 ret = regulator_enable(st->vref); 901 if (ret) { 902 regulator_disable(st->reg); 903 dev_err(dev, "Unable to enable vref regulator\n"); 904 return ret; 905 } 906 907 /* resync config */ 908 ret = ad799x_update_config(st, st->config); 909 if (ret) { 910 regulator_disable(st->vref); 911 regulator_disable(st->reg); 912 return ret; 913 } 914 915 return 0; 916 } 917 918 static SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume); 919 920 static const struct i2c_device_id ad799x_id[] = { 921 { "ad7991", ad7991 }, 922 { "ad7995", ad7995 }, 923 { "ad7999", ad7999 }, 924 { "ad7992", ad7992 }, 925 { "ad7993", ad7993 }, 926 { "ad7994", ad7994 }, 927 { "ad7997", ad7997 }, 928 { "ad7998", ad7998 }, 929 {} 930 }; 931 932 MODULE_DEVICE_TABLE(i2c, ad799x_id); 933 934 static struct i2c_driver ad799x_driver = { 935 .driver = { 936 .name = "ad799x", 937 .pm = &ad799x_pm_ops, 938 }, 939 .probe = ad799x_probe, 940 .remove = ad799x_remove, 941 .id_table = ad799x_id, 942 }; 943 module_i2c_driver(ad799x_driver); 944 945 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 946 MODULE_DESCRIPTION("Analog Devices AD799x ADC"); 947 MODULE_LICENSE("GPL v2"); 948