1 // SPDX-License-Identifier: GPL-2.0 2 /* ad7949.c - Analog Devices ADC driver 14/16 bits 4/8 channels 3 * 4 * Copyright (C) 2018 CMC NV 5 * 6 * http://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf 7 */ 8 9 #include <linux/delay.h> 10 #include <linux/iio/iio.h> 11 #include <linux/module.h> 12 #include <linux/regulator/consumer.h> 13 #include <linux/spi/spi.h> 14 15 #define AD7949_MASK_CHANNEL_SEL GENMASK(9, 7) 16 #define AD7949_MASK_TOTAL GENMASK(13, 0) 17 #define AD7949_OFFSET_CHANNEL_SEL 7 18 #define AD7949_CFG_READ_BACK 0x1 19 #define AD7949_CFG_REG_SIZE_BITS 14 20 21 enum { 22 ID_AD7949 = 0, 23 ID_AD7682, 24 ID_AD7689, 25 }; 26 27 struct ad7949_adc_spec { 28 u8 num_channels; 29 u8 resolution; 30 }; 31 32 static const struct ad7949_adc_spec ad7949_adc_spec[] = { 33 [ID_AD7949] = { .num_channels = 8, .resolution = 14 }, 34 [ID_AD7682] = { .num_channels = 4, .resolution = 16 }, 35 [ID_AD7689] = { .num_channels = 8, .resolution = 16 }, 36 }; 37 38 /** 39 * struct ad7949_adc_chip - AD ADC chip 40 * @lock: protects write sequences 41 * @vref: regulator generating Vref 42 * @iio_dev: reference to iio structure 43 * @spi: reference to spi structure 44 * @resolution: resolution of the chip 45 * @cfg: copy of the configuration register 46 * @current_channel: current channel in use 47 * @buffer: buffer to send / receive data to / from device 48 */ 49 struct ad7949_adc_chip { 50 struct mutex lock; 51 struct regulator *vref; 52 struct iio_dev *indio_dev; 53 struct spi_device *spi; 54 u8 resolution; 55 u16 cfg; 56 unsigned int current_channel; 57 u16 buffer ____cacheline_aligned; 58 }; 59 60 static int ad7949_spi_write_cfg(struct ad7949_adc_chip *ad7949_adc, u16 val, 61 u16 mask) 62 { 63 int ret; 64 int bits_per_word = ad7949_adc->resolution; 65 int shift = bits_per_word - AD7949_CFG_REG_SIZE_BITS; 66 struct spi_message msg; 67 struct spi_transfer tx[] = { 68 { 69 .tx_buf = &ad7949_adc->buffer, 70 .len = 2, 71 .bits_per_word = bits_per_word, 72 }, 73 }; 74 75 ad7949_adc->cfg = (val & mask) | (ad7949_adc->cfg & ~mask); 76 ad7949_adc->buffer = ad7949_adc->cfg << shift; 77 spi_message_init_with_transfers(&msg, tx, 1); 78 ret = spi_sync(ad7949_adc->spi, &msg); 79 80 /* 81 * This delay is to avoid a new request before the required time to 82 * send a new command to the device 83 */ 84 udelay(2); 85 return ret; 86 } 87 88 static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, 89 unsigned int channel) 90 { 91 int ret; 92 int bits_per_word = ad7949_adc->resolution; 93 int mask = GENMASK(ad7949_adc->resolution, 0); 94 struct spi_message msg; 95 struct spi_transfer tx[] = { 96 { 97 .rx_buf = &ad7949_adc->buffer, 98 .len = 2, 99 .bits_per_word = bits_per_word, 100 }, 101 }; 102 103 ret = ad7949_spi_write_cfg(ad7949_adc, 104 channel << AD7949_OFFSET_CHANNEL_SEL, 105 AD7949_MASK_CHANNEL_SEL); 106 if (ret) 107 return ret; 108 109 ad7949_adc->buffer = 0; 110 spi_message_init_with_transfers(&msg, tx, 1); 111 ret = spi_sync(ad7949_adc->spi, &msg); 112 if (ret) 113 return ret; 114 115 /* 116 * This delay is to avoid a new request before the required time to 117 * send a new command to the device 118 */ 119 udelay(2); 120 121 ad7949_adc->current_channel = channel; 122 123 *val = ad7949_adc->buffer & mask; 124 125 return 0; 126 } 127 128 #define AD7949_ADC_CHANNEL(chan) { \ 129 .type = IIO_VOLTAGE, \ 130 .indexed = 1, \ 131 .channel = (chan), \ 132 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 133 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 134 } 135 136 static const struct iio_chan_spec ad7949_adc_channels[] = { 137 AD7949_ADC_CHANNEL(0), 138 AD7949_ADC_CHANNEL(1), 139 AD7949_ADC_CHANNEL(2), 140 AD7949_ADC_CHANNEL(3), 141 AD7949_ADC_CHANNEL(4), 142 AD7949_ADC_CHANNEL(5), 143 AD7949_ADC_CHANNEL(6), 144 AD7949_ADC_CHANNEL(7), 145 }; 146 147 static int ad7949_spi_read_raw(struct iio_dev *indio_dev, 148 struct iio_chan_spec const *chan, 149 int *val, int *val2, long mask) 150 { 151 struct ad7949_adc_chip *ad7949_adc = iio_priv(indio_dev); 152 int ret; 153 154 if (!val) 155 return -EINVAL; 156 157 switch (mask) { 158 case IIO_CHAN_INFO_RAW: 159 mutex_lock(&ad7949_adc->lock); 160 ret = ad7949_spi_read_channel(ad7949_adc, val, chan->channel); 161 mutex_unlock(&ad7949_adc->lock); 162 163 if (ret < 0) 164 return ret; 165 166 return IIO_VAL_INT; 167 168 case IIO_CHAN_INFO_SCALE: 169 ret = regulator_get_voltage(ad7949_adc->vref); 170 if (ret < 0) 171 return ret; 172 173 *val = ret / 5000; 174 return IIO_VAL_INT; 175 } 176 177 return -EINVAL; 178 } 179 180 static int ad7949_spi_reg_access(struct iio_dev *indio_dev, 181 unsigned int reg, unsigned int writeval, 182 unsigned int *readval) 183 { 184 struct ad7949_adc_chip *ad7949_adc = iio_priv(indio_dev); 185 int ret = 0; 186 187 if (readval) 188 *readval = ad7949_adc->cfg; 189 else 190 ret = ad7949_spi_write_cfg(ad7949_adc, 191 writeval & AD7949_MASK_TOTAL, AD7949_MASK_TOTAL); 192 193 return ret; 194 } 195 196 static const struct iio_info ad7949_spi_info = { 197 .read_raw = ad7949_spi_read_raw, 198 .debugfs_reg_access = ad7949_spi_reg_access, 199 }; 200 201 static int ad7949_spi_init(struct ad7949_adc_chip *ad7949_adc) 202 { 203 int ret; 204 int val; 205 206 /* Sequencer disabled, CFG readback disabled, IN0 as default channel */ 207 ad7949_adc->current_channel = 0; 208 ret = ad7949_spi_write_cfg(ad7949_adc, 0x3C79, AD7949_MASK_TOTAL); 209 210 /* 211 * Do two dummy conversions to apply the first configuration setting. 212 * Required only after the start up of the device. 213 */ 214 ad7949_spi_read_channel(ad7949_adc, &val, ad7949_adc->current_channel); 215 ad7949_spi_read_channel(ad7949_adc, &val, ad7949_adc->current_channel); 216 217 return ret; 218 } 219 220 static int ad7949_spi_probe(struct spi_device *spi) 221 { 222 struct device *dev = &spi->dev; 223 const struct ad7949_adc_spec *spec; 224 struct ad7949_adc_chip *ad7949_adc; 225 struct iio_dev *indio_dev; 226 int ret; 227 228 indio_dev = devm_iio_device_alloc(dev, sizeof(*ad7949_adc)); 229 if (!indio_dev) { 230 dev_err(dev, "can not allocate iio device\n"); 231 return -ENOMEM; 232 } 233 234 indio_dev->dev.parent = dev; 235 indio_dev->dev.of_node = dev->of_node; 236 indio_dev->info = &ad7949_spi_info; 237 indio_dev->name = spi_get_device_id(spi)->name; 238 indio_dev->modes = INDIO_DIRECT_MODE; 239 indio_dev->channels = ad7949_adc_channels; 240 spi_set_drvdata(spi, indio_dev); 241 242 ad7949_adc = iio_priv(indio_dev); 243 ad7949_adc->indio_dev = indio_dev; 244 ad7949_adc->spi = spi; 245 246 spec = &ad7949_adc_spec[spi_get_device_id(spi)->driver_data]; 247 indio_dev->num_channels = spec->num_channels; 248 ad7949_adc->resolution = spec->resolution; 249 250 ad7949_adc->vref = devm_regulator_get(dev, "vref"); 251 if (IS_ERR(ad7949_adc->vref)) { 252 dev_err(dev, "fail to request regulator\n"); 253 return PTR_ERR(ad7949_adc->vref); 254 } 255 256 ret = regulator_enable(ad7949_adc->vref); 257 if (ret < 0) { 258 dev_err(dev, "fail to enable regulator\n"); 259 return ret; 260 } 261 262 mutex_init(&ad7949_adc->lock); 263 264 ret = ad7949_spi_init(ad7949_adc); 265 if (ret) { 266 dev_err(dev, "enable to init this device: %d\n", ret); 267 goto err; 268 } 269 270 ret = iio_device_register(indio_dev); 271 if (ret) { 272 dev_err(dev, "fail to register iio device: %d\n", ret); 273 goto err; 274 } 275 276 return 0; 277 278 err: 279 mutex_destroy(&ad7949_adc->lock); 280 regulator_disable(ad7949_adc->vref); 281 282 return ret; 283 } 284 285 static int ad7949_spi_remove(struct spi_device *spi) 286 { 287 struct iio_dev *indio_dev = spi_get_drvdata(spi); 288 struct ad7949_adc_chip *ad7949_adc = iio_priv(indio_dev); 289 290 iio_device_unregister(indio_dev); 291 mutex_destroy(&ad7949_adc->lock); 292 regulator_disable(ad7949_adc->vref); 293 294 return 0; 295 } 296 297 static const struct of_device_id ad7949_spi_of_id[] = { 298 { .compatible = "adi,ad7949" }, 299 { .compatible = "adi,ad7682" }, 300 { .compatible = "adi,ad7689" }, 301 { } 302 }; 303 MODULE_DEVICE_TABLE(of, ad7949_spi_of_id); 304 305 static const struct spi_device_id ad7949_spi_id[] = { 306 { "ad7949", ID_AD7949 }, 307 { "ad7682", ID_AD7682 }, 308 { "ad7689", ID_AD7689 }, 309 { } 310 }; 311 MODULE_DEVICE_TABLE(spi, ad7949_spi_id); 312 313 static struct spi_driver ad7949_spi_driver = { 314 .driver = { 315 .name = "ad7949", 316 .of_match_table = ad7949_spi_of_id, 317 }, 318 .probe = ad7949_spi_probe, 319 .remove = ad7949_spi_remove, 320 .id_table = ad7949_spi_id, 321 }; 322 module_spi_driver(ad7949_spi_driver); 323 324 MODULE_AUTHOR("Charles-Antoine Couret <charles-antoine.couret@essensium.com>"); 325 MODULE_DESCRIPTION("Analog Devices 14/16-bit 8-channel ADC driver"); 326 MODULE_LICENSE("GPL v2"); 327