1 /* 2 * AD7887 SPI ADC driver 3 * 4 * Copyright 2010-2011 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2. 7 */ 8 9 #include <linux/device.h> 10 #include <linux/kernel.h> 11 #include <linux/slab.h> 12 #include <linux/sysfs.h> 13 #include <linux/spi/spi.h> 14 #include <linux/regulator/consumer.h> 15 #include <linux/err.h> 16 #include <linux/module.h> 17 #include <linux/interrupt.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 26 #include <linux/platform_data/ad7887.h> 27 28 #define AD7887_REF_DIS (1 << 5) /* on-chip reference disable */ 29 #define AD7887_DUAL (1 << 4) /* dual-channel mode */ 30 #define AD7887_CH_AIN1 (1 << 3) /* convert on channel 1, DUAL=1 */ 31 #define AD7887_CH_AIN0 (0 << 3) /* convert on channel 0, DUAL=0,1 */ 32 #define AD7887_PM_MODE1 (0) /* CS based shutdown */ 33 #define AD7887_PM_MODE2 (1) /* full on */ 34 #define AD7887_PM_MODE3 (2) /* auto shutdown after conversion */ 35 #define AD7887_PM_MODE4 (3) /* standby mode */ 36 37 enum ad7887_channels { 38 AD7887_CH0, 39 AD7887_CH0_CH1, 40 AD7887_CH1, 41 }; 42 43 #define RES_MASK(bits) ((1 << (bits)) - 1) 44 45 /** 46 * struct ad7887_chip_info - chip specifc information 47 * @int_vref_mv: the internal reference voltage 48 * @channel: channel specification 49 */ 50 struct ad7887_chip_info { 51 u16 int_vref_mv; 52 struct iio_chan_spec channel[3]; 53 }; 54 55 struct ad7887_state { 56 struct spi_device *spi; 57 const struct ad7887_chip_info *chip_info; 58 struct regulator *reg; 59 struct spi_transfer xfer[4]; 60 struct spi_message msg[3]; 61 struct spi_message *ring_msg; 62 unsigned char tx_cmd_buf[4]; 63 64 /* 65 * DMA (thus cache coherency maintenance) requires the 66 * transfer buffers to live in their own cache lines. 67 * Buffer needs to be large enough to hold two 16 bit samples and a 68 * 64 bit aligned 64 bit timestamp. 69 */ 70 unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)] 71 ____cacheline_aligned; 72 }; 73 74 enum ad7887_supported_device_ids { 75 ID_AD7887 76 }; 77 78 static int ad7887_ring_preenable(struct iio_dev *indio_dev) 79 { 80 struct ad7887_state *st = iio_priv(indio_dev); 81 82 /* We know this is a single long so can 'cheat' */ 83 switch (*indio_dev->active_scan_mask) { 84 case (1 << 0): 85 st->ring_msg = &st->msg[AD7887_CH0]; 86 break; 87 case (1 << 1): 88 st->ring_msg = &st->msg[AD7887_CH1]; 89 /* Dummy read: push CH1 setting down to hardware */ 90 spi_sync(st->spi, st->ring_msg); 91 break; 92 case ((1 << 1) | (1 << 0)): 93 st->ring_msg = &st->msg[AD7887_CH0_CH1]; 94 break; 95 } 96 97 return 0; 98 } 99 100 static int ad7887_ring_postdisable(struct iio_dev *indio_dev) 101 { 102 struct ad7887_state *st = iio_priv(indio_dev); 103 104 /* dummy read: restore default CH0 settin */ 105 return spi_sync(st->spi, &st->msg[AD7887_CH0]); 106 } 107 108 /** 109 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer 110 * 111 * Currently there is no option in this driver to disable the saving of 112 * timestamps within the ring. 113 **/ 114 static irqreturn_t ad7887_trigger_handler(int irq, void *p) 115 { 116 struct iio_poll_func *pf = p; 117 struct iio_dev *indio_dev = pf->indio_dev; 118 struct ad7887_state *st = iio_priv(indio_dev); 119 int b_sent; 120 121 b_sent = spi_sync(st->spi, st->ring_msg); 122 if (b_sent) 123 goto done; 124 125 iio_push_to_buffers_with_timestamp(indio_dev, st->data, 126 iio_get_time_ns()); 127 done: 128 iio_trigger_notify_done(indio_dev->trig); 129 130 return IRQ_HANDLED; 131 } 132 133 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = { 134 .preenable = &ad7887_ring_preenable, 135 .postenable = &iio_triggered_buffer_postenable, 136 .predisable = &iio_triggered_buffer_predisable, 137 .postdisable = &ad7887_ring_postdisable, 138 }; 139 140 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch) 141 { 142 int ret = spi_sync(st->spi, &st->msg[ch]); 143 if (ret) 144 return ret; 145 146 return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1]; 147 } 148 149 static int ad7887_read_raw(struct iio_dev *indio_dev, 150 struct iio_chan_spec const *chan, 151 int *val, 152 int *val2, 153 long m) 154 { 155 int ret; 156 struct ad7887_state *st = iio_priv(indio_dev); 157 158 switch (m) { 159 case IIO_CHAN_INFO_RAW: 160 mutex_lock(&indio_dev->mlock); 161 if (iio_buffer_enabled(indio_dev)) 162 ret = -EBUSY; 163 else 164 ret = ad7887_scan_direct(st, chan->address); 165 mutex_unlock(&indio_dev->mlock); 166 167 if (ret < 0) 168 return ret; 169 *val = ret >> chan->scan_type.shift; 170 *val &= RES_MASK(chan->scan_type.realbits); 171 return IIO_VAL_INT; 172 case IIO_CHAN_INFO_SCALE: 173 if (st->reg) { 174 *val = regulator_get_voltage(st->reg); 175 if (*val < 0) 176 return *val; 177 *val /= 1000; 178 } else { 179 *val = st->chip_info->int_vref_mv; 180 } 181 182 *val2 = chan->scan_type.realbits; 183 184 return IIO_VAL_FRACTIONAL_LOG2; 185 } 186 return -EINVAL; 187 } 188 189 190 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = { 191 /* 192 * More devices added in future 193 */ 194 [ID_AD7887] = { 195 .channel[0] = { 196 .type = IIO_VOLTAGE, 197 .indexed = 1, 198 .channel = 1, 199 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 200 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 201 .address = 1, 202 .scan_index = 1, 203 .scan_type = { 204 .sign = 'u', 205 .realbits = 12, 206 .storagebits = 16, 207 .shift = 0, 208 .endianness = IIO_BE, 209 }, 210 }, 211 .channel[1] = { 212 .type = IIO_VOLTAGE, 213 .indexed = 1, 214 .channel = 0, 215 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 216 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 217 .address = 0, 218 .scan_index = 0, 219 .scan_type = { 220 .sign = 'u', 221 .realbits = 12, 222 .storagebits = 16, 223 .shift = 0, 224 .endianness = IIO_BE, 225 }, 226 }, 227 .channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2), 228 .int_vref_mv = 2500, 229 }, 230 }; 231 232 static const struct iio_info ad7887_info = { 233 .read_raw = &ad7887_read_raw, 234 .driver_module = THIS_MODULE, 235 }; 236 237 static int ad7887_probe(struct spi_device *spi) 238 { 239 struct ad7887_platform_data *pdata = spi->dev.platform_data; 240 struct ad7887_state *st; 241 struct iio_dev *indio_dev; 242 uint8_t mode; 243 int ret; 244 245 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 246 if (indio_dev == NULL) 247 return -ENOMEM; 248 249 st = iio_priv(indio_dev); 250 251 if (!pdata || !pdata->use_onchip_ref) { 252 st->reg = devm_regulator_get(&spi->dev, "vref"); 253 if (IS_ERR(st->reg)) 254 return PTR_ERR(st->reg); 255 256 ret = regulator_enable(st->reg); 257 if (ret) 258 return ret; 259 } 260 261 st->chip_info = 262 &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data]; 263 264 spi_set_drvdata(spi, indio_dev); 265 st->spi = spi; 266 267 /* Estabilish that the iio_dev is a child of the spi device */ 268 indio_dev->dev.parent = &spi->dev; 269 indio_dev->name = spi_get_device_id(spi)->name; 270 indio_dev->info = &ad7887_info; 271 indio_dev->modes = INDIO_DIRECT_MODE; 272 273 /* Setup default message */ 274 275 mode = AD7887_PM_MODE4; 276 if (!pdata || !pdata->use_onchip_ref) 277 mode |= AD7887_REF_DIS; 278 if (pdata && pdata->en_dual) 279 mode |= AD7887_DUAL; 280 281 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode; 282 283 st->xfer[0].rx_buf = &st->data[0]; 284 st->xfer[0].tx_buf = &st->tx_cmd_buf[0]; 285 st->xfer[0].len = 2; 286 287 spi_message_init(&st->msg[AD7887_CH0]); 288 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]); 289 290 if (pdata && pdata->en_dual) { 291 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode; 292 293 st->xfer[1].rx_buf = &st->data[0]; 294 st->xfer[1].tx_buf = &st->tx_cmd_buf[2]; 295 st->xfer[1].len = 2; 296 297 st->xfer[2].rx_buf = &st->data[2]; 298 st->xfer[2].tx_buf = &st->tx_cmd_buf[0]; 299 st->xfer[2].len = 2; 300 301 spi_message_init(&st->msg[AD7887_CH0_CH1]); 302 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]); 303 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]); 304 305 st->xfer[3].rx_buf = &st->data[2]; 306 st->xfer[3].tx_buf = &st->tx_cmd_buf[2]; 307 st->xfer[3].len = 2; 308 309 spi_message_init(&st->msg[AD7887_CH1]); 310 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]); 311 312 indio_dev->channels = st->chip_info->channel; 313 indio_dev->num_channels = 3; 314 } else { 315 indio_dev->channels = &st->chip_info->channel[1]; 316 indio_dev->num_channels = 2; 317 } 318 319 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 320 &ad7887_trigger_handler, &ad7887_ring_setup_ops); 321 if (ret) 322 goto error_disable_reg; 323 324 ret = iio_device_register(indio_dev); 325 if (ret) 326 goto error_unregister_ring; 327 328 return 0; 329 error_unregister_ring: 330 iio_triggered_buffer_cleanup(indio_dev); 331 error_disable_reg: 332 if (st->reg) 333 regulator_disable(st->reg); 334 335 return ret; 336 } 337 338 static int ad7887_remove(struct spi_device *spi) 339 { 340 struct iio_dev *indio_dev = spi_get_drvdata(spi); 341 struct ad7887_state *st = iio_priv(indio_dev); 342 343 iio_device_unregister(indio_dev); 344 iio_triggered_buffer_cleanup(indio_dev); 345 if (st->reg) 346 regulator_disable(st->reg); 347 348 return 0; 349 } 350 351 static const struct spi_device_id ad7887_id[] = { 352 {"ad7887", ID_AD7887}, 353 {} 354 }; 355 MODULE_DEVICE_TABLE(spi, ad7887_id); 356 357 static struct spi_driver ad7887_driver = { 358 .driver = { 359 .name = "ad7887", 360 .owner = THIS_MODULE, 361 }, 362 .probe = ad7887_probe, 363 .remove = ad7887_remove, 364 .id_table = ad7887_id, 365 }; 366 module_spi_driver(ad7887_driver); 367 368 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 369 MODULE_DESCRIPTION("Analog Devices AD7887 ADC"); 370 MODULE_LICENSE("GPL v2"); 371