1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AD7606 SPI ADC driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/sched.h> 17 #include <linux/slab.h> 18 #include <linux/sysfs.h> 19 #include <linux/util_macros.h> 20 21 #include <linux/iio/iio.h> 22 #include <linux/iio/buffer.h> 23 #include <linux/iio/sysfs.h> 24 #include <linux/iio/trigger.h> 25 #include <linux/iio/triggered_buffer.h> 26 #include <linux/iio/trigger_consumer.h> 27 28 #include "ad7606.h" 29 30 /* 31 * Scales are computed as 5000/32768 and 10000/32768 respectively, 32 * so that when applied to the raw values they provide mV values 33 */ 34 static const unsigned int ad7606_scale_avail[2] = { 35 152588, 305176 36 }; 37 38 39 static const unsigned int ad7616_sw_scale_avail[3] = { 40 76293, 152588, 305176 41 }; 42 43 static const unsigned int ad7606_oversampling_avail[7] = { 44 1, 2, 4, 8, 16, 32, 64, 45 }; 46 47 static const unsigned int ad7616_oversampling_avail[8] = { 48 1, 2, 4, 8, 16, 32, 64, 128, 49 }; 50 51 static int ad7606_reset(struct ad7606_state *st) 52 { 53 if (st->gpio_reset) { 54 gpiod_set_value(st->gpio_reset, 1); 55 ndelay(100); /* t_reset >= 100ns */ 56 gpiod_set_value(st->gpio_reset, 0); 57 return 0; 58 } 59 60 return -ENODEV; 61 } 62 63 static int ad7606_reg_access(struct iio_dev *indio_dev, 64 unsigned int reg, 65 unsigned int writeval, 66 unsigned int *readval) 67 { 68 struct ad7606_state *st = iio_priv(indio_dev); 69 int ret; 70 71 mutex_lock(&st->lock); 72 if (readval) { 73 ret = st->bops->reg_read(st, reg); 74 if (ret < 0) 75 goto err_unlock; 76 *readval = ret; 77 ret = 0; 78 } else { 79 ret = st->bops->reg_write(st, reg, writeval); 80 } 81 err_unlock: 82 mutex_unlock(&st->lock); 83 return ret; 84 } 85 86 static int ad7606_read_samples(struct ad7606_state *st) 87 { 88 unsigned int num = st->chip_info->num_channels - 1; 89 u16 *data = st->data; 90 int ret; 91 92 /* 93 * The frstdata signal is set to high while and after reading the sample 94 * of the first channel and low for all other channels. This can be used 95 * to check that the incoming data is correctly aligned. During normal 96 * operation the data should never become unaligned, but some glitch or 97 * electrostatic discharge might cause an extra read or clock cycle. 98 * Monitoring the frstdata signal allows to recover from such failure 99 * situations. 100 */ 101 102 if (st->gpio_frstdata) { 103 ret = st->bops->read_block(st->dev, 1, data); 104 if (ret) 105 return ret; 106 107 if (!gpiod_get_value(st->gpio_frstdata)) { 108 ad7606_reset(st); 109 return -EIO; 110 } 111 112 data++; 113 num--; 114 } 115 116 return st->bops->read_block(st->dev, num, data); 117 } 118 119 static irqreturn_t ad7606_trigger_handler(int irq, void *p) 120 { 121 struct iio_poll_func *pf = p; 122 struct iio_dev *indio_dev = pf->indio_dev; 123 struct ad7606_state *st = iio_priv(indio_dev); 124 int ret; 125 126 mutex_lock(&st->lock); 127 128 ret = ad7606_read_samples(st); 129 if (ret == 0) 130 iio_push_to_buffers_with_timestamp(indio_dev, st->data, 131 iio_get_time_ns(indio_dev)); 132 133 iio_trigger_notify_done(indio_dev->trig); 134 /* The rising edge of the CONVST signal starts a new conversion. */ 135 gpiod_set_value(st->gpio_convst, 1); 136 137 mutex_unlock(&st->lock); 138 139 return IRQ_HANDLED; 140 } 141 142 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) 143 { 144 struct ad7606_state *st = iio_priv(indio_dev); 145 int ret; 146 147 gpiod_set_value(st->gpio_convst, 1); 148 ret = wait_for_completion_timeout(&st->completion, 149 msecs_to_jiffies(1000)); 150 if (!ret) { 151 ret = -ETIMEDOUT; 152 goto error_ret; 153 } 154 155 ret = ad7606_read_samples(st); 156 if (ret == 0) 157 ret = st->data[ch]; 158 159 error_ret: 160 gpiod_set_value(st->gpio_convst, 0); 161 162 return ret; 163 } 164 165 static int ad7606_read_raw(struct iio_dev *indio_dev, 166 struct iio_chan_spec const *chan, 167 int *val, 168 int *val2, 169 long m) 170 { 171 int ret, ch = 0; 172 struct ad7606_state *st = iio_priv(indio_dev); 173 174 switch (m) { 175 case IIO_CHAN_INFO_RAW: 176 ret = iio_device_claim_direct_mode(indio_dev); 177 if (ret) 178 return ret; 179 180 ret = ad7606_scan_direct(indio_dev, chan->address); 181 iio_device_release_direct_mode(indio_dev); 182 183 if (ret < 0) 184 return ret; 185 *val = (short)ret; 186 return IIO_VAL_INT; 187 case IIO_CHAN_INFO_SCALE: 188 if (st->sw_mode_en) 189 ch = chan->address; 190 *val = 0; 191 *val2 = st->scale_avail[st->range[ch]]; 192 return IIO_VAL_INT_PLUS_MICRO; 193 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 194 *val = st->oversampling; 195 return IIO_VAL_INT; 196 } 197 return -EINVAL; 198 } 199 200 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals, 201 unsigned int n, bool micros) 202 { 203 size_t len = 0; 204 int i; 205 206 for (i = 0; i < n; i++) { 207 len += scnprintf(buf + len, PAGE_SIZE - len, 208 micros ? "0.%06u " : "%u ", vals[i]); 209 } 210 buf[len - 1] = '\n'; 211 212 return len; 213 } 214 215 static ssize_t in_voltage_scale_available_show(struct device *dev, 216 struct device_attribute *attr, 217 char *buf) 218 { 219 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 220 struct ad7606_state *st = iio_priv(indio_dev); 221 222 return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true); 223 } 224 225 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); 226 227 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val) 228 { 229 struct ad7606_state *st = iio_priv(indio_dev); 230 231 gpiod_set_value(st->gpio_range, val); 232 233 return 0; 234 } 235 236 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val) 237 { 238 struct ad7606_state *st = iio_priv(indio_dev); 239 DECLARE_BITMAP(values, 3); 240 241 values[0] = val; 242 243 gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc, 244 st->gpio_os->info, values); 245 246 /* AD7616 requires a reset to update value */ 247 if (st->chip_info->os_req_reset) 248 ad7606_reset(st); 249 250 return 0; 251 } 252 253 static int ad7606_write_raw(struct iio_dev *indio_dev, 254 struct iio_chan_spec const *chan, 255 int val, 256 int val2, 257 long mask) 258 { 259 struct ad7606_state *st = iio_priv(indio_dev); 260 int i, ret, ch = 0; 261 262 switch (mask) { 263 case IIO_CHAN_INFO_SCALE: 264 mutex_lock(&st->lock); 265 i = find_closest(val2, st->scale_avail, st->num_scales); 266 if (st->sw_mode_en) 267 ch = chan->address; 268 ret = st->write_scale(indio_dev, ch, i); 269 if (ret < 0) { 270 mutex_unlock(&st->lock); 271 return ret; 272 } 273 st->range[ch] = i; 274 mutex_unlock(&st->lock); 275 276 return 0; 277 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 278 if (val2) 279 return -EINVAL; 280 i = find_closest(val, st->oversampling_avail, 281 st->num_os_ratios); 282 mutex_lock(&st->lock); 283 ret = st->write_os(indio_dev, i); 284 if (ret < 0) { 285 mutex_unlock(&st->lock); 286 return ret; 287 } 288 st->oversampling = st->oversampling_avail[i]; 289 mutex_unlock(&st->lock); 290 291 return 0; 292 default: 293 return -EINVAL; 294 } 295 } 296 297 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev, 298 struct device_attribute *attr, 299 char *buf) 300 { 301 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 302 struct ad7606_state *st = iio_priv(indio_dev); 303 304 return ad7606_show_avail(buf, st->oversampling_avail, 305 st->num_os_ratios, false); 306 } 307 308 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444, 309 ad7606_oversampling_ratio_avail, NULL, 0); 310 311 static struct attribute *ad7606_attributes_os_and_range[] = { 312 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 313 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 314 NULL, 315 }; 316 317 static const struct attribute_group ad7606_attribute_group_os_and_range = { 318 .attrs = ad7606_attributes_os_and_range, 319 }; 320 321 static struct attribute *ad7606_attributes_os[] = { 322 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 323 NULL, 324 }; 325 326 static const struct attribute_group ad7606_attribute_group_os = { 327 .attrs = ad7606_attributes_os, 328 }; 329 330 static struct attribute *ad7606_attributes_range[] = { 331 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 332 NULL, 333 }; 334 335 static const struct attribute_group ad7606_attribute_group_range = { 336 .attrs = ad7606_attributes_range, 337 }; 338 339 static const struct iio_chan_spec ad7605_channels[] = { 340 IIO_CHAN_SOFT_TIMESTAMP(4), 341 AD7605_CHANNEL(0), 342 AD7605_CHANNEL(1), 343 AD7605_CHANNEL(2), 344 AD7605_CHANNEL(3), 345 }; 346 347 static const struct iio_chan_spec ad7606_channels[] = { 348 IIO_CHAN_SOFT_TIMESTAMP(8), 349 AD7606_CHANNEL(0), 350 AD7606_CHANNEL(1), 351 AD7606_CHANNEL(2), 352 AD7606_CHANNEL(3), 353 AD7606_CHANNEL(4), 354 AD7606_CHANNEL(5), 355 AD7606_CHANNEL(6), 356 AD7606_CHANNEL(7), 357 }; 358 359 /* 360 * The current assumption that this driver makes for AD7616, is that it's 361 * working in Hardware Mode with Serial, Burst and Sequencer modes activated. 362 * To activate them, following pins must be pulled high: 363 * -SER/PAR 364 * -SEQEN 365 * And following pins must be pulled low: 366 * -WR/BURST 367 * -DB4/SER1W 368 */ 369 static const struct iio_chan_spec ad7616_channels[] = { 370 IIO_CHAN_SOFT_TIMESTAMP(16), 371 AD7606_CHANNEL(0), 372 AD7606_CHANNEL(1), 373 AD7606_CHANNEL(2), 374 AD7606_CHANNEL(3), 375 AD7606_CHANNEL(4), 376 AD7606_CHANNEL(5), 377 AD7606_CHANNEL(6), 378 AD7606_CHANNEL(7), 379 AD7606_CHANNEL(8), 380 AD7606_CHANNEL(9), 381 AD7606_CHANNEL(10), 382 AD7606_CHANNEL(11), 383 AD7606_CHANNEL(12), 384 AD7606_CHANNEL(13), 385 AD7606_CHANNEL(14), 386 AD7606_CHANNEL(15), 387 }; 388 389 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { 390 /* More devices added in future */ 391 [ID_AD7605_4] = { 392 .channels = ad7605_channels, 393 .num_channels = 5, 394 }, 395 [ID_AD7606_8] = { 396 .channels = ad7606_channels, 397 .num_channels = 9, 398 .oversampling_avail = ad7606_oversampling_avail, 399 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 400 }, 401 [ID_AD7606_6] = { 402 .channels = ad7606_channels, 403 .num_channels = 7, 404 .oversampling_avail = ad7606_oversampling_avail, 405 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 406 }, 407 [ID_AD7606_4] = { 408 .channels = ad7606_channels, 409 .num_channels = 5, 410 .oversampling_avail = ad7606_oversampling_avail, 411 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 412 }, 413 [ID_AD7606B] = { 414 .channels = ad7606_channels, 415 .num_channels = 9, 416 .oversampling_avail = ad7606_oversampling_avail, 417 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 418 }, 419 [ID_AD7616] = { 420 .channels = ad7616_channels, 421 .num_channels = 17, 422 .oversampling_avail = ad7616_oversampling_avail, 423 .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail), 424 .os_req_reset = true, 425 .init_delay_ms = 15, 426 }, 427 }; 428 429 static int ad7606_request_gpios(struct ad7606_state *st) 430 { 431 struct device *dev = st->dev; 432 433 st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start", 434 GPIOD_OUT_LOW); 435 if (IS_ERR(st->gpio_convst)) 436 return PTR_ERR(st->gpio_convst); 437 438 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 439 if (IS_ERR(st->gpio_reset)) 440 return PTR_ERR(st->gpio_reset); 441 442 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range", 443 GPIOD_OUT_LOW); 444 if (IS_ERR(st->gpio_range)) 445 return PTR_ERR(st->gpio_range); 446 447 st->gpio_standby = devm_gpiod_get_optional(dev, "standby", 448 GPIOD_OUT_HIGH); 449 if (IS_ERR(st->gpio_standby)) 450 return PTR_ERR(st->gpio_standby); 451 452 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data", 453 GPIOD_IN); 454 if (IS_ERR(st->gpio_frstdata)) 455 return PTR_ERR(st->gpio_frstdata); 456 457 if (!st->chip_info->oversampling_num) 458 return 0; 459 460 st->gpio_os = devm_gpiod_get_array_optional(dev, 461 "adi,oversampling-ratio", 462 GPIOD_OUT_LOW); 463 return PTR_ERR_OR_ZERO(st->gpio_os); 464 } 465 466 /* 467 * The BUSY signal indicates when conversions are in progress, so when a rising 468 * edge of CONVST is applied, BUSY goes logic high and transitions low at the 469 * end of the entire conversion process. The falling edge of the BUSY signal 470 * triggers this interrupt. 471 */ 472 static irqreturn_t ad7606_interrupt(int irq, void *dev_id) 473 { 474 struct iio_dev *indio_dev = dev_id; 475 struct ad7606_state *st = iio_priv(indio_dev); 476 477 if (iio_buffer_enabled(indio_dev)) { 478 gpiod_set_value(st->gpio_convst, 0); 479 iio_trigger_poll_chained(st->trig); 480 } else { 481 complete(&st->completion); 482 } 483 484 return IRQ_HANDLED; 485 }; 486 487 static int ad7606_validate_trigger(struct iio_dev *indio_dev, 488 struct iio_trigger *trig) 489 { 490 struct ad7606_state *st = iio_priv(indio_dev); 491 492 if (st->trig != trig) 493 return -EINVAL; 494 495 return 0; 496 } 497 498 static int ad7606_buffer_postenable(struct iio_dev *indio_dev) 499 { 500 struct ad7606_state *st = iio_priv(indio_dev); 501 502 gpiod_set_value(st->gpio_convst, 1); 503 504 return 0; 505 } 506 507 static int ad7606_buffer_predisable(struct iio_dev *indio_dev) 508 { 509 struct ad7606_state *st = iio_priv(indio_dev); 510 511 gpiod_set_value(st->gpio_convst, 0); 512 513 return 0; 514 } 515 516 static const struct iio_buffer_setup_ops ad7606_buffer_ops = { 517 .postenable = &ad7606_buffer_postenable, 518 .predisable = &ad7606_buffer_predisable, 519 }; 520 521 static const struct iio_info ad7606_info_no_os_or_range = { 522 .read_raw = &ad7606_read_raw, 523 .validate_trigger = &ad7606_validate_trigger, 524 }; 525 526 static const struct iio_info ad7606_info_os_and_range = { 527 .read_raw = &ad7606_read_raw, 528 .write_raw = &ad7606_write_raw, 529 .attrs = &ad7606_attribute_group_os_and_range, 530 .validate_trigger = &ad7606_validate_trigger, 531 }; 532 533 static const struct iio_info ad7606_info_os_range_and_debug = { 534 .read_raw = &ad7606_read_raw, 535 .write_raw = &ad7606_write_raw, 536 .debugfs_reg_access = &ad7606_reg_access, 537 .attrs = &ad7606_attribute_group_os_and_range, 538 .validate_trigger = &ad7606_validate_trigger, 539 }; 540 541 static const struct iio_info ad7606_info_os = { 542 .read_raw = &ad7606_read_raw, 543 .write_raw = &ad7606_write_raw, 544 .attrs = &ad7606_attribute_group_os, 545 .validate_trigger = &ad7606_validate_trigger, 546 }; 547 548 static const struct iio_info ad7606_info_range = { 549 .read_raw = &ad7606_read_raw, 550 .write_raw = &ad7606_write_raw, 551 .attrs = &ad7606_attribute_group_range, 552 .validate_trigger = &ad7606_validate_trigger, 553 }; 554 555 static const struct iio_trigger_ops ad7606_trigger_ops = { 556 .validate_device = iio_trigger_validate_own_device, 557 }; 558 559 static void ad7606_regulator_disable(void *data) 560 { 561 struct ad7606_state *st = data; 562 563 regulator_disable(st->reg); 564 } 565 566 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 567 const char *name, unsigned int id, 568 const struct ad7606_bus_ops *bops) 569 { 570 struct ad7606_state *st; 571 int ret; 572 struct iio_dev *indio_dev; 573 574 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 575 if (!indio_dev) 576 return -ENOMEM; 577 578 st = iio_priv(indio_dev); 579 dev_set_drvdata(dev, indio_dev); 580 581 st->dev = dev; 582 mutex_init(&st->lock); 583 st->bops = bops; 584 st->base_address = base_address; 585 /* tied to logic low, analog input range is +/- 5V */ 586 st->range[0] = 0; 587 st->oversampling = 1; 588 st->scale_avail = ad7606_scale_avail; 589 st->num_scales = ARRAY_SIZE(ad7606_scale_avail); 590 591 st->reg = devm_regulator_get(dev, "avcc"); 592 if (IS_ERR(st->reg)) 593 return PTR_ERR(st->reg); 594 595 ret = regulator_enable(st->reg); 596 if (ret) { 597 dev_err(dev, "Failed to enable specified AVcc supply\n"); 598 return ret; 599 } 600 601 ret = devm_add_action_or_reset(dev, ad7606_regulator_disable, st); 602 if (ret) 603 return ret; 604 605 st->chip_info = &ad7606_chip_info_tbl[id]; 606 607 if (st->chip_info->oversampling_num) { 608 st->oversampling_avail = st->chip_info->oversampling_avail; 609 st->num_os_ratios = st->chip_info->oversampling_num; 610 } 611 612 ret = ad7606_request_gpios(st); 613 if (ret) 614 return ret; 615 616 if (st->gpio_os) { 617 if (st->gpio_range) 618 indio_dev->info = &ad7606_info_os_and_range; 619 else 620 indio_dev->info = &ad7606_info_os; 621 } else { 622 if (st->gpio_range) 623 indio_dev->info = &ad7606_info_range; 624 else 625 indio_dev->info = &ad7606_info_no_os_or_range; 626 } 627 indio_dev->modes = INDIO_DIRECT_MODE; 628 indio_dev->name = name; 629 indio_dev->channels = st->chip_info->channels; 630 indio_dev->num_channels = st->chip_info->num_channels; 631 632 init_completion(&st->completion); 633 634 ret = ad7606_reset(st); 635 if (ret) 636 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); 637 638 /* AD7616 requires al least 15ms to reconfigure after a reset */ 639 if (st->chip_info->init_delay_ms) { 640 if (msleep_interruptible(st->chip_info->init_delay_ms)) 641 return -ERESTARTSYS; 642 } 643 644 st->write_scale = ad7606_write_scale_hw; 645 st->write_os = ad7606_write_os_hw; 646 647 if (st->bops->sw_mode_config) 648 st->sw_mode_en = device_property_present(st->dev, 649 "adi,sw-mode"); 650 651 if (st->sw_mode_en) { 652 /* Scale of 0.076293 is only available in sw mode */ 653 st->scale_avail = ad7616_sw_scale_avail; 654 st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail); 655 656 /* After reset, in software mode, ±10 V is set by default */ 657 memset32(st->range, 2, ARRAY_SIZE(st->range)); 658 indio_dev->info = &ad7606_info_os_range_and_debug; 659 660 ret = st->bops->sw_mode_config(indio_dev); 661 if (ret < 0) 662 return ret; 663 } 664 665 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", 666 indio_dev->name, indio_dev->id); 667 if (!st->trig) 668 return -ENOMEM; 669 670 st->trig->ops = &ad7606_trigger_ops; 671 st->trig->dev.parent = dev; 672 iio_trigger_set_drvdata(st->trig, indio_dev); 673 ret = devm_iio_trigger_register(dev, st->trig); 674 if (ret) 675 return ret; 676 677 indio_dev->trig = iio_trigger_get(st->trig); 678 679 ret = devm_request_threaded_irq(dev, irq, 680 NULL, 681 &ad7606_interrupt, 682 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 683 name, indio_dev); 684 if (ret) 685 return ret; 686 687 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 688 &iio_pollfunc_store_time, 689 &ad7606_trigger_handler, 690 &ad7606_buffer_ops); 691 if (ret) 692 return ret; 693 694 return devm_iio_device_register(dev, indio_dev); 695 } 696 EXPORT_SYMBOL_GPL(ad7606_probe); 697 698 #ifdef CONFIG_PM_SLEEP 699 700 static int ad7606_suspend(struct device *dev) 701 { 702 struct iio_dev *indio_dev = dev_get_drvdata(dev); 703 struct ad7606_state *st = iio_priv(indio_dev); 704 705 if (st->gpio_standby) { 706 gpiod_set_value(st->gpio_range, 1); 707 gpiod_set_value(st->gpio_standby, 0); 708 } 709 710 return 0; 711 } 712 713 static int ad7606_resume(struct device *dev) 714 { 715 struct iio_dev *indio_dev = dev_get_drvdata(dev); 716 struct ad7606_state *st = iio_priv(indio_dev); 717 718 if (st->gpio_standby) { 719 gpiod_set_value(st->gpio_range, st->range[0]); 720 gpiod_set_value(st->gpio_standby, 1); 721 ad7606_reset(st); 722 } 723 724 return 0; 725 } 726 727 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume); 728 EXPORT_SYMBOL_GPL(ad7606_pm_ops); 729 730 #endif 731 732 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 733 MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 734 MODULE_LICENSE("GPL v2"); 735