1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AD7606 SPI ADC driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/sched.h> 17 #include <linux/slab.h> 18 #include <linux/sysfs.h> 19 #include <linux/util_macros.h> 20 21 #include <linux/iio/iio.h> 22 #include <linux/iio/buffer.h> 23 #include <linux/iio/sysfs.h> 24 #include <linux/iio/trigger.h> 25 #include <linux/iio/triggered_buffer.h> 26 #include <linux/iio/trigger_consumer.h> 27 28 #include "ad7606.h" 29 30 /* 31 * Scales are computed as 5000/32768 and 10000/32768 respectively, 32 * so that when applied to the raw values they provide mV values 33 */ 34 static const unsigned int ad7606_scale_avail[2] = { 35 152588, 305176 36 }; 37 38 static const unsigned int ad7606_oversampling_avail[7] = { 39 1, 2, 4, 8, 16, 32, 64, 40 }; 41 42 static const unsigned int ad7616_oversampling_avail[8] = { 43 1, 2, 4, 8, 16, 32, 64, 128, 44 }; 45 46 static int ad7606_reset(struct ad7606_state *st) 47 { 48 if (st->gpio_reset) { 49 gpiod_set_value(st->gpio_reset, 1); 50 ndelay(100); /* t_reset >= 100ns */ 51 gpiod_set_value(st->gpio_reset, 0); 52 return 0; 53 } 54 55 return -ENODEV; 56 } 57 58 static int ad7606_read_samples(struct ad7606_state *st) 59 { 60 unsigned int num = st->chip_info->num_channels; 61 u16 *data = st->data; 62 int ret; 63 64 /* 65 * The frstdata signal is set to high while and after reading the sample 66 * of the first channel and low for all other channels. This can be used 67 * to check that the incoming data is correctly aligned. During normal 68 * operation the data should never become unaligned, but some glitch or 69 * electrostatic discharge might cause an extra read or clock cycle. 70 * Monitoring the frstdata signal allows to recover from such failure 71 * situations. 72 */ 73 74 if (st->gpio_frstdata) { 75 ret = st->bops->read_block(st->dev, 1, data); 76 if (ret) 77 return ret; 78 79 if (!gpiod_get_value(st->gpio_frstdata)) { 80 ad7606_reset(st); 81 return -EIO; 82 } 83 84 data++; 85 num--; 86 } 87 88 return st->bops->read_block(st->dev, num, data); 89 } 90 91 static irqreturn_t ad7606_trigger_handler(int irq, void *p) 92 { 93 struct iio_poll_func *pf = p; 94 struct iio_dev *indio_dev = pf->indio_dev; 95 struct ad7606_state *st = iio_priv(indio_dev); 96 int ret; 97 98 mutex_lock(&st->lock); 99 100 ret = ad7606_read_samples(st); 101 if (ret == 0) 102 iio_push_to_buffers_with_timestamp(indio_dev, st->data, 103 iio_get_time_ns(indio_dev)); 104 105 iio_trigger_notify_done(indio_dev->trig); 106 /* The rising edge of the CONVST signal starts a new conversion. */ 107 gpiod_set_value(st->gpio_convst, 1); 108 109 mutex_unlock(&st->lock); 110 111 return IRQ_HANDLED; 112 } 113 114 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) 115 { 116 struct ad7606_state *st = iio_priv(indio_dev); 117 int ret; 118 119 gpiod_set_value(st->gpio_convst, 1); 120 ret = wait_for_completion_timeout(&st->completion, 121 msecs_to_jiffies(1000)); 122 if (!ret) { 123 ret = -ETIMEDOUT; 124 goto error_ret; 125 } 126 127 ret = ad7606_read_samples(st); 128 if (ret == 0) 129 ret = st->data[ch]; 130 131 error_ret: 132 gpiod_set_value(st->gpio_convst, 0); 133 134 return ret; 135 } 136 137 static int ad7606_read_raw(struct iio_dev *indio_dev, 138 struct iio_chan_spec const *chan, 139 int *val, 140 int *val2, 141 long m) 142 { 143 int ret; 144 struct ad7606_state *st = iio_priv(indio_dev); 145 146 switch (m) { 147 case IIO_CHAN_INFO_RAW: 148 ret = iio_device_claim_direct_mode(indio_dev); 149 if (ret) 150 return ret; 151 152 ret = ad7606_scan_direct(indio_dev, chan->address); 153 iio_device_release_direct_mode(indio_dev); 154 155 if (ret < 0) 156 return ret; 157 *val = (short)ret; 158 return IIO_VAL_INT; 159 case IIO_CHAN_INFO_SCALE: 160 *val = 0; 161 *val2 = st->scale_avail[st->range]; 162 return IIO_VAL_INT_PLUS_MICRO; 163 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 164 *val = st->oversampling; 165 return IIO_VAL_INT; 166 } 167 return -EINVAL; 168 } 169 170 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals, 171 unsigned int n, bool micros) 172 { 173 size_t len = 0; 174 int i; 175 176 for (i = 0; i < n; i++) { 177 len += scnprintf(buf + len, PAGE_SIZE - len, 178 micros ? "0.%06u " : "%u ", vals[i]); 179 } 180 buf[len - 1] = '\n'; 181 182 return len; 183 } 184 185 static ssize_t in_voltage_scale_available_show(struct device *dev, 186 struct device_attribute *attr, 187 char *buf) 188 { 189 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 190 struct ad7606_state *st = iio_priv(indio_dev); 191 192 return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true); 193 } 194 195 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); 196 197 static int ad7606_write_raw(struct iio_dev *indio_dev, 198 struct iio_chan_spec const *chan, 199 int val, 200 int val2, 201 long mask) 202 { 203 struct ad7606_state *st = iio_priv(indio_dev); 204 DECLARE_BITMAP(values, 3); 205 int i; 206 207 switch (mask) { 208 case IIO_CHAN_INFO_SCALE: 209 mutex_lock(&st->lock); 210 i = find_closest(val2, st->scale_avail, st->num_scales); 211 gpiod_set_value(st->gpio_range, i); 212 st->range = i; 213 mutex_unlock(&st->lock); 214 215 return 0; 216 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 217 if (val2) 218 return -EINVAL; 219 i = find_closest(val, st->oversampling_avail, 220 st->num_os_ratios); 221 222 values[0] = i; 223 224 mutex_lock(&st->lock); 225 gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc, 226 st->gpio_os->info, values); 227 228 /* AD7616 requires a reset to update value */ 229 if (st->chip_info->os_req_reset) 230 ad7606_reset(st); 231 232 st->oversampling = st->oversampling_avail[i]; 233 mutex_unlock(&st->lock); 234 235 return 0; 236 default: 237 return -EINVAL; 238 } 239 } 240 241 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev, 242 struct device_attribute *attr, 243 char *buf) 244 { 245 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 246 struct ad7606_state *st = iio_priv(indio_dev); 247 248 return ad7606_show_avail(buf, st->oversampling_avail, 249 st->num_os_ratios, false); 250 } 251 252 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444, 253 ad7606_oversampling_ratio_avail, NULL, 0); 254 255 static struct attribute *ad7606_attributes_os_and_range[] = { 256 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 257 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 258 NULL, 259 }; 260 261 static const struct attribute_group ad7606_attribute_group_os_and_range = { 262 .attrs = ad7606_attributes_os_and_range, 263 }; 264 265 static struct attribute *ad7606_attributes_os[] = { 266 &iio_dev_attr_oversampling_ratio_available.dev_attr.attr, 267 NULL, 268 }; 269 270 static const struct attribute_group ad7606_attribute_group_os = { 271 .attrs = ad7606_attributes_os, 272 }; 273 274 static struct attribute *ad7606_attributes_range[] = { 275 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 276 NULL, 277 }; 278 279 static const struct attribute_group ad7606_attribute_group_range = { 280 .attrs = ad7606_attributes_range, 281 }; 282 283 #define AD760X_CHANNEL(num, mask) { \ 284 .type = IIO_VOLTAGE, \ 285 .indexed = 1, \ 286 .channel = num, \ 287 .address = num, \ 288 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 289 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 290 .info_mask_shared_by_all = mask, \ 291 .scan_index = num, \ 292 .scan_type = { \ 293 .sign = 's', \ 294 .realbits = 16, \ 295 .storagebits = 16, \ 296 .endianness = IIO_CPU, \ 297 }, \ 298 } 299 300 #define AD7605_CHANNEL(num) \ 301 AD760X_CHANNEL(num, 0) 302 303 #define AD7606_CHANNEL(num) \ 304 AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) 305 306 static const struct iio_chan_spec ad7605_channels[] = { 307 IIO_CHAN_SOFT_TIMESTAMP(4), 308 AD7605_CHANNEL(0), 309 AD7605_CHANNEL(1), 310 AD7605_CHANNEL(2), 311 AD7605_CHANNEL(3), 312 }; 313 314 static const struct iio_chan_spec ad7606_channels[] = { 315 IIO_CHAN_SOFT_TIMESTAMP(8), 316 AD7606_CHANNEL(0), 317 AD7606_CHANNEL(1), 318 AD7606_CHANNEL(2), 319 AD7606_CHANNEL(3), 320 AD7606_CHANNEL(4), 321 AD7606_CHANNEL(5), 322 AD7606_CHANNEL(6), 323 AD7606_CHANNEL(7), 324 }; 325 326 /* 327 * The current assumption that this driver makes for AD7616, is that it's 328 * working in Hardware Mode with Serial, Burst and Sequencer modes activated. 329 * To activate them, following pins must be pulled high: 330 * -SER/PAR 331 * -SEQEN 332 * And following pins must be pulled low: 333 * -WR/BURST 334 * -DB4/SER1W 335 */ 336 static const struct iio_chan_spec ad7616_channels[] = { 337 IIO_CHAN_SOFT_TIMESTAMP(16), 338 AD7606_CHANNEL(0), 339 AD7606_CHANNEL(1), 340 AD7606_CHANNEL(2), 341 AD7606_CHANNEL(3), 342 AD7606_CHANNEL(4), 343 AD7606_CHANNEL(5), 344 AD7606_CHANNEL(6), 345 AD7606_CHANNEL(7), 346 AD7606_CHANNEL(8), 347 AD7606_CHANNEL(9), 348 AD7606_CHANNEL(10), 349 AD7606_CHANNEL(11), 350 AD7606_CHANNEL(12), 351 AD7606_CHANNEL(13), 352 AD7606_CHANNEL(14), 353 AD7606_CHANNEL(15), 354 }; 355 356 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { 357 /* More devices added in future */ 358 [ID_AD7605_4] = { 359 .channels = ad7605_channels, 360 .num_channels = 5, 361 }, 362 [ID_AD7606_8] = { 363 .channels = ad7606_channels, 364 .num_channels = 9, 365 .oversampling_avail = ad7606_oversampling_avail, 366 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 367 }, 368 [ID_AD7606_6] = { 369 .channels = ad7606_channels, 370 .num_channels = 7, 371 .oversampling_avail = ad7606_oversampling_avail, 372 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 373 }, 374 [ID_AD7606_4] = { 375 .channels = ad7606_channels, 376 .num_channels = 5, 377 .oversampling_avail = ad7606_oversampling_avail, 378 .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail), 379 }, 380 [ID_AD7616] = { 381 .channels = ad7616_channels, 382 .num_channels = 17, 383 .oversampling_avail = ad7616_oversampling_avail, 384 .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail), 385 .os_req_reset = true, 386 }, 387 }; 388 389 static int ad7606_request_gpios(struct ad7606_state *st) 390 { 391 struct device *dev = st->dev; 392 393 st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start", 394 GPIOD_OUT_LOW); 395 if (IS_ERR(st->gpio_convst)) 396 return PTR_ERR(st->gpio_convst); 397 398 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 399 if (IS_ERR(st->gpio_reset)) 400 return PTR_ERR(st->gpio_reset); 401 402 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range", 403 GPIOD_OUT_LOW); 404 if (IS_ERR(st->gpio_range)) 405 return PTR_ERR(st->gpio_range); 406 407 st->gpio_standby = devm_gpiod_get_optional(dev, "standby", 408 GPIOD_OUT_HIGH); 409 if (IS_ERR(st->gpio_standby)) 410 return PTR_ERR(st->gpio_standby); 411 412 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data", 413 GPIOD_IN); 414 if (IS_ERR(st->gpio_frstdata)) 415 return PTR_ERR(st->gpio_frstdata); 416 417 if (!st->chip_info->oversampling_num) 418 return 0; 419 420 st->gpio_os = devm_gpiod_get_array_optional(dev, 421 "adi,oversampling-ratio", 422 GPIOD_OUT_LOW); 423 return PTR_ERR_OR_ZERO(st->gpio_os); 424 } 425 426 /* 427 * The BUSY signal indicates when conversions are in progress, so when a rising 428 * edge of CONVST is applied, BUSY goes logic high and transitions low at the 429 * end of the entire conversion process. The falling edge of the BUSY signal 430 * triggers this interrupt. 431 */ 432 static irqreturn_t ad7606_interrupt(int irq, void *dev_id) 433 { 434 struct iio_dev *indio_dev = dev_id; 435 struct ad7606_state *st = iio_priv(indio_dev); 436 437 if (iio_buffer_enabled(indio_dev)) { 438 gpiod_set_value(st->gpio_convst, 0); 439 iio_trigger_poll_chained(st->trig); 440 } else { 441 complete(&st->completion); 442 } 443 444 return IRQ_HANDLED; 445 }; 446 447 static int ad7606_validate_trigger(struct iio_dev *indio_dev, 448 struct iio_trigger *trig) 449 { 450 struct ad7606_state *st = iio_priv(indio_dev); 451 452 if (st->trig != trig) 453 return -EINVAL; 454 455 return 0; 456 } 457 458 static int ad7606_buffer_postenable(struct iio_dev *indio_dev) 459 { 460 struct ad7606_state *st = iio_priv(indio_dev); 461 462 iio_triggered_buffer_postenable(indio_dev); 463 gpiod_set_value(st->gpio_convst, 1); 464 465 return 0; 466 } 467 468 static int ad7606_buffer_predisable(struct iio_dev *indio_dev) 469 { 470 struct ad7606_state *st = iio_priv(indio_dev); 471 472 gpiod_set_value(st->gpio_convst, 0); 473 474 return iio_triggered_buffer_predisable(indio_dev); 475 } 476 477 static const struct iio_buffer_setup_ops ad7606_buffer_ops = { 478 .postenable = &ad7606_buffer_postenable, 479 .predisable = &ad7606_buffer_predisable, 480 }; 481 482 static const struct iio_info ad7606_info_no_os_or_range = { 483 .read_raw = &ad7606_read_raw, 484 .validate_trigger = &ad7606_validate_trigger, 485 }; 486 487 static const struct iio_info ad7606_info_os_and_range = { 488 .read_raw = &ad7606_read_raw, 489 .write_raw = &ad7606_write_raw, 490 .attrs = &ad7606_attribute_group_os_and_range, 491 .validate_trigger = &ad7606_validate_trigger, 492 }; 493 494 static const struct iio_info ad7606_info_os = { 495 .read_raw = &ad7606_read_raw, 496 .write_raw = &ad7606_write_raw, 497 .attrs = &ad7606_attribute_group_os, 498 .validate_trigger = &ad7606_validate_trigger, 499 }; 500 501 static const struct iio_info ad7606_info_range = { 502 .read_raw = &ad7606_read_raw, 503 .write_raw = &ad7606_write_raw, 504 .attrs = &ad7606_attribute_group_range, 505 .validate_trigger = &ad7606_validate_trigger, 506 }; 507 508 static const struct iio_trigger_ops ad7606_trigger_ops = { 509 .validate_device = iio_trigger_validate_own_device, 510 }; 511 512 static void ad7606_regulator_disable(void *data) 513 { 514 struct ad7606_state *st = data; 515 516 regulator_disable(st->reg); 517 } 518 519 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 520 const char *name, unsigned int id, 521 const struct ad7606_bus_ops *bops) 522 { 523 struct ad7606_state *st; 524 int ret; 525 struct iio_dev *indio_dev; 526 527 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 528 if (!indio_dev) 529 return -ENOMEM; 530 531 st = iio_priv(indio_dev); 532 dev_set_drvdata(dev, indio_dev); 533 534 st->dev = dev; 535 mutex_init(&st->lock); 536 st->bops = bops; 537 st->base_address = base_address; 538 /* tied to logic low, analog input range is +/- 5V */ 539 st->range = 0; 540 st->oversampling = 1; 541 st->scale_avail = ad7606_scale_avail; 542 st->num_scales = ARRAY_SIZE(ad7606_scale_avail); 543 544 st->reg = devm_regulator_get(dev, "avcc"); 545 if (IS_ERR(st->reg)) 546 return PTR_ERR(st->reg); 547 548 ret = regulator_enable(st->reg); 549 if (ret) { 550 dev_err(dev, "Failed to enable specified AVcc supply\n"); 551 return ret; 552 } 553 554 ret = devm_add_action_or_reset(dev, ad7606_regulator_disable, st); 555 if (ret) 556 return ret; 557 558 st->chip_info = &ad7606_chip_info_tbl[id]; 559 560 if (st->chip_info->oversampling_num) { 561 st->oversampling_avail = st->chip_info->oversampling_avail; 562 st->num_os_ratios = st->chip_info->oversampling_num; 563 } 564 565 ret = ad7606_request_gpios(st); 566 if (ret) 567 return ret; 568 569 indio_dev->dev.parent = dev; 570 if (st->gpio_os) { 571 if (st->gpio_range) 572 indio_dev->info = &ad7606_info_os_and_range; 573 else 574 indio_dev->info = &ad7606_info_os; 575 } else { 576 if (st->gpio_range) 577 indio_dev->info = &ad7606_info_range; 578 else 579 indio_dev->info = &ad7606_info_no_os_or_range; 580 } 581 indio_dev->modes = INDIO_DIRECT_MODE; 582 indio_dev->name = name; 583 indio_dev->channels = st->chip_info->channels; 584 indio_dev->num_channels = st->chip_info->num_channels; 585 586 init_completion(&st->completion); 587 588 ret = ad7606_reset(st); 589 if (ret) 590 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); 591 592 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", 593 indio_dev->name, indio_dev->id); 594 if (!st->trig) 595 return -ENOMEM; 596 597 st->trig->ops = &ad7606_trigger_ops; 598 st->trig->dev.parent = dev; 599 iio_trigger_set_drvdata(st->trig, indio_dev); 600 ret = devm_iio_trigger_register(dev, st->trig); 601 if (ret) 602 return ret; 603 604 indio_dev->trig = iio_trigger_get(st->trig); 605 606 ret = devm_request_threaded_irq(dev, irq, 607 NULL, 608 &ad7606_interrupt, 609 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 610 name, indio_dev); 611 if (ret) 612 return ret; 613 614 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 615 &iio_pollfunc_store_time, 616 &ad7606_trigger_handler, 617 &ad7606_buffer_ops); 618 if (ret) 619 return ret; 620 621 return devm_iio_device_register(dev, indio_dev); 622 } 623 EXPORT_SYMBOL_GPL(ad7606_probe); 624 625 #ifdef CONFIG_PM_SLEEP 626 627 static int ad7606_suspend(struct device *dev) 628 { 629 struct iio_dev *indio_dev = dev_get_drvdata(dev); 630 struct ad7606_state *st = iio_priv(indio_dev); 631 632 if (st->gpio_standby) { 633 gpiod_set_value(st->gpio_range, 1); 634 gpiod_set_value(st->gpio_standby, 0); 635 } 636 637 return 0; 638 } 639 640 static int ad7606_resume(struct device *dev) 641 { 642 struct iio_dev *indio_dev = dev_get_drvdata(dev); 643 struct ad7606_state *st = iio_priv(indio_dev); 644 645 if (st->gpio_standby) { 646 gpiod_set_value(st->gpio_range, st->range); 647 gpiod_set_value(st->gpio_standby, 1); 648 ad7606_reset(st); 649 } 650 651 return 0; 652 } 653 654 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume); 655 EXPORT_SYMBOL_GPL(ad7606_pm_ops); 656 657 #endif 658 659 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 660 MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 661 MODULE_LICENSE("GPL v2"); 662