1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AD7298 SPI ADC driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #include <linux/device.h> 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <linux/sysfs.h> 12 #include <linux/spi/spi.h> 13 #include <linux/regulator/consumer.h> 14 #include <linux/err.h> 15 #include <linux/delay.h> 16 #include <linux/module.h> 17 #include <linux/interrupt.h> 18 #include <linux/bitops.h> 19 20 #include <linux/iio/iio.h> 21 #include <linux/iio/sysfs.h> 22 #include <linux/iio/buffer.h> 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 26 #define AD7298_WRITE BIT(15) /* write to the control register */ 27 #define AD7298_REPEAT BIT(14) /* repeated conversion enable */ 28 #define AD7298_CH(x) BIT(13 - (x)) /* channel select */ 29 #define AD7298_TSENSE BIT(5) /* temperature conversion enable */ 30 #define AD7298_EXTREF BIT(2) /* external reference enable */ 31 #define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */ 32 #define AD7298_PDD BIT(0) /* partial power down enable */ 33 34 #define AD7298_MAX_CHAN 8 35 #define AD7298_INTREF_mV 2500 36 37 #define AD7298_CH_TEMP 9 38 39 struct ad7298_state { 40 struct spi_device *spi; 41 struct regulator *reg; 42 unsigned ext_ref; 43 struct spi_transfer ring_xfer[10]; 44 struct spi_transfer scan_single_xfer[3]; 45 struct spi_message ring_msg; 46 struct spi_message scan_single_msg; 47 /* 48 * DMA (thus cache coherency maintenance) requires the 49 * transfer buffers to live in their own cache lines. 50 */ 51 __be16 rx_buf[12] ____cacheline_aligned; 52 __be16 tx_buf[2]; 53 }; 54 55 #define AD7298_V_CHAN(index) \ 56 { \ 57 .type = IIO_VOLTAGE, \ 58 .indexed = 1, \ 59 .channel = index, \ 60 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 61 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 62 .address = index, \ 63 .scan_index = index, \ 64 .scan_type = { \ 65 .sign = 'u', \ 66 .realbits = 12, \ 67 .storagebits = 16, \ 68 .endianness = IIO_BE, \ 69 }, \ 70 } 71 72 static const struct iio_chan_spec ad7298_channels[] = { 73 { 74 .type = IIO_TEMP, 75 .indexed = 1, 76 .channel = 0, 77 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 78 BIT(IIO_CHAN_INFO_SCALE) | 79 BIT(IIO_CHAN_INFO_OFFSET), 80 .address = AD7298_CH_TEMP, 81 .scan_index = -1, 82 .scan_type = { 83 .sign = 's', 84 .realbits = 32, 85 .storagebits = 32, 86 }, 87 }, 88 AD7298_V_CHAN(0), 89 AD7298_V_CHAN(1), 90 AD7298_V_CHAN(2), 91 AD7298_V_CHAN(3), 92 AD7298_V_CHAN(4), 93 AD7298_V_CHAN(5), 94 AD7298_V_CHAN(6), 95 AD7298_V_CHAN(7), 96 IIO_CHAN_SOFT_TIMESTAMP(8), 97 }; 98 99 /* 100 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask 101 */ 102 static int ad7298_update_scan_mode(struct iio_dev *indio_dev, 103 const unsigned long *active_scan_mask) 104 { 105 struct ad7298_state *st = iio_priv(indio_dev); 106 int i, m; 107 unsigned short command; 108 int scan_count; 109 110 /* Now compute overall size */ 111 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength); 112 113 command = AD7298_WRITE | st->ext_ref; 114 115 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1) 116 if (test_bit(i, active_scan_mask)) 117 command |= m; 118 119 st->tx_buf[0] = cpu_to_be16(command); 120 121 /* build spi ring message */ 122 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; 123 st->ring_xfer[0].len = 2; 124 st->ring_xfer[0].cs_change = 1; 125 st->ring_xfer[1].tx_buf = &st->tx_buf[1]; 126 st->ring_xfer[1].len = 2; 127 st->ring_xfer[1].cs_change = 1; 128 129 spi_message_init(&st->ring_msg); 130 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg); 131 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg); 132 133 for (i = 0; i < scan_count; i++) { 134 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i]; 135 st->ring_xfer[i + 2].len = 2; 136 st->ring_xfer[i + 2].cs_change = 1; 137 spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg); 138 } 139 /* make sure last transfer cs_change is not set */ 140 st->ring_xfer[i + 1].cs_change = 0; 141 142 return 0; 143 } 144 145 static irqreturn_t ad7298_trigger_handler(int irq, void *p) 146 { 147 struct iio_poll_func *pf = p; 148 struct iio_dev *indio_dev = pf->indio_dev; 149 struct ad7298_state *st = iio_priv(indio_dev); 150 int b_sent; 151 152 b_sent = spi_sync(st->spi, &st->ring_msg); 153 if (b_sent) 154 goto done; 155 156 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, 157 iio_get_time_ns(indio_dev)); 158 159 done: 160 iio_trigger_notify_done(indio_dev->trig); 161 162 return IRQ_HANDLED; 163 } 164 165 static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch) 166 { 167 int ret; 168 st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref | 169 (AD7298_CH(0) >> ch)); 170 171 ret = spi_sync(st->spi, &st->scan_single_msg); 172 if (ret) 173 return ret; 174 175 return be16_to_cpu(st->rx_buf[0]); 176 } 177 178 static int ad7298_scan_temp(struct ad7298_state *st, int *val) 179 { 180 int ret; 181 __be16 buf; 182 183 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE | 184 AD7298_TAVG | st->ext_ref); 185 186 ret = spi_write(st->spi, (u8 *)&buf, 2); 187 if (ret) 188 return ret; 189 190 buf = cpu_to_be16(0); 191 192 ret = spi_write(st->spi, (u8 *)&buf, 2); 193 if (ret) 194 return ret; 195 196 usleep_range(101, 1000); /* sleep > 100us */ 197 198 ret = spi_read(st->spi, (u8 *)&buf, 2); 199 if (ret) 200 return ret; 201 202 *val = sign_extend32(be16_to_cpu(buf), 11); 203 204 return 0; 205 } 206 207 static int ad7298_get_ref_voltage(struct ad7298_state *st) 208 { 209 int vref; 210 211 if (st->reg) { 212 vref = regulator_get_voltage(st->reg); 213 if (vref < 0) 214 return vref; 215 216 return vref / 1000; 217 } else { 218 return AD7298_INTREF_mV; 219 } 220 } 221 222 static int ad7298_read_raw(struct iio_dev *indio_dev, 223 struct iio_chan_spec const *chan, 224 int *val, 225 int *val2, 226 long m) 227 { 228 int ret; 229 struct ad7298_state *st = iio_priv(indio_dev); 230 231 switch (m) { 232 case IIO_CHAN_INFO_RAW: 233 ret = iio_device_claim_direct_mode(indio_dev); 234 if (ret) 235 return ret; 236 237 if (chan->address == AD7298_CH_TEMP) 238 ret = ad7298_scan_temp(st, val); 239 else 240 ret = ad7298_scan_direct(st, chan->address); 241 242 iio_device_release_direct_mode(indio_dev); 243 244 if (ret < 0) 245 return ret; 246 247 if (chan->address != AD7298_CH_TEMP) 248 *val = ret & GENMASK(chan->scan_type.realbits - 1, 0); 249 250 return IIO_VAL_INT; 251 case IIO_CHAN_INFO_SCALE: 252 switch (chan->type) { 253 case IIO_VOLTAGE: 254 *val = ad7298_get_ref_voltage(st); 255 *val2 = chan->scan_type.realbits; 256 return IIO_VAL_FRACTIONAL_LOG2; 257 case IIO_TEMP: 258 *val = ad7298_get_ref_voltage(st); 259 *val2 = 10; 260 return IIO_VAL_FRACTIONAL; 261 default: 262 return -EINVAL; 263 } 264 case IIO_CHAN_INFO_OFFSET: 265 *val = 1093 - 2732500 / ad7298_get_ref_voltage(st); 266 return IIO_VAL_INT; 267 } 268 return -EINVAL; 269 } 270 271 static const struct iio_info ad7298_info = { 272 .read_raw = &ad7298_read_raw, 273 .update_scan_mode = ad7298_update_scan_mode, 274 }; 275 276 static void ad7298_reg_disable(void *data) 277 { 278 struct regulator *reg = data; 279 280 regulator_disable(reg); 281 } 282 283 static int ad7298_probe(struct spi_device *spi) 284 { 285 struct ad7298_state *st; 286 struct iio_dev *indio_dev; 287 int ret; 288 289 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 290 if (indio_dev == NULL) 291 return -ENOMEM; 292 293 st = iio_priv(indio_dev); 294 295 st->reg = devm_regulator_get_optional(&spi->dev, "vref"); 296 if (!IS_ERR(st->reg)) { 297 st->ext_ref = AD7298_EXTREF; 298 } else { 299 ret = PTR_ERR(st->reg); 300 if (ret != -ENODEV) 301 return ret; 302 303 st->reg = NULL; 304 } 305 306 if (st->reg) { 307 ret = regulator_enable(st->reg); 308 if (ret) 309 return ret; 310 311 ret = devm_add_action_or_reset(&spi->dev, ad7298_reg_disable, 312 st->reg); 313 if (ret) 314 return ret; 315 } 316 317 st->spi = spi; 318 319 indio_dev->name = spi_get_device_id(spi)->name; 320 indio_dev->modes = INDIO_DIRECT_MODE; 321 indio_dev->channels = ad7298_channels; 322 indio_dev->num_channels = ARRAY_SIZE(ad7298_channels); 323 indio_dev->info = &ad7298_info; 324 325 /* Setup default message */ 326 327 st->scan_single_xfer[0].tx_buf = &st->tx_buf[0]; 328 st->scan_single_xfer[0].len = 2; 329 st->scan_single_xfer[0].cs_change = 1; 330 st->scan_single_xfer[1].tx_buf = &st->tx_buf[1]; 331 st->scan_single_xfer[1].len = 2; 332 st->scan_single_xfer[1].cs_change = 1; 333 st->scan_single_xfer[2].rx_buf = &st->rx_buf[0]; 334 st->scan_single_xfer[2].len = 2; 335 336 spi_message_init(&st->scan_single_msg); 337 spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg); 338 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg); 339 spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg); 340 341 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL, 342 &ad7298_trigger_handler, NULL); 343 if (ret) 344 return ret; 345 346 return devm_iio_device_register(&spi->dev, indio_dev); 347 } 348 349 static const struct spi_device_id ad7298_id[] = { 350 {"ad7298", 0}, 351 {} 352 }; 353 MODULE_DEVICE_TABLE(spi, ad7298_id); 354 355 static struct spi_driver ad7298_driver = { 356 .driver = { 357 .name = "ad7298", 358 }, 359 .probe = ad7298_probe, 360 .id_table = ad7298_id, 361 }; 362 module_spi_driver(ad7298_driver); 363 364 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 365 MODULE_DESCRIPTION("Analog Devices AD7298 ADC"); 366 MODULE_LICENSE("GPL v2"); 367