1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Analog Devices AD7292 SPI ADC driver 4 * 5 * Copyright 2019 Analog Devices Inc. 6 */ 7 8 #include <linux/bitfield.h> 9 #include <linux/device.h> 10 #include <linux/module.h> 11 #include <linux/of.h> 12 #include <linux/regulator/consumer.h> 13 #include <linux/spi/spi.h> 14 15 #include <linux/iio/iio.h> 16 17 #define ADI_VENDOR_ID 0x0018 18 19 /* AD7292 registers definition */ 20 #define AD7292_REG_VENDOR_ID 0x00 21 #define AD7292_REG_CONF_BANK 0x05 22 #define AD7292_REG_CONV_COMM 0x0E 23 #define AD7292_REG_ADC_CH(x) (0x10 + (x)) 24 25 /* AD7292 configuration bank subregisters definition */ 26 #define AD7292_BANK_REG_VIN_RNG0 0x10 27 #define AD7292_BANK_REG_VIN_RNG1 0x11 28 #define AD7292_BANK_REG_SAMP_MODE 0x12 29 30 #define AD7292_RD_FLAG_MSK(x) (BIT(7) | ((x) & 0x3F)) 31 32 /* AD7292_REG_ADC_CONVERSION */ 33 #define AD7292_ADC_DATA_MASK GENMASK(15, 6) 34 #define AD7292_ADC_DATA(x) FIELD_GET(AD7292_ADC_DATA_MASK, x) 35 36 /* AD7292_CHANNEL_SAMPLING_MODE */ 37 #define AD7292_CH_SAMP_MODE(reg, ch) (((reg) >> 8) & BIT(ch)) 38 39 /* AD7292_CHANNEL_VIN_RANGE */ 40 #define AD7292_CH_VIN_RANGE(reg, ch) ((reg) & BIT(ch)) 41 42 #define AD7292_VOLTAGE_CHAN(_chan) \ 43 { \ 44 .type = IIO_VOLTAGE, \ 45 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 46 BIT(IIO_CHAN_INFO_SCALE), \ 47 .indexed = 1, \ 48 .channel = _chan, \ 49 } 50 51 static const struct iio_chan_spec ad7292_channels[] = { 52 AD7292_VOLTAGE_CHAN(0), 53 AD7292_VOLTAGE_CHAN(1), 54 AD7292_VOLTAGE_CHAN(2), 55 AD7292_VOLTAGE_CHAN(3), 56 AD7292_VOLTAGE_CHAN(4), 57 AD7292_VOLTAGE_CHAN(5), 58 AD7292_VOLTAGE_CHAN(6), 59 AD7292_VOLTAGE_CHAN(7) 60 }; 61 62 static const struct iio_chan_spec ad7292_channels_diff[] = { 63 { 64 .type = IIO_VOLTAGE, 65 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 66 .indexed = 1, 67 .differential = 1, 68 .channel = 0, 69 .channel2 = 1, 70 }, 71 AD7292_VOLTAGE_CHAN(2), 72 AD7292_VOLTAGE_CHAN(3), 73 AD7292_VOLTAGE_CHAN(4), 74 AD7292_VOLTAGE_CHAN(5), 75 AD7292_VOLTAGE_CHAN(6), 76 AD7292_VOLTAGE_CHAN(7) 77 }; 78 79 struct ad7292_state { 80 struct spi_device *spi; 81 struct regulator *reg; 82 unsigned short vref_mv; 83 84 __be16 d16 __aligned(IIO_DMA_MINALIGN); 85 u8 d8[2]; 86 }; 87 88 static int ad7292_spi_reg_read(struct ad7292_state *st, unsigned int addr) 89 { 90 int ret; 91 92 st->d8[0] = AD7292_RD_FLAG_MSK(addr); 93 94 ret = spi_write_then_read(st->spi, st->d8, 1, &st->d16, 2); 95 if (ret < 0) 96 return ret; 97 98 return be16_to_cpu(st->d16); 99 } 100 101 static int ad7292_spi_subreg_read(struct ad7292_state *st, unsigned int addr, 102 unsigned int sub_addr, unsigned int len) 103 { 104 unsigned int shift = 16 - (8 * len); 105 int ret; 106 107 st->d8[0] = AD7292_RD_FLAG_MSK(addr); 108 st->d8[1] = sub_addr; 109 110 ret = spi_write_then_read(st->spi, st->d8, 2, &st->d16, len); 111 if (ret < 0) 112 return ret; 113 114 return (be16_to_cpu(st->d16) >> shift); 115 } 116 117 static int ad7292_single_conversion(struct ad7292_state *st, 118 unsigned int chan_addr) 119 { 120 int ret; 121 122 struct spi_transfer t[] = { 123 { 124 .tx_buf = &st->d8, 125 .len = 4, 126 .delay = { 127 .value = 6, 128 .unit = SPI_DELAY_UNIT_USECS 129 }, 130 }, { 131 .rx_buf = &st->d16, 132 .len = 2, 133 }, 134 }; 135 136 st->d8[0] = chan_addr; 137 st->d8[1] = AD7292_RD_FLAG_MSK(AD7292_REG_CONV_COMM); 138 139 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 140 141 if (ret < 0) 142 return ret; 143 144 return be16_to_cpu(st->d16); 145 } 146 147 static int ad7292_vin_range_multiplier(struct ad7292_state *st, int channel) 148 { 149 int samp_mode, range0, range1, factor = 1; 150 151 /* 152 * Every AD7292 ADC channel may have its input range adjusted according 153 * to the settings at the ADC sampling mode and VIN range subregisters. 154 * For a given channel, the minimum input range is equal to Vref, and it 155 * may be increased by a multiplier factor of 2 or 4 according to the 156 * following rule: 157 * If channel is being sampled with respect to AGND: 158 * factor = 4 if VIN range0 and VIN range1 equal 0 159 * factor = 2 if only one of VIN ranges equal 1 160 * factor = 1 if both VIN range0 and VIN range1 equal 1 161 * If channel is being sampled with respect to AVDD: 162 * factor = 4 if VIN range0 and VIN range1 equal 0 163 * Behavior is undefined if any of VIN range doesn't equal 0 164 */ 165 166 samp_mode = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, 167 AD7292_BANK_REG_SAMP_MODE, 2); 168 169 if (samp_mode < 0) 170 return samp_mode; 171 172 range0 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, 173 AD7292_BANK_REG_VIN_RNG0, 2); 174 175 if (range0 < 0) 176 return range0; 177 178 range1 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK, 179 AD7292_BANK_REG_VIN_RNG1, 2); 180 181 if (range1 < 0) 182 return range1; 183 184 if (AD7292_CH_SAMP_MODE(samp_mode, channel)) { 185 /* Sampling with respect to AGND */ 186 if (!AD7292_CH_VIN_RANGE(range0, channel)) 187 factor *= 2; 188 189 if (!AD7292_CH_VIN_RANGE(range1, channel)) 190 factor *= 2; 191 192 } else { 193 /* Sampling with respect to AVDD */ 194 if (AD7292_CH_VIN_RANGE(range0, channel) || 195 AD7292_CH_VIN_RANGE(range1, channel)) 196 return -EPERM; 197 198 factor = 4; 199 } 200 201 return factor; 202 } 203 204 static int ad7292_read_raw(struct iio_dev *indio_dev, 205 const struct iio_chan_spec *chan, 206 int *val, int *val2, long info) 207 { 208 struct ad7292_state *st = iio_priv(indio_dev); 209 unsigned int ch_addr; 210 int ret; 211 212 switch (info) { 213 case IIO_CHAN_INFO_RAW: 214 ch_addr = AD7292_REG_ADC_CH(chan->channel); 215 ret = ad7292_single_conversion(st, ch_addr); 216 if (ret < 0) 217 return ret; 218 219 *val = AD7292_ADC_DATA(ret); 220 221 return IIO_VAL_INT; 222 case IIO_CHAN_INFO_SCALE: 223 /* 224 * To convert a raw value to standard units, the IIO defines 225 * this formula: Scaled value = (raw + offset) * scale. 226 * For the scale to be a correct multiplier for (raw + offset), 227 * it must be calculated as the input range divided by the 228 * number of possible distinct input values. Given the ADC data 229 * is 10 bit long, it may assume 2^10 distinct values. 230 * Hence, scale = range / 2^10. The IIO_VAL_FRACTIONAL_LOG2 231 * return type indicates to the IIO API to divide *val by 2 to 232 * the power of *val2 when returning from read_raw. 233 */ 234 235 ret = ad7292_vin_range_multiplier(st, chan->channel); 236 if (ret < 0) 237 return ret; 238 239 *val = st->vref_mv * ret; 240 *val2 = 10; 241 return IIO_VAL_FRACTIONAL_LOG2; 242 default: 243 break; 244 } 245 return -EINVAL; 246 } 247 248 static const struct iio_info ad7292_info = { 249 .read_raw = ad7292_read_raw, 250 }; 251 252 static void ad7292_regulator_disable(void *data) 253 { 254 struct ad7292_state *st = data; 255 256 regulator_disable(st->reg); 257 } 258 259 static int ad7292_probe(struct spi_device *spi) 260 { 261 struct ad7292_state *st; 262 struct iio_dev *indio_dev; 263 struct device_node *child; 264 bool diff_channels = false; 265 int ret; 266 267 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 268 if (!indio_dev) 269 return -ENOMEM; 270 271 st = iio_priv(indio_dev); 272 st->spi = spi; 273 274 ret = ad7292_spi_reg_read(st, AD7292_REG_VENDOR_ID); 275 if (ret != ADI_VENDOR_ID) { 276 dev_err(&spi->dev, "Wrong vendor id 0x%x\n", ret); 277 return -EINVAL; 278 } 279 280 st->reg = devm_regulator_get_optional(&spi->dev, "vref"); 281 if (!IS_ERR(st->reg)) { 282 ret = regulator_enable(st->reg); 283 if (ret) { 284 dev_err(&spi->dev, 285 "Failed to enable external vref supply\n"); 286 return ret; 287 } 288 289 ret = devm_add_action_or_reset(&spi->dev, 290 ad7292_regulator_disable, st); 291 if (ret) 292 return ret; 293 294 ret = regulator_get_voltage(st->reg); 295 if (ret < 0) 296 return ret; 297 298 st->vref_mv = ret / 1000; 299 } else { 300 /* Use the internal voltage reference. */ 301 st->vref_mv = 1250; 302 } 303 304 indio_dev->name = spi_get_device_id(spi)->name; 305 indio_dev->modes = INDIO_DIRECT_MODE; 306 indio_dev->info = &ad7292_info; 307 308 for_each_available_child_of_node(spi->dev.of_node, child) { 309 diff_channels = of_property_read_bool(child, "diff-channels"); 310 if (diff_channels) { 311 of_node_put(child); 312 break; 313 } 314 } 315 316 if (diff_channels) { 317 indio_dev->num_channels = ARRAY_SIZE(ad7292_channels_diff); 318 indio_dev->channels = ad7292_channels_diff; 319 } else { 320 indio_dev->num_channels = ARRAY_SIZE(ad7292_channels); 321 indio_dev->channels = ad7292_channels; 322 } 323 324 return devm_iio_device_register(&spi->dev, indio_dev); 325 } 326 327 static const struct spi_device_id ad7292_id_table[] = { 328 { "ad7292", 0 }, 329 {} 330 }; 331 MODULE_DEVICE_TABLE(spi, ad7292_id_table); 332 333 static const struct of_device_id ad7292_of_match[] = { 334 { .compatible = "adi,ad7292" }, 335 { }, 336 }; 337 MODULE_DEVICE_TABLE(of, ad7292_of_match); 338 339 static struct spi_driver ad7292_driver = { 340 .driver = { 341 .name = "ad7292", 342 .of_match_table = ad7292_of_match, 343 }, 344 .probe = ad7292_probe, 345 .id_table = ad7292_id_table, 346 }; 347 module_spi_driver(ad7292_driver); 348 349 MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt1@gmail.com>"); 350 MODULE_DESCRIPTION("Analog Devices AD7292 ADC driver"); 351 MODULE_LICENSE("GPL v2"); 352