1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AD7266/65 SPI ADC driver 4 * 5 * Copyright 2012 Analog Devices Inc. 6 */ 7 8 #include <linux/device.h> 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <linux/spi/spi.h> 12 #include <linux/regulator/consumer.h> 13 #include <linux/err.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/module.h> 16 17 #include <linux/interrupt.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/buffer.h> 21 #include <linux/iio/trigger_consumer.h> 22 #include <linux/iio/triggered_buffer.h> 23 24 #include <linux/platform_data/ad7266.h> 25 26 struct ad7266_state { 27 struct spi_device *spi; 28 struct regulator *reg; 29 unsigned long vref_mv; 30 31 struct spi_transfer single_xfer[3]; 32 struct spi_message single_msg; 33 34 enum ad7266_range range; 35 enum ad7266_mode mode; 36 bool fixed_addr; 37 struct gpio_desc *gpios[3]; 38 39 /* 40 * DMA (thus cache coherency maintenance) requires the 41 * transfer buffers to live in their own cache lines. 42 * The buffer needs to be large enough to hold two samples (4 bytes) and 43 * the naturally aligned timestamp (8 bytes). 44 */ 45 struct { 46 __be16 sample[2]; 47 s64 timestamp; 48 } data ____cacheline_aligned; 49 }; 50 51 static int ad7266_wakeup(struct ad7266_state *st) 52 { 53 /* Any read with >= 2 bytes will wake the device */ 54 return spi_read(st->spi, &st->data.sample[0], 2); 55 } 56 57 static int ad7266_powerdown(struct ad7266_state *st) 58 { 59 /* Any read with < 2 bytes will powerdown the device */ 60 return spi_read(st->spi, &st->data.sample[0], 1); 61 } 62 63 static int ad7266_preenable(struct iio_dev *indio_dev) 64 { 65 struct ad7266_state *st = iio_priv(indio_dev); 66 return ad7266_wakeup(st); 67 } 68 69 static int ad7266_postdisable(struct iio_dev *indio_dev) 70 { 71 struct ad7266_state *st = iio_priv(indio_dev); 72 return ad7266_powerdown(st); 73 } 74 75 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = { 76 .preenable = &ad7266_preenable, 77 .postenable = &iio_triggered_buffer_postenable, 78 .predisable = &iio_triggered_buffer_predisable, 79 .postdisable = &ad7266_postdisable, 80 }; 81 82 static irqreturn_t ad7266_trigger_handler(int irq, void *p) 83 { 84 struct iio_poll_func *pf = p; 85 struct iio_dev *indio_dev = pf->indio_dev; 86 struct ad7266_state *st = iio_priv(indio_dev); 87 int ret; 88 89 ret = spi_read(st->spi, st->data.sample, 4); 90 if (ret == 0) { 91 iio_push_to_buffers_with_timestamp(indio_dev, &st->data, 92 pf->timestamp); 93 } 94 95 iio_trigger_notify_done(indio_dev->trig); 96 97 return IRQ_HANDLED; 98 } 99 100 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr) 101 { 102 unsigned int i; 103 104 if (st->fixed_addr) 105 return; 106 107 switch (st->mode) { 108 case AD7266_MODE_SINGLE_ENDED: 109 nr >>= 1; 110 break; 111 case AD7266_MODE_PSEUDO_DIFF: 112 nr |= 1; 113 break; 114 case AD7266_MODE_DIFF: 115 nr &= ~1; 116 break; 117 } 118 119 for (i = 0; i < 3; ++i) 120 gpiod_set_value(st->gpios[i], (bool)(nr & BIT(i))); 121 } 122 123 static int ad7266_update_scan_mode(struct iio_dev *indio_dev, 124 const unsigned long *scan_mask) 125 { 126 struct ad7266_state *st = iio_priv(indio_dev); 127 unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength); 128 129 ad7266_select_input(st, nr); 130 131 return 0; 132 } 133 134 static int ad7266_read_single(struct ad7266_state *st, int *val, 135 unsigned int address) 136 { 137 int ret; 138 139 ad7266_select_input(st, address); 140 141 ret = spi_sync(st->spi, &st->single_msg); 142 *val = be16_to_cpu(st->data.sample[address % 2]); 143 144 return ret; 145 } 146 147 static int ad7266_read_raw(struct iio_dev *indio_dev, 148 struct iio_chan_spec const *chan, int *val, int *val2, long m) 149 { 150 struct ad7266_state *st = iio_priv(indio_dev); 151 unsigned long scale_mv; 152 int ret; 153 154 switch (m) { 155 case IIO_CHAN_INFO_RAW: 156 ret = iio_device_claim_direct_mode(indio_dev); 157 if (ret) 158 return ret; 159 ret = ad7266_read_single(st, val, chan->address); 160 iio_device_release_direct_mode(indio_dev); 161 162 *val = (*val >> 2) & 0xfff; 163 if (chan->scan_type.sign == 's') 164 *val = sign_extend32(*val, 11); 165 166 return IIO_VAL_INT; 167 case IIO_CHAN_INFO_SCALE: 168 scale_mv = st->vref_mv; 169 if (st->mode == AD7266_MODE_DIFF) 170 scale_mv *= 2; 171 if (st->range == AD7266_RANGE_2VREF) 172 scale_mv *= 2; 173 174 *val = scale_mv; 175 *val2 = chan->scan_type.realbits; 176 return IIO_VAL_FRACTIONAL_LOG2; 177 case IIO_CHAN_INFO_OFFSET: 178 if (st->range == AD7266_RANGE_2VREF && 179 st->mode != AD7266_MODE_DIFF) 180 *val = 2048; 181 else 182 *val = 0; 183 return IIO_VAL_INT; 184 } 185 return -EINVAL; 186 } 187 188 #define AD7266_CHAN(_chan, _sign) { \ 189 .type = IIO_VOLTAGE, \ 190 .indexed = 1, \ 191 .channel = (_chan), \ 192 .address = (_chan), \ 193 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 194 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 195 | BIT(IIO_CHAN_INFO_OFFSET), \ 196 .scan_index = (_chan), \ 197 .scan_type = { \ 198 .sign = (_sign), \ 199 .realbits = 12, \ 200 .storagebits = 16, \ 201 .shift = 2, \ 202 .endianness = IIO_BE, \ 203 }, \ 204 } 205 206 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \ 207 const struct iio_chan_spec ad7266_channels_##_name[] = { \ 208 AD7266_CHAN(0, (_sign)), \ 209 AD7266_CHAN(1, (_sign)), \ 210 AD7266_CHAN(2, (_sign)), \ 211 AD7266_CHAN(3, (_sign)), \ 212 AD7266_CHAN(4, (_sign)), \ 213 AD7266_CHAN(5, (_sign)), \ 214 AD7266_CHAN(6, (_sign)), \ 215 AD7266_CHAN(7, (_sign)), \ 216 AD7266_CHAN(8, (_sign)), \ 217 AD7266_CHAN(9, (_sign)), \ 218 AD7266_CHAN(10, (_sign)), \ 219 AD7266_CHAN(11, (_sign)), \ 220 IIO_CHAN_SOFT_TIMESTAMP(13), \ 221 } 222 223 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \ 224 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \ 225 AD7266_CHAN(0, (_sign)), \ 226 AD7266_CHAN(1, (_sign)), \ 227 IIO_CHAN_SOFT_TIMESTAMP(2), \ 228 } 229 230 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u'); 231 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's'); 232 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u'); 233 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's'); 234 235 #define AD7266_CHAN_DIFF(_chan, _sign) { \ 236 .type = IIO_VOLTAGE, \ 237 .indexed = 1, \ 238 .channel = (_chan) * 2, \ 239 .channel2 = (_chan) * 2 + 1, \ 240 .address = (_chan), \ 241 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 242 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 243 | BIT(IIO_CHAN_INFO_OFFSET), \ 244 .scan_index = (_chan), \ 245 .scan_type = { \ 246 .sign = _sign, \ 247 .realbits = 12, \ 248 .storagebits = 16, \ 249 .shift = 2, \ 250 .endianness = IIO_BE, \ 251 }, \ 252 .differential = 1, \ 253 } 254 255 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \ 256 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \ 257 AD7266_CHAN_DIFF(0, (_sign)), \ 258 AD7266_CHAN_DIFF(1, (_sign)), \ 259 AD7266_CHAN_DIFF(2, (_sign)), \ 260 AD7266_CHAN_DIFF(3, (_sign)), \ 261 AD7266_CHAN_DIFF(4, (_sign)), \ 262 AD7266_CHAN_DIFF(5, (_sign)), \ 263 IIO_CHAN_SOFT_TIMESTAMP(6), \ 264 } 265 266 static AD7266_DECLARE_DIFF_CHANNELS(s, 's'); 267 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u'); 268 269 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \ 270 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \ 271 AD7266_CHAN_DIFF(0, (_sign)), \ 272 AD7266_CHAN_DIFF(1, (_sign)), \ 273 IIO_CHAN_SOFT_TIMESTAMP(2), \ 274 } 275 276 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's'); 277 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u'); 278 279 static const struct iio_info ad7266_info = { 280 .read_raw = &ad7266_read_raw, 281 .update_scan_mode = &ad7266_update_scan_mode, 282 }; 283 284 static const unsigned long ad7266_available_scan_masks[] = { 285 0x003, 286 0x00c, 287 0x030, 288 0x0c0, 289 0x300, 290 0xc00, 291 0x000, 292 }; 293 294 static const unsigned long ad7266_available_scan_masks_diff[] = { 295 0x003, 296 0x00c, 297 0x030, 298 0x000, 299 }; 300 301 static const unsigned long ad7266_available_scan_masks_fixed[] = { 302 0x003, 303 0x000, 304 }; 305 306 struct ad7266_chan_info { 307 const struct iio_chan_spec *channels; 308 unsigned int num_channels; 309 const unsigned long *scan_masks; 310 }; 311 312 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \ 313 (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0)) 314 315 static const struct ad7266_chan_info ad7266_chan_infos[] = { 316 [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = { 317 .channels = ad7266_channels_u, 318 .num_channels = ARRAY_SIZE(ad7266_channels_u), 319 .scan_masks = ad7266_available_scan_masks, 320 }, 321 [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = { 322 .channels = ad7266_channels_u_fixed, 323 .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed), 324 .scan_masks = ad7266_available_scan_masks_fixed, 325 }, 326 [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = { 327 .channels = ad7266_channels_s, 328 .num_channels = ARRAY_SIZE(ad7266_channels_s), 329 .scan_masks = ad7266_available_scan_masks, 330 }, 331 [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = { 332 .channels = ad7266_channels_s_fixed, 333 .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed), 334 .scan_masks = ad7266_available_scan_masks_fixed, 335 }, 336 [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = { 337 .channels = ad7266_channels_diff_u, 338 .num_channels = ARRAY_SIZE(ad7266_channels_diff_u), 339 .scan_masks = ad7266_available_scan_masks_diff, 340 }, 341 [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = { 342 .channels = ad7266_channels_diff_fixed_u, 343 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u), 344 .scan_masks = ad7266_available_scan_masks_fixed, 345 }, 346 [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = { 347 .channels = ad7266_channels_diff_s, 348 .num_channels = ARRAY_SIZE(ad7266_channels_diff_s), 349 .scan_masks = ad7266_available_scan_masks_diff, 350 }, 351 [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = { 352 .channels = ad7266_channels_diff_fixed_s, 353 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s), 354 .scan_masks = ad7266_available_scan_masks_fixed, 355 }, 356 }; 357 358 static void ad7266_init_channels(struct iio_dev *indio_dev) 359 { 360 struct ad7266_state *st = iio_priv(indio_dev); 361 bool is_differential, is_signed; 362 const struct ad7266_chan_info *chan_info; 363 int i; 364 365 is_differential = st->mode != AD7266_MODE_SINGLE_ENDED; 366 is_signed = (st->range == AD7266_RANGE_2VREF) | 367 (st->mode == AD7266_MODE_DIFF); 368 369 i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr); 370 chan_info = &ad7266_chan_infos[i]; 371 372 indio_dev->channels = chan_info->channels; 373 indio_dev->num_channels = chan_info->num_channels; 374 indio_dev->available_scan_masks = chan_info->scan_masks; 375 indio_dev->masklength = chan_info->num_channels - 1; 376 } 377 378 static const char * const ad7266_gpio_labels[] = { 379 "ad0", "ad1", "ad2", 380 }; 381 382 static int ad7266_probe(struct spi_device *spi) 383 { 384 struct ad7266_platform_data *pdata = spi->dev.platform_data; 385 struct iio_dev *indio_dev; 386 struct ad7266_state *st; 387 unsigned int i; 388 int ret; 389 390 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 391 if (indio_dev == NULL) 392 return -ENOMEM; 393 394 st = iio_priv(indio_dev); 395 396 st->reg = devm_regulator_get_optional(&spi->dev, "vref"); 397 if (!IS_ERR(st->reg)) { 398 ret = regulator_enable(st->reg); 399 if (ret) 400 return ret; 401 402 ret = regulator_get_voltage(st->reg); 403 if (ret < 0) 404 goto error_disable_reg; 405 406 st->vref_mv = ret / 1000; 407 } else { 408 /* Any other error indicates that the regulator does exist */ 409 if (PTR_ERR(st->reg) != -ENODEV) 410 return PTR_ERR(st->reg); 411 /* Use internal reference */ 412 st->vref_mv = 2500; 413 } 414 415 if (pdata) { 416 st->fixed_addr = pdata->fixed_addr; 417 st->mode = pdata->mode; 418 st->range = pdata->range; 419 420 if (!st->fixed_addr) { 421 for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) { 422 st->gpios[i] = devm_gpiod_get(&spi->dev, 423 ad7266_gpio_labels[i], 424 GPIOD_OUT_LOW); 425 if (IS_ERR(st->gpios[i])) { 426 ret = PTR_ERR(st->gpios[i]); 427 goto error_disable_reg; 428 } 429 } 430 } 431 } else { 432 st->fixed_addr = true; 433 st->range = AD7266_RANGE_VREF; 434 st->mode = AD7266_MODE_DIFF; 435 } 436 437 spi_set_drvdata(spi, indio_dev); 438 st->spi = spi; 439 440 indio_dev->dev.parent = &spi->dev; 441 indio_dev->dev.of_node = spi->dev.of_node; 442 indio_dev->name = spi_get_device_id(spi)->name; 443 indio_dev->modes = INDIO_DIRECT_MODE; 444 indio_dev->info = &ad7266_info; 445 446 ad7266_init_channels(indio_dev); 447 448 /* wakeup */ 449 st->single_xfer[0].rx_buf = &st->data.sample[0]; 450 st->single_xfer[0].len = 2; 451 st->single_xfer[0].cs_change = 1; 452 /* conversion */ 453 st->single_xfer[1].rx_buf = st->data.sample; 454 st->single_xfer[1].len = 4; 455 st->single_xfer[1].cs_change = 1; 456 /* powerdown */ 457 st->single_xfer[2].tx_buf = &st->data.sample[0]; 458 st->single_xfer[2].len = 1; 459 460 spi_message_init(&st->single_msg); 461 spi_message_add_tail(&st->single_xfer[0], &st->single_msg); 462 spi_message_add_tail(&st->single_xfer[1], &st->single_msg); 463 spi_message_add_tail(&st->single_xfer[2], &st->single_msg); 464 465 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 466 &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops); 467 if (ret) 468 goto error_disable_reg; 469 470 ret = iio_device_register(indio_dev); 471 if (ret) 472 goto error_buffer_cleanup; 473 474 return 0; 475 476 error_buffer_cleanup: 477 iio_triggered_buffer_cleanup(indio_dev); 478 error_disable_reg: 479 if (!IS_ERR(st->reg)) 480 regulator_disable(st->reg); 481 482 return ret; 483 } 484 485 static int ad7266_remove(struct spi_device *spi) 486 { 487 struct iio_dev *indio_dev = spi_get_drvdata(spi); 488 struct ad7266_state *st = iio_priv(indio_dev); 489 490 iio_device_unregister(indio_dev); 491 iio_triggered_buffer_cleanup(indio_dev); 492 if (!IS_ERR(st->reg)) 493 regulator_disable(st->reg); 494 495 return 0; 496 } 497 498 static const struct spi_device_id ad7266_id[] = { 499 {"ad7265", 0}, 500 {"ad7266", 0}, 501 { } 502 }; 503 MODULE_DEVICE_TABLE(spi, ad7266_id); 504 505 static struct spi_driver ad7266_driver = { 506 .driver = { 507 .name = "ad7266", 508 }, 509 .probe = ad7266_probe, 510 .remove = ad7266_remove, 511 .id_table = ad7266_id, 512 }; 513 module_spi_driver(ad7266_driver); 514 515 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 516 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC"); 517 MODULE_LICENSE("GPL v2"); 518