xref: /openbmc/linux/drivers/iio/adc/ad7266.c (revision 9cfc5c90)
1 /*
2  * AD7266/65 SPI ADC driver
3  *
4  * Copyright 2012 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8 
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/spi/spi.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/module.h>
17 
18 #include <linux/interrupt.h>
19 
20 #include <linux/iio/iio.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/trigger_consumer.h>
23 #include <linux/iio/triggered_buffer.h>
24 
25 #include <linux/platform_data/ad7266.h>
26 
27 struct ad7266_state {
28 	struct spi_device	*spi;
29 	struct regulator	*reg;
30 	unsigned long		vref_mv;
31 
32 	struct spi_transfer	single_xfer[3];
33 	struct spi_message	single_msg;
34 
35 	enum ad7266_range	range;
36 	enum ad7266_mode	mode;
37 	bool			fixed_addr;
38 	struct gpio		gpios[3];
39 
40 	/*
41 	 * DMA (thus cache coherency maintenance) requires the
42 	 * transfer buffers to live in their own cache lines.
43 	 * The buffer needs to be large enough to hold two samples (4 bytes) and
44 	 * the naturally aligned timestamp (8 bytes).
45 	 */
46 	struct {
47 		__be16 sample[2];
48 		s64 timestamp;
49 	} data ____cacheline_aligned;
50 };
51 
52 static int ad7266_wakeup(struct ad7266_state *st)
53 {
54 	/* Any read with >= 2 bytes will wake the device */
55 	return spi_read(st->spi, &st->data.sample[0], 2);
56 }
57 
58 static int ad7266_powerdown(struct ad7266_state *st)
59 {
60 	/* Any read with < 2 bytes will powerdown the device */
61 	return spi_read(st->spi, &st->data.sample[0], 1);
62 }
63 
64 static int ad7266_preenable(struct iio_dev *indio_dev)
65 {
66 	struct ad7266_state *st = iio_priv(indio_dev);
67 	return ad7266_wakeup(st);
68 }
69 
70 static int ad7266_postdisable(struct iio_dev *indio_dev)
71 {
72 	struct ad7266_state *st = iio_priv(indio_dev);
73 	return ad7266_powerdown(st);
74 }
75 
76 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
77 	.preenable = &ad7266_preenable,
78 	.postenable = &iio_triggered_buffer_postenable,
79 	.predisable = &iio_triggered_buffer_predisable,
80 	.postdisable = &ad7266_postdisable,
81 };
82 
83 static irqreturn_t ad7266_trigger_handler(int irq, void *p)
84 {
85 	struct iio_poll_func *pf = p;
86 	struct iio_dev *indio_dev = pf->indio_dev;
87 	struct ad7266_state *st = iio_priv(indio_dev);
88 	int ret;
89 
90 	ret = spi_read(st->spi, st->data.sample, 4);
91 	if (ret == 0) {
92 		iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
93 			    pf->timestamp);
94 	}
95 
96 	iio_trigger_notify_done(indio_dev->trig);
97 
98 	return IRQ_HANDLED;
99 }
100 
101 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
102 {
103 	unsigned int i;
104 
105 	if (st->fixed_addr)
106 		return;
107 
108 	switch (st->mode) {
109 	case AD7266_MODE_SINGLE_ENDED:
110 		nr >>= 1;
111 		break;
112 	case AD7266_MODE_PSEUDO_DIFF:
113 		nr |= 1;
114 		break;
115 	case AD7266_MODE_DIFF:
116 		nr &= ~1;
117 		break;
118 	}
119 
120 	for (i = 0; i < 3; ++i)
121 		gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
122 }
123 
124 static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
125 	const unsigned long *scan_mask)
126 {
127 	struct ad7266_state *st = iio_priv(indio_dev);
128 	unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
129 
130 	ad7266_select_input(st, nr);
131 
132 	return 0;
133 }
134 
135 static int ad7266_read_single(struct ad7266_state *st, int *val,
136 	unsigned int address)
137 {
138 	int ret;
139 
140 	ad7266_select_input(st, address);
141 
142 	ret = spi_sync(st->spi, &st->single_msg);
143 	*val = be16_to_cpu(st->data.sample[address % 2]);
144 
145 	return ret;
146 }
147 
148 static int ad7266_read_raw(struct iio_dev *indio_dev,
149 	struct iio_chan_spec const *chan, int *val, int *val2, long m)
150 {
151 	struct ad7266_state *st = iio_priv(indio_dev);
152 	unsigned long scale_mv;
153 	int ret;
154 
155 	switch (m) {
156 	case IIO_CHAN_INFO_RAW:
157 		if (iio_buffer_enabled(indio_dev))
158 			return -EBUSY;
159 
160 		ret = ad7266_read_single(st, val, chan->address);
161 		if (ret)
162 			return ret;
163 
164 		*val = (*val >> 2) & 0xfff;
165 		if (chan->scan_type.sign == 's')
166 			*val = sign_extend32(*val, 11);
167 
168 		return IIO_VAL_INT;
169 	case IIO_CHAN_INFO_SCALE:
170 		scale_mv = st->vref_mv;
171 		if (st->mode == AD7266_MODE_DIFF)
172 			scale_mv *= 2;
173 		if (st->range == AD7266_RANGE_2VREF)
174 			scale_mv *= 2;
175 
176 		*val = scale_mv;
177 		*val2 = chan->scan_type.realbits;
178 		return IIO_VAL_FRACTIONAL_LOG2;
179 	case IIO_CHAN_INFO_OFFSET:
180 		if (st->range == AD7266_RANGE_2VREF &&
181 			st->mode != AD7266_MODE_DIFF)
182 			*val = 2048;
183 		else
184 			*val = 0;
185 		return IIO_VAL_INT;
186 	}
187 	return -EINVAL;
188 }
189 
190 #define AD7266_CHAN(_chan, _sign) {			\
191 	.type = IIO_VOLTAGE,				\
192 	.indexed = 1,					\
193 	.channel = (_chan),				\
194 	.address = (_chan),				\
195 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
196 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
197 		| BIT(IIO_CHAN_INFO_OFFSET),			\
198 	.scan_index = (_chan),				\
199 	.scan_type = {					\
200 		.sign = (_sign),			\
201 		.realbits = 12,				\
202 		.storagebits = 16,			\
203 		.shift = 2,				\
204 		.endianness = IIO_BE,			\
205 	},						\
206 }
207 
208 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
209 const struct iio_chan_spec ad7266_channels_##_name[] = { \
210 	AD7266_CHAN(0, (_sign)), \
211 	AD7266_CHAN(1, (_sign)), \
212 	AD7266_CHAN(2, (_sign)), \
213 	AD7266_CHAN(3, (_sign)), \
214 	AD7266_CHAN(4, (_sign)), \
215 	AD7266_CHAN(5, (_sign)), \
216 	AD7266_CHAN(6, (_sign)), \
217 	AD7266_CHAN(7, (_sign)), \
218 	AD7266_CHAN(8, (_sign)), \
219 	AD7266_CHAN(9, (_sign)), \
220 	AD7266_CHAN(10, (_sign)), \
221 	AD7266_CHAN(11, (_sign)), \
222 	IIO_CHAN_SOFT_TIMESTAMP(13), \
223 }
224 
225 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
226 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
227 	AD7266_CHAN(0, (_sign)), \
228 	AD7266_CHAN(1, (_sign)), \
229 	IIO_CHAN_SOFT_TIMESTAMP(2), \
230 }
231 
232 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
233 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
234 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
235 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
236 
237 #define AD7266_CHAN_DIFF(_chan, _sign) {			\
238 	.type = IIO_VOLTAGE,				\
239 	.indexed = 1,					\
240 	.channel = (_chan) * 2,				\
241 	.channel2 = (_chan) * 2 + 1,			\
242 	.address = (_chan),				\
243 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
244 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
245 		| BIT(IIO_CHAN_INFO_OFFSET),			\
246 	.scan_index = (_chan),				\
247 	.scan_type = {					\
248 		.sign = _sign,			\
249 		.realbits = 12,				\
250 		.storagebits = 16,			\
251 		.shift = 2,				\
252 		.endianness = IIO_BE,			\
253 	},						\
254 	.differential = 1,				\
255 }
256 
257 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
258 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
259 	AD7266_CHAN_DIFF(0, (_sign)), \
260 	AD7266_CHAN_DIFF(1, (_sign)), \
261 	AD7266_CHAN_DIFF(2, (_sign)), \
262 	AD7266_CHAN_DIFF(3, (_sign)), \
263 	AD7266_CHAN_DIFF(4, (_sign)), \
264 	AD7266_CHAN_DIFF(5, (_sign)), \
265 	IIO_CHAN_SOFT_TIMESTAMP(6), \
266 }
267 
268 static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
269 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
270 
271 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
272 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
273 	AD7266_CHAN_DIFF(0, (_sign)), \
274 	AD7266_CHAN_DIFF(1, (_sign)), \
275 	IIO_CHAN_SOFT_TIMESTAMP(2), \
276 }
277 
278 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
279 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
280 
281 static const struct iio_info ad7266_info = {
282 	.read_raw = &ad7266_read_raw,
283 	.update_scan_mode = &ad7266_update_scan_mode,
284 	.driver_module = THIS_MODULE,
285 };
286 
287 static const unsigned long ad7266_available_scan_masks[] = {
288 	0x003,
289 	0x00c,
290 	0x030,
291 	0x0c0,
292 	0x300,
293 	0xc00,
294 	0x000,
295 };
296 
297 static const unsigned long ad7266_available_scan_masks_diff[] = {
298 	0x003,
299 	0x00c,
300 	0x030,
301 	0x000,
302 };
303 
304 static const unsigned long ad7266_available_scan_masks_fixed[] = {
305 	0x003,
306 	0x000,
307 };
308 
309 struct ad7266_chan_info {
310 	const struct iio_chan_spec *channels;
311 	unsigned int num_channels;
312 	const unsigned long *scan_masks;
313 };
314 
315 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
316 	(((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
317 
318 static const struct ad7266_chan_info ad7266_chan_infos[] = {
319 	[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
320 		.channels = ad7266_channels_u,
321 		.num_channels = ARRAY_SIZE(ad7266_channels_u),
322 		.scan_masks = ad7266_available_scan_masks,
323 	},
324 	[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
325 		.channels = ad7266_channels_u_fixed,
326 		.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
327 		.scan_masks = ad7266_available_scan_masks_fixed,
328 	},
329 	[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
330 		.channels = ad7266_channels_s,
331 		.num_channels = ARRAY_SIZE(ad7266_channels_s),
332 		.scan_masks = ad7266_available_scan_masks,
333 	},
334 	[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
335 		.channels = ad7266_channels_s_fixed,
336 		.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
337 		.scan_masks = ad7266_available_scan_masks_fixed,
338 	},
339 	[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
340 		.channels = ad7266_channels_diff_u,
341 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
342 		.scan_masks = ad7266_available_scan_masks_diff,
343 	},
344 	[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
345 		.channels = ad7266_channels_diff_fixed_u,
346 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
347 		.scan_masks = ad7266_available_scan_masks_fixed,
348 	},
349 	[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
350 		.channels = ad7266_channels_diff_s,
351 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
352 		.scan_masks = ad7266_available_scan_masks_diff,
353 	},
354 	[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
355 		.channels = ad7266_channels_diff_fixed_s,
356 		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
357 		.scan_masks = ad7266_available_scan_masks_fixed,
358 	},
359 };
360 
361 static void ad7266_init_channels(struct iio_dev *indio_dev)
362 {
363 	struct ad7266_state *st = iio_priv(indio_dev);
364 	bool is_differential, is_signed;
365 	const struct ad7266_chan_info *chan_info;
366 	int i;
367 
368 	is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
369 	is_signed = (st->range == AD7266_RANGE_2VREF) |
370 		    (st->mode == AD7266_MODE_DIFF);
371 
372 	i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
373 	chan_info = &ad7266_chan_infos[i];
374 
375 	indio_dev->channels = chan_info->channels;
376 	indio_dev->num_channels = chan_info->num_channels;
377 	indio_dev->available_scan_masks = chan_info->scan_masks;
378 	indio_dev->masklength = chan_info->num_channels - 1;
379 }
380 
381 static const char * const ad7266_gpio_labels[] = {
382 	"AD0", "AD1", "AD2",
383 };
384 
385 static int ad7266_probe(struct spi_device *spi)
386 {
387 	struct ad7266_platform_data *pdata = spi->dev.platform_data;
388 	struct iio_dev *indio_dev;
389 	struct ad7266_state *st;
390 	unsigned int i;
391 	int ret;
392 
393 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
394 	if (indio_dev == NULL)
395 		return -ENOMEM;
396 
397 	st = iio_priv(indio_dev);
398 
399 	st->reg = devm_regulator_get(&spi->dev, "vref");
400 	if (!IS_ERR_OR_NULL(st->reg)) {
401 		ret = regulator_enable(st->reg);
402 		if (ret)
403 			return ret;
404 
405 		ret = regulator_get_voltage(st->reg);
406 		if (ret < 0)
407 			goto error_disable_reg;
408 
409 		st->vref_mv = ret / 1000;
410 	} else {
411 		/* Use internal reference */
412 		st->vref_mv = 2500;
413 	}
414 
415 	if (pdata) {
416 		st->fixed_addr = pdata->fixed_addr;
417 		st->mode = pdata->mode;
418 		st->range = pdata->range;
419 
420 		if (!st->fixed_addr) {
421 			for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
422 				st->gpios[i].gpio = pdata->addr_gpios[i];
423 				st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
424 				st->gpios[i].label = ad7266_gpio_labels[i];
425 			}
426 			ret = gpio_request_array(st->gpios,
427 				ARRAY_SIZE(st->gpios));
428 			if (ret)
429 				goto error_disable_reg;
430 		}
431 	} else {
432 		st->fixed_addr = true;
433 		st->range = AD7266_RANGE_VREF;
434 		st->mode = AD7266_MODE_DIFF;
435 	}
436 
437 	spi_set_drvdata(spi, indio_dev);
438 	st->spi = spi;
439 
440 	indio_dev->dev.parent = &spi->dev;
441 	indio_dev->name = spi_get_device_id(spi)->name;
442 	indio_dev->modes = INDIO_DIRECT_MODE;
443 	indio_dev->info = &ad7266_info;
444 
445 	ad7266_init_channels(indio_dev);
446 
447 	/* wakeup */
448 	st->single_xfer[0].rx_buf = &st->data.sample[0];
449 	st->single_xfer[0].len = 2;
450 	st->single_xfer[0].cs_change = 1;
451 	/* conversion */
452 	st->single_xfer[1].rx_buf = st->data.sample;
453 	st->single_xfer[1].len = 4;
454 	st->single_xfer[1].cs_change = 1;
455 	/* powerdown */
456 	st->single_xfer[2].tx_buf = &st->data.sample[0];
457 	st->single_xfer[2].len = 1;
458 
459 	spi_message_init(&st->single_msg);
460 	spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
461 	spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
462 	spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
463 
464 	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
465 		&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
466 	if (ret)
467 		goto error_free_gpios;
468 
469 	ret = iio_device_register(indio_dev);
470 	if (ret)
471 		goto error_buffer_cleanup;
472 
473 	return 0;
474 
475 error_buffer_cleanup:
476 	iio_triggered_buffer_cleanup(indio_dev);
477 error_free_gpios:
478 	if (!st->fixed_addr)
479 		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
480 error_disable_reg:
481 	if (!IS_ERR_OR_NULL(st->reg))
482 		regulator_disable(st->reg);
483 
484 	return ret;
485 }
486 
487 static int ad7266_remove(struct spi_device *spi)
488 {
489 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
490 	struct ad7266_state *st = iio_priv(indio_dev);
491 
492 	iio_device_unregister(indio_dev);
493 	iio_triggered_buffer_cleanup(indio_dev);
494 	if (!st->fixed_addr)
495 		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
496 	if (!IS_ERR_OR_NULL(st->reg))
497 		regulator_disable(st->reg);
498 
499 	return 0;
500 }
501 
502 static const struct spi_device_id ad7266_id[] = {
503 	{"ad7265", 0},
504 	{"ad7266", 0},
505 	{ }
506 };
507 MODULE_DEVICE_TABLE(spi, ad7266_id);
508 
509 static struct spi_driver ad7266_driver = {
510 	.driver = {
511 		.name	= "ad7266",
512 	},
513 	.probe		= ad7266_probe,
514 	.remove		= ad7266_remove,
515 	.id_table	= ad7266_id,
516 };
517 module_spi_driver(ad7266_driver);
518 
519 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
520 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
521 MODULE_LICENSE("GPL v2");
522