1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AD7266/65 SPI ADC driver 4 * 5 * Copyright 2012 Analog Devices Inc. 6 */ 7 8 #include <linux/device.h> 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <linux/spi/spi.h> 12 #include <linux/regulator/consumer.h> 13 #include <linux/err.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/module.h> 16 17 #include <linux/interrupt.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/buffer.h> 21 #include <linux/iio/trigger_consumer.h> 22 #include <linux/iio/triggered_buffer.h> 23 24 #include <linux/platform_data/ad7266.h> 25 26 struct ad7266_state { 27 struct spi_device *spi; 28 struct regulator *reg; 29 unsigned long vref_mv; 30 31 struct spi_transfer single_xfer[3]; 32 struct spi_message single_msg; 33 34 enum ad7266_range range; 35 enum ad7266_mode mode; 36 bool fixed_addr; 37 struct gpio_desc *gpios[3]; 38 39 /* 40 * DMA (thus cache coherency maintenance) may require the 41 * transfer buffers to live in their own cache lines. 42 * The buffer needs to be large enough to hold two samples (4 bytes) and 43 * the naturally aligned timestamp (8 bytes). 44 */ 45 struct { 46 __be16 sample[2]; 47 s64 timestamp; 48 } data __aligned(IIO_DMA_MINALIGN); 49 }; 50 51 static int ad7266_wakeup(struct ad7266_state *st) 52 { 53 /* Any read with >= 2 bytes will wake the device */ 54 return spi_read(st->spi, &st->data.sample[0], 2); 55 } 56 57 static int ad7266_powerdown(struct ad7266_state *st) 58 { 59 /* Any read with < 2 bytes will powerdown the device */ 60 return spi_read(st->spi, &st->data.sample[0], 1); 61 } 62 63 static int ad7266_preenable(struct iio_dev *indio_dev) 64 { 65 struct ad7266_state *st = iio_priv(indio_dev); 66 return ad7266_wakeup(st); 67 } 68 69 static int ad7266_postdisable(struct iio_dev *indio_dev) 70 { 71 struct ad7266_state *st = iio_priv(indio_dev); 72 return ad7266_powerdown(st); 73 } 74 75 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = { 76 .preenable = &ad7266_preenable, 77 .postdisable = &ad7266_postdisable, 78 }; 79 80 static irqreturn_t ad7266_trigger_handler(int irq, void *p) 81 { 82 struct iio_poll_func *pf = p; 83 struct iio_dev *indio_dev = pf->indio_dev; 84 struct ad7266_state *st = iio_priv(indio_dev); 85 int ret; 86 87 ret = spi_read(st->spi, st->data.sample, 4); 88 if (ret == 0) { 89 iio_push_to_buffers_with_timestamp(indio_dev, &st->data, 90 pf->timestamp); 91 } 92 93 iio_trigger_notify_done(indio_dev->trig); 94 95 return IRQ_HANDLED; 96 } 97 98 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr) 99 { 100 unsigned int i; 101 102 if (st->fixed_addr) 103 return; 104 105 switch (st->mode) { 106 case AD7266_MODE_SINGLE_ENDED: 107 nr >>= 1; 108 break; 109 case AD7266_MODE_PSEUDO_DIFF: 110 nr |= 1; 111 break; 112 case AD7266_MODE_DIFF: 113 nr &= ~1; 114 break; 115 } 116 117 for (i = 0; i < 3; ++i) 118 gpiod_set_value(st->gpios[i], (bool)(nr & BIT(i))); 119 } 120 121 static int ad7266_update_scan_mode(struct iio_dev *indio_dev, 122 const unsigned long *scan_mask) 123 { 124 struct ad7266_state *st = iio_priv(indio_dev); 125 unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength); 126 127 ad7266_select_input(st, nr); 128 129 return 0; 130 } 131 132 static int ad7266_read_single(struct ad7266_state *st, int *val, 133 unsigned int address) 134 { 135 int ret; 136 137 ad7266_select_input(st, address); 138 139 ret = spi_sync(st->spi, &st->single_msg); 140 *val = be16_to_cpu(st->data.sample[address % 2]); 141 142 return ret; 143 } 144 145 static int ad7266_read_raw(struct iio_dev *indio_dev, 146 struct iio_chan_spec const *chan, int *val, int *val2, long m) 147 { 148 struct ad7266_state *st = iio_priv(indio_dev); 149 unsigned long scale_mv; 150 int ret; 151 152 switch (m) { 153 case IIO_CHAN_INFO_RAW: 154 ret = iio_device_claim_direct_mode(indio_dev); 155 if (ret) 156 return ret; 157 ret = ad7266_read_single(st, val, chan->address); 158 iio_device_release_direct_mode(indio_dev); 159 160 if (ret < 0) 161 return ret; 162 *val = (*val >> 2) & 0xfff; 163 if (chan->scan_type.sign == 's') 164 *val = sign_extend32(*val, 165 chan->scan_type.realbits - 1); 166 167 return IIO_VAL_INT; 168 case IIO_CHAN_INFO_SCALE: 169 scale_mv = st->vref_mv; 170 if (st->mode == AD7266_MODE_DIFF) 171 scale_mv *= 2; 172 if (st->range == AD7266_RANGE_2VREF) 173 scale_mv *= 2; 174 175 *val = scale_mv; 176 *val2 = chan->scan_type.realbits; 177 return IIO_VAL_FRACTIONAL_LOG2; 178 case IIO_CHAN_INFO_OFFSET: 179 if (st->range == AD7266_RANGE_2VREF && 180 st->mode != AD7266_MODE_DIFF) 181 *val = 2048; 182 else 183 *val = 0; 184 return IIO_VAL_INT; 185 } 186 return -EINVAL; 187 } 188 189 #define AD7266_CHAN(_chan, _sign) { \ 190 .type = IIO_VOLTAGE, \ 191 .indexed = 1, \ 192 .channel = (_chan), \ 193 .address = (_chan), \ 194 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 195 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 196 | BIT(IIO_CHAN_INFO_OFFSET), \ 197 .scan_index = (_chan), \ 198 .scan_type = { \ 199 .sign = (_sign), \ 200 .realbits = 12, \ 201 .storagebits = 16, \ 202 .shift = 2, \ 203 .endianness = IIO_BE, \ 204 }, \ 205 } 206 207 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \ 208 const struct iio_chan_spec ad7266_channels_##_name[] = { \ 209 AD7266_CHAN(0, (_sign)), \ 210 AD7266_CHAN(1, (_sign)), \ 211 AD7266_CHAN(2, (_sign)), \ 212 AD7266_CHAN(3, (_sign)), \ 213 AD7266_CHAN(4, (_sign)), \ 214 AD7266_CHAN(5, (_sign)), \ 215 AD7266_CHAN(6, (_sign)), \ 216 AD7266_CHAN(7, (_sign)), \ 217 AD7266_CHAN(8, (_sign)), \ 218 AD7266_CHAN(9, (_sign)), \ 219 AD7266_CHAN(10, (_sign)), \ 220 AD7266_CHAN(11, (_sign)), \ 221 IIO_CHAN_SOFT_TIMESTAMP(13), \ 222 } 223 224 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \ 225 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \ 226 AD7266_CHAN(0, (_sign)), \ 227 AD7266_CHAN(1, (_sign)), \ 228 IIO_CHAN_SOFT_TIMESTAMP(2), \ 229 } 230 231 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u'); 232 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's'); 233 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u'); 234 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's'); 235 236 #define AD7266_CHAN_DIFF(_chan, _sign) { \ 237 .type = IIO_VOLTAGE, \ 238 .indexed = 1, \ 239 .channel = (_chan) * 2, \ 240 .channel2 = (_chan) * 2 + 1, \ 241 .address = (_chan), \ 242 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 243 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 244 | BIT(IIO_CHAN_INFO_OFFSET), \ 245 .scan_index = (_chan), \ 246 .scan_type = { \ 247 .sign = _sign, \ 248 .realbits = 12, \ 249 .storagebits = 16, \ 250 .shift = 2, \ 251 .endianness = IIO_BE, \ 252 }, \ 253 .differential = 1, \ 254 } 255 256 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \ 257 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \ 258 AD7266_CHAN_DIFF(0, (_sign)), \ 259 AD7266_CHAN_DIFF(1, (_sign)), \ 260 AD7266_CHAN_DIFF(2, (_sign)), \ 261 AD7266_CHAN_DIFF(3, (_sign)), \ 262 AD7266_CHAN_DIFF(4, (_sign)), \ 263 AD7266_CHAN_DIFF(5, (_sign)), \ 264 IIO_CHAN_SOFT_TIMESTAMP(6), \ 265 } 266 267 static AD7266_DECLARE_DIFF_CHANNELS(s, 's'); 268 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u'); 269 270 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \ 271 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \ 272 AD7266_CHAN_DIFF(0, (_sign)), \ 273 AD7266_CHAN_DIFF(1, (_sign)), \ 274 IIO_CHAN_SOFT_TIMESTAMP(2), \ 275 } 276 277 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's'); 278 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u'); 279 280 static const struct iio_info ad7266_info = { 281 .read_raw = &ad7266_read_raw, 282 .update_scan_mode = &ad7266_update_scan_mode, 283 }; 284 285 static const unsigned long ad7266_available_scan_masks[] = { 286 0x003, 287 0x00c, 288 0x030, 289 0x0c0, 290 0x300, 291 0xc00, 292 0x000, 293 }; 294 295 static const unsigned long ad7266_available_scan_masks_diff[] = { 296 0x003, 297 0x00c, 298 0x030, 299 0x000, 300 }; 301 302 static const unsigned long ad7266_available_scan_masks_fixed[] = { 303 0x003, 304 0x000, 305 }; 306 307 struct ad7266_chan_info { 308 const struct iio_chan_spec *channels; 309 unsigned int num_channels; 310 const unsigned long *scan_masks; 311 }; 312 313 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \ 314 (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0)) 315 316 static const struct ad7266_chan_info ad7266_chan_infos[] = { 317 [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = { 318 .channels = ad7266_channels_u, 319 .num_channels = ARRAY_SIZE(ad7266_channels_u), 320 .scan_masks = ad7266_available_scan_masks, 321 }, 322 [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = { 323 .channels = ad7266_channels_u_fixed, 324 .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed), 325 .scan_masks = ad7266_available_scan_masks_fixed, 326 }, 327 [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = { 328 .channels = ad7266_channels_s, 329 .num_channels = ARRAY_SIZE(ad7266_channels_s), 330 .scan_masks = ad7266_available_scan_masks, 331 }, 332 [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = { 333 .channels = ad7266_channels_s_fixed, 334 .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed), 335 .scan_masks = ad7266_available_scan_masks_fixed, 336 }, 337 [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = { 338 .channels = ad7266_channels_diff_u, 339 .num_channels = ARRAY_SIZE(ad7266_channels_diff_u), 340 .scan_masks = ad7266_available_scan_masks_diff, 341 }, 342 [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = { 343 .channels = ad7266_channels_diff_fixed_u, 344 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u), 345 .scan_masks = ad7266_available_scan_masks_fixed, 346 }, 347 [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = { 348 .channels = ad7266_channels_diff_s, 349 .num_channels = ARRAY_SIZE(ad7266_channels_diff_s), 350 .scan_masks = ad7266_available_scan_masks_diff, 351 }, 352 [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = { 353 .channels = ad7266_channels_diff_fixed_s, 354 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s), 355 .scan_masks = ad7266_available_scan_masks_fixed, 356 }, 357 }; 358 359 static void ad7266_init_channels(struct iio_dev *indio_dev) 360 { 361 struct ad7266_state *st = iio_priv(indio_dev); 362 bool is_differential, is_signed; 363 const struct ad7266_chan_info *chan_info; 364 int i; 365 366 is_differential = st->mode != AD7266_MODE_SINGLE_ENDED; 367 is_signed = (st->range == AD7266_RANGE_2VREF) | 368 (st->mode == AD7266_MODE_DIFF); 369 370 i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr); 371 chan_info = &ad7266_chan_infos[i]; 372 373 indio_dev->channels = chan_info->channels; 374 indio_dev->num_channels = chan_info->num_channels; 375 indio_dev->available_scan_masks = chan_info->scan_masks; 376 indio_dev->masklength = chan_info->num_channels - 1; 377 } 378 379 static const char * const ad7266_gpio_labels[] = { 380 "ad0", "ad1", "ad2", 381 }; 382 383 static void ad7266_reg_disable(void *reg) 384 { 385 regulator_disable(reg); 386 } 387 388 static int ad7266_probe(struct spi_device *spi) 389 { 390 struct ad7266_platform_data *pdata = spi->dev.platform_data; 391 struct iio_dev *indio_dev; 392 struct ad7266_state *st; 393 unsigned int i; 394 int ret; 395 396 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 397 if (indio_dev == NULL) 398 return -ENOMEM; 399 400 st = iio_priv(indio_dev); 401 402 st->reg = devm_regulator_get_optional(&spi->dev, "vref"); 403 if (!IS_ERR(st->reg)) { 404 ret = regulator_enable(st->reg); 405 if (ret) 406 return ret; 407 408 ret = devm_add_action_or_reset(&spi->dev, ad7266_reg_disable, st->reg); 409 if (ret) 410 return ret; 411 412 ret = regulator_get_voltage(st->reg); 413 if (ret < 0) 414 return ret; 415 416 st->vref_mv = ret / 1000; 417 } else { 418 /* Any other error indicates that the regulator does exist */ 419 if (PTR_ERR(st->reg) != -ENODEV) 420 return PTR_ERR(st->reg); 421 /* Use internal reference */ 422 st->vref_mv = 2500; 423 } 424 425 if (pdata) { 426 st->fixed_addr = pdata->fixed_addr; 427 st->mode = pdata->mode; 428 st->range = pdata->range; 429 430 if (!st->fixed_addr) { 431 for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) { 432 st->gpios[i] = devm_gpiod_get(&spi->dev, 433 ad7266_gpio_labels[i], 434 GPIOD_OUT_LOW); 435 if (IS_ERR(st->gpios[i])) { 436 ret = PTR_ERR(st->gpios[i]); 437 return ret; 438 } 439 } 440 } 441 } else { 442 st->fixed_addr = true; 443 st->range = AD7266_RANGE_VREF; 444 st->mode = AD7266_MODE_DIFF; 445 } 446 447 st->spi = spi; 448 449 indio_dev->name = spi_get_device_id(spi)->name; 450 indio_dev->modes = INDIO_DIRECT_MODE; 451 indio_dev->info = &ad7266_info; 452 453 ad7266_init_channels(indio_dev); 454 455 /* wakeup */ 456 st->single_xfer[0].rx_buf = &st->data.sample[0]; 457 st->single_xfer[0].len = 2; 458 st->single_xfer[0].cs_change = 1; 459 /* conversion */ 460 st->single_xfer[1].rx_buf = st->data.sample; 461 st->single_xfer[1].len = 4; 462 st->single_xfer[1].cs_change = 1; 463 /* powerdown */ 464 st->single_xfer[2].tx_buf = &st->data.sample[0]; 465 st->single_xfer[2].len = 1; 466 467 spi_message_init(&st->single_msg); 468 spi_message_add_tail(&st->single_xfer[0], &st->single_msg); 469 spi_message_add_tail(&st->single_xfer[1], &st->single_msg); 470 spi_message_add_tail(&st->single_xfer[2], &st->single_msg); 471 472 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, &iio_pollfunc_store_time, 473 &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops); 474 if (ret) 475 return ret; 476 477 return devm_iio_device_register(&spi->dev, indio_dev); 478 } 479 480 static const struct spi_device_id ad7266_id[] = { 481 {"ad7265", 0}, 482 {"ad7266", 0}, 483 { } 484 }; 485 MODULE_DEVICE_TABLE(spi, ad7266_id); 486 487 static struct spi_driver ad7266_driver = { 488 .driver = { 489 .name = "ad7266", 490 }, 491 .probe = ad7266_probe, 492 .id_table = ad7266_id, 493 }; 494 module_spi_driver(ad7266_driver); 495 496 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 497 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC"); 498 MODULE_LICENSE("GPL v2"); 499