1 /* 2 * STMicroelectronics accelerometers driver 3 * 4 * Copyright 2012-2013 STMicroelectronics Inc. 5 * 6 * Denis Ciocca <denis.ciocca@st.com> 7 * 8 * Licensed under the GPL-2. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/errno.h> 15 #include <linux/types.h> 16 #include <linux/mutex.h> 17 #include <linux/interrupt.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio.h> 20 #include <linux/irq.h> 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger.h> 24 #include <linux/iio/buffer.h> 25 26 #include <linux/iio/common/st_sensors.h> 27 #include "st_accel.h" 28 29 /* DEFAULT VALUE FOR SENSORS */ 30 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28 31 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a 32 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c 33 34 /* FULLSCALE */ 35 #define ST_ACCEL_FS_AVL_2G 2 36 #define ST_ACCEL_FS_AVL_4G 4 37 #define ST_ACCEL_FS_AVL_6G 6 38 #define ST_ACCEL_FS_AVL_8G 8 39 #define ST_ACCEL_FS_AVL_16G 16 40 41 /* CUSTOM VALUES FOR SENSOR 1 */ 42 #define ST_ACCEL_1_WAI_EXP 0x33 43 #define ST_ACCEL_1_ODR_ADDR 0x20 44 #define ST_ACCEL_1_ODR_MASK 0xf0 45 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01 46 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02 47 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03 48 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04 49 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05 50 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06 51 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07 52 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08 53 #define ST_ACCEL_1_FS_ADDR 0x23 54 #define ST_ACCEL_1_FS_MASK 0x30 55 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00 56 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01 57 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02 58 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03 59 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 60 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 61 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000) 62 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000) 63 #define ST_ACCEL_1_BDU_ADDR 0x23 64 #define ST_ACCEL_1_BDU_MASK 0x80 65 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22 66 #define ST_ACCEL_1_DRDY_IRQ_MASK 0x10 67 #define ST_ACCEL_1_MULTIREAD_BIT true 68 69 /* CUSTOM VALUES FOR SENSOR 2 */ 70 #define ST_ACCEL_2_WAI_EXP 0x32 71 #define ST_ACCEL_2_ODR_ADDR 0x20 72 #define ST_ACCEL_2_ODR_MASK 0x18 73 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00 74 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01 75 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02 76 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03 77 #define ST_ACCEL_2_PW_ADDR 0x20 78 #define ST_ACCEL_2_PW_MASK 0xe0 79 #define ST_ACCEL_2_FS_ADDR 0x23 80 #define ST_ACCEL_2_FS_MASK 0x30 81 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00 82 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01 83 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03 84 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 85 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 86 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900) 87 #define ST_ACCEL_2_BDU_ADDR 0x23 88 #define ST_ACCEL_2_BDU_MASK 0x80 89 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22 90 #define ST_ACCEL_2_DRDY_IRQ_MASK 0x02 91 #define ST_ACCEL_2_MULTIREAD_BIT true 92 93 /* CUSTOM VALUES FOR SENSOR 3 */ 94 #define ST_ACCEL_3_WAI_EXP 0x40 95 #define ST_ACCEL_3_ODR_ADDR 0x20 96 #define ST_ACCEL_3_ODR_MASK 0xf0 97 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01 98 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02 99 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03 100 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04 101 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05 102 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06 103 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07 104 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08 105 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09 106 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a 107 #define ST_ACCEL_3_FS_ADDR 0x24 108 #define ST_ACCEL_3_FS_MASK 0x38 109 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00 110 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01 111 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02 112 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03 113 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04 114 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61) 115 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122) 116 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183) 117 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244) 118 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732) 119 #define ST_ACCEL_3_BDU_ADDR 0x20 120 #define ST_ACCEL_3_BDU_MASK 0x08 121 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23 122 #define ST_ACCEL_3_DRDY_IRQ_MASK 0x80 123 #define ST_ACCEL_3_IG1_EN_ADDR 0x23 124 #define ST_ACCEL_3_IG1_EN_MASK 0x08 125 #define ST_ACCEL_3_MULTIREAD_BIT false 126 127 static const struct iio_chan_spec st_accel_12bit_channels[] = { 128 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_X, IIO_MOD_X, IIO_LE, 129 ST_SENSORS_DEFAULT_12_REALBITS, ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 130 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_Y, IIO_MOD_Y, IIO_LE, 131 ST_SENSORS_DEFAULT_12_REALBITS, ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 132 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_Z, IIO_MOD_Z, IIO_LE, 133 ST_SENSORS_DEFAULT_12_REALBITS, ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 134 IIO_CHAN_SOFT_TIMESTAMP(3) 135 }; 136 137 static const struct iio_chan_spec st_accel_16bit_channels[] = { 138 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_X, IIO_MOD_X, IIO_LE, 139 ST_SENSORS_DEFAULT_16_REALBITS, ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 140 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_Y, IIO_MOD_Y, IIO_LE, 141 ST_SENSORS_DEFAULT_16_REALBITS, ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 142 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, ST_SENSORS_SCAN_Z, IIO_MOD_Z, IIO_LE, 143 ST_SENSORS_DEFAULT_16_REALBITS, ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 144 IIO_CHAN_SOFT_TIMESTAMP(3) 145 }; 146 147 static const struct st_sensors st_accel_sensors[] = { 148 { 149 .wai = ST_ACCEL_1_WAI_EXP, 150 .sensors_supported = { 151 [0] = LIS3DH_ACCEL_DEV_NAME, 152 [1] = LSM303DLHC_ACCEL_DEV_NAME, 153 [2] = LSM330D_ACCEL_DEV_NAME, 154 [3] = LSM330DL_ACCEL_DEV_NAME, 155 [4] = LSM330DLC_ACCEL_DEV_NAME, 156 }, 157 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 158 .odr = { 159 .addr = ST_ACCEL_1_ODR_ADDR, 160 .mask = ST_ACCEL_1_ODR_MASK, 161 .odr_avl = { 162 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, }, 163 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, }, 164 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, }, 165 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, }, 166 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, }, 167 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, }, 168 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, }, 169 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, }, 170 }, 171 }, 172 .pw = { 173 .addr = ST_ACCEL_1_ODR_ADDR, 174 .mask = ST_ACCEL_1_ODR_MASK, 175 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 176 }, 177 .enable_axis = { 178 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 179 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 180 }, 181 .fs = { 182 .addr = ST_ACCEL_1_FS_ADDR, 183 .mask = ST_ACCEL_1_FS_MASK, 184 .fs_avl = { 185 [0] = { 186 .num = ST_ACCEL_FS_AVL_2G, 187 .value = ST_ACCEL_1_FS_AVL_2_VAL, 188 .gain = ST_ACCEL_1_FS_AVL_2_GAIN, 189 }, 190 [1] = { 191 .num = ST_ACCEL_FS_AVL_4G, 192 .value = ST_ACCEL_1_FS_AVL_4_VAL, 193 .gain = ST_ACCEL_1_FS_AVL_4_GAIN, 194 }, 195 [2] = { 196 .num = ST_ACCEL_FS_AVL_8G, 197 .value = ST_ACCEL_1_FS_AVL_8_VAL, 198 .gain = ST_ACCEL_1_FS_AVL_8_GAIN, 199 }, 200 [3] = { 201 .num = ST_ACCEL_FS_AVL_16G, 202 .value = ST_ACCEL_1_FS_AVL_16_VAL, 203 .gain = ST_ACCEL_1_FS_AVL_16_GAIN, 204 }, 205 }, 206 }, 207 .bdu = { 208 .addr = ST_ACCEL_1_BDU_ADDR, 209 .mask = ST_ACCEL_1_BDU_MASK, 210 }, 211 .drdy_irq = { 212 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR, 213 .mask = ST_ACCEL_1_DRDY_IRQ_MASK, 214 }, 215 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT, 216 .bootime = 2, 217 }, 218 { 219 .wai = ST_ACCEL_2_WAI_EXP, 220 .sensors_supported = { 221 [0] = LIS331DLH_ACCEL_DEV_NAME, 222 [1] = LSM303DL_ACCEL_DEV_NAME, 223 [2] = LSM303DLH_ACCEL_DEV_NAME, 224 [3] = LSM303DLM_ACCEL_DEV_NAME, 225 }, 226 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 227 .odr = { 228 .addr = ST_ACCEL_2_ODR_ADDR, 229 .mask = ST_ACCEL_2_ODR_MASK, 230 .odr_avl = { 231 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, }, 232 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, }, 233 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, }, 234 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, }, 235 }, 236 }, 237 .pw = { 238 .addr = ST_ACCEL_2_PW_ADDR, 239 .mask = ST_ACCEL_2_PW_MASK, 240 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 241 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 242 }, 243 .enable_axis = { 244 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 245 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 246 }, 247 .fs = { 248 .addr = ST_ACCEL_2_FS_ADDR, 249 .mask = ST_ACCEL_2_FS_MASK, 250 .fs_avl = { 251 [0] = { 252 .num = ST_ACCEL_FS_AVL_2G, 253 .value = ST_ACCEL_2_FS_AVL_2_VAL, 254 .gain = ST_ACCEL_2_FS_AVL_2_GAIN, 255 }, 256 [1] = { 257 .num = ST_ACCEL_FS_AVL_4G, 258 .value = ST_ACCEL_2_FS_AVL_4_VAL, 259 .gain = ST_ACCEL_2_FS_AVL_4_GAIN, 260 }, 261 [2] = { 262 .num = ST_ACCEL_FS_AVL_8G, 263 .value = ST_ACCEL_2_FS_AVL_8_VAL, 264 .gain = ST_ACCEL_2_FS_AVL_8_GAIN, 265 }, 266 }, 267 }, 268 .bdu = { 269 .addr = ST_ACCEL_2_BDU_ADDR, 270 .mask = ST_ACCEL_2_BDU_MASK, 271 }, 272 .drdy_irq = { 273 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR, 274 .mask = ST_ACCEL_2_DRDY_IRQ_MASK, 275 }, 276 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT, 277 .bootime = 2, 278 }, 279 { 280 .wai = ST_ACCEL_3_WAI_EXP, 281 .sensors_supported = { 282 [0] = LSM330_ACCEL_DEV_NAME, 283 }, 284 .ch = (struct iio_chan_spec *)st_accel_16bit_channels, 285 .odr = { 286 .addr = ST_ACCEL_3_ODR_ADDR, 287 .mask = ST_ACCEL_3_ODR_MASK, 288 .odr_avl = { 289 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL }, 290 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, }, 291 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, }, 292 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, }, 293 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, }, 294 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, }, 295 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, }, 296 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, }, 297 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, }, 298 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, }, 299 }, 300 }, 301 .pw = { 302 .addr = ST_ACCEL_3_ODR_ADDR, 303 .mask = ST_ACCEL_3_ODR_MASK, 304 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 305 }, 306 .enable_axis = { 307 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 308 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 309 }, 310 .fs = { 311 .addr = ST_ACCEL_3_FS_ADDR, 312 .mask = ST_ACCEL_3_FS_MASK, 313 .fs_avl = { 314 [0] = { 315 .num = ST_ACCEL_FS_AVL_2G, 316 .value = ST_ACCEL_3_FS_AVL_2_VAL, 317 .gain = ST_ACCEL_3_FS_AVL_2_GAIN, 318 }, 319 [1] = { 320 .num = ST_ACCEL_FS_AVL_4G, 321 .value = ST_ACCEL_3_FS_AVL_4_VAL, 322 .gain = ST_ACCEL_3_FS_AVL_4_GAIN, 323 }, 324 [2] = { 325 .num = ST_ACCEL_FS_AVL_6G, 326 .value = ST_ACCEL_3_FS_AVL_6_VAL, 327 .gain = ST_ACCEL_3_FS_AVL_6_GAIN, 328 }, 329 [3] = { 330 .num = ST_ACCEL_FS_AVL_8G, 331 .value = ST_ACCEL_3_FS_AVL_8_VAL, 332 .gain = ST_ACCEL_3_FS_AVL_8_GAIN, 333 }, 334 [4] = { 335 .num = ST_ACCEL_FS_AVL_16G, 336 .value = ST_ACCEL_3_FS_AVL_16_VAL, 337 .gain = ST_ACCEL_3_FS_AVL_16_GAIN, 338 }, 339 }, 340 }, 341 .bdu = { 342 .addr = ST_ACCEL_3_BDU_ADDR, 343 .mask = ST_ACCEL_3_BDU_MASK, 344 }, 345 .drdy_irq = { 346 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR, 347 .mask = ST_ACCEL_3_DRDY_IRQ_MASK, 348 .ig1 = { 349 .en_addr = ST_ACCEL_3_IG1_EN_ADDR, 350 .en_mask = ST_ACCEL_3_IG1_EN_MASK, 351 }, 352 }, 353 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT, 354 .bootime = 2, 355 }, 356 }; 357 358 static int st_accel_read_raw(struct iio_dev *indio_dev, 359 struct iio_chan_spec const *ch, int *val, 360 int *val2, long mask) 361 { 362 int err; 363 struct st_sensor_data *adata = iio_priv(indio_dev); 364 365 switch (mask) { 366 case IIO_CHAN_INFO_RAW: 367 err = st_sensors_read_info_raw(indio_dev, ch, val); 368 if (err < 0) 369 goto read_error; 370 371 return IIO_VAL_INT; 372 case IIO_CHAN_INFO_SCALE: 373 *val = 0; 374 *val2 = adata->current_fullscale->gain; 375 return IIO_VAL_INT_PLUS_MICRO; 376 default: 377 return -EINVAL; 378 } 379 380 read_error: 381 return err; 382 } 383 384 static int st_accel_write_raw(struct iio_dev *indio_dev, 385 struct iio_chan_spec const *chan, int val, int val2, long mask) 386 { 387 int err; 388 389 switch (mask) { 390 case IIO_CHAN_INFO_SCALE: 391 err = st_sensors_set_fullscale_by_gain(indio_dev, val2); 392 break; 393 default: 394 return -EINVAL; 395 } 396 397 return err; 398 } 399 400 static ST_SENSOR_DEV_ATTR_SAMP_FREQ(); 401 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL(); 402 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available); 403 404 static struct attribute *st_accel_attributes[] = { 405 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 406 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 407 &iio_dev_attr_sampling_frequency.dev_attr.attr, 408 NULL, 409 }; 410 411 static const struct attribute_group st_accel_attribute_group = { 412 .attrs = st_accel_attributes, 413 }; 414 415 static const struct iio_info accel_info = { 416 .driver_module = THIS_MODULE, 417 .attrs = &st_accel_attribute_group, 418 .read_raw = &st_accel_read_raw, 419 .write_raw = &st_accel_write_raw, 420 }; 421 422 #ifdef CONFIG_IIO_TRIGGER 423 static const struct iio_trigger_ops st_accel_trigger_ops = { 424 .owner = THIS_MODULE, 425 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE, 426 }; 427 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops) 428 #else 429 #define ST_ACCEL_TRIGGER_OPS NULL 430 #endif 431 432 int st_accel_common_probe(struct iio_dev *indio_dev) 433 { 434 int err; 435 struct st_sensor_data *adata = iio_priv(indio_dev); 436 437 indio_dev->modes = INDIO_DIRECT_MODE; 438 indio_dev->info = &accel_info; 439 440 err = st_sensors_check_device_support(indio_dev, 441 ARRAY_SIZE(st_accel_sensors), st_accel_sensors); 442 if (err < 0) 443 goto st_accel_common_probe_error; 444 445 adata->multiread_bit = adata->sensor->multi_read_bit; 446 indio_dev->channels = adata->sensor->ch; 447 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; 448 449 adata->current_fullscale = (struct st_sensor_fullscale_avl *) 450 &adata->sensor->fs.fs_avl[0]; 451 adata->odr = adata->sensor->odr.odr_avl[0].hz; 452 453 err = st_sensors_init_sensor(indio_dev); 454 if (err < 0) 455 goto st_accel_common_probe_error; 456 457 if (adata->get_irq_data_ready(indio_dev) > 0) { 458 err = st_accel_allocate_ring(indio_dev); 459 if (err < 0) 460 goto st_accel_common_probe_error; 461 462 err = st_sensors_allocate_trigger(indio_dev, 463 ST_ACCEL_TRIGGER_OPS); 464 if (err < 0) 465 goto st_accel_probe_trigger_error; 466 } 467 468 err = iio_device_register(indio_dev); 469 if (err) 470 goto st_accel_device_register_error; 471 472 return err; 473 474 st_accel_device_register_error: 475 if (adata->get_irq_data_ready(indio_dev) > 0) 476 st_sensors_deallocate_trigger(indio_dev); 477 st_accel_probe_trigger_error: 478 if (adata->get_irq_data_ready(indio_dev) > 0) 479 st_accel_deallocate_ring(indio_dev); 480 st_accel_common_probe_error: 481 return err; 482 } 483 EXPORT_SYMBOL(st_accel_common_probe); 484 485 void st_accel_common_remove(struct iio_dev *indio_dev) 486 { 487 struct st_sensor_data *adata = iio_priv(indio_dev); 488 489 iio_device_unregister(indio_dev); 490 if (adata->get_irq_data_ready(indio_dev) > 0) { 491 st_sensors_deallocate_trigger(indio_dev); 492 st_accel_deallocate_ring(indio_dev); 493 } 494 iio_device_free(indio_dev); 495 } 496 EXPORT_SYMBOL(st_accel_common_remove); 497 498 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 499 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver"); 500 MODULE_LICENSE("GPL v2"); 501