1 /* 2 * STMicroelectronics accelerometers driver 3 * 4 * Copyright 2012-2013 STMicroelectronics Inc. 5 * 6 * Denis Ciocca <denis.ciocca@st.com> 7 * 8 * Licensed under the GPL-2. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/errno.h> 15 #include <linux/types.h> 16 #include <linux/mutex.h> 17 #include <linux/interrupt.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio.h> 20 #include <linux/irq.h> 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger.h> 24 #include <linux/iio/buffer.h> 25 26 #include <linux/iio/common/st_sensors.h> 27 #include "st_accel.h" 28 29 #define ST_ACCEL_NUMBER_DATA_CHANNELS 3 30 31 /* DEFAULT VALUE FOR SENSORS */ 32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28 33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a 34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c 35 36 /* FULLSCALE */ 37 #define ST_ACCEL_FS_AVL_2G 2 38 #define ST_ACCEL_FS_AVL_4G 4 39 #define ST_ACCEL_FS_AVL_6G 6 40 #define ST_ACCEL_FS_AVL_8G 8 41 #define ST_ACCEL_FS_AVL_16G 16 42 43 /* CUSTOM VALUES FOR SENSOR 1 */ 44 #define ST_ACCEL_1_WAI_EXP 0x33 45 #define ST_ACCEL_1_ODR_ADDR 0x20 46 #define ST_ACCEL_1_ODR_MASK 0xf0 47 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01 48 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02 49 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03 50 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04 51 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05 52 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06 53 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07 54 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08 55 #define ST_ACCEL_1_FS_ADDR 0x23 56 #define ST_ACCEL_1_FS_MASK 0x30 57 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00 58 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01 59 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02 60 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03 61 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 62 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 63 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000) 64 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000) 65 #define ST_ACCEL_1_BDU_ADDR 0x23 66 #define ST_ACCEL_1_BDU_MASK 0x80 67 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22 68 #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10 69 #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08 70 #define ST_ACCEL_1_MULTIREAD_BIT true 71 72 /* CUSTOM VALUES FOR SENSOR 2 */ 73 #define ST_ACCEL_2_WAI_EXP 0x32 74 #define ST_ACCEL_2_ODR_ADDR 0x20 75 #define ST_ACCEL_2_ODR_MASK 0x18 76 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00 77 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01 78 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02 79 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03 80 #define ST_ACCEL_2_PW_ADDR 0x20 81 #define ST_ACCEL_2_PW_MASK 0xe0 82 #define ST_ACCEL_2_FS_ADDR 0x23 83 #define ST_ACCEL_2_FS_MASK 0x30 84 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00 85 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01 86 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03 87 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 88 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 89 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900) 90 #define ST_ACCEL_2_BDU_ADDR 0x23 91 #define ST_ACCEL_2_BDU_MASK 0x80 92 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22 93 #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02 94 #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10 95 #define ST_ACCEL_2_MULTIREAD_BIT true 96 97 /* CUSTOM VALUES FOR SENSOR 3 */ 98 #define ST_ACCEL_3_WAI_EXP 0x40 99 #define ST_ACCEL_3_ODR_ADDR 0x20 100 #define ST_ACCEL_3_ODR_MASK 0xf0 101 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01 102 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02 103 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03 104 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04 105 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05 106 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06 107 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07 108 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08 109 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09 110 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a 111 #define ST_ACCEL_3_FS_ADDR 0x24 112 #define ST_ACCEL_3_FS_MASK 0x38 113 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00 114 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01 115 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02 116 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03 117 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04 118 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61) 119 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122) 120 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183) 121 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244) 122 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732) 123 #define ST_ACCEL_3_BDU_ADDR 0x20 124 #define ST_ACCEL_3_BDU_MASK 0x08 125 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23 126 #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80 127 #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00 128 #define ST_ACCEL_3_IG1_EN_ADDR 0x23 129 #define ST_ACCEL_3_IG1_EN_MASK 0x08 130 #define ST_ACCEL_3_MULTIREAD_BIT false 131 132 /* CUSTOM VALUES FOR SENSOR 4 */ 133 #define ST_ACCEL_4_WAI_EXP 0x3a 134 #define ST_ACCEL_4_ODR_ADDR 0x20 135 #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */ 136 #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00 137 #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01 138 #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02 139 #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03 140 #define ST_ACCEL_4_PW_ADDR 0x20 141 #define ST_ACCEL_4_PW_MASK 0xc0 142 #define ST_ACCEL_4_FS_ADDR 0x21 143 #define ST_ACCEL_4_FS_MASK 0x80 144 #define ST_ACCEL_4_FS_AVL_2_VAL 0X00 145 #define ST_ACCEL_4_FS_AVL_6_VAL 0X01 146 #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024) 147 #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340) 148 #define ST_ACCEL_4_BDU_ADDR 0x21 149 #define ST_ACCEL_4_BDU_MASK 0x40 150 #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21 151 #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04 152 #define ST_ACCEL_4_IG1_EN_ADDR 0x21 153 #define ST_ACCEL_4_IG1_EN_MASK 0x08 154 #define ST_ACCEL_4_MULTIREAD_BIT true 155 156 /* CUSTOM VALUES FOR SENSOR 5 */ 157 #define ST_ACCEL_5_WAI_EXP 0x3b 158 #define ST_ACCEL_5_ODR_ADDR 0x20 159 #define ST_ACCEL_5_ODR_MASK 0x80 160 #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00 161 #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01 162 #define ST_ACCEL_5_PW_ADDR 0x20 163 #define ST_ACCEL_5_PW_MASK 0x40 164 #define ST_ACCEL_5_FS_ADDR 0x20 165 #define ST_ACCEL_5_FS_MASK 0x20 166 #define ST_ACCEL_5_FS_AVL_2_VAL 0X00 167 #define ST_ACCEL_5_FS_AVL_8_VAL 0X01 168 /* TODO: check these resulting gain settings, these are not in the datsheet */ 169 #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000) 170 #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000) 171 #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22 172 #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04 173 #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20 174 #define ST_ACCEL_5_IG1_EN_ADDR 0x21 175 #define ST_ACCEL_5_IG1_EN_MASK 0x08 176 #define ST_ACCEL_5_MULTIREAD_BIT false 177 178 static const struct iio_chan_spec st_accel_8bit_channels[] = { 179 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 180 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 181 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8, 182 ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1), 183 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 184 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 185 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8, 186 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1), 187 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 188 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 189 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8, 190 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1), 191 IIO_CHAN_SOFT_TIMESTAMP(3) 192 }; 193 194 static const struct iio_chan_spec st_accel_12bit_channels[] = { 195 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 196 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 197 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16, 198 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 199 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 200 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 201 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16, 202 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 203 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 204 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 205 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16, 206 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 207 IIO_CHAN_SOFT_TIMESTAMP(3) 208 }; 209 210 static const struct iio_chan_spec st_accel_16bit_channels[] = { 211 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 212 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 213 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16, 214 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 215 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 216 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 217 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16, 218 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 219 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 220 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 221 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16, 222 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 223 IIO_CHAN_SOFT_TIMESTAMP(3) 224 }; 225 226 static const struct st_sensor_settings st_accel_sensors_settings[] = { 227 { 228 .wai = ST_ACCEL_1_WAI_EXP, 229 .sensors_supported = { 230 [0] = LIS3DH_ACCEL_DEV_NAME, 231 [1] = LSM303DLHC_ACCEL_DEV_NAME, 232 [2] = LSM330D_ACCEL_DEV_NAME, 233 [3] = LSM330DL_ACCEL_DEV_NAME, 234 [4] = LSM330DLC_ACCEL_DEV_NAME, 235 }, 236 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 237 .odr = { 238 .addr = ST_ACCEL_1_ODR_ADDR, 239 .mask = ST_ACCEL_1_ODR_MASK, 240 .odr_avl = { 241 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, }, 242 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, }, 243 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, }, 244 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, }, 245 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, }, 246 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, }, 247 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, }, 248 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, }, 249 }, 250 }, 251 .pw = { 252 .addr = ST_ACCEL_1_ODR_ADDR, 253 .mask = ST_ACCEL_1_ODR_MASK, 254 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 255 }, 256 .enable_axis = { 257 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 258 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 259 }, 260 .fs = { 261 .addr = ST_ACCEL_1_FS_ADDR, 262 .mask = ST_ACCEL_1_FS_MASK, 263 .fs_avl = { 264 [0] = { 265 .num = ST_ACCEL_FS_AVL_2G, 266 .value = ST_ACCEL_1_FS_AVL_2_VAL, 267 .gain = ST_ACCEL_1_FS_AVL_2_GAIN, 268 }, 269 [1] = { 270 .num = ST_ACCEL_FS_AVL_4G, 271 .value = ST_ACCEL_1_FS_AVL_4_VAL, 272 .gain = ST_ACCEL_1_FS_AVL_4_GAIN, 273 }, 274 [2] = { 275 .num = ST_ACCEL_FS_AVL_8G, 276 .value = ST_ACCEL_1_FS_AVL_8_VAL, 277 .gain = ST_ACCEL_1_FS_AVL_8_GAIN, 278 }, 279 [3] = { 280 .num = ST_ACCEL_FS_AVL_16G, 281 .value = ST_ACCEL_1_FS_AVL_16_VAL, 282 .gain = ST_ACCEL_1_FS_AVL_16_GAIN, 283 }, 284 }, 285 }, 286 .bdu = { 287 .addr = ST_ACCEL_1_BDU_ADDR, 288 .mask = ST_ACCEL_1_BDU_MASK, 289 }, 290 .drdy_irq = { 291 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR, 292 .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK, 293 .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK, 294 }, 295 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT, 296 .bootime = 2, 297 }, 298 { 299 .wai = ST_ACCEL_2_WAI_EXP, 300 .sensors_supported = { 301 [0] = LIS331DLH_ACCEL_DEV_NAME, 302 [1] = LSM303DL_ACCEL_DEV_NAME, 303 [2] = LSM303DLH_ACCEL_DEV_NAME, 304 [3] = LSM303DLM_ACCEL_DEV_NAME, 305 }, 306 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 307 .odr = { 308 .addr = ST_ACCEL_2_ODR_ADDR, 309 .mask = ST_ACCEL_2_ODR_MASK, 310 .odr_avl = { 311 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, }, 312 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, }, 313 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, }, 314 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, }, 315 }, 316 }, 317 .pw = { 318 .addr = ST_ACCEL_2_PW_ADDR, 319 .mask = ST_ACCEL_2_PW_MASK, 320 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 321 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 322 }, 323 .enable_axis = { 324 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 325 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 326 }, 327 .fs = { 328 .addr = ST_ACCEL_2_FS_ADDR, 329 .mask = ST_ACCEL_2_FS_MASK, 330 .fs_avl = { 331 [0] = { 332 .num = ST_ACCEL_FS_AVL_2G, 333 .value = ST_ACCEL_2_FS_AVL_2_VAL, 334 .gain = ST_ACCEL_2_FS_AVL_2_GAIN, 335 }, 336 [1] = { 337 .num = ST_ACCEL_FS_AVL_4G, 338 .value = ST_ACCEL_2_FS_AVL_4_VAL, 339 .gain = ST_ACCEL_2_FS_AVL_4_GAIN, 340 }, 341 [2] = { 342 .num = ST_ACCEL_FS_AVL_8G, 343 .value = ST_ACCEL_2_FS_AVL_8_VAL, 344 .gain = ST_ACCEL_2_FS_AVL_8_GAIN, 345 }, 346 }, 347 }, 348 .bdu = { 349 .addr = ST_ACCEL_2_BDU_ADDR, 350 .mask = ST_ACCEL_2_BDU_MASK, 351 }, 352 .drdy_irq = { 353 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR, 354 .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK, 355 .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK, 356 }, 357 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT, 358 .bootime = 2, 359 }, 360 { 361 .wai = ST_ACCEL_3_WAI_EXP, 362 .sensors_supported = { 363 [0] = LSM330_ACCEL_DEV_NAME, 364 }, 365 .ch = (struct iio_chan_spec *)st_accel_16bit_channels, 366 .odr = { 367 .addr = ST_ACCEL_3_ODR_ADDR, 368 .mask = ST_ACCEL_3_ODR_MASK, 369 .odr_avl = { 370 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL }, 371 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, }, 372 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, }, 373 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, }, 374 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, }, 375 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, }, 376 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, }, 377 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, }, 378 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, }, 379 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, }, 380 }, 381 }, 382 .pw = { 383 .addr = ST_ACCEL_3_ODR_ADDR, 384 .mask = ST_ACCEL_3_ODR_MASK, 385 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 386 }, 387 .enable_axis = { 388 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 389 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 390 }, 391 .fs = { 392 .addr = ST_ACCEL_3_FS_ADDR, 393 .mask = ST_ACCEL_3_FS_MASK, 394 .fs_avl = { 395 [0] = { 396 .num = ST_ACCEL_FS_AVL_2G, 397 .value = ST_ACCEL_3_FS_AVL_2_VAL, 398 .gain = ST_ACCEL_3_FS_AVL_2_GAIN, 399 }, 400 [1] = { 401 .num = ST_ACCEL_FS_AVL_4G, 402 .value = ST_ACCEL_3_FS_AVL_4_VAL, 403 .gain = ST_ACCEL_3_FS_AVL_4_GAIN, 404 }, 405 [2] = { 406 .num = ST_ACCEL_FS_AVL_6G, 407 .value = ST_ACCEL_3_FS_AVL_6_VAL, 408 .gain = ST_ACCEL_3_FS_AVL_6_GAIN, 409 }, 410 [3] = { 411 .num = ST_ACCEL_FS_AVL_8G, 412 .value = ST_ACCEL_3_FS_AVL_8_VAL, 413 .gain = ST_ACCEL_3_FS_AVL_8_GAIN, 414 }, 415 [4] = { 416 .num = ST_ACCEL_FS_AVL_16G, 417 .value = ST_ACCEL_3_FS_AVL_16_VAL, 418 .gain = ST_ACCEL_3_FS_AVL_16_GAIN, 419 }, 420 }, 421 }, 422 .bdu = { 423 .addr = ST_ACCEL_3_BDU_ADDR, 424 .mask = ST_ACCEL_3_BDU_MASK, 425 }, 426 .drdy_irq = { 427 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR, 428 .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK, 429 .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK, 430 .ig1 = { 431 .en_addr = ST_ACCEL_3_IG1_EN_ADDR, 432 .en_mask = ST_ACCEL_3_IG1_EN_MASK, 433 }, 434 }, 435 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT, 436 .bootime = 2, 437 }, 438 { 439 .wai = ST_ACCEL_4_WAI_EXP, 440 .sensors_supported = { 441 [0] = LIS3LV02DL_ACCEL_DEV_NAME, 442 }, 443 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 444 .odr = { 445 .addr = ST_ACCEL_4_ODR_ADDR, 446 .mask = ST_ACCEL_4_ODR_MASK, 447 .odr_avl = { 448 { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL }, 449 { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, }, 450 { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, }, 451 { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, }, 452 }, 453 }, 454 .pw = { 455 .addr = ST_ACCEL_4_PW_ADDR, 456 .mask = ST_ACCEL_4_PW_MASK, 457 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 458 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 459 }, 460 .enable_axis = { 461 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 462 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 463 }, 464 .fs = { 465 .addr = ST_ACCEL_4_FS_ADDR, 466 .mask = ST_ACCEL_4_FS_MASK, 467 .fs_avl = { 468 [0] = { 469 .num = ST_ACCEL_FS_AVL_2G, 470 .value = ST_ACCEL_4_FS_AVL_2_VAL, 471 .gain = ST_ACCEL_4_FS_AVL_2_GAIN, 472 }, 473 [1] = { 474 .num = ST_ACCEL_FS_AVL_6G, 475 .value = ST_ACCEL_4_FS_AVL_6_VAL, 476 .gain = ST_ACCEL_4_FS_AVL_6_GAIN, 477 }, 478 }, 479 }, 480 .bdu = { 481 .addr = ST_ACCEL_4_BDU_ADDR, 482 .mask = ST_ACCEL_4_BDU_MASK, 483 }, 484 .drdy_irq = { 485 .addr = ST_ACCEL_4_DRDY_IRQ_ADDR, 486 .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK, 487 .ig1 = { 488 .en_addr = ST_ACCEL_4_IG1_EN_ADDR, 489 .en_mask = ST_ACCEL_4_IG1_EN_MASK, 490 }, 491 }, 492 .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT, 493 .bootime = 2, /* guess */ 494 }, 495 { 496 .wai = ST_ACCEL_5_WAI_EXP, 497 .sensors_supported = { 498 [0] = LIS331DL_ACCEL_DEV_NAME, 499 }, 500 .ch = (struct iio_chan_spec *)st_accel_8bit_channels, 501 .odr = { 502 .addr = ST_ACCEL_5_ODR_ADDR, 503 .mask = ST_ACCEL_5_ODR_MASK, 504 .odr_avl = { 505 { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL }, 506 { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, }, 507 }, 508 }, 509 .pw = { 510 .addr = ST_ACCEL_5_PW_ADDR, 511 .mask = ST_ACCEL_5_PW_MASK, 512 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 513 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 514 }, 515 .enable_axis = { 516 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 517 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 518 }, 519 .fs = { 520 .addr = ST_ACCEL_5_FS_ADDR, 521 .mask = ST_ACCEL_5_FS_MASK, 522 .fs_avl = { 523 [0] = { 524 .num = ST_ACCEL_FS_AVL_2G, 525 .value = ST_ACCEL_5_FS_AVL_2_VAL, 526 .gain = ST_ACCEL_5_FS_AVL_2_GAIN, 527 }, 528 [1] = { 529 .num = ST_ACCEL_FS_AVL_8G, 530 .value = ST_ACCEL_5_FS_AVL_8_VAL, 531 .gain = ST_ACCEL_5_FS_AVL_8_GAIN, 532 }, 533 }, 534 }, 535 .drdy_irq = { 536 .addr = ST_ACCEL_5_DRDY_IRQ_ADDR, 537 .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK, 538 .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK, 539 }, 540 .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT, 541 .bootime = 2, /* guess */ 542 }, 543 }; 544 545 static int st_accel_read_raw(struct iio_dev *indio_dev, 546 struct iio_chan_spec const *ch, int *val, 547 int *val2, long mask) 548 { 549 int err; 550 struct st_sensor_data *adata = iio_priv(indio_dev); 551 552 switch (mask) { 553 case IIO_CHAN_INFO_RAW: 554 err = st_sensors_read_info_raw(indio_dev, ch, val); 555 if (err < 0) 556 goto read_error; 557 558 return IIO_VAL_INT; 559 case IIO_CHAN_INFO_SCALE: 560 *val = 0; 561 *val2 = adata->current_fullscale->gain; 562 return IIO_VAL_INT_PLUS_MICRO; 563 case IIO_CHAN_INFO_SAMP_FREQ: 564 *val = adata->odr; 565 return IIO_VAL_INT; 566 default: 567 return -EINVAL; 568 } 569 570 read_error: 571 return err; 572 } 573 574 static int st_accel_write_raw(struct iio_dev *indio_dev, 575 struct iio_chan_spec const *chan, int val, int val2, long mask) 576 { 577 int err; 578 579 switch (mask) { 580 case IIO_CHAN_INFO_SCALE: 581 err = st_sensors_set_fullscale_by_gain(indio_dev, val2); 582 break; 583 case IIO_CHAN_INFO_SAMP_FREQ: 584 if (val2) 585 return -EINVAL; 586 mutex_lock(&indio_dev->mlock); 587 err = st_sensors_set_odr(indio_dev, val); 588 mutex_unlock(&indio_dev->mlock); 589 return err; 590 default: 591 return -EINVAL; 592 } 593 594 return err; 595 } 596 597 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL(); 598 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available); 599 600 static struct attribute *st_accel_attributes[] = { 601 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 602 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 603 NULL, 604 }; 605 606 static const struct attribute_group st_accel_attribute_group = { 607 .attrs = st_accel_attributes, 608 }; 609 610 static const struct iio_info accel_info = { 611 .driver_module = THIS_MODULE, 612 .attrs = &st_accel_attribute_group, 613 .read_raw = &st_accel_read_raw, 614 .write_raw = &st_accel_write_raw, 615 }; 616 617 #ifdef CONFIG_IIO_TRIGGER 618 static const struct iio_trigger_ops st_accel_trigger_ops = { 619 .owner = THIS_MODULE, 620 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE, 621 }; 622 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops) 623 #else 624 #define ST_ACCEL_TRIGGER_OPS NULL 625 #endif 626 627 int st_accel_common_probe(struct iio_dev *indio_dev) 628 { 629 struct st_sensor_data *adata = iio_priv(indio_dev); 630 int irq = adata->get_irq_data_ready(indio_dev); 631 int err; 632 633 indio_dev->modes = INDIO_DIRECT_MODE; 634 indio_dev->info = &accel_info; 635 mutex_init(&adata->tb.buf_lock); 636 637 st_sensors_power_enable(indio_dev); 638 639 err = st_sensors_check_device_support(indio_dev, 640 ARRAY_SIZE(st_accel_sensors_settings), 641 st_accel_sensors_settings); 642 if (err < 0) 643 return err; 644 645 adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS; 646 adata->multiread_bit = adata->sensor_settings->multi_read_bit; 647 indio_dev->channels = adata->sensor_settings->ch; 648 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; 649 650 adata->current_fullscale = (struct st_sensor_fullscale_avl *) 651 &adata->sensor_settings->fs.fs_avl[0]; 652 adata->odr = adata->sensor_settings->odr.odr_avl[0].hz; 653 654 if (!adata->dev->platform_data) 655 adata->dev->platform_data = 656 (struct st_sensors_platform_data *)&default_accel_pdata; 657 658 err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data); 659 if (err < 0) 660 return err; 661 662 err = st_accel_allocate_ring(indio_dev); 663 if (err < 0) 664 return err; 665 666 if (irq > 0) { 667 err = st_sensors_allocate_trigger(indio_dev, 668 ST_ACCEL_TRIGGER_OPS); 669 if (err < 0) 670 goto st_accel_probe_trigger_error; 671 } 672 673 err = iio_device_register(indio_dev); 674 if (err) 675 goto st_accel_device_register_error; 676 677 dev_info(&indio_dev->dev, "registered accelerometer %s\n", 678 indio_dev->name); 679 680 return 0; 681 682 st_accel_device_register_error: 683 if (irq > 0) 684 st_sensors_deallocate_trigger(indio_dev); 685 st_accel_probe_trigger_error: 686 st_accel_deallocate_ring(indio_dev); 687 688 return err; 689 } 690 EXPORT_SYMBOL(st_accel_common_probe); 691 692 void st_accel_common_remove(struct iio_dev *indio_dev) 693 { 694 struct st_sensor_data *adata = iio_priv(indio_dev); 695 696 st_sensors_power_disable(indio_dev); 697 698 iio_device_unregister(indio_dev); 699 if (adata->get_irq_data_ready(indio_dev) > 0) 700 st_sensors_deallocate_trigger(indio_dev); 701 702 st_accel_deallocate_ring(indio_dev); 703 } 704 EXPORT_SYMBOL(st_accel_common_remove); 705 706 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 707 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver"); 708 MODULE_LICENSE("GPL v2"); 709