1 /* 2 * STMicroelectronics accelerometers driver 3 * 4 * Copyright 2012-2013 STMicroelectronics Inc. 5 * 6 * Denis Ciocca <denis.ciocca@st.com> 7 * 8 * Licensed under the GPL-2. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/errno.h> 15 #include <linux/types.h> 16 #include <linux/mutex.h> 17 #include <linux/interrupt.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio.h> 20 #include <linux/irq.h> 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger.h> 24 #include <linux/iio/buffer.h> 25 26 #include <linux/iio/common/st_sensors.h> 27 #include "st_accel.h" 28 29 #define ST_ACCEL_NUMBER_DATA_CHANNELS 3 30 31 /* DEFAULT VALUE FOR SENSORS */ 32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28 33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a 34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c 35 36 /* FULLSCALE */ 37 #define ST_ACCEL_FS_AVL_2G 2 38 #define ST_ACCEL_FS_AVL_4G 4 39 #define ST_ACCEL_FS_AVL_6G 6 40 #define ST_ACCEL_FS_AVL_8G 8 41 #define ST_ACCEL_FS_AVL_16G 16 42 43 /* CUSTOM VALUES FOR SENSOR 1 */ 44 #define ST_ACCEL_1_WAI_EXP 0x33 45 #define ST_ACCEL_1_ODR_ADDR 0x20 46 #define ST_ACCEL_1_ODR_MASK 0xf0 47 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01 48 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02 49 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03 50 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04 51 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05 52 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06 53 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07 54 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08 55 #define ST_ACCEL_1_FS_ADDR 0x23 56 #define ST_ACCEL_1_FS_MASK 0x30 57 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00 58 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01 59 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02 60 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03 61 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 62 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 63 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000) 64 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000) 65 #define ST_ACCEL_1_BDU_ADDR 0x23 66 #define ST_ACCEL_1_BDU_MASK 0x80 67 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22 68 #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10 69 #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08 70 #define ST_ACCEL_1_MULTIREAD_BIT true 71 72 /* CUSTOM VALUES FOR SENSOR 2 */ 73 #define ST_ACCEL_2_WAI_EXP 0x32 74 #define ST_ACCEL_2_ODR_ADDR 0x20 75 #define ST_ACCEL_2_ODR_MASK 0x18 76 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00 77 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01 78 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02 79 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03 80 #define ST_ACCEL_2_PW_ADDR 0x20 81 #define ST_ACCEL_2_PW_MASK 0xe0 82 #define ST_ACCEL_2_FS_ADDR 0x23 83 #define ST_ACCEL_2_FS_MASK 0x30 84 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00 85 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01 86 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03 87 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 88 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 89 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900) 90 #define ST_ACCEL_2_BDU_ADDR 0x23 91 #define ST_ACCEL_2_BDU_MASK 0x80 92 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22 93 #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02 94 #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10 95 #define ST_ACCEL_2_MULTIREAD_BIT true 96 97 /* CUSTOM VALUES FOR SENSOR 3 */ 98 #define ST_ACCEL_3_WAI_EXP 0x40 99 #define ST_ACCEL_3_ODR_ADDR 0x20 100 #define ST_ACCEL_3_ODR_MASK 0xf0 101 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01 102 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02 103 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03 104 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04 105 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05 106 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06 107 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07 108 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08 109 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09 110 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a 111 #define ST_ACCEL_3_FS_ADDR 0x24 112 #define ST_ACCEL_3_FS_MASK 0x38 113 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00 114 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01 115 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02 116 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03 117 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04 118 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61) 119 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122) 120 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183) 121 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244) 122 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732) 123 #define ST_ACCEL_3_BDU_ADDR 0x20 124 #define ST_ACCEL_3_BDU_MASK 0x08 125 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23 126 #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80 127 #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00 128 #define ST_ACCEL_3_IG1_EN_ADDR 0x23 129 #define ST_ACCEL_3_IG1_EN_MASK 0x08 130 #define ST_ACCEL_3_MULTIREAD_BIT false 131 132 /* CUSTOM VALUES FOR SENSOR 4 */ 133 #define ST_ACCEL_4_WAI_EXP 0x3a 134 #define ST_ACCEL_4_ODR_ADDR 0x20 135 #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */ 136 #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00 137 #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01 138 #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02 139 #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03 140 #define ST_ACCEL_4_PW_ADDR 0x20 141 #define ST_ACCEL_4_PW_MASK 0xc0 142 #define ST_ACCEL_4_FS_ADDR 0x21 143 #define ST_ACCEL_4_FS_MASK 0x80 144 #define ST_ACCEL_4_FS_AVL_2_VAL 0X00 145 #define ST_ACCEL_4_FS_AVL_6_VAL 0X01 146 #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024) 147 #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340) 148 #define ST_ACCEL_4_BDU_ADDR 0x21 149 #define ST_ACCEL_4_BDU_MASK 0x40 150 #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21 151 #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04 152 #define ST_ACCEL_4_MULTIREAD_BIT true 153 154 /* CUSTOM VALUES FOR SENSOR 5 */ 155 #define ST_ACCEL_5_WAI_EXP 0x3b 156 #define ST_ACCEL_5_ODR_ADDR 0x20 157 #define ST_ACCEL_5_ODR_MASK 0x80 158 #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00 159 #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01 160 #define ST_ACCEL_5_PW_ADDR 0x20 161 #define ST_ACCEL_5_PW_MASK 0x40 162 #define ST_ACCEL_5_FS_ADDR 0x20 163 #define ST_ACCEL_5_FS_MASK 0x20 164 #define ST_ACCEL_5_FS_AVL_2_VAL 0X00 165 #define ST_ACCEL_5_FS_AVL_8_VAL 0X01 166 /* TODO: check these resulting gain settings, these are not in the datsheet */ 167 #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000) 168 #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000) 169 #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22 170 #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04 171 #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20 172 #define ST_ACCEL_5_IG1_EN_ADDR 0x21 173 #define ST_ACCEL_5_IG1_EN_MASK 0x08 174 #define ST_ACCEL_5_MULTIREAD_BIT false 175 176 static const struct iio_chan_spec st_accel_8bit_channels[] = { 177 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 178 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 179 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8, 180 ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1), 181 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 182 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 183 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8, 184 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1), 185 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 186 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 187 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8, 188 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1), 189 IIO_CHAN_SOFT_TIMESTAMP(3) 190 }; 191 192 static const struct iio_chan_spec st_accel_12bit_channels[] = { 193 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 194 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 195 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16, 196 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 197 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 198 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 199 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16, 200 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 201 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 202 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 203 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16, 204 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 205 IIO_CHAN_SOFT_TIMESTAMP(3) 206 }; 207 208 static const struct iio_chan_spec st_accel_16bit_channels[] = { 209 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 210 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 211 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16, 212 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 213 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 214 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 215 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16, 216 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 217 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 218 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 219 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16, 220 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 221 IIO_CHAN_SOFT_TIMESTAMP(3) 222 }; 223 224 static const struct st_sensor_settings st_accel_sensors_settings[] = { 225 { 226 .wai = ST_ACCEL_1_WAI_EXP, 227 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 228 .sensors_supported = { 229 [0] = LIS3DH_ACCEL_DEV_NAME, 230 [1] = LSM303DLHC_ACCEL_DEV_NAME, 231 [2] = LSM330D_ACCEL_DEV_NAME, 232 [3] = LSM330DL_ACCEL_DEV_NAME, 233 [4] = LSM330DLC_ACCEL_DEV_NAME, 234 [5] = LSM303AGR_ACCEL_DEV_NAME, 235 }, 236 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 237 .odr = { 238 .addr = ST_ACCEL_1_ODR_ADDR, 239 .mask = ST_ACCEL_1_ODR_MASK, 240 .odr_avl = { 241 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, }, 242 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, }, 243 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, }, 244 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, }, 245 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, }, 246 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, }, 247 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, }, 248 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, }, 249 }, 250 }, 251 .pw = { 252 .addr = ST_ACCEL_1_ODR_ADDR, 253 .mask = ST_ACCEL_1_ODR_MASK, 254 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 255 }, 256 .enable_axis = { 257 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 258 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 259 }, 260 .fs = { 261 .addr = ST_ACCEL_1_FS_ADDR, 262 .mask = ST_ACCEL_1_FS_MASK, 263 .fs_avl = { 264 [0] = { 265 .num = ST_ACCEL_FS_AVL_2G, 266 .value = ST_ACCEL_1_FS_AVL_2_VAL, 267 .gain = ST_ACCEL_1_FS_AVL_2_GAIN, 268 }, 269 [1] = { 270 .num = ST_ACCEL_FS_AVL_4G, 271 .value = ST_ACCEL_1_FS_AVL_4_VAL, 272 .gain = ST_ACCEL_1_FS_AVL_4_GAIN, 273 }, 274 [2] = { 275 .num = ST_ACCEL_FS_AVL_8G, 276 .value = ST_ACCEL_1_FS_AVL_8_VAL, 277 .gain = ST_ACCEL_1_FS_AVL_8_GAIN, 278 }, 279 [3] = { 280 .num = ST_ACCEL_FS_AVL_16G, 281 .value = ST_ACCEL_1_FS_AVL_16_VAL, 282 .gain = ST_ACCEL_1_FS_AVL_16_GAIN, 283 }, 284 }, 285 }, 286 .bdu = { 287 .addr = ST_ACCEL_1_BDU_ADDR, 288 .mask = ST_ACCEL_1_BDU_MASK, 289 }, 290 .drdy_irq = { 291 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR, 292 .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK, 293 .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK, 294 }, 295 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT, 296 .bootime = 2, 297 }, 298 { 299 .wai = ST_ACCEL_2_WAI_EXP, 300 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 301 .sensors_supported = { 302 [0] = LIS331DLH_ACCEL_DEV_NAME, 303 [1] = LSM303DL_ACCEL_DEV_NAME, 304 [2] = LSM303DLH_ACCEL_DEV_NAME, 305 [3] = LSM303DLM_ACCEL_DEV_NAME, 306 }, 307 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 308 .odr = { 309 .addr = ST_ACCEL_2_ODR_ADDR, 310 .mask = ST_ACCEL_2_ODR_MASK, 311 .odr_avl = { 312 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, }, 313 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, }, 314 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, }, 315 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, }, 316 }, 317 }, 318 .pw = { 319 .addr = ST_ACCEL_2_PW_ADDR, 320 .mask = ST_ACCEL_2_PW_MASK, 321 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 322 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 323 }, 324 .enable_axis = { 325 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 326 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 327 }, 328 .fs = { 329 .addr = ST_ACCEL_2_FS_ADDR, 330 .mask = ST_ACCEL_2_FS_MASK, 331 .fs_avl = { 332 [0] = { 333 .num = ST_ACCEL_FS_AVL_2G, 334 .value = ST_ACCEL_2_FS_AVL_2_VAL, 335 .gain = ST_ACCEL_2_FS_AVL_2_GAIN, 336 }, 337 [1] = { 338 .num = ST_ACCEL_FS_AVL_4G, 339 .value = ST_ACCEL_2_FS_AVL_4_VAL, 340 .gain = ST_ACCEL_2_FS_AVL_4_GAIN, 341 }, 342 [2] = { 343 .num = ST_ACCEL_FS_AVL_8G, 344 .value = ST_ACCEL_2_FS_AVL_8_VAL, 345 .gain = ST_ACCEL_2_FS_AVL_8_GAIN, 346 }, 347 }, 348 }, 349 .bdu = { 350 .addr = ST_ACCEL_2_BDU_ADDR, 351 .mask = ST_ACCEL_2_BDU_MASK, 352 }, 353 .drdy_irq = { 354 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR, 355 .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK, 356 .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK, 357 }, 358 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT, 359 .bootime = 2, 360 }, 361 { 362 .wai = ST_ACCEL_3_WAI_EXP, 363 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 364 .sensors_supported = { 365 [0] = LSM330_ACCEL_DEV_NAME, 366 }, 367 .ch = (struct iio_chan_spec *)st_accel_16bit_channels, 368 .odr = { 369 .addr = ST_ACCEL_3_ODR_ADDR, 370 .mask = ST_ACCEL_3_ODR_MASK, 371 .odr_avl = { 372 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL }, 373 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, }, 374 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, }, 375 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, }, 376 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, }, 377 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, }, 378 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, }, 379 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, }, 380 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, }, 381 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, }, 382 }, 383 }, 384 .pw = { 385 .addr = ST_ACCEL_3_ODR_ADDR, 386 .mask = ST_ACCEL_3_ODR_MASK, 387 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 388 }, 389 .enable_axis = { 390 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 391 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 392 }, 393 .fs = { 394 .addr = ST_ACCEL_3_FS_ADDR, 395 .mask = ST_ACCEL_3_FS_MASK, 396 .fs_avl = { 397 [0] = { 398 .num = ST_ACCEL_FS_AVL_2G, 399 .value = ST_ACCEL_3_FS_AVL_2_VAL, 400 .gain = ST_ACCEL_3_FS_AVL_2_GAIN, 401 }, 402 [1] = { 403 .num = ST_ACCEL_FS_AVL_4G, 404 .value = ST_ACCEL_3_FS_AVL_4_VAL, 405 .gain = ST_ACCEL_3_FS_AVL_4_GAIN, 406 }, 407 [2] = { 408 .num = ST_ACCEL_FS_AVL_6G, 409 .value = ST_ACCEL_3_FS_AVL_6_VAL, 410 .gain = ST_ACCEL_3_FS_AVL_6_GAIN, 411 }, 412 [3] = { 413 .num = ST_ACCEL_FS_AVL_8G, 414 .value = ST_ACCEL_3_FS_AVL_8_VAL, 415 .gain = ST_ACCEL_3_FS_AVL_8_GAIN, 416 }, 417 [4] = { 418 .num = ST_ACCEL_FS_AVL_16G, 419 .value = ST_ACCEL_3_FS_AVL_16_VAL, 420 .gain = ST_ACCEL_3_FS_AVL_16_GAIN, 421 }, 422 }, 423 }, 424 .bdu = { 425 .addr = ST_ACCEL_3_BDU_ADDR, 426 .mask = ST_ACCEL_3_BDU_MASK, 427 }, 428 .drdy_irq = { 429 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR, 430 .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK, 431 .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK, 432 .ig1 = { 433 .en_addr = ST_ACCEL_3_IG1_EN_ADDR, 434 .en_mask = ST_ACCEL_3_IG1_EN_MASK, 435 }, 436 }, 437 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT, 438 .bootime = 2, 439 }, 440 { 441 .wai = ST_ACCEL_4_WAI_EXP, 442 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 443 .sensors_supported = { 444 [0] = LIS3LV02DL_ACCEL_DEV_NAME, 445 }, 446 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 447 .odr = { 448 .addr = ST_ACCEL_4_ODR_ADDR, 449 .mask = ST_ACCEL_4_ODR_MASK, 450 .odr_avl = { 451 { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL }, 452 { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, }, 453 { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, }, 454 { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, }, 455 }, 456 }, 457 .pw = { 458 .addr = ST_ACCEL_4_PW_ADDR, 459 .mask = ST_ACCEL_4_PW_MASK, 460 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 461 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 462 }, 463 .enable_axis = { 464 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 465 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 466 }, 467 .fs = { 468 .addr = ST_ACCEL_4_FS_ADDR, 469 .mask = ST_ACCEL_4_FS_MASK, 470 .fs_avl = { 471 [0] = { 472 .num = ST_ACCEL_FS_AVL_2G, 473 .value = ST_ACCEL_4_FS_AVL_2_VAL, 474 .gain = ST_ACCEL_4_FS_AVL_2_GAIN, 475 }, 476 [1] = { 477 .num = ST_ACCEL_FS_AVL_6G, 478 .value = ST_ACCEL_4_FS_AVL_6_VAL, 479 .gain = ST_ACCEL_4_FS_AVL_6_GAIN, 480 }, 481 }, 482 }, 483 .bdu = { 484 .addr = ST_ACCEL_4_BDU_ADDR, 485 .mask = ST_ACCEL_4_BDU_MASK, 486 }, 487 .drdy_irq = { 488 .addr = ST_ACCEL_4_DRDY_IRQ_ADDR, 489 .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK, 490 }, 491 .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT, 492 .bootime = 2, /* guess */ 493 }, 494 { 495 .wai = ST_ACCEL_5_WAI_EXP, 496 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 497 .sensors_supported = { 498 [0] = LIS331DL_ACCEL_DEV_NAME, 499 }, 500 .ch = (struct iio_chan_spec *)st_accel_8bit_channels, 501 .odr = { 502 .addr = ST_ACCEL_5_ODR_ADDR, 503 .mask = ST_ACCEL_5_ODR_MASK, 504 .odr_avl = { 505 { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL }, 506 { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, }, 507 }, 508 }, 509 .pw = { 510 .addr = ST_ACCEL_5_PW_ADDR, 511 .mask = ST_ACCEL_5_PW_MASK, 512 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 513 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 514 }, 515 .enable_axis = { 516 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 517 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 518 }, 519 .fs = { 520 .addr = ST_ACCEL_5_FS_ADDR, 521 .mask = ST_ACCEL_5_FS_MASK, 522 .fs_avl = { 523 [0] = { 524 .num = ST_ACCEL_FS_AVL_2G, 525 .value = ST_ACCEL_5_FS_AVL_2_VAL, 526 .gain = ST_ACCEL_5_FS_AVL_2_GAIN, 527 }, 528 [1] = { 529 .num = ST_ACCEL_FS_AVL_8G, 530 .value = ST_ACCEL_5_FS_AVL_8_VAL, 531 .gain = ST_ACCEL_5_FS_AVL_8_GAIN, 532 }, 533 }, 534 }, 535 .drdy_irq = { 536 .addr = ST_ACCEL_5_DRDY_IRQ_ADDR, 537 .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK, 538 .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK, 539 }, 540 .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT, 541 .bootime = 2, /* guess */ 542 }, 543 }; 544 545 static int st_accel_read_raw(struct iio_dev *indio_dev, 546 struct iio_chan_spec const *ch, int *val, 547 int *val2, long mask) 548 { 549 int err; 550 struct st_sensor_data *adata = iio_priv(indio_dev); 551 552 switch (mask) { 553 case IIO_CHAN_INFO_RAW: 554 err = st_sensors_read_info_raw(indio_dev, ch, val); 555 if (err < 0) 556 goto read_error; 557 558 return IIO_VAL_INT; 559 case IIO_CHAN_INFO_SCALE: 560 *val = 0; 561 *val2 = adata->current_fullscale->gain; 562 return IIO_VAL_INT_PLUS_MICRO; 563 case IIO_CHAN_INFO_SAMP_FREQ: 564 *val = adata->odr; 565 return IIO_VAL_INT; 566 default: 567 return -EINVAL; 568 } 569 570 read_error: 571 return err; 572 } 573 574 static int st_accel_write_raw(struct iio_dev *indio_dev, 575 struct iio_chan_spec const *chan, int val, int val2, long mask) 576 { 577 int err; 578 579 switch (mask) { 580 case IIO_CHAN_INFO_SCALE: 581 err = st_sensors_set_fullscale_by_gain(indio_dev, val2); 582 break; 583 case IIO_CHAN_INFO_SAMP_FREQ: 584 if (val2) 585 return -EINVAL; 586 mutex_lock(&indio_dev->mlock); 587 err = st_sensors_set_odr(indio_dev, val); 588 mutex_unlock(&indio_dev->mlock); 589 return err; 590 default: 591 return -EINVAL; 592 } 593 594 return err; 595 } 596 597 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL(); 598 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available); 599 600 static struct attribute *st_accel_attributes[] = { 601 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 602 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 603 NULL, 604 }; 605 606 static const struct attribute_group st_accel_attribute_group = { 607 .attrs = st_accel_attributes, 608 }; 609 610 static const struct iio_info accel_info = { 611 .driver_module = THIS_MODULE, 612 .attrs = &st_accel_attribute_group, 613 .read_raw = &st_accel_read_raw, 614 .write_raw = &st_accel_write_raw, 615 .debugfs_reg_access = &st_sensors_debugfs_reg_access, 616 }; 617 618 #ifdef CONFIG_IIO_TRIGGER 619 static const struct iio_trigger_ops st_accel_trigger_ops = { 620 .owner = THIS_MODULE, 621 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE, 622 }; 623 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops) 624 #else 625 #define ST_ACCEL_TRIGGER_OPS NULL 626 #endif 627 628 int st_accel_common_probe(struct iio_dev *indio_dev) 629 { 630 struct st_sensor_data *adata = iio_priv(indio_dev); 631 int irq = adata->get_irq_data_ready(indio_dev); 632 int err; 633 634 indio_dev->modes = INDIO_DIRECT_MODE; 635 indio_dev->info = &accel_info; 636 mutex_init(&adata->tb.buf_lock); 637 638 st_sensors_power_enable(indio_dev); 639 640 err = st_sensors_check_device_support(indio_dev, 641 ARRAY_SIZE(st_accel_sensors_settings), 642 st_accel_sensors_settings); 643 if (err < 0) 644 return err; 645 646 adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS; 647 adata->multiread_bit = adata->sensor_settings->multi_read_bit; 648 indio_dev->channels = adata->sensor_settings->ch; 649 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; 650 651 adata->current_fullscale = (struct st_sensor_fullscale_avl *) 652 &adata->sensor_settings->fs.fs_avl[0]; 653 adata->odr = adata->sensor_settings->odr.odr_avl[0].hz; 654 655 if (!adata->dev->platform_data) 656 adata->dev->platform_data = 657 (struct st_sensors_platform_data *)&default_accel_pdata; 658 659 err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data); 660 if (err < 0) 661 return err; 662 663 err = st_accel_allocate_ring(indio_dev); 664 if (err < 0) 665 return err; 666 667 if (irq > 0) { 668 err = st_sensors_allocate_trigger(indio_dev, 669 ST_ACCEL_TRIGGER_OPS); 670 if (err < 0) 671 goto st_accel_probe_trigger_error; 672 } 673 674 err = iio_device_register(indio_dev); 675 if (err) 676 goto st_accel_device_register_error; 677 678 dev_info(&indio_dev->dev, "registered accelerometer %s\n", 679 indio_dev->name); 680 681 return 0; 682 683 st_accel_device_register_error: 684 if (irq > 0) 685 st_sensors_deallocate_trigger(indio_dev); 686 st_accel_probe_trigger_error: 687 st_accel_deallocate_ring(indio_dev); 688 689 return err; 690 } 691 EXPORT_SYMBOL(st_accel_common_probe); 692 693 void st_accel_common_remove(struct iio_dev *indio_dev) 694 { 695 struct st_sensor_data *adata = iio_priv(indio_dev); 696 697 st_sensors_power_disable(indio_dev); 698 699 iio_device_unregister(indio_dev); 700 if (adata->get_irq_data_ready(indio_dev) > 0) 701 st_sensors_deallocate_trigger(indio_dev); 702 703 st_accel_deallocate_ring(indio_dev); 704 } 705 EXPORT_SYMBOL(st_accel_common_remove); 706 707 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 708 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver"); 709 MODULE_LICENSE("GPL v2"); 710