1 /*
2  * STMicroelectronics accelerometers driver
3  *
4  * Copyright 2012-2013 STMicroelectronics Inc.
5  *
6  * Denis Ciocca <denis.ciocca@st.com>
7  *
8  * Licensed under the GPL-2.
9  */
10 
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/errno.h>
15 #include <linux/types.h>
16 #include <linux/mutex.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/gpio.h>
20 #include <linux/irq.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/trigger.h>
24 #include <linux/iio/buffer.h>
25 
26 #include <linux/iio/common/st_sensors.h>
27 #include "st_accel.h"
28 
29 #define ST_ACCEL_NUMBER_DATA_CHANNELS		3
30 
31 /* DEFAULT VALUE FOR SENSORS */
32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR		0x28
33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR		0x2a
34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR		0x2c
35 
36 /* FULLSCALE */
37 #define ST_ACCEL_FS_AVL_2G			2
38 #define ST_ACCEL_FS_AVL_4G			4
39 #define ST_ACCEL_FS_AVL_6G			6
40 #define ST_ACCEL_FS_AVL_8G			8
41 #define ST_ACCEL_FS_AVL_16G			16
42 
43 /* CUSTOM VALUES FOR SENSOR 1 */
44 #define ST_ACCEL_1_WAI_EXP			0x33
45 #define ST_ACCEL_1_ODR_ADDR			0x20
46 #define ST_ACCEL_1_ODR_MASK			0xf0
47 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL		0x01
48 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL		0x02
49 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL		0x03
50 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL		0x04
51 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL		0x05
52 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL		0x06
53 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL		0x07
54 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL		0x08
55 #define ST_ACCEL_1_FS_ADDR			0x23
56 #define ST_ACCEL_1_FS_MASK			0x30
57 #define ST_ACCEL_1_FS_AVL_2_VAL			0x00
58 #define ST_ACCEL_1_FS_AVL_4_VAL			0x01
59 #define ST_ACCEL_1_FS_AVL_8_VAL			0x02
60 #define ST_ACCEL_1_FS_AVL_16_VAL		0x03
61 #define ST_ACCEL_1_FS_AVL_2_GAIN		IIO_G_TO_M_S_2(1000)
62 #define ST_ACCEL_1_FS_AVL_4_GAIN		IIO_G_TO_M_S_2(2000)
63 #define ST_ACCEL_1_FS_AVL_8_GAIN		IIO_G_TO_M_S_2(4000)
64 #define ST_ACCEL_1_FS_AVL_16_GAIN		IIO_G_TO_M_S_2(12000)
65 #define ST_ACCEL_1_BDU_ADDR			0x23
66 #define ST_ACCEL_1_BDU_MASK			0x80
67 #define ST_ACCEL_1_DRDY_IRQ_ADDR		0x22
68 #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK		0x10
69 #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK		0x08
70 #define ST_ACCEL_1_MULTIREAD_BIT		true
71 
72 /* CUSTOM VALUES FOR SENSOR 2 */
73 #define ST_ACCEL_2_WAI_EXP			0x32
74 #define ST_ACCEL_2_ODR_ADDR			0x20
75 #define ST_ACCEL_2_ODR_MASK			0x18
76 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL		0x00
77 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL		0x01
78 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL		0x02
79 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL		0x03
80 #define ST_ACCEL_2_PW_ADDR			0x20
81 #define ST_ACCEL_2_PW_MASK			0xe0
82 #define ST_ACCEL_2_FS_ADDR			0x23
83 #define ST_ACCEL_2_FS_MASK			0x30
84 #define ST_ACCEL_2_FS_AVL_2_VAL			0X00
85 #define ST_ACCEL_2_FS_AVL_4_VAL			0X01
86 #define ST_ACCEL_2_FS_AVL_8_VAL			0x03
87 #define ST_ACCEL_2_FS_AVL_2_GAIN		IIO_G_TO_M_S_2(1000)
88 #define ST_ACCEL_2_FS_AVL_4_GAIN		IIO_G_TO_M_S_2(2000)
89 #define ST_ACCEL_2_FS_AVL_8_GAIN		IIO_G_TO_M_S_2(3900)
90 #define ST_ACCEL_2_BDU_ADDR			0x23
91 #define ST_ACCEL_2_BDU_MASK			0x80
92 #define ST_ACCEL_2_DRDY_IRQ_ADDR		0x22
93 #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK		0x02
94 #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK		0x10
95 #define ST_ACCEL_2_MULTIREAD_BIT		true
96 
97 /* CUSTOM VALUES FOR SENSOR 3 */
98 #define ST_ACCEL_3_WAI_EXP			0x40
99 #define ST_ACCEL_3_ODR_ADDR			0x20
100 #define ST_ACCEL_3_ODR_MASK			0xf0
101 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL		0x01
102 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL		0x02
103 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL		0x03
104 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL		0x04
105 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL		0x05
106 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL		0x06
107 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL		0x07
108 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL		0x08
109 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL		0x09
110 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL		0x0a
111 #define ST_ACCEL_3_FS_ADDR			0x24
112 #define ST_ACCEL_3_FS_MASK			0x38
113 #define ST_ACCEL_3_FS_AVL_2_VAL			0X00
114 #define ST_ACCEL_3_FS_AVL_4_VAL			0X01
115 #define ST_ACCEL_3_FS_AVL_6_VAL			0x02
116 #define ST_ACCEL_3_FS_AVL_8_VAL			0x03
117 #define ST_ACCEL_3_FS_AVL_16_VAL		0x04
118 #define ST_ACCEL_3_FS_AVL_2_GAIN		IIO_G_TO_M_S_2(61)
119 #define ST_ACCEL_3_FS_AVL_4_GAIN		IIO_G_TO_M_S_2(122)
120 #define ST_ACCEL_3_FS_AVL_6_GAIN		IIO_G_TO_M_S_2(183)
121 #define ST_ACCEL_3_FS_AVL_8_GAIN		IIO_G_TO_M_S_2(244)
122 #define ST_ACCEL_3_FS_AVL_16_GAIN		IIO_G_TO_M_S_2(732)
123 #define ST_ACCEL_3_BDU_ADDR			0x20
124 #define ST_ACCEL_3_BDU_MASK			0x08
125 #define ST_ACCEL_3_DRDY_IRQ_ADDR		0x23
126 #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK		0x80
127 #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK		0x00
128 #define ST_ACCEL_3_IG1_EN_ADDR			0x23
129 #define ST_ACCEL_3_IG1_EN_MASK			0x08
130 #define ST_ACCEL_3_MULTIREAD_BIT		false
131 
132 /* CUSTOM VALUES FOR SENSOR 4 */
133 #define ST_ACCEL_4_WAI_EXP			0x3a
134 #define ST_ACCEL_4_ODR_ADDR			0x20
135 #define ST_ACCEL_4_ODR_MASK			0x30 /* DF1 and DF0 */
136 #define ST_ACCEL_4_ODR_AVL_40HZ_VAL		0x00
137 #define ST_ACCEL_4_ODR_AVL_160HZ_VAL		0x01
138 #define ST_ACCEL_4_ODR_AVL_640HZ_VAL		0x02
139 #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL		0x03
140 #define ST_ACCEL_4_PW_ADDR			0x20
141 #define ST_ACCEL_4_PW_MASK			0xc0
142 #define ST_ACCEL_4_FS_ADDR			0x21
143 #define ST_ACCEL_4_FS_MASK			0x80
144 #define ST_ACCEL_4_FS_AVL_2_VAL			0X00
145 #define ST_ACCEL_4_FS_AVL_6_VAL			0X01
146 #define ST_ACCEL_4_FS_AVL_2_GAIN		IIO_G_TO_M_S_2(1024)
147 #define ST_ACCEL_4_FS_AVL_6_GAIN		IIO_G_TO_M_S_2(340)
148 #define ST_ACCEL_4_BDU_ADDR			0x21
149 #define ST_ACCEL_4_BDU_MASK			0x40
150 #define ST_ACCEL_4_DRDY_IRQ_ADDR		0x21
151 #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK		0x04
152 #define ST_ACCEL_4_IG1_EN_ADDR			0x21
153 #define ST_ACCEL_4_IG1_EN_MASK			0x08
154 #define ST_ACCEL_4_MULTIREAD_BIT		true
155 
156 static const struct iio_chan_spec st_accel_12bit_channels[] = {
157 	ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
158 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
159 			ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16,
160 			ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
161 	ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
162 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
163 			ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16,
164 			ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
165 	ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
166 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
167 			ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16,
168 			ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
169 	IIO_CHAN_SOFT_TIMESTAMP(3)
170 };
171 
172 static const struct iio_chan_spec st_accel_16bit_channels[] = {
173 	ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
174 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
175 			ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16,
176 			ST_ACCEL_DEFAULT_OUT_X_L_ADDR),
177 	ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
178 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
179 			ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16,
180 			ST_ACCEL_DEFAULT_OUT_Y_L_ADDR),
181 	ST_SENSORS_LSM_CHANNELS(IIO_ACCEL,
182 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
183 			ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16,
184 			ST_ACCEL_DEFAULT_OUT_Z_L_ADDR),
185 	IIO_CHAN_SOFT_TIMESTAMP(3)
186 };
187 
188 static const struct st_sensor_settings st_accel_sensors_settings[] = {
189 	{
190 		.wai = ST_ACCEL_1_WAI_EXP,
191 		.sensors_supported = {
192 			[0] = LIS3DH_ACCEL_DEV_NAME,
193 			[1] = LSM303DLHC_ACCEL_DEV_NAME,
194 			[2] = LSM330D_ACCEL_DEV_NAME,
195 			[3] = LSM330DL_ACCEL_DEV_NAME,
196 			[4] = LSM330DLC_ACCEL_DEV_NAME,
197 		},
198 		.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
199 		.odr = {
200 			.addr = ST_ACCEL_1_ODR_ADDR,
201 			.mask = ST_ACCEL_1_ODR_MASK,
202 			.odr_avl = {
203 				{ 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, },
204 				{ 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, },
205 				{ 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, },
206 				{ 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, },
207 				{ 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, },
208 				{ 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, },
209 				{ 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, },
210 				{ 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, },
211 			},
212 		},
213 		.pw = {
214 			.addr = ST_ACCEL_1_ODR_ADDR,
215 			.mask = ST_ACCEL_1_ODR_MASK,
216 			.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
217 		},
218 		.enable_axis = {
219 			.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
220 			.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
221 		},
222 		.fs = {
223 			.addr = ST_ACCEL_1_FS_ADDR,
224 			.mask = ST_ACCEL_1_FS_MASK,
225 			.fs_avl = {
226 				[0] = {
227 					.num = ST_ACCEL_FS_AVL_2G,
228 					.value = ST_ACCEL_1_FS_AVL_2_VAL,
229 					.gain = ST_ACCEL_1_FS_AVL_2_GAIN,
230 				},
231 				[1] = {
232 					.num = ST_ACCEL_FS_AVL_4G,
233 					.value = ST_ACCEL_1_FS_AVL_4_VAL,
234 					.gain = ST_ACCEL_1_FS_AVL_4_GAIN,
235 				},
236 				[2] = {
237 					.num = ST_ACCEL_FS_AVL_8G,
238 					.value = ST_ACCEL_1_FS_AVL_8_VAL,
239 					.gain = ST_ACCEL_1_FS_AVL_8_GAIN,
240 				},
241 				[3] = {
242 					.num = ST_ACCEL_FS_AVL_16G,
243 					.value = ST_ACCEL_1_FS_AVL_16_VAL,
244 					.gain = ST_ACCEL_1_FS_AVL_16_GAIN,
245 				},
246 			},
247 		},
248 		.bdu = {
249 			.addr = ST_ACCEL_1_BDU_ADDR,
250 			.mask = ST_ACCEL_1_BDU_MASK,
251 		},
252 		.drdy_irq = {
253 			.addr = ST_ACCEL_1_DRDY_IRQ_ADDR,
254 			.mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK,
255 			.mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK,
256 		},
257 		.multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT,
258 		.bootime = 2,
259 	},
260 	{
261 		.wai = ST_ACCEL_2_WAI_EXP,
262 		.sensors_supported = {
263 			[0] = LIS331DLH_ACCEL_DEV_NAME,
264 			[1] = LSM303DL_ACCEL_DEV_NAME,
265 			[2] = LSM303DLH_ACCEL_DEV_NAME,
266 			[3] = LSM303DLM_ACCEL_DEV_NAME,
267 		},
268 		.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
269 		.odr = {
270 			.addr = ST_ACCEL_2_ODR_ADDR,
271 			.mask = ST_ACCEL_2_ODR_MASK,
272 			.odr_avl = {
273 				{ 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, },
274 				{ 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, },
275 				{ 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, },
276 				{ 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, },
277 			},
278 		},
279 		.pw = {
280 			.addr = ST_ACCEL_2_PW_ADDR,
281 			.mask = ST_ACCEL_2_PW_MASK,
282 			.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
283 			.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
284 		},
285 		.enable_axis = {
286 			.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
287 			.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
288 		},
289 		.fs = {
290 			.addr = ST_ACCEL_2_FS_ADDR,
291 			.mask = ST_ACCEL_2_FS_MASK,
292 			.fs_avl = {
293 				[0] = {
294 					.num = ST_ACCEL_FS_AVL_2G,
295 					.value = ST_ACCEL_2_FS_AVL_2_VAL,
296 					.gain = ST_ACCEL_2_FS_AVL_2_GAIN,
297 				},
298 				[1] = {
299 					.num = ST_ACCEL_FS_AVL_4G,
300 					.value = ST_ACCEL_2_FS_AVL_4_VAL,
301 					.gain = ST_ACCEL_2_FS_AVL_4_GAIN,
302 				},
303 				[2] = {
304 					.num = ST_ACCEL_FS_AVL_8G,
305 					.value = ST_ACCEL_2_FS_AVL_8_VAL,
306 					.gain = ST_ACCEL_2_FS_AVL_8_GAIN,
307 				},
308 			},
309 		},
310 		.bdu = {
311 			.addr = ST_ACCEL_2_BDU_ADDR,
312 			.mask = ST_ACCEL_2_BDU_MASK,
313 		},
314 		.drdy_irq = {
315 			.addr = ST_ACCEL_2_DRDY_IRQ_ADDR,
316 			.mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK,
317 			.mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK,
318 		},
319 		.multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT,
320 		.bootime = 2,
321 	},
322 	{
323 		.wai = ST_ACCEL_3_WAI_EXP,
324 		.sensors_supported = {
325 			[0] = LSM330_ACCEL_DEV_NAME,
326 		},
327 		.ch = (struct iio_chan_spec *)st_accel_16bit_channels,
328 		.odr = {
329 			.addr = ST_ACCEL_3_ODR_ADDR,
330 			.mask = ST_ACCEL_3_ODR_MASK,
331 			.odr_avl = {
332 				{ 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL },
333 				{ 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, },
334 				{ 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, },
335 				{ 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, },
336 				{ 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, },
337 				{ 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, },
338 				{ 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, },
339 				{ 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, },
340 				{ 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, },
341 				{ 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, },
342 			},
343 		},
344 		.pw = {
345 			.addr = ST_ACCEL_3_ODR_ADDR,
346 			.mask = ST_ACCEL_3_ODR_MASK,
347 			.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
348 		},
349 		.enable_axis = {
350 			.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
351 			.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
352 		},
353 		.fs = {
354 			.addr = ST_ACCEL_3_FS_ADDR,
355 			.mask = ST_ACCEL_3_FS_MASK,
356 			.fs_avl = {
357 				[0] = {
358 					.num = ST_ACCEL_FS_AVL_2G,
359 					.value = ST_ACCEL_3_FS_AVL_2_VAL,
360 					.gain = ST_ACCEL_3_FS_AVL_2_GAIN,
361 				},
362 				[1] = {
363 					.num = ST_ACCEL_FS_AVL_4G,
364 					.value = ST_ACCEL_3_FS_AVL_4_VAL,
365 					.gain = ST_ACCEL_3_FS_AVL_4_GAIN,
366 				},
367 				[2] = {
368 					.num = ST_ACCEL_FS_AVL_6G,
369 					.value = ST_ACCEL_3_FS_AVL_6_VAL,
370 					.gain = ST_ACCEL_3_FS_AVL_6_GAIN,
371 				},
372 				[3] = {
373 					.num = ST_ACCEL_FS_AVL_8G,
374 					.value = ST_ACCEL_3_FS_AVL_8_VAL,
375 					.gain = ST_ACCEL_3_FS_AVL_8_GAIN,
376 				},
377 				[4] = {
378 					.num = ST_ACCEL_FS_AVL_16G,
379 					.value = ST_ACCEL_3_FS_AVL_16_VAL,
380 					.gain = ST_ACCEL_3_FS_AVL_16_GAIN,
381 				},
382 			},
383 		},
384 		.bdu = {
385 			.addr = ST_ACCEL_3_BDU_ADDR,
386 			.mask = ST_ACCEL_3_BDU_MASK,
387 		},
388 		.drdy_irq = {
389 			.addr = ST_ACCEL_3_DRDY_IRQ_ADDR,
390 			.mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK,
391 			.mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK,
392 			.ig1 = {
393 				.en_addr = ST_ACCEL_3_IG1_EN_ADDR,
394 				.en_mask = ST_ACCEL_3_IG1_EN_MASK,
395 			},
396 		},
397 		.multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT,
398 		.bootime = 2,
399 	},
400 	{
401 		.wai = ST_ACCEL_4_WAI_EXP,
402 		.sensors_supported = {
403 			[0] = LIS3LV02DL_ACCEL_DEV_NAME,
404 		},
405 		.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
406 		.odr = {
407 			.addr = ST_ACCEL_4_ODR_ADDR,
408 			.mask = ST_ACCEL_4_ODR_MASK,
409 			.odr_avl = {
410 				{ 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL },
411 				{ 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, },
412 				{ 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, },
413 				{ 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, },
414 			},
415 		},
416 		.pw = {
417 			.addr = ST_ACCEL_4_PW_ADDR,
418 			.mask = ST_ACCEL_4_PW_MASK,
419 			.value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE,
420 			.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
421 		},
422 		.enable_axis = {
423 			.addr = ST_SENSORS_DEFAULT_AXIS_ADDR,
424 			.mask = ST_SENSORS_DEFAULT_AXIS_MASK,
425 		},
426 		.fs = {
427 			.addr = ST_ACCEL_4_FS_ADDR,
428 			.mask = ST_ACCEL_4_FS_MASK,
429 			.fs_avl = {
430 				[0] = {
431 					.num = ST_ACCEL_FS_AVL_2G,
432 					.value = ST_ACCEL_4_FS_AVL_2_VAL,
433 					.gain = ST_ACCEL_4_FS_AVL_2_GAIN,
434 				},
435 				[1] = {
436 					.num = ST_ACCEL_FS_AVL_6G,
437 					.value = ST_ACCEL_4_FS_AVL_6_VAL,
438 					.gain = ST_ACCEL_4_FS_AVL_6_GAIN,
439 				},
440 			},
441 		},
442 		.bdu = {
443 			.addr = ST_ACCEL_4_BDU_ADDR,
444 			.mask = ST_ACCEL_4_BDU_MASK,
445 		},
446 		.drdy_irq = {
447 			.addr = ST_ACCEL_4_DRDY_IRQ_ADDR,
448 			.mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK,
449 			.ig1 = {
450 				.en_addr = ST_ACCEL_4_IG1_EN_ADDR,
451 				.en_mask = ST_ACCEL_4_IG1_EN_MASK,
452 			},
453 		},
454 		.multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT,
455 		.bootime = 2, /* guess */
456 	},
457 };
458 
459 static int st_accel_read_raw(struct iio_dev *indio_dev,
460 			struct iio_chan_spec const *ch, int *val,
461 							int *val2, long mask)
462 {
463 	int err;
464 	struct st_sensor_data *adata = iio_priv(indio_dev);
465 
466 	switch (mask) {
467 	case IIO_CHAN_INFO_RAW:
468 		err = st_sensors_read_info_raw(indio_dev, ch, val);
469 		if (err < 0)
470 			goto read_error;
471 
472 		return IIO_VAL_INT;
473 	case IIO_CHAN_INFO_SCALE:
474 		*val = 0;
475 		*val2 = adata->current_fullscale->gain;
476 		return IIO_VAL_INT_PLUS_MICRO;
477 	case IIO_CHAN_INFO_SAMP_FREQ:
478 		*val = adata->odr;
479 		return IIO_VAL_INT;
480 	default:
481 		return -EINVAL;
482 	}
483 
484 read_error:
485 	return err;
486 }
487 
488 static int st_accel_write_raw(struct iio_dev *indio_dev,
489 		struct iio_chan_spec const *chan, int val, int val2, long mask)
490 {
491 	int err;
492 
493 	switch (mask) {
494 	case IIO_CHAN_INFO_SCALE:
495 		err = st_sensors_set_fullscale_by_gain(indio_dev, val2);
496 		break;
497 	case IIO_CHAN_INFO_SAMP_FREQ:
498 		if (val2)
499 			return -EINVAL;
500 		mutex_lock(&indio_dev->mlock);
501 		err = st_sensors_set_odr(indio_dev, val);
502 		mutex_unlock(&indio_dev->mlock);
503 		return err;
504 	default:
505 		return -EINVAL;
506 	}
507 
508 	return err;
509 }
510 
511 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL();
512 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available);
513 
514 static struct attribute *st_accel_attributes[] = {
515 	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
516 	&iio_dev_attr_in_accel_scale_available.dev_attr.attr,
517 	NULL,
518 };
519 
520 static const struct attribute_group st_accel_attribute_group = {
521 	.attrs = st_accel_attributes,
522 };
523 
524 static const struct iio_info accel_info = {
525 	.driver_module = THIS_MODULE,
526 	.attrs = &st_accel_attribute_group,
527 	.read_raw = &st_accel_read_raw,
528 	.write_raw = &st_accel_write_raw,
529 };
530 
531 #ifdef CONFIG_IIO_TRIGGER
532 static const struct iio_trigger_ops st_accel_trigger_ops = {
533 	.owner = THIS_MODULE,
534 	.set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
535 };
536 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
537 #else
538 #define ST_ACCEL_TRIGGER_OPS NULL
539 #endif
540 
541 int st_accel_common_probe(struct iio_dev *indio_dev)
542 {
543 	struct st_sensor_data *adata = iio_priv(indio_dev);
544 	int irq = adata->get_irq_data_ready(indio_dev);
545 	int err;
546 
547 	indio_dev->modes = INDIO_DIRECT_MODE;
548 	indio_dev->info = &accel_info;
549 	mutex_init(&adata->tb.buf_lock);
550 
551 	st_sensors_power_enable(indio_dev);
552 
553 	err = st_sensors_check_device_support(indio_dev,
554 					ARRAY_SIZE(st_accel_sensors_settings),
555 					st_accel_sensors_settings);
556 	if (err < 0)
557 		return err;
558 
559 	adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS;
560 	adata->multiread_bit = adata->sensor_settings->multi_read_bit;
561 	indio_dev->channels = adata->sensor_settings->ch;
562 	indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS;
563 
564 	adata->current_fullscale = (struct st_sensor_fullscale_avl *)
565 					&adata->sensor_settings->fs.fs_avl[0];
566 	adata->odr = adata->sensor_settings->odr.odr_avl[0].hz;
567 
568 	if (!adata->dev->platform_data)
569 		adata->dev->platform_data =
570 			(struct st_sensors_platform_data *)&default_accel_pdata;
571 
572 	err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data);
573 	if (err < 0)
574 		return err;
575 
576 	err = st_accel_allocate_ring(indio_dev);
577 	if (err < 0)
578 		return err;
579 
580 	if (irq > 0) {
581 		err = st_sensors_allocate_trigger(indio_dev,
582 						 ST_ACCEL_TRIGGER_OPS);
583 		if (err < 0)
584 			goto st_accel_probe_trigger_error;
585 	}
586 
587 	err = iio_device_register(indio_dev);
588 	if (err)
589 		goto st_accel_device_register_error;
590 
591 	dev_info(&indio_dev->dev, "registered accelerometer %s\n",
592 		 indio_dev->name);
593 
594 	return 0;
595 
596 st_accel_device_register_error:
597 	if (irq > 0)
598 		st_sensors_deallocate_trigger(indio_dev);
599 st_accel_probe_trigger_error:
600 	st_accel_deallocate_ring(indio_dev);
601 
602 	return err;
603 }
604 EXPORT_SYMBOL(st_accel_common_probe);
605 
606 void st_accel_common_remove(struct iio_dev *indio_dev)
607 {
608 	struct st_sensor_data *adata = iio_priv(indio_dev);
609 
610 	st_sensors_power_disable(indio_dev);
611 
612 	iio_device_unregister(indio_dev);
613 	if (adata->get_irq_data_ready(indio_dev) > 0)
614 		st_sensors_deallocate_trigger(indio_dev);
615 
616 	st_accel_deallocate_ring(indio_dev);
617 }
618 EXPORT_SYMBOL(st_accel_common_remove);
619 
620 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
621 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver");
622 MODULE_LICENSE("GPL v2");
623