1 /* 2 * STMicroelectronics accelerometers driver 3 * 4 * Copyright 2012-2013 STMicroelectronics Inc. 5 * 6 * Denis Ciocca <denis.ciocca@st.com> 7 * 8 * Licensed under the GPL-2. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/errno.h> 15 #include <linux/types.h> 16 #include <linux/mutex.h> 17 #include <linux/interrupt.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio.h> 20 #include <linux/irq.h> 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger.h> 24 #include <linux/iio/buffer.h> 25 26 #include <linux/iio/common/st_sensors.h> 27 #include "st_accel.h" 28 29 #define ST_ACCEL_NUMBER_DATA_CHANNELS 3 30 31 /* DEFAULT VALUE FOR SENSORS */ 32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28 33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a 34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c 35 36 /* FULLSCALE */ 37 #define ST_ACCEL_FS_AVL_2G 2 38 #define ST_ACCEL_FS_AVL_4G 4 39 #define ST_ACCEL_FS_AVL_6G 6 40 #define ST_ACCEL_FS_AVL_8G 8 41 #define ST_ACCEL_FS_AVL_16G 16 42 43 /* CUSTOM VALUES FOR SENSOR 1 */ 44 #define ST_ACCEL_1_WAI_EXP 0x33 45 #define ST_ACCEL_1_ODR_ADDR 0x20 46 #define ST_ACCEL_1_ODR_MASK 0xf0 47 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01 48 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02 49 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03 50 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04 51 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05 52 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06 53 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07 54 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08 55 #define ST_ACCEL_1_FS_ADDR 0x23 56 #define ST_ACCEL_1_FS_MASK 0x30 57 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00 58 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01 59 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02 60 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03 61 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 62 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 63 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000) 64 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000) 65 #define ST_ACCEL_1_BDU_ADDR 0x23 66 #define ST_ACCEL_1_BDU_MASK 0x80 67 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22 68 #define ST_ACCEL_1_DRDY_IRQ_MASK 0x10 69 #define ST_ACCEL_1_MULTIREAD_BIT true 70 71 /* CUSTOM VALUES FOR SENSOR 2 */ 72 #define ST_ACCEL_2_WAI_EXP 0x32 73 #define ST_ACCEL_2_ODR_ADDR 0x20 74 #define ST_ACCEL_2_ODR_MASK 0x18 75 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00 76 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01 77 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02 78 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03 79 #define ST_ACCEL_2_PW_ADDR 0x20 80 #define ST_ACCEL_2_PW_MASK 0xe0 81 #define ST_ACCEL_2_FS_ADDR 0x23 82 #define ST_ACCEL_2_FS_MASK 0x30 83 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00 84 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01 85 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03 86 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 87 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 88 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900) 89 #define ST_ACCEL_2_BDU_ADDR 0x23 90 #define ST_ACCEL_2_BDU_MASK 0x80 91 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22 92 #define ST_ACCEL_2_DRDY_IRQ_MASK 0x02 93 #define ST_ACCEL_2_MULTIREAD_BIT true 94 95 /* CUSTOM VALUES FOR SENSOR 3 */ 96 #define ST_ACCEL_3_WAI_EXP 0x40 97 #define ST_ACCEL_3_ODR_ADDR 0x20 98 #define ST_ACCEL_3_ODR_MASK 0xf0 99 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01 100 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02 101 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03 102 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04 103 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05 104 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06 105 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07 106 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08 107 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09 108 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a 109 #define ST_ACCEL_3_FS_ADDR 0x24 110 #define ST_ACCEL_3_FS_MASK 0x38 111 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00 112 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01 113 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02 114 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03 115 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04 116 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61) 117 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122) 118 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183) 119 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244) 120 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732) 121 #define ST_ACCEL_3_BDU_ADDR 0x20 122 #define ST_ACCEL_3_BDU_MASK 0x08 123 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23 124 #define ST_ACCEL_3_DRDY_IRQ_MASK 0x80 125 #define ST_ACCEL_3_IG1_EN_ADDR 0x23 126 #define ST_ACCEL_3_IG1_EN_MASK 0x08 127 #define ST_ACCEL_3_MULTIREAD_BIT false 128 129 static const struct iio_chan_spec st_accel_12bit_channels[] = { 130 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 131 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 132 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16, 133 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 134 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 135 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 136 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16, 137 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 138 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 139 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 140 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16, 141 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 142 IIO_CHAN_SOFT_TIMESTAMP(3) 143 }; 144 145 static const struct iio_chan_spec st_accel_16bit_channels[] = { 146 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 147 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 148 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16, 149 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 150 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 151 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 152 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16, 153 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 154 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 155 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 156 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16, 157 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 158 IIO_CHAN_SOFT_TIMESTAMP(3) 159 }; 160 161 static const struct st_sensors st_accel_sensors[] = { 162 { 163 .wai = ST_ACCEL_1_WAI_EXP, 164 .sensors_supported = { 165 [0] = LIS3DH_ACCEL_DEV_NAME, 166 [1] = LSM303DLHC_ACCEL_DEV_NAME, 167 [2] = LSM330D_ACCEL_DEV_NAME, 168 [3] = LSM330DL_ACCEL_DEV_NAME, 169 [4] = LSM330DLC_ACCEL_DEV_NAME, 170 }, 171 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 172 .odr = { 173 .addr = ST_ACCEL_1_ODR_ADDR, 174 .mask = ST_ACCEL_1_ODR_MASK, 175 .odr_avl = { 176 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, }, 177 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, }, 178 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, }, 179 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, }, 180 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, }, 181 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, }, 182 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, }, 183 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, }, 184 }, 185 }, 186 .pw = { 187 .addr = ST_ACCEL_1_ODR_ADDR, 188 .mask = ST_ACCEL_1_ODR_MASK, 189 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 190 }, 191 .enable_axis = { 192 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 193 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 194 }, 195 .fs = { 196 .addr = ST_ACCEL_1_FS_ADDR, 197 .mask = ST_ACCEL_1_FS_MASK, 198 .fs_avl = { 199 [0] = { 200 .num = ST_ACCEL_FS_AVL_2G, 201 .value = ST_ACCEL_1_FS_AVL_2_VAL, 202 .gain = ST_ACCEL_1_FS_AVL_2_GAIN, 203 }, 204 [1] = { 205 .num = ST_ACCEL_FS_AVL_4G, 206 .value = ST_ACCEL_1_FS_AVL_4_VAL, 207 .gain = ST_ACCEL_1_FS_AVL_4_GAIN, 208 }, 209 [2] = { 210 .num = ST_ACCEL_FS_AVL_8G, 211 .value = ST_ACCEL_1_FS_AVL_8_VAL, 212 .gain = ST_ACCEL_1_FS_AVL_8_GAIN, 213 }, 214 [3] = { 215 .num = ST_ACCEL_FS_AVL_16G, 216 .value = ST_ACCEL_1_FS_AVL_16_VAL, 217 .gain = ST_ACCEL_1_FS_AVL_16_GAIN, 218 }, 219 }, 220 }, 221 .bdu = { 222 .addr = ST_ACCEL_1_BDU_ADDR, 223 .mask = ST_ACCEL_1_BDU_MASK, 224 }, 225 .drdy_irq = { 226 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR, 227 .mask = ST_ACCEL_1_DRDY_IRQ_MASK, 228 }, 229 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT, 230 .bootime = 2, 231 }, 232 { 233 .wai = ST_ACCEL_2_WAI_EXP, 234 .sensors_supported = { 235 [0] = LIS331DLH_ACCEL_DEV_NAME, 236 [1] = LSM303DL_ACCEL_DEV_NAME, 237 [2] = LSM303DLH_ACCEL_DEV_NAME, 238 [3] = LSM303DLM_ACCEL_DEV_NAME, 239 }, 240 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 241 .odr = { 242 .addr = ST_ACCEL_2_ODR_ADDR, 243 .mask = ST_ACCEL_2_ODR_MASK, 244 .odr_avl = { 245 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, }, 246 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, }, 247 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, }, 248 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, }, 249 }, 250 }, 251 .pw = { 252 .addr = ST_ACCEL_2_PW_ADDR, 253 .mask = ST_ACCEL_2_PW_MASK, 254 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 255 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 256 }, 257 .enable_axis = { 258 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 259 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 260 }, 261 .fs = { 262 .addr = ST_ACCEL_2_FS_ADDR, 263 .mask = ST_ACCEL_2_FS_MASK, 264 .fs_avl = { 265 [0] = { 266 .num = ST_ACCEL_FS_AVL_2G, 267 .value = ST_ACCEL_2_FS_AVL_2_VAL, 268 .gain = ST_ACCEL_2_FS_AVL_2_GAIN, 269 }, 270 [1] = { 271 .num = ST_ACCEL_FS_AVL_4G, 272 .value = ST_ACCEL_2_FS_AVL_4_VAL, 273 .gain = ST_ACCEL_2_FS_AVL_4_GAIN, 274 }, 275 [2] = { 276 .num = ST_ACCEL_FS_AVL_8G, 277 .value = ST_ACCEL_2_FS_AVL_8_VAL, 278 .gain = ST_ACCEL_2_FS_AVL_8_GAIN, 279 }, 280 }, 281 }, 282 .bdu = { 283 .addr = ST_ACCEL_2_BDU_ADDR, 284 .mask = ST_ACCEL_2_BDU_MASK, 285 }, 286 .drdy_irq = { 287 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR, 288 .mask = ST_ACCEL_2_DRDY_IRQ_MASK, 289 }, 290 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT, 291 .bootime = 2, 292 }, 293 { 294 .wai = ST_ACCEL_3_WAI_EXP, 295 .sensors_supported = { 296 [0] = LSM330_ACCEL_DEV_NAME, 297 }, 298 .ch = (struct iio_chan_spec *)st_accel_16bit_channels, 299 .odr = { 300 .addr = ST_ACCEL_3_ODR_ADDR, 301 .mask = ST_ACCEL_3_ODR_MASK, 302 .odr_avl = { 303 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL }, 304 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, }, 305 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, }, 306 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, }, 307 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, }, 308 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, }, 309 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, }, 310 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, }, 311 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, }, 312 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, }, 313 }, 314 }, 315 .pw = { 316 .addr = ST_ACCEL_3_ODR_ADDR, 317 .mask = ST_ACCEL_3_ODR_MASK, 318 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 319 }, 320 .enable_axis = { 321 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 322 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 323 }, 324 .fs = { 325 .addr = ST_ACCEL_3_FS_ADDR, 326 .mask = ST_ACCEL_3_FS_MASK, 327 .fs_avl = { 328 [0] = { 329 .num = ST_ACCEL_FS_AVL_2G, 330 .value = ST_ACCEL_3_FS_AVL_2_VAL, 331 .gain = ST_ACCEL_3_FS_AVL_2_GAIN, 332 }, 333 [1] = { 334 .num = ST_ACCEL_FS_AVL_4G, 335 .value = ST_ACCEL_3_FS_AVL_4_VAL, 336 .gain = ST_ACCEL_3_FS_AVL_4_GAIN, 337 }, 338 [2] = { 339 .num = ST_ACCEL_FS_AVL_6G, 340 .value = ST_ACCEL_3_FS_AVL_6_VAL, 341 .gain = ST_ACCEL_3_FS_AVL_6_GAIN, 342 }, 343 [3] = { 344 .num = ST_ACCEL_FS_AVL_8G, 345 .value = ST_ACCEL_3_FS_AVL_8_VAL, 346 .gain = ST_ACCEL_3_FS_AVL_8_GAIN, 347 }, 348 [4] = { 349 .num = ST_ACCEL_FS_AVL_16G, 350 .value = ST_ACCEL_3_FS_AVL_16_VAL, 351 .gain = ST_ACCEL_3_FS_AVL_16_GAIN, 352 }, 353 }, 354 }, 355 .bdu = { 356 .addr = ST_ACCEL_3_BDU_ADDR, 357 .mask = ST_ACCEL_3_BDU_MASK, 358 }, 359 .drdy_irq = { 360 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR, 361 .mask = ST_ACCEL_3_DRDY_IRQ_MASK, 362 .ig1 = { 363 .en_addr = ST_ACCEL_3_IG1_EN_ADDR, 364 .en_mask = ST_ACCEL_3_IG1_EN_MASK, 365 }, 366 }, 367 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT, 368 .bootime = 2, 369 }, 370 }; 371 372 static int st_accel_read_raw(struct iio_dev *indio_dev, 373 struct iio_chan_spec const *ch, int *val, 374 int *val2, long mask) 375 { 376 int err; 377 struct st_sensor_data *adata = iio_priv(indio_dev); 378 379 switch (mask) { 380 case IIO_CHAN_INFO_RAW: 381 err = st_sensors_read_info_raw(indio_dev, ch, val); 382 if (err < 0) 383 goto read_error; 384 385 return IIO_VAL_INT; 386 case IIO_CHAN_INFO_SCALE: 387 *val = 0; 388 *val2 = adata->current_fullscale->gain; 389 return IIO_VAL_INT_PLUS_MICRO; 390 default: 391 return -EINVAL; 392 } 393 394 read_error: 395 return err; 396 } 397 398 static int st_accel_write_raw(struct iio_dev *indio_dev, 399 struct iio_chan_spec const *chan, int val, int val2, long mask) 400 { 401 int err; 402 403 switch (mask) { 404 case IIO_CHAN_INFO_SCALE: 405 err = st_sensors_set_fullscale_by_gain(indio_dev, val2); 406 break; 407 default: 408 return -EINVAL; 409 } 410 411 return err; 412 } 413 414 static ST_SENSOR_DEV_ATTR_SAMP_FREQ(); 415 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL(); 416 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available); 417 418 static struct attribute *st_accel_attributes[] = { 419 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 420 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 421 &iio_dev_attr_sampling_frequency.dev_attr.attr, 422 NULL, 423 }; 424 425 static const struct attribute_group st_accel_attribute_group = { 426 .attrs = st_accel_attributes, 427 }; 428 429 static const struct iio_info accel_info = { 430 .driver_module = THIS_MODULE, 431 .attrs = &st_accel_attribute_group, 432 .read_raw = &st_accel_read_raw, 433 .write_raw = &st_accel_write_raw, 434 }; 435 436 #ifdef CONFIG_IIO_TRIGGER 437 static const struct iio_trigger_ops st_accel_trigger_ops = { 438 .owner = THIS_MODULE, 439 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE, 440 }; 441 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops) 442 #else 443 #define ST_ACCEL_TRIGGER_OPS NULL 444 #endif 445 446 int st_accel_common_probe(struct iio_dev *indio_dev) 447 { 448 int err; 449 struct st_sensor_data *adata = iio_priv(indio_dev); 450 451 indio_dev->modes = INDIO_DIRECT_MODE; 452 indio_dev->info = &accel_info; 453 454 err = st_sensors_check_device_support(indio_dev, 455 ARRAY_SIZE(st_accel_sensors), st_accel_sensors); 456 if (err < 0) 457 goto st_accel_common_probe_error; 458 459 adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS; 460 adata->multiread_bit = adata->sensor->multi_read_bit; 461 indio_dev->channels = adata->sensor->ch; 462 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; 463 464 adata->current_fullscale = (struct st_sensor_fullscale_avl *) 465 &adata->sensor->fs.fs_avl[0]; 466 adata->odr = adata->sensor->odr.odr_avl[0].hz; 467 468 err = st_sensors_init_sensor(indio_dev); 469 if (err < 0) 470 goto st_accel_common_probe_error; 471 472 if (adata->get_irq_data_ready(indio_dev) > 0) { 473 err = st_accel_allocate_ring(indio_dev); 474 if (err < 0) 475 goto st_accel_common_probe_error; 476 477 err = st_sensors_allocate_trigger(indio_dev, 478 ST_ACCEL_TRIGGER_OPS); 479 if (err < 0) 480 goto st_accel_probe_trigger_error; 481 } 482 483 err = iio_device_register(indio_dev); 484 if (err) 485 goto st_accel_device_register_error; 486 487 return err; 488 489 st_accel_device_register_error: 490 if (adata->get_irq_data_ready(indio_dev) > 0) 491 st_sensors_deallocate_trigger(indio_dev); 492 st_accel_probe_trigger_error: 493 if (adata->get_irq_data_ready(indio_dev) > 0) 494 st_accel_deallocate_ring(indio_dev); 495 st_accel_common_probe_error: 496 return err; 497 } 498 EXPORT_SYMBOL(st_accel_common_probe); 499 500 void st_accel_common_remove(struct iio_dev *indio_dev) 501 { 502 struct st_sensor_data *adata = iio_priv(indio_dev); 503 504 iio_device_unregister(indio_dev); 505 if (adata->get_irq_data_ready(indio_dev) > 0) { 506 st_sensors_deallocate_trigger(indio_dev); 507 st_accel_deallocate_ring(indio_dev); 508 } 509 iio_device_free(indio_dev); 510 } 511 EXPORT_SYMBOL(st_accel_common_remove); 512 513 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 514 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver"); 515 MODULE_LICENSE("GPL v2"); 516