1 /* 2 * STMicroelectronics accelerometers driver 3 * 4 * Copyright 2012-2013 STMicroelectronics Inc. 5 * 6 * Denis Ciocca <denis.ciocca@st.com> 7 * 8 * Licensed under the GPL-2. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/errno.h> 15 #include <linux/types.h> 16 #include <linux/mutex.h> 17 #include <linux/interrupt.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio.h> 20 #include <linux/irq.h> 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger.h> 24 #include <linux/iio/buffer.h> 25 26 #include <linux/iio/common/st_sensors.h> 27 #include "st_accel.h" 28 29 #define ST_ACCEL_NUMBER_DATA_CHANNELS 3 30 31 /* DEFAULT VALUE FOR SENSORS */ 32 #define ST_ACCEL_DEFAULT_OUT_X_L_ADDR 0x28 33 #define ST_ACCEL_DEFAULT_OUT_Y_L_ADDR 0x2a 34 #define ST_ACCEL_DEFAULT_OUT_Z_L_ADDR 0x2c 35 36 /* FULLSCALE */ 37 #define ST_ACCEL_FS_AVL_2G 2 38 #define ST_ACCEL_FS_AVL_4G 4 39 #define ST_ACCEL_FS_AVL_6G 6 40 #define ST_ACCEL_FS_AVL_8G 8 41 #define ST_ACCEL_FS_AVL_16G 16 42 #define ST_ACCEL_FS_AVL_100G 100 43 #define ST_ACCEL_FS_AVL_200G 200 44 #define ST_ACCEL_FS_AVL_400G 400 45 46 /* CUSTOM VALUES FOR SENSOR 1 */ 47 #define ST_ACCEL_1_WAI_EXP 0x33 48 #define ST_ACCEL_1_ODR_ADDR 0x20 49 #define ST_ACCEL_1_ODR_MASK 0xf0 50 #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01 51 #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02 52 #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03 53 #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04 54 #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05 55 #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06 56 #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07 57 #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08 58 #define ST_ACCEL_1_FS_ADDR 0x23 59 #define ST_ACCEL_1_FS_MASK 0x30 60 #define ST_ACCEL_1_FS_AVL_2_VAL 0x00 61 #define ST_ACCEL_1_FS_AVL_4_VAL 0x01 62 #define ST_ACCEL_1_FS_AVL_8_VAL 0x02 63 #define ST_ACCEL_1_FS_AVL_16_VAL 0x03 64 #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 65 #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 66 #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000) 67 #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000) 68 #define ST_ACCEL_1_BDU_ADDR 0x23 69 #define ST_ACCEL_1_BDU_MASK 0x80 70 #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22 71 #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10 72 #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08 73 #define ST_ACCEL_1_IHL_IRQ_ADDR 0x25 74 #define ST_ACCEL_1_IHL_IRQ_MASK 0x02 75 #define ST_ACCEL_1_MULTIREAD_BIT true 76 77 /* CUSTOM VALUES FOR SENSOR 2 */ 78 #define ST_ACCEL_2_WAI_EXP 0x32 79 #define ST_ACCEL_2_ODR_ADDR 0x20 80 #define ST_ACCEL_2_ODR_MASK 0x18 81 #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00 82 #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01 83 #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02 84 #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03 85 #define ST_ACCEL_2_PW_ADDR 0x20 86 #define ST_ACCEL_2_PW_MASK 0xe0 87 #define ST_ACCEL_2_FS_ADDR 0x23 88 #define ST_ACCEL_2_FS_MASK 0x30 89 #define ST_ACCEL_2_FS_AVL_2_VAL 0X00 90 #define ST_ACCEL_2_FS_AVL_4_VAL 0X01 91 #define ST_ACCEL_2_FS_AVL_8_VAL 0x03 92 #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 93 #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 94 #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900) 95 #define ST_ACCEL_2_BDU_ADDR 0x23 96 #define ST_ACCEL_2_BDU_MASK 0x80 97 #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22 98 #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02 99 #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10 100 #define ST_ACCEL_2_IHL_IRQ_ADDR 0x22 101 #define ST_ACCEL_2_IHL_IRQ_MASK 0x80 102 #define ST_ACCEL_2_OD_IRQ_ADDR 0x22 103 #define ST_ACCEL_2_OD_IRQ_MASK 0x40 104 #define ST_ACCEL_2_MULTIREAD_BIT true 105 106 /* CUSTOM VALUES FOR SENSOR 3 */ 107 #define ST_ACCEL_3_WAI_EXP 0x40 108 #define ST_ACCEL_3_ODR_ADDR 0x20 109 #define ST_ACCEL_3_ODR_MASK 0xf0 110 #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01 111 #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02 112 #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03 113 #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04 114 #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05 115 #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06 116 #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07 117 #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08 118 #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09 119 #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a 120 #define ST_ACCEL_3_FS_ADDR 0x24 121 #define ST_ACCEL_3_FS_MASK 0x38 122 #define ST_ACCEL_3_FS_AVL_2_VAL 0X00 123 #define ST_ACCEL_3_FS_AVL_4_VAL 0X01 124 #define ST_ACCEL_3_FS_AVL_6_VAL 0x02 125 #define ST_ACCEL_3_FS_AVL_8_VAL 0x03 126 #define ST_ACCEL_3_FS_AVL_16_VAL 0x04 127 #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61) 128 #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122) 129 #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183) 130 #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244) 131 #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732) 132 #define ST_ACCEL_3_BDU_ADDR 0x20 133 #define ST_ACCEL_3_BDU_MASK 0x08 134 #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23 135 #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80 136 #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00 137 #define ST_ACCEL_3_IHL_IRQ_ADDR 0x23 138 #define ST_ACCEL_3_IHL_IRQ_MASK 0x40 139 #define ST_ACCEL_3_IG1_EN_ADDR 0x23 140 #define ST_ACCEL_3_IG1_EN_MASK 0x08 141 #define ST_ACCEL_3_MULTIREAD_BIT false 142 143 /* CUSTOM VALUES FOR SENSOR 4 */ 144 #define ST_ACCEL_4_WAI_EXP 0x3a 145 #define ST_ACCEL_4_ODR_ADDR 0x20 146 #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */ 147 #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00 148 #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01 149 #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02 150 #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03 151 #define ST_ACCEL_4_PW_ADDR 0x20 152 #define ST_ACCEL_4_PW_MASK 0xc0 153 #define ST_ACCEL_4_FS_ADDR 0x21 154 #define ST_ACCEL_4_FS_MASK 0x80 155 #define ST_ACCEL_4_FS_AVL_2_VAL 0X00 156 #define ST_ACCEL_4_FS_AVL_6_VAL 0X01 157 #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024) 158 #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340) 159 #define ST_ACCEL_4_BDU_ADDR 0x21 160 #define ST_ACCEL_4_BDU_MASK 0x40 161 #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21 162 #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04 163 #define ST_ACCEL_4_MULTIREAD_BIT true 164 165 /* CUSTOM VALUES FOR SENSOR 5 */ 166 #define ST_ACCEL_5_WAI_EXP 0x3b 167 #define ST_ACCEL_5_ODR_ADDR 0x20 168 #define ST_ACCEL_5_ODR_MASK 0x80 169 #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00 170 #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01 171 #define ST_ACCEL_5_PW_ADDR 0x20 172 #define ST_ACCEL_5_PW_MASK 0x40 173 #define ST_ACCEL_5_FS_ADDR 0x20 174 #define ST_ACCEL_5_FS_MASK 0x20 175 #define ST_ACCEL_5_FS_AVL_2_VAL 0X00 176 #define ST_ACCEL_5_FS_AVL_8_VAL 0X01 177 /* TODO: check these resulting gain settings, these are not in the datsheet */ 178 #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000) 179 #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000) 180 #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22 181 #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04 182 #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20 183 #define ST_ACCEL_5_IHL_IRQ_ADDR 0x22 184 #define ST_ACCEL_5_IHL_IRQ_MASK 0x80 185 #define ST_ACCEL_5_OD_IRQ_ADDR 0x22 186 #define ST_ACCEL_5_OD_IRQ_MASK 0x40 187 #define ST_ACCEL_5_IG1_EN_ADDR 0x21 188 #define ST_ACCEL_5_IG1_EN_MASK 0x08 189 #define ST_ACCEL_5_MULTIREAD_BIT false 190 191 /* CUSTOM VALUES FOR SENSOR 6 */ 192 #define ST_ACCEL_6_WAI_EXP 0x32 193 #define ST_ACCEL_6_ODR_ADDR 0x20 194 #define ST_ACCEL_6_ODR_MASK 0x18 195 #define ST_ACCEL_6_ODR_AVL_50HZ_VAL 0x00 196 #define ST_ACCEL_6_ODR_AVL_100HZ_VAL 0x01 197 #define ST_ACCEL_6_ODR_AVL_400HZ_VAL 0x02 198 #define ST_ACCEL_6_ODR_AVL_1000HZ_VAL 0x03 199 #define ST_ACCEL_6_PW_ADDR 0x20 200 #define ST_ACCEL_6_PW_MASK 0x20 201 #define ST_ACCEL_6_FS_ADDR 0x23 202 #define ST_ACCEL_6_FS_MASK 0x30 203 #define ST_ACCEL_6_FS_AVL_100_VAL 0x00 204 #define ST_ACCEL_6_FS_AVL_200_VAL 0x01 205 #define ST_ACCEL_6_FS_AVL_400_VAL 0x03 206 #define ST_ACCEL_6_FS_AVL_100_GAIN IIO_G_TO_M_S_2(49000) 207 #define ST_ACCEL_6_FS_AVL_200_GAIN IIO_G_TO_M_S_2(98000) 208 #define ST_ACCEL_6_FS_AVL_400_GAIN IIO_G_TO_M_S_2(195000) 209 #define ST_ACCEL_6_BDU_ADDR 0x23 210 #define ST_ACCEL_6_BDU_MASK 0x80 211 #define ST_ACCEL_6_DRDY_IRQ_ADDR 0x22 212 #define ST_ACCEL_6_DRDY_IRQ_INT1_MASK 0x02 213 #define ST_ACCEL_6_DRDY_IRQ_INT2_MASK 0x10 214 #define ST_ACCEL_6_IHL_IRQ_ADDR 0x22 215 #define ST_ACCEL_6_IHL_IRQ_MASK 0x80 216 #define ST_ACCEL_6_MULTIREAD_BIT true 217 218 /* CUSTOM VALUES FOR SENSOR 7 */ 219 #define ST_ACCEL_7_ODR_ADDR 0x20 220 #define ST_ACCEL_7_ODR_MASK 0x30 221 #define ST_ACCEL_7_ODR_AVL_280HZ_VAL 0x00 222 #define ST_ACCEL_7_ODR_AVL_560HZ_VAL 0x01 223 #define ST_ACCEL_7_ODR_AVL_1120HZ_VAL 0x02 224 #define ST_ACCEL_7_ODR_AVL_4480HZ_VAL 0x03 225 #define ST_ACCEL_7_PW_ADDR 0x20 226 #define ST_ACCEL_7_PW_MASK 0xc0 227 #define ST_ACCEL_7_FS_AVL_2_GAIN IIO_G_TO_M_S_2(488) 228 #define ST_ACCEL_7_BDU_ADDR 0x21 229 #define ST_ACCEL_7_BDU_MASK 0x40 230 #define ST_ACCEL_7_DRDY_IRQ_ADDR 0x21 231 #define ST_ACCEL_7_DRDY_IRQ_INT1_MASK 0x04 232 #define ST_ACCEL_7_MULTIREAD_BIT false 233 234 static const struct iio_chan_spec st_accel_8bit_channels[] = { 235 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 236 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 237 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 8, 8, 238 ST_ACCEL_DEFAULT_OUT_X_L_ADDR+1), 239 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 240 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 241 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 8, 8, 242 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR+1), 243 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 244 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 245 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 8, 8, 246 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR+1), 247 IIO_CHAN_SOFT_TIMESTAMP(3) 248 }; 249 250 static const struct iio_chan_spec st_accel_12bit_channels[] = { 251 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 252 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 253 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 12, 16, 254 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 255 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 256 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 257 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 12, 16, 258 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 259 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 260 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 261 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 12, 16, 262 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 263 IIO_CHAN_SOFT_TIMESTAMP(3) 264 }; 265 266 static const struct iio_chan_spec st_accel_16bit_channels[] = { 267 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 268 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 269 ST_SENSORS_SCAN_X, 1, IIO_MOD_X, 's', IIO_LE, 16, 16, 270 ST_ACCEL_DEFAULT_OUT_X_L_ADDR), 271 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 272 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 273 ST_SENSORS_SCAN_Y, 1, IIO_MOD_Y, 's', IIO_LE, 16, 16, 274 ST_ACCEL_DEFAULT_OUT_Y_L_ADDR), 275 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 276 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 277 ST_SENSORS_SCAN_Z, 1, IIO_MOD_Z, 's', IIO_LE, 16, 16, 278 ST_ACCEL_DEFAULT_OUT_Z_L_ADDR), 279 IIO_CHAN_SOFT_TIMESTAMP(3) 280 }; 281 282 static const struct st_sensor_settings st_accel_sensors_settings[] = { 283 { 284 .wai = ST_ACCEL_1_WAI_EXP, 285 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 286 .sensors_supported = { 287 [0] = LIS3DH_ACCEL_DEV_NAME, 288 [1] = LSM303DLHC_ACCEL_DEV_NAME, 289 [2] = LSM330D_ACCEL_DEV_NAME, 290 [3] = LSM330DL_ACCEL_DEV_NAME, 291 [4] = LSM330DLC_ACCEL_DEV_NAME, 292 [5] = LSM303AGR_ACCEL_DEV_NAME, 293 [6] = LIS2DH12_ACCEL_DEV_NAME, 294 }, 295 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 296 .odr = { 297 .addr = ST_ACCEL_1_ODR_ADDR, 298 .mask = ST_ACCEL_1_ODR_MASK, 299 .odr_avl = { 300 { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, }, 301 { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, }, 302 { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, }, 303 { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, }, 304 { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, }, 305 { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, }, 306 { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, }, 307 { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, }, 308 }, 309 }, 310 .pw = { 311 .addr = ST_ACCEL_1_ODR_ADDR, 312 .mask = ST_ACCEL_1_ODR_MASK, 313 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 314 }, 315 .enable_axis = { 316 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 317 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 318 }, 319 .fs = { 320 .addr = ST_ACCEL_1_FS_ADDR, 321 .mask = ST_ACCEL_1_FS_MASK, 322 .fs_avl = { 323 [0] = { 324 .num = ST_ACCEL_FS_AVL_2G, 325 .value = ST_ACCEL_1_FS_AVL_2_VAL, 326 .gain = ST_ACCEL_1_FS_AVL_2_GAIN, 327 }, 328 [1] = { 329 .num = ST_ACCEL_FS_AVL_4G, 330 .value = ST_ACCEL_1_FS_AVL_4_VAL, 331 .gain = ST_ACCEL_1_FS_AVL_4_GAIN, 332 }, 333 [2] = { 334 .num = ST_ACCEL_FS_AVL_8G, 335 .value = ST_ACCEL_1_FS_AVL_8_VAL, 336 .gain = ST_ACCEL_1_FS_AVL_8_GAIN, 337 }, 338 [3] = { 339 .num = ST_ACCEL_FS_AVL_16G, 340 .value = ST_ACCEL_1_FS_AVL_16_VAL, 341 .gain = ST_ACCEL_1_FS_AVL_16_GAIN, 342 }, 343 }, 344 }, 345 .bdu = { 346 .addr = ST_ACCEL_1_BDU_ADDR, 347 .mask = ST_ACCEL_1_BDU_MASK, 348 }, 349 .drdy_irq = { 350 .addr = ST_ACCEL_1_DRDY_IRQ_ADDR, 351 .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK, 352 .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK, 353 .addr_ihl = ST_ACCEL_1_IHL_IRQ_ADDR, 354 .mask_ihl = ST_ACCEL_1_IHL_IRQ_MASK, 355 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 356 }, 357 .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT, 358 .bootime = 2, 359 }, 360 { 361 .wai = ST_ACCEL_2_WAI_EXP, 362 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 363 .sensors_supported = { 364 [0] = LIS331DLH_ACCEL_DEV_NAME, 365 [1] = LSM303DL_ACCEL_DEV_NAME, 366 [2] = LSM303DLH_ACCEL_DEV_NAME, 367 [3] = LSM303DLM_ACCEL_DEV_NAME, 368 }, 369 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 370 .odr = { 371 .addr = ST_ACCEL_2_ODR_ADDR, 372 .mask = ST_ACCEL_2_ODR_MASK, 373 .odr_avl = { 374 { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, }, 375 { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, }, 376 { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, }, 377 { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, }, 378 }, 379 }, 380 .pw = { 381 .addr = ST_ACCEL_2_PW_ADDR, 382 .mask = ST_ACCEL_2_PW_MASK, 383 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 384 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 385 }, 386 .enable_axis = { 387 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 388 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 389 }, 390 .fs = { 391 .addr = ST_ACCEL_2_FS_ADDR, 392 .mask = ST_ACCEL_2_FS_MASK, 393 .fs_avl = { 394 [0] = { 395 .num = ST_ACCEL_FS_AVL_2G, 396 .value = ST_ACCEL_2_FS_AVL_2_VAL, 397 .gain = ST_ACCEL_2_FS_AVL_2_GAIN, 398 }, 399 [1] = { 400 .num = ST_ACCEL_FS_AVL_4G, 401 .value = ST_ACCEL_2_FS_AVL_4_VAL, 402 .gain = ST_ACCEL_2_FS_AVL_4_GAIN, 403 }, 404 [2] = { 405 .num = ST_ACCEL_FS_AVL_8G, 406 .value = ST_ACCEL_2_FS_AVL_8_VAL, 407 .gain = ST_ACCEL_2_FS_AVL_8_GAIN, 408 }, 409 }, 410 }, 411 .bdu = { 412 .addr = ST_ACCEL_2_BDU_ADDR, 413 .mask = ST_ACCEL_2_BDU_MASK, 414 }, 415 .drdy_irq = { 416 .addr = ST_ACCEL_2_DRDY_IRQ_ADDR, 417 .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK, 418 .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK, 419 .addr_ihl = ST_ACCEL_2_IHL_IRQ_ADDR, 420 .mask_ihl = ST_ACCEL_2_IHL_IRQ_MASK, 421 .addr_od = ST_ACCEL_2_OD_IRQ_ADDR, 422 .mask_od = ST_ACCEL_2_OD_IRQ_MASK, 423 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 424 }, 425 .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT, 426 .bootime = 2, 427 }, 428 { 429 .wai = ST_ACCEL_3_WAI_EXP, 430 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 431 .sensors_supported = { 432 [0] = LSM330_ACCEL_DEV_NAME, 433 }, 434 .ch = (struct iio_chan_spec *)st_accel_16bit_channels, 435 .odr = { 436 .addr = ST_ACCEL_3_ODR_ADDR, 437 .mask = ST_ACCEL_3_ODR_MASK, 438 .odr_avl = { 439 { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL }, 440 { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, }, 441 { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, }, 442 { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, }, 443 { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, }, 444 { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, }, 445 { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, }, 446 { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, }, 447 { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, }, 448 { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, }, 449 }, 450 }, 451 .pw = { 452 .addr = ST_ACCEL_3_ODR_ADDR, 453 .mask = ST_ACCEL_3_ODR_MASK, 454 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 455 }, 456 .enable_axis = { 457 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 458 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 459 }, 460 .fs = { 461 .addr = ST_ACCEL_3_FS_ADDR, 462 .mask = ST_ACCEL_3_FS_MASK, 463 .fs_avl = { 464 [0] = { 465 .num = ST_ACCEL_FS_AVL_2G, 466 .value = ST_ACCEL_3_FS_AVL_2_VAL, 467 .gain = ST_ACCEL_3_FS_AVL_2_GAIN, 468 }, 469 [1] = { 470 .num = ST_ACCEL_FS_AVL_4G, 471 .value = ST_ACCEL_3_FS_AVL_4_VAL, 472 .gain = ST_ACCEL_3_FS_AVL_4_GAIN, 473 }, 474 [2] = { 475 .num = ST_ACCEL_FS_AVL_6G, 476 .value = ST_ACCEL_3_FS_AVL_6_VAL, 477 .gain = ST_ACCEL_3_FS_AVL_6_GAIN, 478 }, 479 [3] = { 480 .num = ST_ACCEL_FS_AVL_8G, 481 .value = ST_ACCEL_3_FS_AVL_8_VAL, 482 .gain = ST_ACCEL_3_FS_AVL_8_GAIN, 483 }, 484 [4] = { 485 .num = ST_ACCEL_FS_AVL_16G, 486 .value = ST_ACCEL_3_FS_AVL_16_VAL, 487 .gain = ST_ACCEL_3_FS_AVL_16_GAIN, 488 }, 489 }, 490 }, 491 .bdu = { 492 .addr = ST_ACCEL_3_BDU_ADDR, 493 .mask = ST_ACCEL_3_BDU_MASK, 494 }, 495 .drdy_irq = { 496 .addr = ST_ACCEL_3_DRDY_IRQ_ADDR, 497 .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK, 498 .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK, 499 .addr_ihl = ST_ACCEL_3_IHL_IRQ_ADDR, 500 .mask_ihl = ST_ACCEL_3_IHL_IRQ_MASK, 501 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 502 .ig1 = { 503 .en_addr = ST_ACCEL_3_IG1_EN_ADDR, 504 .en_mask = ST_ACCEL_3_IG1_EN_MASK, 505 }, 506 }, 507 .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT, 508 .bootime = 2, 509 }, 510 { 511 .wai = ST_ACCEL_4_WAI_EXP, 512 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 513 .sensors_supported = { 514 [0] = LIS3LV02DL_ACCEL_DEV_NAME, 515 }, 516 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 517 .odr = { 518 .addr = ST_ACCEL_4_ODR_ADDR, 519 .mask = ST_ACCEL_4_ODR_MASK, 520 .odr_avl = { 521 { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL }, 522 { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, }, 523 { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, }, 524 { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, }, 525 }, 526 }, 527 .pw = { 528 .addr = ST_ACCEL_4_PW_ADDR, 529 .mask = ST_ACCEL_4_PW_MASK, 530 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 531 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 532 }, 533 .enable_axis = { 534 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 535 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 536 }, 537 .fs = { 538 .addr = ST_ACCEL_4_FS_ADDR, 539 .mask = ST_ACCEL_4_FS_MASK, 540 .fs_avl = { 541 [0] = { 542 .num = ST_ACCEL_FS_AVL_2G, 543 .value = ST_ACCEL_4_FS_AVL_2_VAL, 544 .gain = ST_ACCEL_4_FS_AVL_2_GAIN, 545 }, 546 [1] = { 547 .num = ST_ACCEL_FS_AVL_6G, 548 .value = ST_ACCEL_4_FS_AVL_6_VAL, 549 .gain = ST_ACCEL_4_FS_AVL_6_GAIN, 550 }, 551 }, 552 }, 553 .bdu = { 554 .addr = ST_ACCEL_4_BDU_ADDR, 555 .mask = ST_ACCEL_4_BDU_MASK, 556 }, 557 .drdy_irq = { 558 .addr = ST_ACCEL_4_DRDY_IRQ_ADDR, 559 .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK, 560 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 561 }, 562 .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT, 563 .bootime = 2, /* guess */ 564 }, 565 { 566 .wai = ST_ACCEL_5_WAI_EXP, 567 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 568 .sensors_supported = { 569 [0] = LIS331DL_ACCEL_DEV_NAME, 570 }, 571 .ch = (struct iio_chan_spec *)st_accel_8bit_channels, 572 .odr = { 573 .addr = ST_ACCEL_5_ODR_ADDR, 574 .mask = ST_ACCEL_5_ODR_MASK, 575 .odr_avl = { 576 { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL }, 577 { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, }, 578 }, 579 }, 580 .pw = { 581 .addr = ST_ACCEL_5_PW_ADDR, 582 .mask = ST_ACCEL_5_PW_MASK, 583 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 584 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 585 }, 586 .enable_axis = { 587 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 588 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 589 }, 590 .fs = { 591 .addr = ST_ACCEL_5_FS_ADDR, 592 .mask = ST_ACCEL_5_FS_MASK, 593 .fs_avl = { 594 [0] = { 595 .num = ST_ACCEL_FS_AVL_2G, 596 .value = ST_ACCEL_5_FS_AVL_2_VAL, 597 .gain = ST_ACCEL_5_FS_AVL_2_GAIN, 598 }, 599 [1] = { 600 .num = ST_ACCEL_FS_AVL_8G, 601 .value = ST_ACCEL_5_FS_AVL_8_VAL, 602 .gain = ST_ACCEL_5_FS_AVL_8_GAIN, 603 }, 604 }, 605 }, 606 .drdy_irq = { 607 .addr = ST_ACCEL_5_DRDY_IRQ_ADDR, 608 .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK, 609 .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK, 610 .addr_ihl = ST_ACCEL_5_IHL_IRQ_ADDR, 611 .mask_ihl = ST_ACCEL_5_IHL_IRQ_MASK, 612 .addr_od = ST_ACCEL_5_OD_IRQ_ADDR, 613 .mask_od = ST_ACCEL_5_OD_IRQ_MASK, 614 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 615 }, 616 .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT, 617 .bootime = 2, /* guess */ 618 }, 619 { 620 .wai = ST_ACCEL_6_WAI_EXP, 621 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 622 .sensors_supported = { 623 [0] = H3LIS331DL_DRIVER_NAME, 624 }, 625 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 626 .odr = { 627 .addr = ST_ACCEL_6_ODR_ADDR, 628 .mask = ST_ACCEL_6_ODR_MASK, 629 .odr_avl = { 630 { 50, ST_ACCEL_6_ODR_AVL_50HZ_VAL }, 631 { 100, ST_ACCEL_6_ODR_AVL_100HZ_VAL, }, 632 { 400, ST_ACCEL_6_ODR_AVL_400HZ_VAL, }, 633 { 1000, ST_ACCEL_6_ODR_AVL_1000HZ_VAL, }, 634 }, 635 }, 636 .pw = { 637 .addr = ST_ACCEL_6_PW_ADDR, 638 .mask = ST_ACCEL_6_PW_MASK, 639 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 640 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 641 }, 642 .enable_axis = { 643 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 644 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 645 }, 646 .fs = { 647 .addr = ST_ACCEL_6_FS_ADDR, 648 .mask = ST_ACCEL_6_FS_MASK, 649 .fs_avl = { 650 [0] = { 651 .num = ST_ACCEL_FS_AVL_100G, 652 .value = ST_ACCEL_6_FS_AVL_100_VAL, 653 .gain = ST_ACCEL_6_FS_AVL_100_GAIN, 654 }, 655 [1] = { 656 .num = ST_ACCEL_FS_AVL_200G, 657 .value = ST_ACCEL_6_FS_AVL_200_VAL, 658 .gain = ST_ACCEL_6_FS_AVL_200_GAIN, 659 }, 660 [2] = { 661 .num = ST_ACCEL_FS_AVL_400G, 662 .value = ST_ACCEL_6_FS_AVL_400_VAL, 663 .gain = ST_ACCEL_6_FS_AVL_400_GAIN, 664 }, 665 }, 666 }, 667 .bdu = { 668 .addr = ST_ACCEL_6_BDU_ADDR, 669 .mask = ST_ACCEL_6_BDU_MASK, 670 }, 671 .drdy_irq = { 672 .addr = ST_ACCEL_6_DRDY_IRQ_ADDR, 673 .mask_int1 = ST_ACCEL_6_DRDY_IRQ_INT1_MASK, 674 .mask_int2 = ST_ACCEL_6_DRDY_IRQ_INT2_MASK, 675 .addr_ihl = ST_ACCEL_6_IHL_IRQ_ADDR, 676 .mask_ihl = ST_ACCEL_6_IHL_IRQ_MASK, 677 }, 678 .multi_read_bit = ST_ACCEL_6_MULTIREAD_BIT, 679 .bootime = 2, 680 }, 681 { 682 /* No WAI register present */ 683 .sensors_supported = { 684 [0] = LIS3L02DQ_ACCEL_DEV_NAME, 685 }, 686 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 687 .odr = { 688 .addr = ST_ACCEL_7_ODR_ADDR, 689 .mask = ST_ACCEL_7_ODR_MASK, 690 .odr_avl = { 691 { 280, ST_ACCEL_7_ODR_AVL_280HZ_VAL, }, 692 { 560, ST_ACCEL_7_ODR_AVL_560HZ_VAL, }, 693 { 1120, ST_ACCEL_7_ODR_AVL_1120HZ_VAL, }, 694 { 4480, ST_ACCEL_7_ODR_AVL_4480HZ_VAL, }, 695 }, 696 }, 697 .pw = { 698 .addr = ST_ACCEL_7_PW_ADDR, 699 .mask = ST_ACCEL_7_PW_MASK, 700 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 701 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 702 }, 703 .enable_axis = { 704 .addr = ST_SENSORS_DEFAULT_AXIS_ADDR, 705 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 706 }, 707 .fs = { 708 .fs_avl = { 709 [0] = { 710 .num = ST_ACCEL_FS_AVL_2G, 711 .gain = ST_ACCEL_7_FS_AVL_2_GAIN, 712 }, 713 }, 714 }, 715 /* 716 * The part has a BDU bit but if set the data is never 717 * updated so don't set it. 718 */ 719 .bdu = { 720 }, 721 .drdy_irq = { 722 .addr = ST_ACCEL_7_DRDY_IRQ_ADDR, 723 .mask_int1 = ST_ACCEL_7_DRDY_IRQ_INT1_MASK, 724 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 725 }, 726 .multi_read_bit = ST_ACCEL_7_MULTIREAD_BIT, 727 .bootime = 2, 728 }, 729 }; 730 731 static int st_accel_read_raw(struct iio_dev *indio_dev, 732 struct iio_chan_spec const *ch, int *val, 733 int *val2, long mask) 734 { 735 int err; 736 struct st_sensor_data *adata = iio_priv(indio_dev); 737 738 switch (mask) { 739 case IIO_CHAN_INFO_RAW: 740 err = st_sensors_read_info_raw(indio_dev, ch, val); 741 if (err < 0) 742 goto read_error; 743 744 return IIO_VAL_INT; 745 case IIO_CHAN_INFO_SCALE: 746 *val = 0; 747 *val2 = adata->current_fullscale->gain; 748 return IIO_VAL_INT_PLUS_MICRO; 749 case IIO_CHAN_INFO_SAMP_FREQ: 750 *val = adata->odr; 751 return IIO_VAL_INT; 752 default: 753 return -EINVAL; 754 } 755 756 read_error: 757 return err; 758 } 759 760 static int st_accel_write_raw(struct iio_dev *indio_dev, 761 struct iio_chan_spec const *chan, int val, int val2, long mask) 762 { 763 int err; 764 765 switch (mask) { 766 case IIO_CHAN_INFO_SCALE: 767 err = st_sensors_set_fullscale_by_gain(indio_dev, val2); 768 break; 769 case IIO_CHAN_INFO_SAMP_FREQ: 770 if (val2) 771 return -EINVAL; 772 mutex_lock(&indio_dev->mlock); 773 err = st_sensors_set_odr(indio_dev, val); 774 mutex_unlock(&indio_dev->mlock); 775 return err; 776 default: 777 return -EINVAL; 778 } 779 780 return err; 781 } 782 783 static ST_SENSORS_DEV_ATTR_SAMP_FREQ_AVAIL(); 784 static ST_SENSORS_DEV_ATTR_SCALE_AVAIL(in_accel_scale_available); 785 786 static struct attribute *st_accel_attributes[] = { 787 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 788 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 789 NULL, 790 }; 791 792 static const struct attribute_group st_accel_attribute_group = { 793 .attrs = st_accel_attributes, 794 }; 795 796 static const struct iio_info accel_info = { 797 .driver_module = THIS_MODULE, 798 .attrs = &st_accel_attribute_group, 799 .read_raw = &st_accel_read_raw, 800 .write_raw = &st_accel_write_raw, 801 .debugfs_reg_access = &st_sensors_debugfs_reg_access, 802 }; 803 804 #ifdef CONFIG_IIO_TRIGGER 805 static const struct iio_trigger_ops st_accel_trigger_ops = { 806 .owner = THIS_MODULE, 807 .set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE, 808 .validate_device = st_sensors_validate_device, 809 }; 810 #define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops) 811 #else 812 #define ST_ACCEL_TRIGGER_OPS NULL 813 #endif 814 815 int st_accel_common_probe(struct iio_dev *indio_dev) 816 { 817 struct st_sensor_data *adata = iio_priv(indio_dev); 818 int irq = adata->get_irq_data_ready(indio_dev); 819 int err; 820 821 indio_dev->modes = INDIO_DIRECT_MODE; 822 indio_dev->info = &accel_info; 823 mutex_init(&adata->tb.buf_lock); 824 825 err = st_sensors_power_enable(indio_dev); 826 if (err) 827 return err; 828 829 err = st_sensors_check_device_support(indio_dev, 830 ARRAY_SIZE(st_accel_sensors_settings), 831 st_accel_sensors_settings); 832 if (err < 0) 833 goto st_accel_power_off; 834 835 adata->num_data_channels = ST_ACCEL_NUMBER_DATA_CHANNELS; 836 adata->multiread_bit = adata->sensor_settings->multi_read_bit; 837 indio_dev->channels = adata->sensor_settings->ch; 838 indio_dev->num_channels = ST_SENSORS_NUMBER_ALL_CHANNELS; 839 840 adata->current_fullscale = (struct st_sensor_fullscale_avl *) 841 &adata->sensor_settings->fs.fs_avl[0]; 842 adata->odr = adata->sensor_settings->odr.odr_avl[0].hz; 843 844 if (!adata->dev->platform_data) 845 adata->dev->platform_data = 846 (struct st_sensors_platform_data *)&default_accel_pdata; 847 848 err = st_sensors_init_sensor(indio_dev, adata->dev->platform_data); 849 if (err < 0) 850 goto st_accel_power_off; 851 852 err = st_accel_allocate_ring(indio_dev); 853 if (err < 0) 854 goto st_accel_power_off; 855 856 if (irq > 0) { 857 err = st_sensors_allocate_trigger(indio_dev, 858 ST_ACCEL_TRIGGER_OPS); 859 if (err < 0) 860 goto st_accel_probe_trigger_error; 861 } 862 863 err = iio_device_register(indio_dev); 864 if (err) 865 goto st_accel_device_register_error; 866 867 dev_info(&indio_dev->dev, "registered accelerometer %s\n", 868 indio_dev->name); 869 870 return 0; 871 872 st_accel_device_register_error: 873 if (irq > 0) 874 st_sensors_deallocate_trigger(indio_dev); 875 st_accel_probe_trigger_error: 876 st_accel_deallocate_ring(indio_dev); 877 st_accel_power_off: 878 st_sensors_power_disable(indio_dev); 879 880 return err; 881 } 882 EXPORT_SYMBOL(st_accel_common_probe); 883 884 void st_accel_common_remove(struct iio_dev *indio_dev) 885 { 886 struct st_sensor_data *adata = iio_priv(indio_dev); 887 888 st_sensors_power_disable(indio_dev); 889 890 iio_device_unregister(indio_dev); 891 if (adata->get_irq_data_ready(indio_dev) > 0) 892 st_sensors_deallocate_trigger(indio_dev); 893 894 st_accel_deallocate_ring(indio_dev); 895 } 896 EXPORT_SYMBOL(st_accel_common_remove); 897 898 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 899 MODULE_DESCRIPTION("STMicroelectronics accelerometers driver"); 900 MODULE_LICENSE("GPL v2"); 901