xref: /openbmc/linux/drivers/iio/accel/kxsd9.h (revision bf96f6e8)
1bf96f6e8SLinus Walleij #include <linux/device.h>
2bf96f6e8SLinus Walleij #include <linux/kernel.h>
3bf96f6e8SLinus Walleij 
4bf96f6e8SLinus Walleij #define KXSD9_STATE_RX_SIZE 2
5bf96f6e8SLinus Walleij #define KXSD9_STATE_TX_SIZE 2
6bf96f6e8SLinus Walleij 
7bf96f6e8SLinus Walleij struct kxsd9_transport;
8bf96f6e8SLinus Walleij 
9bf96f6e8SLinus Walleij /**
10bf96f6e8SLinus Walleij  * struct kxsd9_transport - transport adapter for SPI or I2C
11bf96f6e8SLinus Walleij  * @trdev: transport device such as SPI or I2C
12bf96f6e8SLinus Walleij  * @readreg(): function to read a byte from an address in the device
13bf96f6e8SLinus Walleij  * @writereg(): function to write a byte to an address in the device
14bf96f6e8SLinus Walleij  * @write2(): function to write two consecutive bytes to the device
15bf96f6e8SLinus Walleij  * @readval(): function to read a 16bit value from the device
16bf96f6e8SLinus Walleij  * @rx: cache aligned read buffer
17bf96f6e8SLinus Walleij  * @tx: cache aligned write buffer
18bf96f6e8SLinus Walleij  */
19bf96f6e8SLinus Walleij struct kxsd9_transport {
20bf96f6e8SLinus Walleij 	void *trdev;
21bf96f6e8SLinus Walleij 	int (*readreg) (struct kxsd9_transport *tr, u8 address);
22bf96f6e8SLinus Walleij 	int (*writereg) (struct kxsd9_transport *tr, u8 address, u8 val);
23bf96f6e8SLinus Walleij 	int (*write2) (struct kxsd9_transport *tr, u8 b1, u8 b2);
24bf96f6e8SLinus Walleij 	int (*readval) (struct kxsd9_transport *tr, u8 address);
25bf96f6e8SLinus Walleij 	u8 rx[KXSD9_STATE_RX_SIZE] ____cacheline_aligned;
26bf96f6e8SLinus Walleij 	u8 tx[KXSD9_STATE_TX_SIZE];
27bf96f6e8SLinus Walleij };
28bf96f6e8SLinus Walleij 
29bf96f6e8SLinus Walleij int kxsd9_common_probe(struct device *parent,
30bf96f6e8SLinus Walleij 		       struct kxsd9_transport *transport,
31bf96f6e8SLinus Walleij 		       const char *name);
32bf96f6e8SLinus Walleij int kxsd9_common_remove(struct device *parent);
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