1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * KXCJK-1013 3-axis accelerometer driver 4 * Copyright (c) 2014, Intel Corporation. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/i2c.h> 9 #include <linux/interrupt.h> 10 #include <linux/delay.h> 11 #include <linux/bitops.h> 12 #include <linux/slab.h> 13 #include <linux/string.h> 14 #include <linux/acpi.h> 15 #include <linux/pm.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 #include <linux/iio/buffer.h> 21 #include <linux/iio/trigger.h> 22 #include <linux/iio/events.h> 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/triggered_buffer.h> 25 #include <linux/iio/accel/kxcjk_1013.h> 26 27 #define KXCJK1013_DRV_NAME "kxcjk1013" 28 #define KXCJK1013_IRQ_NAME "kxcjk1013_event" 29 30 #define KXTF9_REG_HP_XOUT_L 0x00 31 #define KXTF9_REG_HP_XOUT_H 0x01 32 #define KXTF9_REG_HP_YOUT_L 0x02 33 #define KXTF9_REG_HP_YOUT_H 0x03 34 #define KXTF9_REG_HP_ZOUT_L 0x04 35 #define KXTF9_REG_HP_ZOUT_H 0x05 36 37 #define KXCJK1013_REG_XOUT_L 0x06 38 /* 39 * From low byte X axis register, all the other addresses of Y and Z can be 40 * obtained by just applying axis offset. The following axis defines are just 41 * provide clarity, but not used. 42 */ 43 #define KXCJK1013_REG_XOUT_H 0x07 44 #define KXCJK1013_REG_YOUT_L 0x08 45 #define KXCJK1013_REG_YOUT_H 0x09 46 #define KXCJK1013_REG_ZOUT_L 0x0A 47 #define KXCJK1013_REG_ZOUT_H 0x0B 48 49 #define KXCJK1013_REG_DCST_RESP 0x0C 50 #define KXCJK1013_REG_WHO_AM_I 0x0F 51 #define KXTF9_REG_TILT_POS_CUR 0x10 52 #define KXTF9_REG_TILT_POS_PREV 0x11 53 #define KXTF9_REG_INT_SRC1 0x15 54 #define KXTF9_REG_INT_SRC2 0x16 55 #define KXCJK1013_REG_INT_SRC1 0x16 56 #define KXCJK1013_REG_INT_SRC2 0x17 57 #define KXCJK1013_REG_STATUS_REG 0x18 58 #define KXCJK1013_REG_INT_REL 0x1A 59 #define KXCJK1013_REG_CTRL1 0x1B 60 #define KXTF9_REG_CTRL2 0x1C 61 #define KXTF9_REG_CTRL3 0x1D 62 #define KXCJK1013_REG_CTRL2 0x1D 63 #define KXCJK1013_REG_INT_CTRL1 0x1E 64 #define KXCJK1013_REG_INT_CTRL2 0x1F 65 #define KXTF9_REG_INT_CTRL3 0x20 66 #define KXCJK1013_REG_DATA_CTRL 0x21 67 #define KXTF9_REG_TILT_TIMER 0x28 68 #define KXCJK1013_REG_WAKE_TIMER 0x29 69 #define KXTF9_REG_TDT_TIMER 0x2B 70 #define KXTF9_REG_TDT_THRESH_H 0x2C 71 #define KXTF9_REG_TDT_THRESH_L 0x2D 72 #define KXTF9_REG_TDT_TAP_TIMER 0x2E 73 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F 74 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30 75 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31 76 #define KXCJK1013_REG_SELF_TEST 0x3A 77 #define KXTF9_REG_WAKE_THRESH 0x5A 78 #define KXTF9_REG_TILT_ANGLE 0x5C 79 #define KXTF9_REG_HYST_SET 0x5F 80 #define KXCJK1013_REG_WAKE_THRES 0x6A 81 82 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */ 83 #define KX023_REG_INS1 0x12 84 #define KX023_REG_INS2 0x13 85 #define KX023_REG_INS3 0x14 86 #define KX023_REG_STAT 0x15 87 #define KX023_REG_INT_REL 0x17 88 #define KX023_REG_CNTL1 0x18 89 #define KX023_REG_CNTL2 0x19 90 #define KX023_REG_CNTL3 0x1A 91 #define KX023_REG_ODCNTL 0x1B 92 #define KX023_REG_INC1 0x1C 93 #define KX023_REG_INC2 0x1D 94 #define KX023_REG_INC3 0x1E 95 #define KX023_REG_INC4 0x1F 96 #define KX023_REG_INC5 0x20 97 #define KX023_REG_INC6 0x21 98 #define KX023_REG_TILT_TIMER 0x22 99 #define KX023_REG_WUFC 0x23 100 #define KX023_REG_TDTRC 0x24 101 #define KX023_REG_TDTC 0x25 102 #define KX023_REG_TTH 0x26 103 #define KX023_REG_TTL 0x27 104 #define KX023_REG_FTD 0x28 105 #define KX023_REG_STD 0x29 106 #define KX023_REG_TLT 0x2A 107 #define KX023_REG_TWS 0x2B 108 #define KX023_REG_ATH 0x30 109 #define KX023_REG_TILT_ANGLE_LL 0x32 110 #define KX023_REG_TILT_ANGLE_HL 0x33 111 #define KX023_REG_HYST_SET 0x34 112 #define KX023_REG_LP_CNTL 0x35 113 #define KX023_REG_BUF_CNTL1 0x3A 114 #define KX023_REG_BUF_CNTL2 0x3B 115 #define KX023_REG_BUF_STATUS_1 0x3C 116 #define KX023_REG_BUF_STATUS_2 0x3D 117 #define KX023_REG_BUF_CLEAR 0x3E 118 #define KX023_REG_BUF_READ 0x3F 119 #define KX023_REG_SELF_TEST 0x60 120 121 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 122 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 123 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 124 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 125 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 126 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 127 128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */ 129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3) 130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4) 131 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5) 132 133 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5) 134 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4) 135 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3) 136 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2) 137 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1) 138 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0) 139 140 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 141 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 142 143 #define KXCJK1013_SLEEP_DELAY_MS 2000 144 145 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */ 146 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1) 147 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */ 148 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0 149 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2) 150 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3) 151 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4) 152 153 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */ 154 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 155 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 156 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 157 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 158 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 159 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 160 161 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */ 162 #define KX023_REG_INC4_BFI1 BIT(6) 163 #define KX023_REG_INC4_WMI1 BIT(5) 164 #define KX023_REG_INC4_DRDY1 BIT(4) 165 #define KX023_REG_INC4_TDTI1 BIT(2) 166 #define KX023_REG_INC4_WUFI1 BIT(1) 167 #define KX023_REG_INC4_TPI1 BIT(0) 168 169 #define KXCJK1013_DEFAULT_WAKE_THRES 1 170 171 enum kx_chipset { 172 KXCJK1013, 173 KXCJ91008, 174 KXTJ21009, 175 KXTF9, 176 KX0231025, 177 KX_MAX_CHIPS /* this must be last */ 178 }; 179 180 enum kx_acpi_type { 181 ACPI_GENERIC, 182 ACPI_SMO8500, 183 ACPI_KIOX010A, 184 }; 185 186 struct kx_chipset_regs { 187 u8 int_src1; 188 u8 int_src2; 189 u8 int_rel; 190 u8 ctrl1; 191 u8 wuf_ctrl; 192 u8 int_ctrl1; 193 u8 data_ctrl; 194 u8 wake_timer; 195 u8 wake_thres; 196 }; 197 198 static const struct kx_chipset_regs kxcjk1013_regs = { 199 .int_src1 = KXCJK1013_REG_INT_SRC1, 200 .int_src2 = KXCJK1013_REG_INT_SRC2, 201 .int_rel = KXCJK1013_REG_INT_REL, 202 .ctrl1 = KXCJK1013_REG_CTRL1, 203 .wuf_ctrl = KXCJK1013_REG_CTRL2, 204 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 205 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 206 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 207 .wake_thres = KXCJK1013_REG_WAKE_THRES, 208 }; 209 210 static const struct kx_chipset_regs kxtf9_regs = { 211 /* .int_src1 was moved to INT_SRC2 on KXTF9 */ 212 .int_src1 = KXTF9_REG_INT_SRC2, 213 /* .int_src2 is not available */ 214 .int_rel = KXCJK1013_REG_INT_REL, 215 .ctrl1 = KXCJK1013_REG_CTRL1, 216 .wuf_ctrl = KXTF9_REG_CTRL3, 217 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 218 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 219 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 220 .wake_thres = KXTF9_REG_WAKE_THRESH, 221 }; 222 223 /* The registers have totally different names but the bits are compatible */ 224 static const struct kx_chipset_regs kx0231025_regs = { 225 .int_src1 = KX023_REG_INS2, 226 .int_src2 = KX023_REG_INS3, 227 .int_rel = KX023_REG_INT_REL, 228 .ctrl1 = KX023_REG_CNTL1, 229 .wuf_ctrl = KX023_REG_CNTL3, 230 .int_ctrl1 = KX023_REG_INC1, 231 .data_ctrl = KX023_REG_ODCNTL, 232 .wake_timer = KX023_REG_WUFC, 233 .wake_thres = KX023_REG_ATH, 234 }; 235 236 enum kxcjk1013_axis { 237 AXIS_X, 238 AXIS_Y, 239 AXIS_Z, 240 AXIS_MAX 241 }; 242 243 struct kxcjk1013_data { 244 struct regulator_bulk_data regulators[2]; 245 struct i2c_client *client; 246 struct iio_trigger *dready_trig; 247 struct iio_trigger *motion_trig; 248 struct iio_mount_matrix orientation; 249 struct mutex mutex; 250 /* Ensure timestamp naturally aligned */ 251 struct { 252 s16 chans[AXIS_MAX]; 253 s64 timestamp __aligned(8); 254 } scan; 255 u8 odr_bits; 256 u8 range; 257 int wake_thres; 258 int wake_dur; 259 bool active_high_intr; 260 bool dready_trigger_on; 261 int ev_enable_state; 262 bool motion_trigger_on; 263 int64_t timestamp; 264 enum kx_chipset chipset; 265 enum kx_acpi_type acpi_type; 266 const struct kx_chipset_regs *regs; 267 }; 268 269 enum kxcjk1013_mode { 270 STANDBY, 271 OPERATION, 272 }; 273 274 enum kxcjk1013_range { 275 KXCJK1013_RANGE_2G, 276 KXCJK1013_RANGE_4G, 277 KXCJK1013_RANGE_8G, 278 }; 279 280 struct kx_odr_map { 281 int val; 282 int val2; 283 int odr_bits; 284 int wuf_bits; 285 }; 286 287 static const struct kx_odr_map samp_freq_table[] = { 288 { 0, 781000, 0x08, 0x00 }, 289 { 1, 563000, 0x09, 0x01 }, 290 { 3, 125000, 0x0A, 0x02 }, 291 { 6, 250000, 0x0B, 0x03 }, 292 { 12, 500000, 0x00, 0x04 }, 293 { 25, 0, 0x01, 0x05 }, 294 { 50, 0, 0x02, 0x06 }, 295 { 100, 0, 0x03, 0x06 }, 296 { 200, 0, 0x04, 0x06 }, 297 { 400, 0, 0x05, 0x06 }, 298 { 800, 0, 0x06, 0x06 }, 299 { 1600, 0, 0x07, 0x06 }, 300 }; 301 302 static const char *const kxcjk1013_samp_freq_avail = 303 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"; 304 305 static const struct kx_odr_map kxtf9_samp_freq_table[] = { 306 { 25, 0, 0x01, 0x00 }, 307 { 50, 0, 0x02, 0x01 }, 308 { 100, 0, 0x03, 0x01 }, 309 { 200, 0, 0x04, 0x01 }, 310 { 400, 0, 0x05, 0x01 }, 311 { 800, 0, 0x06, 0x01 }, 312 }; 313 314 static const char *const kxtf9_samp_freq_avail = 315 "25 50 100 200 400 800"; 316 317 /* Refer to section 4 of the specification */ 318 static __maybe_unused const struct { 319 int odr_bits; 320 int usec; 321 } odr_start_up_times[KX_MAX_CHIPS][12] = { 322 /* KXCJK-1013 */ 323 { 324 {0x08, 100000}, 325 {0x09, 100000}, 326 {0x0A, 100000}, 327 {0x0B, 100000}, 328 {0, 80000}, 329 {0x01, 41000}, 330 {0x02, 21000}, 331 {0x03, 11000}, 332 {0x04, 6400}, 333 {0x05, 3900}, 334 {0x06, 2700}, 335 {0x07, 2100}, 336 }, 337 /* KXCJ9-1008 */ 338 { 339 {0x08, 100000}, 340 {0x09, 100000}, 341 {0x0A, 100000}, 342 {0x0B, 100000}, 343 {0, 80000}, 344 {0x01, 41000}, 345 {0x02, 21000}, 346 {0x03, 11000}, 347 {0x04, 6400}, 348 {0x05, 3900}, 349 {0x06, 2700}, 350 {0x07, 2100}, 351 }, 352 /* KXCTJ2-1009 */ 353 { 354 {0x08, 1240000}, 355 {0x09, 621000}, 356 {0x0A, 309000}, 357 {0x0B, 151000}, 358 {0, 80000}, 359 {0x01, 41000}, 360 {0x02, 21000}, 361 {0x03, 11000}, 362 {0x04, 6000}, 363 {0x05, 4000}, 364 {0x06, 3000}, 365 {0x07, 2000}, 366 }, 367 /* KXTF9 */ 368 { 369 {0x01, 81000}, 370 {0x02, 41000}, 371 {0x03, 21000}, 372 {0x04, 11000}, 373 {0x05, 5100}, 374 {0x06, 2700}, 375 }, 376 /* KX023-1025 */ 377 { 378 /* First 4 are not in datasheet, taken from KXCTJ2-1009 */ 379 {0x08, 1240000}, 380 {0x09, 621000}, 381 {0x0A, 309000}, 382 {0x0B, 151000}, 383 {0, 81000}, 384 {0x01, 40000}, 385 {0x02, 22000}, 386 {0x03, 12000}, 387 {0x04, 7000}, 388 {0x05, 4400}, 389 {0x06, 3000}, 390 {0x07, 3000}, 391 }, 392 }; 393 394 static const struct { 395 u16 scale; 396 u8 gsel_0; 397 u8 gsel_1; 398 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 399 {19163, 1, 0}, 400 {38326, 0, 1} }; 401 402 #ifdef CONFIG_ACPI 403 enum kiox010a_fn_index { 404 KIOX010A_SET_LAPTOP_MODE = 1, 405 KIOX010A_SET_TABLET_MODE = 2, 406 }; 407 408 static int kiox010a_dsm(struct device *dev, int fn_index) 409 { 410 acpi_handle handle = ACPI_HANDLE(dev); 411 guid_t kiox010a_dsm_guid; 412 union acpi_object *obj; 413 414 if (!handle) 415 return -ENODEV; 416 417 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid); 418 419 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL); 420 if (!obj) 421 return -EIO; 422 423 ACPI_FREE(obj); 424 return 0; 425 } 426 #endif 427 428 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 429 enum kxcjk1013_mode mode) 430 { 431 int ret; 432 433 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 434 if (ret < 0) { 435 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 436 return ret; 437 } 438 439 if (mode == STANDBY) 440 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 441 else 442 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 443 444 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 445 if (ret < 0) { 446 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 447 return ret; 448 } 449 450 return 0; 451 } 452 453 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 454 enum kxcjk1013_mode *mode) 455 { 456 int ret; 457 458 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 459 if (ret < 0) { 460 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 461 return ret; 462 } 463 464 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 465 *mode = OPERATION; 466 else 467 *mode = STANDBY; 468 469 return 0; 470 } 471 472 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 473 { 474 int ret; 475 476 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 477 if (ret < 0) { 478 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 479 return ret; 480 } 481 482 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | 483 KXCJK1013_REG_CTRL1_BIT_GSEL1); 484 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 485 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 486 487 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 488 if (ret < 0) { 489 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 490 return ret; 491 } 492 493 data->range = range_index; 494 495 return 0; 496 } 497 498 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 499 { 500 int ret; 501 502 #ifdef CONFIG_ACPI 503 if (data->acpi_type == ACPI_KIOX010A) { 504 /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */ 505 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE); 506 } 507 #endif 508 509 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 510 if (ret < 0) { 511 dev_err(&data->client->dev, "Error reading who_am_i\n"); 512 return ret; 513 } 514 515 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 516 517 ret = kxcjk1013_set_mode(data, STANDBY); 518 if (ret < 0) 519 return ret; 520 521 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 522 if (ret < 0) { 523 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 524 return ret; 525 } 526 527 /* Set 12 bit mode */ 528 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 529 530 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 531 if (ret < 0) { 532 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 533 return ret; 534 } 535 536 /* Setting range to 4G */ 537 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 538 if (ret < 0) 539 return ret; 540 541 ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl); 542 if (ret < 0) { 543 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 544 return ret; 545 } 546 547 data->odr_bits = ret; 548 549 /* Set up INT polarity */ 550 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 551 if (ret < 0) { 552 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 553 return ret; 554 } 555 556 if (data->active_high_intr) 557 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA; 558 else 559 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 560 561 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 562 if (ret < 0) { 563 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 564 return ret; 565 } 566 567 /* On KX023, route all used interrupts to INT1 for now */ 568 if (data->chipset == KX0231025 && data->client->irq > 0) { 569 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4, 570 KX023_REG_INC4_DRDY1 | 571 KX023_REG_INC4_WUFI1); 572 if (ret < 0) { 573 dev_err(&data->client->dev, "Error writing reg_inc4\n"); 574 return ret; 575 } 576 } 577 578 ret = kxcjk1013_set_mode(data, OPERATION); 579 if (ret < 0) 580 return ret; 581 582 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 583 584 return 0; 585 } 586 587 #ifdef CONFIG_PM 588 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 589 { 590 int i; 591 int idx = data->chipset; 592 593 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) { 594 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits) 595 return odr_start_up_times[idx][i].usec; 596 } 597 598 return KXCJK1013_MAX_STARTUP_TIME_US; 599 } 600 #endif 601 602 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 603 { 604 #ifdef CONFIG_PM 605 int ret; 606 607 if (on) 608 ret = pm_runtime_resume_and_get(&data->client->dev); 609 else { 610 pm_runtime_mark_last_busy(&data->client->dev); 611 ret = pm_runtime_put_autosuspend(&data->client->dev); 612 } 613 if (ret < 0) { 614 dev_err(&data->client->dev, 615 "Failed: %s for %d\n", __func__, on); 616 return ret; 617 } 618 #endif 619 620 return 0; 621 } 622 623 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 624 { 625 int ret; 626 627 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer, 628 data->wake_dur); 629 if (ret < 0) { 630 dev_err(&data->client->dev, 631 "Error writing reg_wake_timer\n"); 632 return ret; 633 } 634 635 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres, 636 data->wake_thres); 637 if (ret < 0) { 638 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 639 return ret; 640 } 641 642 return 0; 643 } 644 645 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, 646 bool status) 647 { 648 int ret; 649 enum kxcjk1013_mode store_mode; 650 651 ret = kxcjk1013_get_mode(data, &store_mode); 652 if (ret < 0) 653 return ret; 654 655 /* This is requirement by spec to change state to STANDBY */ 656 ret = kxcjk1013_set_mode(data, STANDBY); 657 if (ret < 0) 658 return ret; 659 660 ret = kxcjk1013_chip_update_thresholds(data); 661 if (ret < 0) 662 return ret; 663 664 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 665 if (ret < 0) { 666 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 667 return ret; 668 } 669 670 if (status) 671 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 672 else 673 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 674 675 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 676 if (ret < 0) { 677 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 678 return ret; 679 } 680 681 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 682 if (ret < 0) { 683 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 684 return ret; 685 } 686 687 if (status) 688 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 689 else 690 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 691 692 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 693 if (ret < 0) { 694 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 695 return ret; 696 } 697 698 if (store_mode == OPERATION) { 699 ret = kxcjk1013_set_mode(data, OPERATION); 700 if (ret < 0) 701 return ret; 702 } 703 704 return 0; 705 } 706 707 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, 708 bool status) 709 { 710 int ret; 711 enum kxcjk1013_mode store_mode; 712 713 ret = kxcjk1013_get_mode(data, &store_mode); 714 if (ret < 0) 715 return ret; 716 717 /* This is requirement by spec to change state to STANDBY */ 718 ret = kxcjk1013_set_mode(data, STANDBY); 719 if (ret < 0) 720 return ret; 721 722 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 723 if (ret < 0) { 724 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 725 return ret; 726 } 727 728 if (status) 729 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 730 else 731 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 732 733 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 734 if (ret < 0) { 735 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 736 return ret; 737 } 738 739 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 740 if (ret < 0) { 741 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 742 return ret; 743 } 744 745 if (status) 746 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 747 else 748 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 749 750 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 751 if (ret < 0) { 752 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 753 return ret; 754 } 755 756 if (store_mode == OPERATION) { 757 ret = kxcjk1013_set_mode(data, OPERATION); 758 if (ret < 0) 759 return ret; 760 } 761 762 return 0; 763 } 764 765 static const struct kx_odr_map *kxcjk1013_find_odr_value( 766 const struct kx_odr_map *map, size_t map_size, int val, int val2) 767 { 768 int i; 769 770 for (i = 0; i < map_size; ++i) { 771 if (map[i].val == val && map[i].val2 == val2) 772 return &map[i]; 773 } 774 775 return ERR_PTR(-EINVAL); 776 } 777 778 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map, 779 size_t map_size, int odr_bits, 780 int *val, int *val2) 781 { 782 int i; 783 784 for (i = 0; i < map_size; ++i) { 785 if (map[i].odr_bits == odr_bits) { 786 *val = map[i].val; 787 *val2 = map[i].val2; 788 return IIO_VAL_INT_PLUS_MICRO; 789 } 790 } 791 792 return -EINVAL; 793 } 794 795 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 796 { 797 int ret; 798 enum kxcjk1013_mode store_mode; 799 const struct kx_odr_map *odr_setting; 800 801 ret = kxcjk1013_get_mode(data, &store_mode); 802 if (ret < 0) 803 return ret; 804 805 if (data->chipset == KXTF9) 806 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table, 807 ARRAY_SIZE(kxtf9_samp_freq_table), 808 val, val2); 809 else 810 odr_setting = kxcjk1013_find_odr_value(samp_freq_table, 811 ARRAY_SIZE(samp_freq_table), 812 val, val2); 813 814 if (IS_ERR(odr_setting)) 815 return PTR_ERR(odr_setting); 816 817 /* To change ODR, the chip must be set to STANDBY as per spec */ 818 ret = kxcjk1013_set_mode(data, STANDBY); 819 if (ret < 0) 820 return ret; 821 822 ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl, 823 odr_setting->odr_bits); 824 if (ret < 0) { 825 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 826 return ret; 827 } 828 829 data->odr_bits = odr_setting->odr_bits; 830 831 ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl, 832 odr_setting->wuf_bits); 833 if (ret < 0) { 834 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 835 return ret; 836 } 837 838 if (store_mode == OPERATION) { 839 ret = kxcjk1013_set_mode(data, OPERATION); 840 if (ret < 0) 841 return ret; 842 } 843 844 return 0; 845 } 846 847 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 848 { 849 if (data->chipset == KXTF9) 850 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table, 851 ARRAY_SIZE(kxtf9_samp_freq_table), 852 data->odr_bits, val, val2); 853 else 854 return kxcjk1013_convert_odr_value(samp_freq_table, 855 ARRAY_SIZE(samp_freq_table), 856 data->odr_bits, val, val2); 857 } 858 859 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 860 { 861 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 862 int ret; 863 864 ret = i2c_smbus_read_word_data(data->client, reg); 865 if (ret < 0) { 866 dev_err(&data->client->dev, 867 "failed to read accel_%c registers\n", 'x' + axis); 868 return ret; 869 } 870 871 return ret; 872 } 873 874 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 875 { 876 int ret, i; 877 enum kxcjk1013_mode store_mode; 878 879 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 880 if (KXCJK1013_scale_table[i].scale == val) { 881 ret = kxcjk1013_get_mode(data, &store_mode); 882 if (ret < 0) 883 return ret; 884 885 ret = kxcjk1013_set_mode(data, STANDBY); 886 if (ret < 0) 887 return ret; 888 889 ret = kxcjk1013_set_range(data, i); 890 if (ret < 0) 891 return ret; 892 893 if (store_mode == OPERATION) { 894 ret = kxcjk1013_set_mode(data, OPERATION); 895 if (ret) 896 return ret; 897 } 898 899 return 0; 900 } 901 } 902 903 return -EINVAL; 904 } 905 906 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 907 struct iio_chan_spec const *chan, int *val, 908 int *val2, long mask) 909 { 910 struct kxcjk1013_data *data = iio_priv(indio_dev); 911 int ret; 912 913 switch (mask) { 914 case IIO_CHAN_INFO_RAW: 915 mutex_lock(&data->mutex); 916 if (iio_buffer_enabled(indio_dev)) 917 ret = -EBUSY; 918 else { 919 ret = kxcjk1013_set_power_state(data, true); 920 if (ret < 0) { 921 mutex_unlock(&data->mutex); 922 return ret; 923 } 924 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 925 if (ret < 0) { 926 kxcjk1013_set_power_state(data, false); 927 mutex_unlock(&data->mutex); 928 return ret; 929 } 930 *val = sign_extend32(ret >> chan->scan_type.shift, 931 chan->scan_type.realbits - 1); 932 ret = kxcjk1013_set_power_state(data, false); 933 } 934 mutex_unlock(&data->mutex); 935 936 if (ret < 0) 937 return ret; 938 939 return IIO_VAL_INT; 940 941 case IIO_CHAN_INFO_SCALE: 942 *val = 0; 943 *val2 = KXCJK1013_scale_table[data->range].scale; 944 return IIO_VAL_INT_PLUS_MICRO; 945 946 case IIO_CHAN_INFO_SAMP_FREQ: 947 mutex_lock(&data->mutex); 948 ret = kxcjk1013_get_odr(data, val, val2); 949 mutex_unlock(&data->mutex); 950 return ret; 951 952 default: 953 return -EINVAL; 954 } 955 } 956 957 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 958 struct iio_chan_spec const *chan, int val, 959 int val2, long mask) 960 { 961 struct kxcjk1013_data *data = iio_priv(indio_dev); 962 int ret; 963 964 switch (mask) { 965 case IIO_CHAN_INFO_SAMP_FREQ: 966 mutex_lock(&data->mutex); 967 ret = kxcjk1013_set_odr(data, val, val2); 968 mutex_unlock(&data->mutex); 969 break; 970 case IIO_CHAN_INFO_SCALE: 971 if (val) 972 return -EINVAL; 973 974 mutex_lock(&data->mutex); 975 ret = kxcjk1013_set_scale(data, val2); 976 mutex_unlock(&data->mutex); 977 break; 978 default: 979 ret = -EINVAL; 980 } 981 982 return ret; 983 } 984 985 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 986 const struct iio_chan_spec *chan, 987 enum iio_event_type type, 988 enum iio_event_direction dir, 989 enum iio_event_info info, 990 int *val, int *val2) 991 { 992 struct kxcjk1013_data *data = iio_priv(indio_dev); 993 994 *val2 = 0; 995 switch (info) { 996 case IIO_EV_INFO_VALUE: 997 *val = data->wake_thres; 998 break; 999 case IIO_EV_INFO_PERIOD: 1000 *val = data->wake_dur; 1001 break; 1002 default: 1003 return -EINVAL; 1004 } 1005 1006 return IIO_VAL_INT; 1007 } 1008 1009 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 1010 const struct iio_chan_spec *chan, 1011 enum iio_event_type type, 1012 enum iio_event_direction dir, 1013 enum iio_event_info info, 1014 int val, int val2) 1015 { 1016 struct kxcjk1013_data *data = iio_priv(indio_dev); 1017 1018 if (data->ev_enable_state) 1019 return -EBUSY; 1020 1021 switch (info) { 1022 case IIO_EV_INFO_VALUE: 1023 data->wake_thres = val; 1024 break; 1025 case IIO_EV_INFO_PERIOD: 1026 data->wake_dur = val; 1027 break; 1028 default: 1029 return -EINVAL; 1030 } 1031 1032 return 0; 1033 } 1034 1035 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 1036 const struct iio_chan_spec *chan, 1037 enum iio_event_type type, 1038 enum iio_event_direction dir) 1039 { 1040 struct kxcjk1013_data *data = iio_priv(indio_dev); 1041 1042 return data->ev_enable_state; 1043 } 1044 1045 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 1046 const struct iio_chan_spec *chan, 1047 enum iio_event_type type, 1048 enum iio_event_direction dir, 1049 int state) 1050 { 1051 struct kxcjk1013_data *data = iio_priv(indio_dev); 1052 int ret; 1053 1054 if (state && data->ev_enable_state) 1055 return 0; 1056 1057 mutex_lock(&data->mutex); 1058 1059 if (!state && data->motion_trigger_on) { 1060 data->ev_enable_state = 0; 1061 mutex_unlock(&data->mutex); 1062 return 0; 1063 } 1064 1065 /* 1066 * We will expect the enable and disable to do operation in 1067 * in reverse order. This will happen here anyway as our 1068 * resume operation uses sync mode runtime pm calls, the 1069 * suspend operation will be delayed by autosuspend delay 1070 * So the disable operation will still happen in reverse of 1071 * enable operation. When runtime pm is disabled the mode 1072 * is always on so sequence doesn't matter 1073 */ 1074 ret = kxcjk1013_set_power_state(data, state); 1075 if (ret < 0) { 1076 mutex_unlock(&data->mutex); 1077 return ret; 1078 } 1079 1080 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1081 if (ret < 0) { 1082 kxcjk1013_set_power_state(data, false); 1083 data->ev_enable_state = 0; 1084 mutex_unlock(&data->mutex); 1085 return ret; 1086 } 1087 1088 data->ev_enable_state = state; 1089 mutex_unlock(&data->mutex); 1090 1091 return 0; 1092 } 1093 1094 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev) 1095 { 1096 struct kxcjk1013_data *data = iio_priv(indio_dev); 1097 1098 return kxcjk1013_set_power_state(data, true); 1099 } 1100 1101 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev) 1102 { 1103 struct kxcjk1013_data *data = iio_priv(indio_dev); 1104 1105 return kxcjk1013_set_power_state(data, false); 1106 } 1107 1108 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev, 1109 struct device_attribute *attr, 1110 char *buf) 1111 { 1112 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 1113 struct kxcjk1013_data *data = iio_priv(indio_dev); 1114 const char *str; 1115 1116 if (data->chipset == KXTF9) 1117 str = kxtf9_samp_freq_avail; 1118 else 1119 str = kxcjk1013_samp_freq_avail; 1120 1121 return sprintf(buf, "%s\n", str); 1122 } 1123 1124 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO, 1125 kxcjk1013_get_samp_freq_avail, NULL, 0); 1126 1127 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 1128 1129 static struct attribute *kxcjk1013_attributes[] = { 1130 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr, 1131 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1132 NULL, 1133 }; 1134 1135 static const struct attribute_group kxcjk1013_attrs_group = { 1136 .attrs = kxcjk1013_attributes, 1137 }; 1138 1139 static const struct iio_event_spec kxcjk1013_event = { 1140 .type = IIO_EV_TYPE_THRESH, 1141 .dir = IIO_EV_DIR_EITHER, 1142 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 1143 BIT(IIO_EV_INFO_ENABLE) | 1144 BIT(IIO_EV_INFO_PERIOD) 1145 }; 1146 1147 static const struct iio_mount_matrix * 1148 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev, 1149 const struct iio_chan_spec *chan) 1150 { 1151 struct kxcjk1013_data *data = iio_priv(indio_dev); 1152 1153 return &data->orientation; 1154 } 1155 1156 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = { 1157 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix), 1158 { } 1159 }; 1160 1161 #define KXCJK1013_CHANNEL(_axis) { \ 1162 .type = IIO_ACCEL, \ 1163 .modified = 1, \ 1164 .channel2 = IIO_MOD_##_axis, \ 1165 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 1166 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 1167 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 1168 .scan_index = AXIS_##_axis, \ 1169 .scan_type = { \ 1170 .sign = 's', \ 1171 .realbits = 12, \ 1172 .storagebits = 16, \ 1173 .shift = 4, \ 1174 .endianness = IIO_LE, \ 1175 }, \ 1176 .event_spec = &kxcjk1013_event, \ 1177 .ext_info = kxcjk1013_ext_info, \ 1178 .num_event_specs = 1 \ 1179 } 1180 1181 static const struct iio_chan_spec kxcjk1013_channels[] = { 1182 KXCJK1013_CHANNEL(X), 1183 KXCJK1013_CHANNEL(Y), 1184 KXCJK1013_CHANNEL(Z), 1185 IIO_CHAN_SOFT_TIMESTAMP(3), 1186 }; 1187 1188 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1189 .preenable = kxcjk1013_buffer_preenable, 1190 .postdisable = kxcjk1013_buffer_postdisable, 1191 }; 1192 1193 static const struct iio_info kxcjk1013_info = { 1194 .attrs = &kxcjk1013_attrs_group, 1195 .read_raw = kxcjk1013_read_raw, 1196 .write_raw = kxcjk1013_write_raw, 1197 .read_event_value = kxcjk1013_read_event, 1198 .write_event_value = kxcjk1013_write_event, 1199 .write_event_config = kxcjk1013_write_event_config, 1200 .read_event_config = kxcjk1013_read_event_config, 1201 }; 1202 1203 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 1204 1205 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 1206 { 1207 struct iio_poll_func *pf = p; 1208 struct iio_dev *indio_dev = pf->indio_dev; 1209 struct kxcjk1013_data *data = iio_priv(indio_dev); 1210 int ret; 1211 1212 mutex_lock(&data->mutex); 1213 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 1214 KXCJK1013_REG_XOUT_L, 1215 AXIS_MAX * 2, 1216 (u8 *)data->scan.chans); 1217 mutex_unlock(&data->mutex); 1218 if (ret < 0) 1219 goto err; 1220 1221 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, 1222 data->timestamp); 1223 err: 1224 iio_trigger_notify_done(indio_dev->trig); 1225 1226 return IRQ_HANDLED; 1227 } 1228 1229 static void kxcjk1013_trig_reen(struct iio_trigger *trig) 1230 { 1231 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1232 struct kxcjk1013_data *data = iio_priv(indio_dev); 1233 int ret; 1234 1235 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1236 if (ret < 0) 1237 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1238 } 1239 1240 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 1241 bool state) 1242 { 1243 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1244 struct kxcjk1013_data *data = iio_priv(indio_dev); 1245 int ret; 1246 1247 mutex_lock(&data->mutex); 1248 1249 if (!state && data->ev_enable_state && data->motion_trigger_on) { 1250 data->motion_trigger_on = false; 1251 mutex_unlock(&data->mutex); 1252 return 0; 1253 } 1254 1255 ret = kxcjk1013_set_power_state(data, state); 1256 if (ret < 0) { 1257 mutex_unlock(&data->mutex); 1258 return ret; 1259 } 1260 if (data->motion_trig == trig) 1261 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1262 else 1263 ret = kxcjk1013_setup_new_data_interrupt(data, state); 1264 if (ret < 0) { 1265 kxcjk1013_set_power_state(data, false); 1266 mutex_unlock(&data->mutex); 1267 return ret; 1268 } 1269 if (data->motion_trig == trig) 1270 data->motion_trigger_on = state; 1271 else 1272 data->dready_trigger_on = state; 1273 1274 mutex_unlock(&data->mutex); 1275 1276 return 0; 1277 } 1278 1279 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1280 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1281 .reenable = kxcjk1013_trig_reen, 1282 }; 1283 1284 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev) 1285 { 1286 struct kxcjk1013_data *data = iio_priv(indio_dev); 1287 1288 int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2); 1289 if (ret < 0) { 1290 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1291 return; 1292 } 1293 1294 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1295 iio_push_event(indio_dev, 1296 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1297 0, 1298 IIO_MOD_X, 1299 IIO_EV_TYPE_THRESH, 1300 IIO_EV_DIR_FALLING), 1301 data->timestamp); 1302 1303 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1304 iio_push_event(indio_dev, 1305 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1306 0, 1307 IIO_MOD_X, 1308 IIO_EV_TYPE_THRESH, 1309 IIO_EV_DIR_RISING), 1310 data->timestamp); 1311 1312 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1313 iio_push_event(indio_dev, 1314 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1315 0, 1316 IIO_MOD_Y, 1317 IIO_EV_TYPE_THRESH, 1318 IIO_EV_DIR_FALLING), 1319 data->timestamp); 1320 1321 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1322 iio_push_event(indio_dev, 1323 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1324 0, 1325 IIO_MOD_Y, 1326 IIO_EV_TYPE_THRESH, 1327 IIO_EV_DIR_RISING), 1328 data->timestamp); 1329 1330 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1331 iio_push_event(indio_dev, 1332 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1333 0, 1334 IIO_MOD_Z, 1335 IIO_EV_TYPE_THRESH, 1336 IIO_EV_DIR_FALLING), 1337 data->timestamp); 1338 1339 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1340 iio_push_event(indio_dev, 1341 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1342 0, 1343 IIO_MOD_Z, 1344 IIO_EV_TYPE_THRESH, 1345 IIO_EV_DIR_RISING), 1346 data->timestamp); 1347 } 1348 1349 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1350 { 1351 struct iio_dev *indio_dev = private; 1352 struct kxcjk1013_data *data = iio_priv(indio_dev); 1353 int ret; 1354 1355 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1); 1356 if (ret < 0) { 1357 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1358 goto ack_intr; 1359 } 1360 1361 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) { 1362 if (data->chipset == KXTF9) 1363 iio_push_event(indio_dev, 1364 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1365 0, 1366 IIO_MOD_X_AND_Y_AND_Z, 1367 IIO_EV_TYPE_THRESH, 1368 IIO_EV_DIR_RISING), 1369 data->timestamp); 1370 else 1371 kxcjk1013_report_motion_event(indio_dev); 1372 } 1373 1374 ack_intr: 1375 if (data->dready_trigger_on) 1376 return IRQ_HANDLED; 1377 1378 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1379 if (ret < 0) 1380 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1381 1382 return IRQ_HANDLED; 1383 } 1384 1385 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1386 { 1387 struct iio_dev *indio_dev = private; 1388 struct kxcjk1013_data *data = iio_priv(indio_dev); 1389 1390 data->timestamp = iio_get_time_ns(indio_dev); 1391 1392 if (data->dready_trigger_on) 1393 iio_trigger_poll(data->dready_trig); 1394 else if (data->motion_trigger_on) 1395 iio_trigger_poll(data->motion_trig); 1396 1397 if (data->ev_enable_state) 1398 return IRQ_WAKE_THREAD; 1399 else 1400 return IRQ_HANDLED; 1401 } 1402 1403 static const char *kxcjk1013_match_acpi_device(struct device *dev, 1404 enum kx_chipset *chipset, 1405 enum kx_acpi_type *acpi_type, 1406 const char **label) 1407 { 1408 const struct acpi_device_id *id; 1409 1410 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1411 if (!id) 1412 return NULL; 1413 1414 if (strcmp(id->id, "SMO8500") == 0) { 1415 *acpi_type = ACPI_SMO8500; 1416 } else if (strcmp(id->id, "KIOX010A") == 0) { 1417 *acpi_type = ACPI_KIOX010A; 1418 *label = "accel-display"; 1419 } else if (strcmp(id->id, "KIOX020A") == 0) { 1420 *label = "accel-base"; 1421 } 1422 1423 *chipset = (enum kx_chipset)id->driver_data; 1424 1425 return dev_name(dev); 1426 } 1427 1428 static void kxcjk1013_disable_regulators(void *d) 1429 { 1430 struct kxcjk1013_data *data = d; 1431 1432 regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators); 1433 } 1434 1435 static int kxcjk1013_probe(struct i2c_client *client, 1436 const struct i2c_device_id *id) 1437 { 1438 struct kxcjk1013_data *data; 1439 struct iio_dev *indio_dev; 1440 struct kxcjk_1013_platform_data *pdata; 1441 const char *name; 1442 int ret; 1443 1444 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1445 if (!indio_dev) 1446 return -ENOMEM; 1447 1448 data = iio_priv(indio_dev); 1449 i2c_set_clientdata(client, indio_dev); 1450 data->client = client; 1451 1452 pdata = dev_get_platdata(&client->dev); 1453 if (pdata) { 1454 data->active_high_intr = pdata->active_high_intr; 1455 data->orientation = pdata->orientation; 1456 } else { 1457 data->active_high_intr = true; /* default polarity */ 1458 1459 ret = iio_read_mount_matrix(&client->dev, &data->orientation); 1460 if (ret) 1461 return ret; 1462 } 1463 1464 data->regulators[0].supply = "vdd"; 1465 data->regulators[1].supply = "vddio"; 1466 ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(data->regulators), 1467 data->regulators); 1468 if (ret) 1469 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n"); 1470 1471 ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators), 1472 data->regulators); 1473 if (ret) 1474 return ret; 1475 1476 ret = devm_add_action_or_reset(&client->dev, kxcjk1013_disable_regulators, data); 1477 if (ret) 1478 return ret; 1479 1480 /* 1481 * A typical delay of 10ms is required for powering up 1482 * according to the data sheets of supported chips. 1483 * Hence double that to play safe. 1484 */ 1485 msleep(20); 1486 1487 if (id) { 1488 data->chipset = (enum kx_chipset)(id->driver_data); 1489 name = id->name; 1490 } else if (ACPI_HANDLE(&client->dev)) { 1491 name = kxcjk1013_match_acpi_device(&client->dev, 1492 &data->chipset, 1493 &data->acpi_type, 1494 &indio_dev->label); 1495 } else 1496 return -ENODEV; 1497 1498 switch (data->chipset) { 1499 case KXCJK1013: 1500 case KXCJ91008: 1501 case KXTJ21009: 1502 data->regs = &kxcjk1013_regs; 1503 break; 1504 case KXTF9: 1505 data->regs = &kxtf9_regs; 1506 break; 1507 case KX0231025: 1508 data->regs = &kx0231025_regs; 1509 break; 1510 default: 1511 return -EINVAL; 1512 } 1513 1514 ret = kxcjk1013_chip_init(data); 1515 if (ret < 0) 1516 return ret; 1517 1518 mutex_init(&data->mutex); 1519 1520 indio_dev->channels = kxcjk1013_channels; 1521 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1522 indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1523 indio_dev->name = name; 1524 indio_dev->modes = INDIO_DIRECT_MODE; 1525 indio_dev->info = &kxcjk1013_info; 1526 1527 if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) { 1528 ret = devm_request_threaded_irq(&client->dev, client->irq, 1529 kxcjk1013_data_rdy_trig_poll, 1530 kxcjk1013_event_handler, 1531 IRQF_TRIGGER_RISING, 1532 KXCJK1013_IRQ_NAME, 1533 indio_dev); 1534 if (ret) 1535 goto err_poweroff; 1536 1537 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1538 "%s-dev%d", 1539 indio_dev->name, 1540 iio_device_id(indio_dev)); 1541 if (!data->dready_trig) { 1542 ret = -ENOMEM; 1543 goto err_poweroff; 1544 } 1545 1546 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1547 "%s-any-motion-dev%d", 1548 indio_dev->name, 1549 iio_device_id(indio_dev)); 1550 if (!data->motion_trig) { 1551 ret = -ENOMEM; 1552 goto err_poweroff; 1553 } 1554 1555 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1556 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1557 indio_dev->trig = data->dready_trig; 1558 iio_trigger_get(indio_dev->trig); 1559 ret = iio_trigger_register(data->dready_trig); 1560 if (ret) 1561 goto err_poweroff; 1562 1563 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1564 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1565 ret = iio_trigger_register(data->motion_trig); 1566 if (ret) { 1567 data->motion_trig = NULL; 1568 goto err_trigger_unregister; 1569 } 1570 } 1571 1572 ret = iio_triggered_buffer_setup(indio_dev, 1573 &iio_pollfunc_store_time, 1574 kxcjk1013_trigger_handler, 1575 &kxcjk1013_buffer_setup_ops); 1576 if (ret < 0) { 1577 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1578 goto err_trigger_unregister; 1579 } 1580 1581 ret = pm_runtime_set_active(&client->dev); 1582 if (ret) 1583 goto err_buffer_cleanup; 1584 1585 pm_runtime_enable(&client->dev); 1586 pm_runtime_set_autosuspend_delay(&client->dev, 1587 KXCJK1013_SLEEP_DELAY_MS); 1588 pm_runtime_use_autosuspend(&client->dev); 1589 1590 ret = iio_device_register(indio_dev); 1591 if (ret < 0) { 1592 dev_err(&client->dev, "unable to register iio device\n"); 1593 goto err_buffer_cleanup; 1594 } 1595 1596 return 0; 1597 1598 err_buffer_cleanup: 1599 iio_triggered_buffer_cleanup(indio_dev); 1600 err_trigger_unregister: 1601 if (data->dready_trig) 1602 iio_trigger_unregister(data->dready_trig); 1603 if (data->motion_trig) 1604 iio_trigger_unregister(data->motion_trig); 1605 err_poweroff: 1606 kxcjk1013_set_mode(data, STANDBY); 1607 1608 return ret; 1609 } 1610 1611 static int kxcjk1013_remove(struct i2c_client *client) 1612 { 1613 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1614 struct kxcjk1013_data *data = iio_priv(indio_dev); 1615 1616 iio_device_unregister(indio_dev); 1617 1618 pm_runtime_disable(&client->dev); 1619 pm_runtime_set_suspended(&client->dev); 1620 1621 iio_triggered_buffer_cleanup(indio_dev); 1622 if (data->dready_trig) { 1623 iio_trigger_unregister(data->dready_trig); 1624 iio_trigger_unregister(data->motion_trig); 1625 } 1626 1627 mutex_lock(&data->mutex); 1628 kxcjk1013_set_mode(data, STANDBY); 1629 mutex_unlock(&data->mutex); 1630 1631 return 0; 1632 } 1633 1634 #ifdef CONFIG_PM_SLEEP 1635 static int kxcjk1013_suspend(struct device *dev) 1636 { 1637 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1638 struct kxcjk1013_data *data = iio_priv(indio_dev); 1639 int ret; 1640 1641 mutex_lock(&data->mutex); 1642 ret = kxcjk1013_set_mode(data, STANDBY); 1643 mutex_unlock(&data->mutex); 1644 1645 return ret; 1646 } 1647 1648 static int kxcjk1013_resume(struct device *dev) 1649 { 1650 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1651 struct kxcjk1013_data *data = iio_priv(indio_dev); 1652 int ret = 0; 1653 1654 mutex_lock(&data->mutex); 1655 ret = kxcjk1013_set_mode(data, OPERATION); 1656 if (ret == 0) 1657 ret = kxcjk1013_set_range(data, data->range); 1658 mutex_unlock(&data->mutex); 1659 1660 return ret; 1661 } 1662 #endif 1663 1664 #ifdef CONFIG_PM 1665 static int kxcjk1013_runtime_suspend(struct device *dev) 1666 { 1667 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1668 struct kxcjk1013_data *data = iio_priv(indio_dev); 1669 int ret; 1670 1671 ret = kxcjk1013_set_mode(data, STANDBY); 1672 if (ret < 0) { 1673 dev_err(&data->client->dev, "powering off device failed\n"); 1674 return -EAGAIN; 1675 } 1676 return 0; 1677 } 1678 1679 static int kxcjk1013_runtime_resume(struct device *dev) 1680 { 1681 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1682 struct kxcjk1013_data *data = iio_priv(indio_dev); 1683 int ret; 1684 int sleep_val; 1685 1686 ret = kxcjk1013_set_mode(data, OPERATION); 1687 if (ret < 0) 1688 return ret; 1689 1690 sleep_val = kxcjk1013_get_startup_times(data); 1691 if (sleep_val < 20000) 1692 usleep_range(sleep_val, 20000); 1693 else 1694 msleep_interruptible(sleep_val/1000); 1695 1696 return 0; 1697 } 1698 #endif 1699 1700 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1701 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1702 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, 1703 kxcjk1013_runtime_resume, NULL) 1704 }; 1705 1706 static const struct acpi_device_id kx_acpi_match[] = { 1707 {"KXCJ1013", KXCJK1013}, 1708 {"KXCJ1008", KXCJ91008}, 1709 {"KXCJ9000", KXCJ91008}, 1710 {"KIOX0008", KXCJ91008}, 1711 {"KIOX0009", KXTJ21009}, 1712 {"KIOX000A", KXCJ91008}, 1713 {"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */ 1714 {"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */ 1715 {"KXTJ1009", KXTJ21009}, 1716 {"KXJ2109", KXTJ21009}, 1717 {"SMO8500", KXCJ91008}, 1718 { }, 1719 }; 1720 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1721 1722 static const struct i2c_device_id kxcjk1013_id[] = { 1723 {"kxcjk1013", KXCJK1013}, 1724 {"kxcj91008", KXCJ91008}, 1725 {"kxtj21009", KXTJ21009}, 1726 {"kxtf9", KXTF9}, 1727 {"kx023-1025", KX0231025}, 1728 {"SMO8500", KXCJ91008}, 1729 {} 1730 }; 1731 1732 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1733 1734 static const struct of_device_id kxcjk1013_of_match[] = { 1735 { .compatible = "kionix,kxcjk1013", }, 1736 { .compatible = "kionix,kxcj91008", }, 1737 { .compatible = "kionix,kxtj21009", }, 1738 { .compatible = "kionix,kxtf9", }, 1739 { .compatible = "kionix,kx023-1025", }, 1740 { } 1741 }; 1742 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match); 1743 1744 static struct i2c_driver kxcjk1013_driver = { 1745 .driver = { 1746 .name = KXCJK1013_DRV_NAME, 1747 .acpi_match_table = ACPI_PTR(kx_acpi_match), 1748 .of_match_table = kxcjk1013_of_match, 1749 .pm = &kxcjk1013_pm_ops, 1750 }, 1751 .probe = kxcjk1013_probe, 1752 .remove = kxcjk1013_remove, 1753 .id_table = kxcjk1013_id, 1754 }; 1755 module_i2c_driver(kxcjk1013_driver); 1756 1757 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1758 MODULE_LICENSE("GPL v2"); 1759 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1760