xref: /openbmc/linux/drivers/iio/accel/kxcjk-1013.c (revision f3956ebb)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * KXCJK-1013 3-axis accelerometer driver
4  * Copyright (c) 2014, Intel Corporation.
5  */
6 
7 #include <linux/module.h>
8 #include <linux/i2c.h>
9 #include <linux/interrupt.h>
10 #include <linux/delay.h>
11 #include <linux/bitops.h>
12 #include <linux/slab.h>
13 #include <linux/string.h>
14 #include <linux/acpi.h>
15 #include <linux/pm.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/trigger.h>
22 #include <linux/iio/events.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/triggered_buffer.h>
25 #include <linux/iio/accel/kxcjk_1013.h>
26 
27 #define KXCJK1013_DRV_NAME "kxcjk1013"
28 #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
29 
30 #define KXTF9_REG_HP_XOUT_L		0x00
31 #define KXTF9_REG_HP_XOUT_H		0x01
32 #define KXTF9_REG_HP_YOUT_L		0x02
33 #define KXTF9_REG_HP_YOUT_H		0x03
34 #define KXTF9_REG_HP_ZOUT_L		0x04
35 #define KXTF9_REG_HP_ZOUT_H		0x05
36 
37 #define KXCJK1013_REG_XOUT_L		0x06
38 /*
39  * From low byte X axis register, all the other addresses of Y and Z can be
40  * obtained by just applying axis offset. The following axis defines are just
41  * provide clarity, but not used.
42  */
43 #define KXCJK1013_REG_XOUT_H		0x07
44 #define KXCJK1013_REG_YOUT_L		0x08
45 #define KXCJK1013_REG_YOUT_H		0x09
46 #define KXCJK1013_REG_ZOUT_L		0x0A
47 #define KXCJK1013_REG_ZOUT_H		0x0B
48 
49 #define KXCJK1013_REG_DCST_RESP		0x0C
50 #define KXCJK1013_REG_WHO_AM_I		0x0F
51 #define KXTF9_REG_TILT_POS_CUR		0x10
52 #define KXTF9_REG_TILT_POS_PREV		0x11
53 #define KXTF9_REG_INT_SRC1		0x15
54 #define KXTF9_REG_INT_SRC2		0x16
55 #define KXCJK1013_REG_INT_SRC1		0x16
56 #define KXCJK1013_REG_INT_SRC2		0x17
57 #define KXCJK1013_REG_STATUS_REG	0x18
58 #define KXCJK1013_REG_INT_REL		0x1A
59 #define KXCJK1013_REG_CTRL1		0x1B
60 #define KXTF9_REG_CTRL2			0x1C
61 #define KXTF9_REG_CTRL3			0x1D
62 #define KXCJK1013_REG_CTRL2		0x1D
63 #define KXCJK1013_REG_INT_CTRL1		0x1E
64 #define KXCJK1013_REG_INT_CTRL2		0x1F
65 #define KXTF9_REG_INT_CTRL3		0x20
66 #define KXCJK1013_REG_DATA_CTRL		0x21
67 #define KXTF9_REG_TILT_TIMER		0x28
68 #define KXCJK1013_REG_WAKE_TIMER	0x29
69 #define KXTF9_REG_TDT_TIMER		0x2B
70 #define KXTF9_REG_TDT_THRESH_H		0x2C
71 #define KXTF9_REG_TDT_THRESH_L		0x2D
72 #define KXTF9_REG_TDT_TAP_TIMER		0x2E
73 #define KXTF9_REG_TDT_TOTAL_TIMER	0x2F
74 #define KXTF9_REG_TDT_LATENCY_TIMER	0x30
75 #define KXTF9_REG_TDT_WINDOW_TIMER	0x31
76 #define KXCJK1013_REG_SELF_TEST		0x3A
77 #define KXTF9_REG_WAKE_THRESH		0x5A
78 #define KXTF9_REG_TILT_ANGLE		0x5C
79 #define KXTF9_REG_HYST_SET		0x5F
80 #define KXCJK1013_REG_WAKE_THRES	0x6A
81 
82 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */
83 #define KX023_REG_INS1			0x12
84 #define KX023_REG_INS2			0x13
85 #define KX023_REG_INS3			0x14
86 #define KX023_REG_STAT			0x15
87 #define KX023_REG_INT_REL		0x17
88 #define KX023_REG_CNTL1			0x18
89 #define KX023_REG_CNTL2			0x19
90 #define KX023_REG_CNTL3			0x1A
91 #define KX023_REG_ODCNTL		0x1B
92 #define KX023_REG_INC1			0x1C
93 #define KX023_REG_INC2			0x1D
94 #define KX023_REG_INC3			0x1E
95 #define KX023_REG_INC4			0x1F
96 #define KX023_REG_INC5			0x20
97 #define KX023_REG_INC6			0x21
98 #define KX023_REG_TILT_TIMER		0x22
99 #define KX023_REG_WUFC			0x23
100 #define KX023_REG_TDTRC			0x24
101 #define KX023_REG_TDTC			0x25
102 #define KX023_REG_TTH			0x26
103 #define KX023_REG_TTL			0x27
104 #define KX023_REG_FTD			0x28
105 #define KX023_REG_STD			0x29
106 #define KX023_REG_TLT			0x2A
107 #define KX023_REG_TWS			0x2B
108 #define KX023_REG_ATH			0x30
109 #define KX023_REG_TILT_ANGLE_LL		0x32
110 #define KX023_REG_TILT_ANGLE_HL		0x33
111 #define KX023_REG_HYST_SET		0x34
112 #define KX023_REG_LP_CNTL		0x35
113 #define KX023_REG_BUF_CNTL1		0x3A
114 #define KX023_REG_BUF_CNTL2		0x3B
115 #define KX023_REG_BUF_STATUS_1		0x3C
116 #define KX023_REG_BUF_STATUS_2		0x3D
117 #define KX023_REG_BUF_CLEAR		0x3E
118 #define KX023_REG_BUF_READ		0x3F
119 #define KX023_REG_SELF_TEST		0x60
120 
121 #define KXCJK1013_REG_CTRL1_BIT_PC1	BIT(7)
122 #define KXCJK1013_REG_CTRL1_BIT_RES	BIT(6)
123 #define KXCJK1013_REG_CTRL1_BIT_DRDY	BIT(5)
124 #define KXCJK1013_REG_CTRL1_BIT_GSEL1	BIT(4)
125 #define KXCJK1013_REG_CTRL1_BIT_GSEL0	BIT(3)
126 #define KXCJK1013_REG_CTRL1_BIT_WUFE	BIT(1)
127 
128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU	BIT(2)	/* KXTF9 */
129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL	BIT(3)
130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA	BIT(4)
131 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN	BIT(5)
132 
133 #define KXTF9_REG_TILT_BIT_LEFT_EDGE	BIT(5)
134 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE	BIT(4)
135 #define KXTF9_REG_TILT_BIT_LOWER_EDGE	BIT(3)
136 #define KXTF9_REG_TILT_BIT_UPPER_EDGE	BIT(2)
137 #define KXTF9_REG_TILT_BIT_FACE_DOWN	BIT(1)
138 #define KXTF9_REG_TILT_BIT_FACE_UP	BIT(0)
139 
140 #define KXCJK1013_DATA_MASK_12_BIT	0x0FFF
141 #define KXCJK1013_MAX_STARTUP_TIME_US	100000
142 
143 #define KXCJK1013_SLEEP_DELAY_MS	2000
144 
145 #define KXCJK1013_REG_INT_SRC1_BIT_TPS	BIT(0)	/* KXTF9 */
146 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS	BIT(1)
147 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS	(BIT(2) | BIT(3))	/* KXTF9 */
148 #define KXCJK1013_REG_INT_SRC1_TAP_NONE		0
149 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE		BIT(2)
150 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE		BIT(3)
151 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY	BIT(4)
152 
153 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */
154 #define KXCJK1013_REG_INT_SRC2_BIT_ZP	BIT(0)
155 #define KXCJK1013_REG_INT_SRC2_BIT_ZN	BIT(1)
156 #define KXCJK1013_REG_INT_SRC2_BIT_YP	BIT(2)
157 #define KXCJK1013_REG_INT_SRC2_BIT_YN	BIT(3)
158 #define KXCJK1013_REG_INT_SRC2_BIT_XP	BIT(4)
159 #define KXCJK1013_REG_INT_SRC2_BIT_XN	BIT(5)
160 
161 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */
162 #define KX023_REG_INC4_BFI1		BIT(6)
163 #define KX023_REG_INC4_WMI1		BIT(5)
164 #define KX023_REG_INC4_DRDY1		BIT(4)
165 #define KX023_REG_INC4_TDTI1		BIT(2)
166 #define KX023_REG_INC4_WUFI1		BIT(1)
167 #define KX023_REG_INC4_TPI1		BIT(0)
168 
169 #define KXCJK1013_DEFAULT_WAKE_THRES	1
170 
171 enum kx_chipset {
172 	KXCJK1013,
173 	KXCJ91008,
174 	KXTJ21009,
175 	KXTF9,
176 	KX0231025,
177 	KX_MAX_CHIPS /* this must be last */
178 };
179 
180 enum kx_acpi_type {
181 	ACPI_GENERIC,
182 	ACPI_SMO8500,
183 	ACPI_KIOX010A,
184 };
185 
186 struct kx_chipset_regs {
187 	u8 int_src1;
188 	u8 int_src2;
189 	u8 int_rel;
190 	u8 ctrl1;
191 	u8 wuf_ctrl;
192 	u8 int_ctrl1;
193 	u8 data_ctrl;
194 	u8 wake_timer;
195 	u8 wake_thres;
196 };
197 
198 static const struct kx_chipset_regs kxcjk1013_regs = {
199 	.int_src1	= KXCJK1013_REG_INT_SRC1,
200 	.int_src2	= KXCJK1013_REG_INT_SRC2,
201 	.int_rel	= KXCJK1013_REG_INT_REL,
202 	.ctrl1		= KXCJK1013_REG_CTRL1,
203 	.wuf_ctrl	= KXCJK1013_REG_CTRL2,
204 	.int_ctrl1	= KXCJK1013_REG_INT_CTRL1,
205 	.data_ctrl	= KXCJK1013_REG_DATA_CTRL,
206 	.wake_timer	= KXCJK1013_REG_WAKE_TIMER,
207 	.wake_thres	= KXCJK1013_REG_WAKE_THRES,
208 };
209 
210 static const struct kx_chipset_regs kxtf9_regs = {
211 	/* .int_src1 was moved to INT_SRC2 on KXTF9 */
212 	.int_src1	= KXTF9_REG_INT_SRC2,
213 	/* .int_src2 is not available */
214 	.int_rel	= KXCJK1013_REG_INT_REL,
215 	.ctrl1		= KXCJK1013_REG_CTRL1,
216 	.wuf_ctrl	= KXTF9_REG_CTRL3,
217 	.int_ctrl1	= KXCJK1013_REG_INT_CTRL1,
218 	.data_ctrl	= KXCJK1013_REG_DATA_CTRL,
219 	.wake_timer	= KXCJK1013_REG_WAKE_TIMER,
220 	.wake_thres	= KXTF9_REG_WAKE_THRESH,
221 };
222 
223 /* The registers have totally different names but the bits are compatible */
224 static const struct kx_chipset_regs kx0231025_regs = {
225 	.int_src1	= KX023_REG_INS2,
226 	.int_src2	= KX023_REG_INS3,
227 	.int_rel	= KX023_REG_INT_REL,
228 	.ctrl1		= KX023_REG_CNTL1,
229 	.wuf_ctrl	= KX023_REG_CNTL3,
230 	.int_ctrl1	= KX023_REG_INC1,
231 	.data_ctrl	= KX023_REG_ODCNTL,
232 	.wake_timer	= KX023_REG_WUFC,
233 	.wake_thres	= KX023_REG_ATH,
234 };
235 
236 enum kxcjk1013_axis {
237 	AXIS_X,
238 	AXIS_Y,
239 	AXIS_Z,
240 	AXIS_MAX
241 };
242 
243 struct kxcjk1013_data {
244 	struct regulator_bulk_data regulators[2];
245 	struct i2c_client *client;
246 	struct iio_trigger *dready_trig;
247 	struct iio_trigger *motion_trig;
248 	struct iio_mount_matrix orientation;
249 	struct mutex mutex;
250 	/* Ensure timestamp naturally aligned */
251 	struct {
252 		s16 chans[AXIS_MAX];
253 		s64 timestamp __aligned(8);
254 	} scan;
255 	u8 odr_bits;
256 	u8 range;
257 	int wake_thres;
258 	int wake_dur;
259 	bool active_high_intr;
260 	bool dready_trigger_on;
261 	int ev_enable_state;
262 	bool motion_trigger_on;
263 	int64_t timestamp;
264 	enum kx_chipset chipset;
265 	enum kx_acpi_type acpi_type;
266 	const struct kx_chipset_regs *regs;
267 };
268 
269 enum kxcjk1013_mode {
270 	STANDBY,
271 	OPERATION,
272 };
273 
274 enum kxcjk1013_range {
275 	KXCJK1013_RANGE_2G,
276 	KXCJK1013_RANGE_4G,
277 	KXCJK1013_RANGE_8G,
278 };
279 
280 struct kx_odr_map {
281 	int val;
282 	int val2;
283 	int odr_bits;
284 	int wuf_bits;
285 };
286 
287 static const struct kx_odr_map samp_freq_table[] = {
288 	{ 0, 781000, 0x08, 0x00 },
289 	{ 1, 563000, 0x09, 0x01 },
290 	{ 3, 125000, 0x0A, 0x02 },
291 	{ 6, 250000, 0x0B, 0x03 },
292 	{ 12, 500000, 0x00, 0x04 },
293 	{ 25, 0, 0x01, 0x05 },
294 	{ 50, 0, 0x02, 0x06 },
295 	{ 100, 0, 0x03, 0x06 },
296 	{ 200, 0, 0x04, 0x06 },
297 	{ 400, 0, 0x05, 0x06 },
298 	{ 800, 0, 0x06, 0x06 },
299 	{ 1600, 0, 0x07, 0x06 },
300 };
301 
302 static const char *const kxcjk1013_samp_freq_avail =
303 	"0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
304 
305 static const struct kx_odr_map kxtf9_samp_freq_table[] = {
306 	{ 25, 0, 0x01, 0x00 },
307 	{ 50, 0, 0x02, 0x01 },
308 	{ 100, 0, 0x03, 0x01 },
309 	{ 200, 0, 0x04, 0x01 },
310 	{ 400, 0, 0x05, 0x01 },
311 	{ 800, 0, 0x06, 0x01 },
312 };
313 
314 static const char *const kxtf9_samp_freq_avail =
315 	"25 50 100 200 400 800";
316 
317 /* Refer to section 4 of the specification */
318 static const struct {
319 	int odr_bits;
320 	int usec;
321 } odr_start_up_times[KX_MAX_CHIPS][12] = {
322 	/* KXCJK-1013 */
323 	{
324 		{0x08, 100000},
325 		{0x09, 100000},
326 		{0x0A, 100000},
327 		{0x0B, 100000},
328 		{0, 80000},
329 		{0x01, 41000},
330 		{0x02, 21000},
331 		{0x03, 11000},
332 		{0x04, 6400},
333 		{0x05, 3900},
334 		{0x06, 2700},
335 		{0x07, 2100},
336 	},
337 	/* KXCJ9-1008 */
338 	{
339 		{0x08, 100000},
340 		{0x09, 100000},
341 		{0x0A, 100000},
342 		{0x0B, 100000},
343 		{0, 80000},
344 		{0x01, 41000},
345 		{0x02, 21000},
346 		{0x03, 11000},
347 		{0x04, 6400},
348 		{0x05, 3900},
349 		{0x06, 2700},
350 		{0x07, 2100},
351 	},
352 	/* KXCTJ2-1009 */
353 	{
354 		{0x08, 1240000},
355 		{0x09, 621000},
356 		{0x0A, 309000},
357 		{0x0B, 151000},
358 		{0, 80000},
359 		{0x01, 41000},
360 		{0x02, 21000},
361 		{0x03, 11000},
362 		{0x04, 6000},
363 		{0x05, 4000},
364 		{0x06, 3000},
365 		{0x07, 2000},
366 	},
367 	/* KXTF9 */
368 	{
369 		{0x01, 81000},
370 		{0x02, 41000},
371 		{0x03, 21000},
372 		{0x04, 11000},
373 		{0x05, 5100},
374 		{0x06, 2700},
375 	},
376 	/* KX023-1025 */
377 	{
378 		/* First 4 are not in datasheet, taken from KXCTJ2-1009 */
379 		{0x08, 1240000},
380 		{0x09, 621000},
381 		{0x0A, 309000},
382 		{0x0B, 151000},
383 		{0, 81000},
384 		{0x01, 40000},
385 		{0x02, 22000},
386 		{0x03, 12000},
387 		{0x04, 7000},
388 		{0x05, 4400},
389 		{0x06, 3000},
390 		{0x07, 3000},
391 	},
392 };
393 
394 static const struct {
395 	u16 scale;
396 	u8 gsel_0;
397 	u8 gsel_1;
398 } KXCJK1013_scale_table[] = { {9582, 0, 0},
399 			      {19163, 1, 0},
400 			      {38326, 0, 1} };
401 
402 #ifdef CONFIG_ACPI
403 enum kiox010a_fn_index {
404 	KIOX010A_SET_LAPTOP_MODE = 1,
405 	KIOX010A_SET_TABLET_MODE = 2,
406 };
407 
408 static int kiox010a_dsm(struct device *dev, int fn_index)
409 {
410 	acpi_handle handle = ACPI_HANDLE(dev);
411 	guid_t kiox010a_dsm_guid;
412 	union acpi_object *obj;
413 
414 	if (!handle)
415 		return -ENODEV;
416 
417 	guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
418 
419 	obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
420 	if (!obj)
421 		return -EIO;
422 
423 	ACPI_FREE(obj);
424 	return 0;
425 }
426 #endif
427 
428 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
429 			      enum kxcjk1013_mode mode)
430 {
431 	int ret;
432 
433 	ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
434 	if (ret < 0) {
435 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
436 		return ret;
437 	}
438 
439 	if (mode == STANDBY)
440 		ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
441 	else
442 		ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
443 
444 	ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
445 	if (ret < 0) {
446 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
447 		return ret;
448 	}
449 
450 	return 0;
451 }
452 
453 static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
454 			      enum kxcjk1013_mode *mode)
455 {
456 	int ret;
457 
458 	ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
459 	if (ret < 0) {
460 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
461 		return ret;
462 	}
463 
464 	if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
465 		*mode = OPERATION;
466 	else
467 		*mode = STANDBY;
468 
469 	return 0;
470 }
471 
472 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
473 {
474 	int ret;
475 
476 	ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
477 	if (ret < 0) {
478 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
479 		return ret;
480 	}
481 
482 	ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
483 		 KXCJK1013_REG_CTRL1_BIT_GSEL1);
484 	ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
485 	ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
486 
487 	ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
488 	if (ret < 0) {
489 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
490 		return ret;
491 	}
492 
493 	data->range = range_index;
494 
495 	return 0;
496 }
497 
498 static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
499 {
500 	int ret;
501 
502 #ifdef CONFIG_ACPI
503 	if (data->acpi_type == ACPI_KIOX010A) {
504 		/* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
505 		kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
506 	}
507 #endif
508 
509 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
510 	if (ret < 0) {
511 		dev_err(&data->client->dev, "Error reading who_am_i\n");
512 		return ret;
513 	}
514 
515 	dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
516 
517 	ret = kxcjk1013_set_mode(data, STANDBY);
518 	if (ret < 0)
519 		return ret;
520 
521 	ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
522 	if (ret < 0) {
523 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
524 		return ret;
525 	}
526 
527 	/* Set 12 bit mode */
528 	ret |= KXCJK1013_REG_CTRL1_BIT_RES;
529 
530 	ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
531 	if (ret < 0) {
532 		dev_err(&data->client->dev, "Error reading reg_ctrl\n");
533 		return ret;
534 	}
535 
536 	/* Setting range to 4G */
537 	ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
538 	if (ret < 0)
539 		return ret;
540 
541 	ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl);
542 	if (ret < 0) {
543 		dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
544 		return ret;
545 	}
546 
547 	data->odr_bits = ret;
548 
549 	/* Set up INT polarity */
550 	ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
551 	if (ret < 0) {
552 		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
553 		return ret;
554 	}
555 
556 	if (data->active_high_intr)
557 		ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
558 	else
559 		ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
560 
561 	ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
562 	if (ret < 0) {
563 		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
564 		return ret;
565 	}
566 
567 	/* On KX023, route all used interrupts to INT1 for now */
568 	if (data->chipset == KX0231025 && data->client->irq > 0) {
569 		ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4,
570 						KX023_REG_INC4_DRDY1 |
571 						KX023_REG_INC4_WUFI1);
572 		if (ret < 0) {
573 			dev_err(&data->client->dev, "Error writing reg_inc4\n");
574 			return ret;
575 		}
576 	}
577 
578 	ret = kxcjk1013_set_mode(data, OPERATION);
579 	if (ret < 0)
580 		return ret;
581 
582 	data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
583 
584 	return 0;
585 }
586 
587 #ifdef CONFIG_PM
588 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
589 {
590 	int i;
591 	int idx = data->chipset;
592 
593 	for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
594 		if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
595 			return odr_start_up_times[idx][i].usec;
596 	}
597 
598 	return KXCJK1013_MAX_STARTUP_TIME_US;
599 }
600 #endif
601 
602 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
603 {
604 #ifdef CONFIG_PM
605 	int ret;
606 
607 	if (on)
608 		ret = pm_runtime_resume_and_get(&data->client->dev);
609 	else {
610 		pm_runtime_mark_last_busy(&data->client->dev);
611 		ret = pm_runtime_put_autosuspend(&data->client->dev);
612 	}
613 	if (ret < 0) {
614 		dev_err(&data->client->dev,
615 			"Failed: %s for %d\n", __func__, on);
616 		return ret;
617 	}
618 #endif
619 
620 	return 0;
621 }
622 
623 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
624 {
625 	int ret;
626 
627 	ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer,
628 					data->wake_dur);
629 	if (ret < 0) {
630 		dev_err(&data->client->dev,
631 			"Error writing reg_wake_timer\n");
632 		return ret;
633 	}
634 
635 	ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres,
636 					data->wake_thres);
637 	if (ret < 0) {
638 		dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
639 		return ret;
640 	}
641 
642 	return 0;
643 }
644 
645 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
646 						bool status)
647 {
648 	int ret;
649 	enum kxcjk1013_mode store_mode;
650 
651 	ret = kxcjk1013_get_mode(data, &store_mode);
652 	if (ret < 0)
653 		return ret;
654 
655 	/* This is requirement by spec to change state to STANDBY */
656 	ret = kxcjk1013_set_mode(data, STANDBY);
657 	if (ret < 0)
658 		return ret;
659 
660 	ret = kxcjk1013_chip_update_thresholds(data);
661 	if (ret < 0)
662 		return ret;
663 
664 	ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
665 	if (ret < 0) {
666 		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
667 		return ret;
668 	}
669 
670 	if (status)
671 		ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
672 	else
673 		ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
674 
675 	ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
676 	if (ret < 0) {
677 		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
678 		return ret;
679 	}
680 
681 	ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
682 	if (ret < 0) {
683 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
684 		return ret;
685 	}
686 
687 	if (status)
688 		ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
689 	else
690 		ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
691 
692 	ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
693 	if (ret < 0) {
694 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
695 		return ret;
696 	}
697 
698 	if (store_mode == OPERATION) {
699 		ret = kxcjk1013_set_mode(data, OPERATION);
700 		if (ret < 0)
701 			return ret;
702 	}
703 
704 	return 0;
705 }
706 
707 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
708 					      bool status)
709 {
710 	int ret;
711 	enum kxcjk1013_mode store_mode;
712 
713 	ret = kxcjk1013_get_mode(data, &store_mode);
714 	if (ret < 0)
715 		return ret;
716 
717 	/* This is requirement by spec to change state to STANDBY */
718 	ret = kxcjk1013_set_mode(data, STANDBY);
719 	if (ret < 0)
720 		return ret;
721 
722 	ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
723 	if (ret < 0) {
724 		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
725 		return ret;
726 	}
727 
728 	if (status)
729 		ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
730 	else
731 		ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
732 
733 	ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
734 	if (ret < 0) {
735 		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
736 		return ret;
737 	}
738 
739 	ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
740 	if (ret < 0) {
741 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
742 		return ret;
743 	}
744 
745 	if (status)
746 		ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
747 	else
748 		ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
749 
750 	ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
751 	if (ret < 0) {
752 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
753 		return ret;
754 	}
755 
756 	if (store_mode == OPERATION) {
757 		ret = kxcjk1013_set_mode(data, OPERATION);
758 		if (ret < 0)
759 			return ret;
760 	}
761 
762 	return 0;
763 }
764 
765 static const struct kx_odr_map *kxcjk1013_find_odr_value(
766 	const struct kx_odr_map *map, size_t map_size, int val, int val2)
767 {
768 	int i;
769 
770 	for (i = 0; i < map_size; ++i) {
771 		if (map[i].val == val && map[i].val2 == val2)
772 			return &map[i];
773 	}
774 
775 	return ERR_PTR(-EINVAL);
776 }
777 
778 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
779 				       size_t map_size, int odr_bits,
780 				       int *val, int *val2)
781 {
782 	int i;
783 
784 	for (i = 0; i < map_size; ++i) {
785 		if (map[i].odr_bits == odr_bits) {
786 			*val = map[i].val;
787 			*val2 = map[i].val2;
788 			return IIO_VAL_INT_PLUS_MICRO;
789 		}
790 	}
791 
792 	return -EINVAL;
793 }
794 
795 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
796 {
797 	int ret;
798 	enum kxcjk1013_mode store_mode;
799 	const struct kx_odr_map *odr_setting;
800 
801 	ret = kxcjk1013_get_mode(data, &store_mode);
802 	if (ret < 0)
803 		return ret;
804 
805 	if (data->chipset == KXTF9)
806 		odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
807 						       ARRAY_SIZE(kxtf9_samp_freq_table),
808 						       val, val2);
809 	else
810 		odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
811 						       ARRAY_SIZE(samp_freq_table),
812 						       val, val2);
813 
814 	if (IS_ERR(odr_setting))
815 		return PTR_ERR(odr_setting);
816 
817 	/* To change ODR, the chip must be set to STANDBY as per spec */
818 	ret = kxcjk1013_set_mode(data, STANDBY);
819 	if (ret < 0)
820 		return ret;
821 
822 	ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl,
823 					odr_setting->odr_bits);
824 	if (ret < 0) {
825 		dev_err(&data->client->dev, "Error writing data_ctrl\n");
826 		return ret;
827 	}
828 
829 	data->odr_bits = odr_setting->odr_bits;
830 
831 	ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl,
832 					odr_setting->wuf_bits);
833 	if (ret < 0) {
834 		dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
835 		return ret;
836 	}
837 
838 	if (store_mode == OPERATION) {
839 		ret = kxcjk1013_set_mode(data, OPERATION);
840 		if (ret < 0)
841 			return ret;
842 	}
843 
844 	return 0;
845 }
846 
847 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
848 {
849 	if (data->chipset == KXTF9)
850 		return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
851 						   ARRAY_SIZE(kxtf9_samp_freq_table),
852 						   data->odr_bits, val, val2);
853 	else
854 		return kxcjk1013_convert_odr_value(samp_freq_table,
855 						   ARRAY_SIZE(samp_freq_table),
856 						   data->odr_bits, val, val2);
857 }
858 
859 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
860 {
861 	u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
862 	int ret;
863 
864 	ret = i2c_smbus_read_word_data(data->client, reg);
865 	if (ret < 0) {
866 		dev_err(&data->client->dev,
867 			"failed to read accel_%c registers\n", 'x' + axis);
868 		return ret;
869 	}
870 
871 	return ret;
872 }
873 
874 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
875 {
876 	int ret, i;
877 	enum kxcjk1013_mode store_mode;
878 
879 	for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
880 		if (KXCJK1013_scale_table[i].scale == val) {
881 			ret = kxcjk1013_get_mode(data, &store_mode);
882 			if (ret < 0)
883 				return ret;
884 
885 			ret = kxcjk1013_set_mode(data, STANDBY);
886 			if (ret < 0)
887 				return ret;
888 
889 			ret = kxcjk1013_set_range(data, i);
890 			if (ret < 0)
891 				return ret;
892 
893 			if (store_mode == OPERATION) {
894 				ret = kxcjk1013_set_mode(data, OPERATION);
895 				if (ret)
896 					return ret;
897 			}
898 
899 			return 0;
900 		}
901 	}
902 
903 	return -EINVAL;
904 }
905 
906 static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
907 			      struct iio_chan_spec const *chan, int *val,
908 			      int *val2, long mask)
909 {
910 	struct kxcjk1013_data *data = iio_priv(indio_dev);
911 	int ret;
912 
913 	switch (mask) {
914 	case IIO_CHAN_INFO_RAW:
915 		mutex_lock(&data->mutex);
916 		if (iio_buffer_enabled(indio_dev))
917 			ret = -EBUSY;
918 		else {
919 			ret = kxcjk1013_set_power_state(data, true);
920 			if (ret < 0) {
921 				mutex_unlock(&data->mutex);
922 				return ret;
923 			}
924 			ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
925 			if (ret < 0) {
926 				kxcjk1013_set_power_state(data, false);
927 				mutex_unlock(&data->mutex);
928 				return ret;
929 			}
930 			*val = sign_extend32(ret >> 4, 11);
931 			ret = kxcjk1013_set_power_state(data, false);
932 		}
933 		mutex_unlock(&data->mutex);
934 
935 		if (ret < 0)
936 			return ret;
937 
938 		return IIO_VAL_INT;
939 
940 	case IIO_CHAN_INFO_SCALE:
941 		*val = 0;
942 		*val2 = KXCJK1013_scale_table[data->range].scale;
943 		return IIO_VAL_INT_PLUS_MICRO;
944 
945 	case IIO_CHAN_INFO_SAMP_FREQ:
946 		mutex_lock(&data->mutex);
947 		ret = kxcjk1013_get_odr(data, val, val2);
948 		mutex_unlock(&data->mutex);
949 		return ret;
950 
951 	default:
952 		return -EINVAL;
953 	}
954 }
955 
956 static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
957 			       struct iio_chan_spec const *chan, int val,
958 			       int val2, long mask)
959 {
960 	struct kxcjk1013_data *data = iio_priv(indio_dev);
961 	int ret;
962 
963 	switch (mask) {
964 	case IIO_CHAN_INFO_SAMP_FREQ:
965 		mutex_lock(&data->mutex);
966 		ret = kxcjk1013_set_odr(data, val, val2);
967 		mutex_unlock(&data->mutex);
968 		break;
969 	case IIO_CHAN_INFO_SCALE:
970 		if (val)
971 			return -EINVAL;
972 
973 		mutex_lock(&data->mutex);
974 		ret = kxcjk1013_set_scale(data, val2);
975 		mutex_unlock(&data->mutex);
976 		break;
977 	default:
978 		ret = -EINVAL;
979 	}
980 
981 	return ret;
982 }
983 
984 static int kxcjk1013_read_event(struct iio_dev *indio_dev,
985 				   const struct iio_chan_spec *chan,
986 				   enum iio_event_type type,
987 				   enum iio_event_direction dir,
988 				   enum iio_event_info info,
989 				   int *val, int *val2)
990 {
991 	struct kxcjk1013_data *data = iio_priv(indio_dev);
992 
993 	*val2 = 0;
994 	switch (info) {
995 	case IIO_EV_INFO_VALUE:
996 		*val = data->wake_thres;
997 		break;
998 	case IIO_EV_INFO_PERIOD:
999 		*val = data->wake_dur;
1000 		break;
1001 	default:
1002 		return -EINVAL;
1003 	}
1004 
1005 	return IIO_VAL_INT;
1006 }
1007 
1008 static int kxcjk1013_write_event(struct iio_dev *indio_dev,
1009 				    const struct iio_chan_spec *chan,
1010 				    enum iio_event_type type,
1011 				    enum iio_event_direction dir,
1012 				    enum iio_event_info info,
1013 				    int val, int val2)
1014 {
1015 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1016 
1017 	if (data->ev_enable_state)
1018 		return -EBUSY;
1019 
1020 	switch (info) {
1021 	case IIO_EV_INFO_VALUE:
1022 		data->wake_thres = val;
1023 		break;
1024 	case IIO_EV_INFO_PERIOD:
1025 		data->wake_dur = val;
1026 		break;
1027 	default:
1028 		return -EINVAL;
1029 	}
1030 
1031 	return 0;
1032 }
1033 
1034 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
1035 					  const struct iio_chan_spec *chan,
1036 					  enum iio_event_type type,
1037 					  enum iio_event_direction dir)
1038 {
1039 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1040 
1041 	return data->ev_enable_state;
1042 }
1043 
1044 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
1045 					   const struct iio_chan_spec *chan,
1046 					   enum iio_event_type type,
1047 					   enum iio_event_direction dir,
1048 					   int state)
1049 {
1050 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1051 	int ret;
1052 
1053 	if (state && data->ev_enable_state)
1054 		return 0;
1055 
1056 	mutex_lock(&data->mutex);
1057 
1058 	if (!state && data->motion_trigger_on) {
1059 		data->ev_enable_state = 0;
1060 		mutex_unlock(&data->mutex);
1061 		return 0;
1062 	}
1063 
1064 	/*
1065 	 * We will expect the enable and disable to do operation in
1066 	 * in reverse order. This will happen here anyway as our
1067 	 * resume operation uses sync mode runtime pm calls, the
1068 	 * suspend operation will be delayed by autosuspend delay
1069 	 * So the disable operation will still happen in reverse of
1070 	 * enable operation. When runtime pm is disabled the mode
1071 	 * is always on so sequence doesn't matter
1072 	 */
1073 	ret = kxcjk1013_set_power_state(data, state);
1074 	if (ret < 0) {
1075 		mutex_unlock(&data->mutex);
1076 		return ret;
1077 	}
1078 
1079 	ret =  kxcjk1013_setup_any_motion_interrupt(data, state);
1080 	if (ret < 0) {
1081 		kxcjk1013_set_power_state(data, false);
1082 		data->ev_enable_state = 0;
1083 		mutex_unlock(&data->mutex);
1084 		return ret;
1085 	}
1086 
1087 	data->ev_enable_state = state;
1088 	mutex_unlock(&data->mutex);
1089 
1090 	return 0;
1091 }
1092 
1093 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
1094 {
1095 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1096 
1097 	return kxcjk1013_set_power_state(data, true);
1098 }
1099 
1100 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
1101 {
1102 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1103 
1104 	return kxcjk1013_set_power_state(data, false);
1105 }
1106 
1107 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
1108 					     struct device_attribute *attr,
1109 					     char *buf)
1110 {
1111 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
1112 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1113 	const char *str;
1114 
1115 	if (data->chipset == KXTF9)
1116 		str = kxtf9_samp_freq_avail;
1117 	else
1118 		str = kxcjk1013_samp_freq_avail;
1119 
1120 	return sprintf(buf, "%s\n", str);
1121 }
1122 
1123 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
1124 		       kxcjk1013_get_samp_freq_avail, NULL, 0);
1125 
1126 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
1127 
1128 static struct attribute *kxcjk1013_attributes[] = {
1129 	&iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
1130 	&iio_const_attr_in_accel_scale_available.dev_attr.attr,
1131 	NULL,
1132 };
1133 
1134 static const struct attribute_group kxcjk1013_attrs_group = {
1135 	.attrs = kxcjk1013_attributes,
1136 };
1137 
1138 static const struct iio_event_spec kxcjk1013_event = {
1139 		.type = IIO_EV_TYPE_THRESH,
1140 		.dir = IIO_EV_DIR_EITHER,
1141 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
1142 				 BIT(IIO_EV_INFO_ENABLE) |
1143 				 BIT(IIO_EV_INFO_PERIOD)
1144 };
1145 
1146 static const struct iio_mount_matrix *
1147 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev,
1148 			   const struct iio_chan_spec *chan)
1149 {
1150 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1151 
1152 	return &data->orientation;
1153 }
1154 
1155 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = {
1156 	IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix),
1157 	{ }
1158 };
1159 
1160 #define KXCJK1013_CHANNEL(_axis) {					\
1161 	.type = IIO_ACCEL,						\
1162 	.modified = 1,							\
1163 	.channel2 = IIO_MOD_##_axis,					\
1164 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
1165 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
1166 				BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
1167 	.scan_index = AXIS_##_axis,					\
1168 	.scan_type = {							\
1169 		.sign = 's',						\
1170 		.realbits = 12,						\
1171 		.storagebits = 16,					\
1172 		.shift = 4,						\
1173 		.endianness = IIO_LE,					\
1174 	},								\
1175 	.event_spec = &kxcjk1013_event,				\
1176 	.ext_info = kxcjk1013_ext_info,					\
1177 	.num_event_specs = 1						\
1178 }
1179 
1180 static const struct iio_chan_spec kxcjk1013_channels[] = {
1181 	KXCJK1013_CHANNEL(X),
1182 	KXCJK1013_CHANNEL(Y),
1183 	KXCJK1013_CHANNEL(Z),
1184 	IIO_CHAN_SOFT_TIMESTAMP(3),
1185 };
1186 
1187 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
1188 	.preenable		= kxcjk1013_buffer_preenable,
1189 	.postdisable		= kxcjk1013_buffer_postdisable,
1190 };
1191 
1192 static const struct iio_info kxcjk1013_info = {
1193 	.attrs			= &kxcjk1013_attrs_group,
1194 	.read_raw		= kxcjk1013_read_raw,
1195 	.write_raw		= kxcjk1013_write_raw,
1196 	.read_event_value	= kxcjk1013_read_event,
1197 	.write_event_value	= kxcjk1013_write_event,
1198 	.write_event_config	= kxcjk1013_write_event_config,
1199 	.read_event_config	= kxcjk1013_read_event_config,
1200 };
1201 
1202 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
1203 
1204 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
1205 {
1206 	struct iio_poll_func *pf = p;
1207 	struct iio_dev *indio_dev = pf->indio_dev;
1208 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1209 	int ret;
1210 
1211 	mutex_lock(&data->mutex);
1212 	ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
1213 							KXCJK1013_REG_XOUT_L,
1214 							AXIS_MAX * 2,
1215 							(u8 *)data->scan.chans);
1216 	mutex_unlock(&data->mutex);
1217 	if (ret < 0)
1218 		goto err;
1219 
1220 	iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
1221 					   data->timestamp);
1222 err:
1223 	iio_trigger_notify_done(indio_dev->trig);
1224 
1225 	return IRQ_HANDLED;
1226 }
1227 
1228 static void kxcjk1013_trig_reen(struct iio_trigger *trig)
1229 {
1230 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1231 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1232 	int ret;
1233 
1234 	ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
1235 	if (ret < 0)
1236 		dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1237 }
1238 
1239 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
1240 						bool state)
1241 {
1242 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1243 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1244 	int ret;
1245 
1246 	mutex_lock(&data->mutex);
1247 
1248 	if (!state && data->ev_enable_state && data->motion_trigger_on) {
1249 		data->motion_trigger_on = false;
1250 		mutex_unlock(&data->mutex);
1251 		return 0;
1252 	}
1253 
1254 	ret = kxcjk1013_set_power_state(data, state);
1255 	if (ret < 0) {
1256 		mutex_unlock(&data->mutex);
1257 		return ret;
1258 	}
1259 	if (data->motion_trig == trig)
1260 		ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1261 	else
1262 		ret = kxcjk1013_setup_new_data_interrupt(data, state);
1263 	if (ret < 0) {
1264 		kxcjk1013_set_power_state(data, false);
1265 		mutex_unlock(&data->mutex);
1266 		return ret;
1267 	}
1268 	if (data->motion_trig == trig)
1269 		data->motion_trigger_on = state;
1270 	else
1271 		data->dready_trigger_on = state;
1272 
1273 	mutex_unlock(&data->mutex);
1274 
1275 	return 0;
1276 }
1277 
1278 static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1279 	.set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1280 	.reenable = kxcjk1013_trig_reen,
1281 };
1282 
1283 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
1284 {
1285 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1286 
1287 	int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2);
1288 	if (ret < 0) {
1289 		dev_err(&data->client->dev, "Error reading reg_int_src2\n");
1290 		return;
1291 	}
1292 
1293 	if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1294 		iio_push_event(indio_dev,
1295 			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1296 						  0,
1297 						  IIO_MOD_X,
1298 						  IIO_EV_TYPE_THRESH,
1299 						  IIO_EV_DIR_FALLING),
1300 			       data->timestamp);
1301 
1302 	if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1303 		iio_push_event(indio_dev,
1304 			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1305 						  0,
1306 						  IIO_MOD_X,
1307 						  IIO_EV_TYPE_THRESH,
1308 						  IIO_EV_DIR_RISING),
1309 			       data->timestamp);
1310 
1311 	if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1312 		iio_push_event(indio_dev,
1313 			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1314 						  0,
1315 						  IIO_MOD_Y,
1316 						  IIO_EV_TYPE_THRESH,
1317 						  IIO_EV_DIR_FALLING),
1318 			       data->timestamp);
1319 
1320 	if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1321 		iio_push_event(indio_dev,
1322 			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1323 						  0,
1324 						  IIO_MOD_Y,
1325 						  IIO_EV_TYPE_THRESH,
1326 						  IIO_EV_DIR_RISING),
1327 			       data->timestamp);
1328 
1329 	if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1330 		iio_push_event(indio_dev,
1331 			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1332 						  0,
1333 						  IIO_MOD_Z,
1334 						  IIO_EV_TYPE_THRESH,
1335 						  IIO_EV_DIR_FALLING),
1336 			       data->timestamp);
1337 
1338 	if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1339 		iio_push_event(indio_dev,
1340 			       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1341 						  0,
1342 						  IIO_MOD_Z,
1343 						  IIO_EV_TYPE_THRESH,
1344 						  IIO_EV_DIR_RISING),
1345 			       data->timestamp);
1346 }
1347 
1348 static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1349 {
1350 	struct iio_dev *indio_dev = private;
1351 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1352 	int ret;
1353 
1354 	ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1);
1355 	if (ret < 0) {
1356 		dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1357 		goto ack_intr;
1358 	}
1359 
1360 	if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
1361 		if (data->chipset == KXTF9)
1362 			iio_push_event(indio_dev,
1363 				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1364 				       0,
1365 				       IIO_MOD_X_AND_Y_AND_Z,
1366 				       IIO_EV_TYPE_THRESH,
1367 				       IIO_EV_DIR_RISING),
1368 				       data->timestamp);
1369 		else
1370 			kxcjk1013_report_motion_event(indio_dev);
1371 	}
1372 
1373 ack_intr:
1374 	if (data->dready_trigger_on)
1375 		return IRQ_HANDLED;
1376 
1377 	ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
1378 	if (ret < 0)
1379 		dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1380 
1381 	return IRQ_HANDLED;
1382 }
1383 
1384 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1385 {
1386 	struct iio_dev *indio_dev = private;
1387 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1388 
1389 	data->timestamp = iio_get_time_ns(indio_dev);
1390 
1391 	if (data->dready_trigger_on)
1392 		iio_trigger_poll(data->dready_trig);
1393 	else if (data->motion_trigger_on)
1394 		iio_trigger_poll(data->motion_trig);
1395 
1396 	if (data->ev_enable_state)
1397 		return IRQ_WAKE_THREAD;
1398 	else
1399 		return IRQ_HANDLED;
1400 }
1401 
1402 static const char *kxcjk1013_match_acpi_device(struct device *dev,
1403 					       enum kx_chipset *chipset,
1404 					       enum kx_acpi_type *acpi_type,
1405 					       const char **label)
1406 {
1407 	const struct acpi_device_id *id;
1408 
1409 	id = acpi_match_device(dev->driver->acpi_match_table, dev);
1410 	if (!id)
1411 		return NULL;
1412 
1413 	if (strcmp(id->id, "SMO8500") == 0) {
1414 		*acpi_type = ACPI_SMO8500;
1415 	} else if (strcmp(id->id, "KIOX010A") == 0) {
1416 		*acpi_type = ACPI_KIOX010A;
1417 		*label = "accel-display";
1418 	} else if (strcmp(id->id, "KIOX020A") == 0) {
1419 		*label = "accel-base";
1420 	}
1421 
1422 	*chipset = (enum kx_chipset)id->driver_data;
1423 
1424 	return dev_name(dev);
1425 }
1426 
1427 static void kxcjk1013_disable_regulators(void *d)
1428 {
1429 	struct kxcjk1013_data *data = d;
1430 
1431 	regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
1432 }
1433 
1434 static int kxcjk1013_probe(struct i2c_client *client,
1435 			   const struct i2c_device_id *id)
1436 {
1437 	struct kxcjk1013_data *data;
1438 	struct iio_dev *indio_dev;
1439 	struct kxcjk_1013_platform_data *pdata;
1440 	const char *name;
1441 	int ret;
1442 
1443 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1444 	if (!indio_dev)
1445 		return -ENOMEM;
1446 
1447 	data = iio_priv(indio_dev);
1448 	i2c_set_clientdata(client, indio_dev);
1449 	data->client = client;
1450 
1451 	pdata = dev_get_platdata(&client->dev);
1452 	if (pdata) {
1453 		data->active_high_intr = pdata->active_high_intr;
1454 		data->orientation = pdata->orientation;
1455 	} else {
1456 		data->active_high_intr = true; /* default polarity */
1457 
1458 		ret = iio_read_mount_matrix(&client->dev, &data->orientation);
1459 		if (ret)
1460 			return ret;
1461 	}
1462 
1463 	data->regulators[0].supply = "vdd";
1464 	data->regulators[1].supply = "vddio";
1465 	ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(data->regulators),
1466 				      data->regulators);
1467 	if (ret)
1468 		return dev_err_probe(&client->dev, ret, "Failed to get regulators\n");
1469 
1470 	ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
1471 				    data->regulators);
1472 	if (ret)
1473 		return ret;
1474 
1475 	ret = devm_add_action_or_reset(&client->dev, kxcjk1013_disable_regulators, data);
1476 	if (ret)
1477 		return ret;
1478 
1479 	/*
1480 	 * A typical delay of 10ms is required for powering up
1481 	 * according to the data sheets of supported chips.
1482 	 * Hence double that to play safe.
1483 	 */
1484 	msleep(20);
1485 
1486 	if (id) {
1487 		data->chipset = (enum kx_chipset)(id->driver_data);
1488 		name = id->name;
1489 	} else if (ACPI_HANDLE(&client->dev)) {
1490 		name = kxcjk1013_match_acpi_device(&client->dev,
1491 						   &data->chipset,
1492 						   &data->acpi_type,
1493 						   &indio_dev->label);
1494 	} else
1495 		return -ENODEV;
1496 
1497 	switch (data->chipset) {
1498 	case KXCJK1013:
1499 	case KXCJ91008:
1500 	case KXTJ21009:
1501 		data->regs = &kxcjk1013_regs;
1502 		break;
1503 	case KXTF9:
1504 		data->regs = &kxtf9_regs;
1505 		break;
1506 	case KX0231025:
1507 		data->regs = &kx0231025_regs;
1508 		break;
1509 	default:
1510 		return -EINVAL;
1511 	}
1512 
1513 	ret = kxcjk1013_chip_init(data);
1514 	if (ret < 0)
1515 		return ret;
1516 
1517 	mutex_init(&data->mutex);
1518 
1519 	indio_dev->channels = kxcjk1013_channels;
1520 	indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1521 	indio_dev->available_scan_masks = kxcjk1013_scan_masks;
1522 	indio_dev->name = name;
1523 	indio_dev->modes = INDIO_DIRECT_MODE;
1524 	indio_dev->info = &kxcjk1013_info;
1525 
1526 	if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
1527 		ret = devm_request_threaded_irq(&client->dev, client->irq,
1528 						kxcjk1013_data_rdy_trig_poll,
1529 						kxcjk1013_event_handler,
1530 						IRQF_TRIGGER_RISING,
1531 						KXCJK1013_IRQ_NAME,
1532 						indio_dev);
1533 		if (ret)
1534 			goto err_poweroff;
1535 
1536 		data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1537 							   "%s-dev%d",
1538 							   indio_dev->name,
1539 							   iio_device_id(indio_dev));
1540 		if (!data->dready_trig) {
1541 			ret = -ENOMEM;
1542 			goto err_poweroff;
1543 		}
1544 
1545 		data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1546 							  "%s-any-motion-dev%d",
1547 							  indio_dev->name,
1548 							  iio_device_id(indio_dev));
1549 		if (!data->motion_trig) {
1550 			ret = -ENOMEM;
1551 			goto err_poweroff;
1552 		}
1553 
1554 		data->dready_trig->ops = &kxcjk1013_trigger_ops;
1555 		iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1556 		indio_dev->trig = data->dready_trig;
1557 		iio_trigger_get(indio_dev->trig);
1558 		ret = iio_trigger_register(data->dready_trig);
1559 		if (ret)
1560 			goto err_poweroff;
1561 
1562 		data->motion_trig->ops = &kxcjk1013_trigger_ops;
1563 		iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1564 		ret = iio_trigger_register(data->motion_trig);
1565 		if (ret) {
1566 			data->motion_trig = NULL;
1567 			goto err_trigger_unregister;
1568 		}
1569 	}
1570 
1571 	ret = iio_triggered_buffer_setup(indio_dev,
1572 					 &iio_pollfunc_store_time,
1573 					 kxcjk1013_trigger_handler,
1574 					 &kxcjk1013_buffer_setup_ops);
1575 	if (ret < 0) {
1576 		dev_err(&client->dev, "iio triggered buffer setup failed\n");
1577 		goto err_trigger_unregister;
1578 	}
1579 
1580 	ret = pm_runtime_set_active(&client->dev);
1581 	if (ret)
1582 		goto err_buffer_cleanup;
1583 
1584 	pm_runtime_enable(&client->dev);
1585 	pm_runtime_set_autosuspend_delay(&client->dev,
1586 					 KXCJK1013_SLEEP_DELAY_MS);
1587 	pm_runtime_use_autosuspend(&client->dev);
1588 
1589 	ret = iio_device_register(indio_dev);
1590 	if (ret < 0) {
1591 		dev_err(&client->dev, "unable to register iio device\n");
1592 		goto err_buffer_cleanup;
1593 	}
1594 
1595 	return 0;
1596 
1597 err_buffer_cleanup:
1598 	if (data->dready_trig)
1599 		iio_triggered_buffer_cleanup(indio_dev);
1600 err_trigger_unregister:
1601 	if (data->dready_trig)
1602 		iio_trigger_unregister(data->dready_trig);
1603 	if (data->motion_trig)
1604 		iio_trigger_unregister(data->motion_trig);
1605 err_poweroff:
1606 	kxcjk1013_set_mode(data, STANDBY);
1607 
1608 	return ret;
1609 }
1610 
1611 static int kxcjk1013_remove(struct i2c_client *client)
1612 {
1613 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1614 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1615 
1616 	iio_device_unregister(indio_dev);
1617 
1618 	pm_runtime_disable(&client->dev);
1619 	pm_runtime_set_suspended(&client->dev);
1620 
1621 	if (data->dready_trig) {
1622 		iio_triggered_buffer_cleanup(indio_dev);
1623 		iio_trigger_unregister(data->dready_trig);
1624 		iio_trigger_unregister(data->motion_trig);
1625 	}
1626 
1627 	mutex_lock(&data->mutex);
1628 	kxcjk1013_set_mode(data, STANDBY);
1629 	mutex_unlock(&data->mutex);
1630 
1631 	return 0;
1632 }
1633 
1634 #ifdef CONFIG_PM_SLEEP
1635 static int kxcjk1013_suspend(struct device *dev)
1636 {
1637 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1638 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1639 	int ret;
1640 
1641 	mutex_lock(&data->mutex);
1642 	ret = kxcjk1013_set_mode(data, STANDBY);
1643 	mutex_unlock(&data->mutex);
1644 
1645 	return ret;
1646 }
1647 
1648 static int kxcjk1013_resume(struct device *dev)
1649 {
1650 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1651 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1652 	int ret = 0;
1653 
1654 	mutex_lock(&data->mutex);
1655 	ret = kxcjk1013_set_mode(data, OPERATION);
1656 	if (ret == 0)
1657 		ret = kxcjk1013_set_range(data, data->range);
1658 	mutex_unlock(&data->mutex);
1659 
1660 	return ret;
1661 }
1662 #endif
1663 
1664 #ifdef CONFIG_PM
1665 static int kxcjk1013_runtime_suspend(struct device *dev)
1666 {
1667 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1668 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1669 	int ret;
1670 
1671 	ret = kxcjk1013_set_mode(data, STANDBY);
1672 	if (ret < 0) {
1673 		dev_err(&data->client->dev, "powering off device failed\n");
1674 		return -EAGAIN;
1675 	}
1676 	return 0;
1677 }
1678 
1679 static int kxcjk1013_runtime_resume(struct device *dev)
1680 {
1681 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1682 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1683 	int ret;
1684 	int sleep_val;
1685 
1686 	ret = kxcjk1013_set_mode(data, OPERATION);
1687 	if (ret < 0)
1688 		return ret;
1689 
1690 	sleep_val = kxcjk1013_get_startup_times(data);
1691 	if (sleep_val < 20000)
1692 		usleep_range(sleep_val, 20000);
1693 	else
1694 		msleep_interruptible(sleep_val/1000);
1695 
1696 	return 0;
1697 }
1698 #endif
1699 
1700 static const struct dev_pm_ops kxcjk1013_pm_ops = {
1701 	SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1702 	SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1703 			   kxcjk1013_runtime_resume, NULL)
1704 };
1705 
1706 static const struct acpi_device_id kx_acpi_match[] = {
1707 	{"KXCJ1013", KXCJK1013},
1708 	{"KXCJ1008", KXCJ91008},
1709 	{"KXCJ9000", KXCJ91008},
1710 	{"KIOX0008", KXCJ91008},
1711 	{"KIOX0009", KXTJ21009},
1712 	{"KIOX000A", KXCJ91008},
1713 	{"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */
1714 	{"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */
1715 	{"KXTJ1009", KXTJ21009},
1716 	{"KXJ2109",  KXTJ21009},
1717 	{"SMO8500",  KXCJ91008},
1718 	{ },
1719 };
1720 MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1721 
1722 static const struct i2c_device_id kxcjk1013_id[] = {
1723 	{"kxcjk1013", KXCJK1013},
1724 	{"kxcj91008", KXCJ91008},
1725 	{"kxtj21009", KXTJ21009},
1726 	{"kxtf9",     KXTF9},
1727 	{"kx023-1025", KX0231025},
1728 	{"SMO8500",   KXCJ91008},
1729 	{}
1730 };
1731 
1732 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1733 
1734 static const struct of_device_id kxcjk1013_of_match[] = {
1735 	{ .compatible = "kionix,kxcjk1013", },
1736 	{ .compatible = "kionix,kxcj91008", },
1737 	{ .compatible = "kionix,kxtj21009", },
1738 	{ .compatible = "kionix,kxtf9", },
1739 	{ .compatible = "kionix,kx023-1025", },
1740 	{ }
1741 };
1742 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match);
1743 
1744 static struct i2c_driver kxcjk1013_driver = {
1745 	.driver = {
1746 		.name	= KXCJK1013_DRV_NAME,
1747 		.acpi_match_table = ACPI_PTR(kx_acpi_match),
1748 		.of_match_table = kxcjk1013_of_match,
1749 		.pm	= &kxcjk1013_pm_ops,
1750 	},
1751 	.probe		= kxcjk1013_probe,
1752 	.remove		= kxcjk1013_remove,
1753 	.id_table	= kxcjk1013_id,
1754 };
1755 module_i2c_driver(kxcjk1013_driver);
1756 
1757 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1758 MODULE_LICENSE("GPL v2");
1759 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");
1760