1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * KXCJK-1013 3-axis accelerometer driver 4 * Copyright (c) 2014, Intel Corporation. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/i2c.h> 9 #include <linux/interrupt.h> 10 #include <linux/delay.h> 11 #include <linux/bitops.h> 12 #include <linux/slab.h> 13 #include <linux/string.h> 14 #include <linux/acpi.h> 15 #include <linux/pm.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/iio/iio.h> 18 #include <linux/iio/sysfs.h> 19 #include <linux/iio/buffer.h> 20 #include <linux/iio/trigger.h> 21 #include <linux/iio/events.h> 22 #include <linux/iio/trigger_consumer.h> 23 #include <linux/iio/triggered_buffer.h> 24 #include <linux/iio/accel/kxcjk_1013.h> 25 26 #define KXCJK1013_DRV_NAME "kxcjk1013" 27 #define KXCJK1013_IRQ_NAME "kxcjk1013_event" 28 29 #define KXTF9_REG_HP_XOUT_L 0x00 30 #define KXTF9_REG_HP_XOUT_H 0x01 31 #define KXTF9_REG_HP_YOUT_L 0x02 32 #define KXTF9_REG_HP_YOUT_H 0x03 33 #define KXTF9_REG_HP_ZOUT_L 0x04 34 #define KXTF9_REG_HP_ZOUT_H 0x05 35 36 #define KXCJK1013_REG_XOUT_L 0x06 37 /* 38 * From low byte X axis register, all the other addresses of Y and Z can be 39 * obtained by just applying axis offset. The following axis defines are just 40 * provide clarity, but not used. 41 */ 42 #define KXCJK1013_REG_XOUT_H 0x07 43 #define KXCJK1013_REG_YOUT_L 0x08 44 #define KXCJK1013_REG_YOUT_H 0x09 45 #define KXCJK1013_REG_ZOUT_L 0x0A 46 #define KXCJK1013_REG_ZOUT_H 0x0B 47 48 #define KXCJK1013_REG_DCST_RESP 0x0C 49 #define KXCJK1013_REG_WHO_AM_I 0x0F 50 #define KXTF9_REG_TILT_POS_CUR 0x10 51 #define KXTF9_REG_TILT_POS_PREV 0x11 52 #define KXTF9_REG_INT_SRC1 0x15 53 #define KXCJK1013_REG_INT_SRC1 0x16 /* compatible, but called INT_SRC2 in KXTF9 ds */ 54 #define KXCJK1013_REG_INT_SRC2 0x17 55 #define KXCJK1013_REG_STATUS_REG 0x18 56 #define KXCJK1013_REG_INT_REL 0x1A 57 #define KXCJK1013_REG_CTRL1 0x1B 58 #define KXTF9_REG_CTRL2 0x1C 59 #define KXCJK1013_REG_CTRL2 0x1D /* mostly compatible, CTRL_REG3 in KTXF9 ds */ 60 #define KXCJK1013_REG_INT_CTRL1 0x1E 61 #define KXCJK1013_REG_INT_CTRL2 0x1F 62 #define KXTF9_REG_INT_CTRL3 0x20 63 #define KXCJK1013_REG_DATA_CTRL 0x21 64 #define KXTF9_REG_TILT_TIMER 0x28 65 #define KXCJK1013_REG_WAKE_TIMER 0x29 66 #define KXTF9_REG_TDT_TIMER 0x2B 67 #define KXTF9_REG_TDT_THRESH_H 0x2C 68 #define KXTF9_REG_TDT_THRESH_L 0x2D 69 #define KXTF9_REG_TDT_TAP_TIMER 0x2E 70 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F 71 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30 72 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31 73 #define KXCJK1013_REG_SELF_TEST 0x3A 74 #define KXTF9_REG_WAKE_THRESH 0x5A 75 #define KXTF9_REG_TILT_ANGLE 0x5C 76 #define KXTF9_REG_HYST_SET 0x5F 77 #define KXCJK1013_REG_WAKE_THRES 0x6A 78 79 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 80 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 81 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 82 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 83 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 84 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 85 86 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */ 87 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3) 88 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4) 89 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5) 90 91 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5) 92 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4) 93 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3) 94 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2) 95 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1) 96 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0) 97 98 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 99 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 100 101 #define KXCJK1013_SLEEP_DELAY_MS 2000 102 103 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */ 104 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1) 105 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */ 106 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0 107 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2) 108 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3) 109 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4) 110 111 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */ 112 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 113 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 114 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 115 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 116 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 117 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 118 119 #define KXCJK1013_DEFAULT_WAKE_THRES 1 120 121 enum kx_chipset { 122 KXCJK1013, 123 KXCJ91008, 124 KXTJ21009, 125 KXTF9, 126 KX_MAX_CHIPS /* this must be last */ 127 }; 128 129 struct kxcjk1013_data { 130 struct i2c_client *client; 131 struct iio_trigger *dready_trig; 132 struct iio_trigger *motion_trig; 133 struct iio_mount_matrix orientation; 134 struct mutex mutex; 135 s16 buffer[8]; 136 u8 odr_bits; 137 u8 range; 138 int wake_thres; 139 int wake_dur; 140 bool active_high_intr; 141 bool dready_trigger_on; 142 int ev_enable_state; 143 bool motion_trigger_on; 144 int64_t timestamp; 145 enum kx_chipset chipset; 146 bool is_smo8500_device; 147 }; 148 149 enum kxcjk1013_axis { 150 AXIS_X, 151 AXIS_Y, 152 AXIS_Z, 153 AXIS_MAX, 154 }; 155 156 enum kxcjk1013_mode { 157 STANDBY, 158 OPERATION, 159 }; 160 161 enum kxcjk1013_range { 162 KXCJK1013_RANGE_2G, 163 KXCJK1013_RANGE_4G, 164 KXCJK1013_RANGE_8G, 165 }; 166 167 struct kx_odr_map { 168 int val; 169 int val2; 170 int odr_bits; 171 int wuf_bits; 172 }; 173 174 static const struct kx_odr_map samp_freq_table[] = { 175 { 0, 781000, 0x08, 0x00 }, 176 { 1, 563000, 0x09, 0x01 }, 177 { 3, 125000, 0x0A, 0x02 }, 178 { 6, 250000, 0x0B, 0x03 }, 179 { 12, 500000, 0x00, 0x04 }, 180 { 25, 0, 0x01, 0x05 }, 181 { 50, 0, 0x02, 0x06 }, 182 { 100, 0, 0x03, 0x06 }, 183 { 200, 0, 0x04, 0x06 }, 184 { 400, 0, 0x05, 0x06 }, 185 { 800, 0, 0x06, 0x06 }, 186 { 1600, 0, 0x07, 0x06 }, 187 }; 188 189 static const char *const kxcjk1013_samp_freq_avail = 190 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"; 191 192 static const struct kx_odr_map kxtf9_samp_freq_table[] = { 193 { 25, 0, 0x01, 0x00 }, 194 { 50, 0, 0x02, 0x01 }, 195 { 100, 0, 0x03, 0x01 }, 196 { 200, 0, 0x04, 0x01 }, 197 { 400, 0, 0x05, 0x01 }, 198 { 800, 0, 0x06, 0x01 }, 199 }; 200 201 static const char *const kxtf9_samp_freq_avail = 202 "25 50 100 200 400 800"; 203 204 /* Refer to section 4 of the specification */ 205 static const struct { 206 int odr_bits; 207 int usec; 208 } odr_start_up_times[KX_MAX_CHIPS][12] = { 209 /* KXCJK-1013 */ 210 { 211 {0x08, 100000}, 212 {0x09, 100000}, 213 {0x0A, 100000}, 214 {0x0B, 100000}, 215 {0, 80000}, 216 {0x01, 41000}, 217 {0x02, 21000}, 218 {0x03, 11000}, 219 {0x04, 6400}, 220 {0x05, 3900}, 221 {0x06, 2700}, 222 {0x07, 2100}, 223 }, 224 /* KXCJ9-1008 */ 225 { 226 {0x08, 100000}, 227 {0x09, 100000}, 228 {0x0A, 100000}, 229 {0x0B, 100000}, 230 {0, 80000}, 231 {0x01, 41000}, 232 {0x02, 21000}, 233 {0x03, 11000}, 234 {0x04, 6400}, 235 {0x05, 3900}, 236 {0x06, 2700}, 237 {0x07, 2100}, 238 }, 239 /* KXCTJ2-1009 */ 240 { 241 {0x08, 1240000}, 242 {0x09, 621000}, 243 {0x0A, 309000}, 244 {0x0B, 151000}, 245 {0, 80000}, 246 {0x01, 41000}, 247 {0x02, 21000}, 248 {0x03, 11000}, 249 {0x04, 6000}, 250 {0x05, 4000}, 251 {0x06, 3000}, 252 {0x07, 2000}, 253 }, 254 /* KXTF9 */ 255 { 256 {0x01, 81000}, 257 {0x02, 41000}, 258 {0x03, 21000}, 259 {0x04, 11000}, 260 {0x05, 5100}, 261 {0x06, 2700}, 262 }, 263 }; 264 265 static const struct { 266 u16 scale; 267 u8 gsel_0; 268 u8 gsel_1; 269 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 270 {19163, 1, 0}, 271 {38326, 0, 1} }; 272 273 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 274 enum kxcjk1013_mode mode) 275 { 276 int ret; 277 278 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 279 if (ret < 0) { 280 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 281 return ret; 282 } 283 284 if (mode == STANDBY) 285 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 286 else 287 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 288 289 ret = i2c_smbus_write_byte_data(data->client, 290 KXCJK1013_REG_CTRL1, ret); 291 if (ret < 0) { 292 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 293 return ret; 294 } 295 296 return 0; 297 } 298 299 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 300 enum kxcjk1013_mode *mode) 301 { 302 int ret; 303 304 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 305 if (ret < 0) { 306 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 307 return ret; 308 } 309 310 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 311 *mode = OPERATION; 312 else 313 *mode = STANDBY; 314 315 return 0; 316 } 317 318 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 319 { 320 int ret; 321 322 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 323 if (ret < 0) { 324 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 325 return ret; 326 } 327 328 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | 329 KXCJK1013_REG_CTRL1_BIT_GSEL1); 330 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 331 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 332 333 ret = i2c_smbus_write_byte_data(data->client, 334 KXCJK1013_REG_CTRL1, 335 ret); 336 if (ret < 0) { 337 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 338 return ret; 339 } 340 341 data->range = range_index; 342 343 return 0; 344 } 345 346 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 347 { 348 int ret; 349 350 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 351 if (ret < 0) { 352 dev_err(&data->client->dev, "Error reading who_am_i\n"); 353 return ret; 354 } 355 356 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 357 358 ret = kxcjk1013_set_mode(data, STANDBY); 359 if (ret < 0) 360 return ret; 361 362 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 363 if (ret < 0) { 364 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 365 return ret; 366 } 367 368 /* Set 12 bit mode */ 369 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 370 371 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1, 372 ret); 373 if (ret < 0) { 374 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 375 return ret; 376 } 377 378 /* Setting range to 4G */ 379 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 380 if (ret < 0) 381 return ret; 382 383 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL); 384 if (ret < 0) { 385 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 386 return ret; 387 } 388 389 data->odr_bits = ret; 390 391 /* Set up INT polarity */ 392 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 393 if (ret < 0) { 394 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 395 return ret; 396 } 397 398 if (data->active_high_intr) 399 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA; 400 else 401 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 402 403 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 404 ret); 405 if (ret < 0) { 406 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 407 return ret; 408 } 409 410 ret = kxcjk1013_set_mode(data, OPERATION); 411 if (ret < 0) 412 return ret; 413 414 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 415 416 return 0; 417 } 418 419 #ifdef CONFIG_PM 420 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 421 { 422 int i; 423 int idx = data->chipset; 424 425 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) { 426 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits) 427 return odr_start_up_times[idx][i].usec; 428 } 429 430 return KXCJK1013_MAX_STARTUP_TIME_US; 431 } 432 #endif 433 434 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 435 { 436 #ifdef CONFIG_PM 437 int ret; 438 439 if (on) 440 ret = pm_runtime_get_sync(&data->client->dev); 441 else { 442 pm_runtime_mark_last_busy(&data->client->dev); 443 ret = pm_runtime_put_autosuspend(&data->client->dev); 444 } 445 if (ret < 0) { 446 dev_err(&data->client->dev, 447 "Failed: %s for %d\n", __func__, on); 448 if (on) 449 pm_runtime_put_noidle(&data->client->dev); 450 return ret; 451 } 452 #endif 453 454 return 0; 455 } 456 457 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 458 { 459 int waketh_reg, ret; 460 461 ret = i2c_smbus_write_byte_data(data->client, 462 KXCJK1013_REG_WAKE_TIMER, 463 data->wake_dur); 464 if (ret < 0) { 465 dev_err(&data->client->dev, 466 "Error writing reg_wake_timer\n"); 467 return ret; 468 } 469 470 waketh_reg = data->chipset == KXTF9 ? 471 KXTF9_REG_WAKE_THRESH : KXCJK1013_REG_WAKE_THRES; 472 ret = i2c_smbus_write_byte_data(data->client, waketh_reg, 473 data->wake_thres); 474 if (ret < 0) { 475 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 476 return ret; 477 } 478 479 return 0; 480 } 481 482 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, 483 bool status) 484 { 485 int ret; 486 enum kxcjk1013_mode store_mode; 487 488 ret = kxcjk1013_get_mode(data, &store_mode); 489 if (ret < 0) 490 return ret; 491 492 /* This is requirement by spec to change state to STANDBY */ 493 ret = kxcjk1013_set_mode(data, STANDBY); 494 if (ret < 0) 495 return ret; 496 497 ret = kxcjk1013_chip_update_thresholds(data); 498 if (ret < 0) 499 return ret; 500 501 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 502 if (ret < 0) { 503 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 504 return ret; 505 } 506 507 if (status) 508 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 509 else 510 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 511 512 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 513 ret); 514 if (ret < 0) { 515 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 516 return ret; 517 } 518 519 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 520 if (ret < 0) { 521 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 522 return ret; 523 } 524 525 if (status) 526 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 527 else 528 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 529 530 ret = i2c_smbus_write_byte_data(data->client, 531 KXCJK1013_REG_CTRL1, ret); 532 if (ret < 0) { 533 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 534 return ret; 535 } 536 537 if (store_mode == OPERATION) { 538 ret = kxcjk1013_set_mode(data, OPERATION); 539 if (ret < 0) 540 return ret; 541 } 542 543 return 0; 544 } 545 546 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, 547 bool status) 548 { 549 int ret; 550 enum kxcjk1013_mode store_mode; 551 552 ret = kxcjk1013_get_mode(data, &store_mode); 553 if (ret < 0) 554 return ret; 555 556 /* This is requirement by spec to change state to STANDBY */ 557 ret = kxcjk1013_set_mode(data, STANDBY); 558 if (ret < 0) 559 return ret; 560 561 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 562 if (ret < 0) { 563 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 564 return ret; 565 } 566 567 if (status) 568 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 569 else 570 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 571 572 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 573 ret); 574 if (ret < 0) { 575 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 576 return ret; 577 } 578 579 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 580 if (ret < 0) { 581 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 582 return ret; 583 } 584 585 if (status) 586 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 587 else 588 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 589 590 ret = i2c_smbus_write_byte_data(data->client, 591 KXCJK1013_REG_CTRL1, ret); 592 if (ret < 0) { 593 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 594 return ret; 595 } 596 597 if (store_mode == OPERATION) { 598 ret = kxcjk1013_set_mode(data, OPERATION); 599 if (ret < 0) 600 return ret; 601 } 602 603 return 0; 604 } 605 606 static const struct kx_odr_map *kxcjk1013_find_odr_value( 607 const struct kx_odr_map *map, size_t map_size, int val, int val2) 608 { 609 int i; 610 611 for (i = 0; i < map_size; ++i) { 612 if (map[i].val == val && map[i].val2 == val2) 613 return &map[i]; 614 } 615 616 return ERR_PTR(-EINVAL); 617 } 618 619 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map, 620 size_t map_size, int odr_bits, 621 int *val, int *val2) 622 { 623 int i; 624 625 for (i = 0; i < map_size; ++i) { 626 if (map[i].odr_bits == odr_bits) { 627 *val = map[i].val; 628 *val2 = map[i].val2; 629 return IIO_VAL_INT_PLUS_MICRO; 630 } 631 } 632 633 return -EINVAL; 634 } 635 636 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 637 { 638 int ret; 639 enum kxcjk1013_mode store_mode; 640 const struct kx_odr_map *odr_setting; 641 642 ret = kxcjk1013_get_mode(data, &store_mode); 643 if (ret < 0) 644 return ret; 645 646 if (data->chipset == KXTF9) 647 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table, 648 ARRAY_SIZE(kxtf9_samp_freq_table), 649 val, val2); 650 else 651 odr_setting = kxcjk1013_find_odr_value(samp_freq_table, 652 ARRAY_SIZE(samp_freq_table), 653 val, val2); 654 655 if (IS_ERR(odr_setting)) 656 return PTR_ERR(odr_setting); 657 658 /* To change ODR, the chip must be set to STANDBY as per spec */ 659 ret = kxcjk1013_set_mode(data, STANDBY); 660 if (ret < 0) 661 return ret; 662 663 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL, 664 odr_setting->odr_bits); 665 if (ret < 0) { 666 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 667 return ret; 668 } 669 670 data->odr_bits = odr_setting->odr_bits; 671 672 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2, 673 odr_setting->wuf_bits); 674 if (ret < 0) { 675 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 676 return ret; 677 } 678 679 if (store_mode == OPERATION) { 680 ret = kxcjk1013_set_mode(data, OPERATION); 681 if (ret < 0) 682 return ret; 683 } 684 685 return 0; 686 } 687 688 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 689 { 690 if (data->chipset == KXTF9) 691 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table, 692 ARRAY_SIZE(kxtf9_samp_freq_table), 693 data->odr_bits, val, val2); 694 else 695 return kxcjk1013_convert_odr_value(samp_freq_table, 696 ARRAY_SIZE(samp_freq_table), 697 data->odr_bits, val, val2); 698 } 699 700 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 701 { 702 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 703 int ret; 704 705 ret = i2c_smbus_read_word_data(data->client, reg); 706 if (ret < 0) { 707 dev_err(&data->client->dev, 708 "failed to read accel_%c registers\n", 'x' + axis); 709 return ret; 710 } 711 712 return ret; 713 } 714 715 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 716 { 717 int ret, i; 718 enum kxcjk1013_mode store_mode; 719 720 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 721 if (KXCJK1013_scale_table[i].scale == val) { 722 ret = kxcjk1013_get_mode(data, &store_mode); 723 if (ret < 0) 724 return ret; 725 726 ret = kxcjk1013_set_mode(data, STANDBY); 727 if (ret < 0) 728 return ret; 729 730 ret = kxcjk1013_set_range(data, i); 731 if (ret < 0) 732 return ret; 733 734 if (store_mode == OPERATION) { 735 ret = kxcjk1013_set_mode(data, OPERATION); 736 if (ret) 737 return ret; 738 } 739 740 return 0; 741 } 742 } 743 744 return -EINVAL; 745 } 746 747 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 748 struct iio_chan_spec const *chan, int *val, 749 int *val2, long mask) 750 { 751 struct kxcjk1013_data *data = iio_priv(indio_dev); 752 int ret; 753 754 switch (mask) { 755 case IIO_CHAN_INFO_RAW: 756 mutex_lock(&data->mutex); 757 if (iio_buffer_enabled(indio_dev)) 758 ret = -EBUSY; 759 else { 760 ret = kxcjk1013_set_power_state(data, true); 761 if (ret < 0) { 762 mutex_unlock(&data->mutex); 763 return ret; 764 } 765 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 766 if (ret < 0) { 767 kxcjk1013_set_power_state(data, false); 768 mutex_unlock(&data->mutex); 769 return ret; 770 } 771 *val = sign_extend32(ret >> 4, 11); 772 ret = kxcjk1013_set_power_state(data, false); 773 } 774 mutex_unlock(&data->mutex); 775 776 if (ret < 0) 777 return ret; 778 779 return IIO_VAL_INT; 780 781 case IIO_CHAN_INFO_SCALE: 782 *val = 0; 783 *val2 = KXCJK1013_scale_table[data->range].scale; 784 return IIO_VAL_INT_PLUS_MICRO; 785 786 case IIO_CHAN_INFO_SAMP_FREQ: 787 mutex_lock(&data->mutex); 788 ret = kxcjk1013_get_odr(data, val, val2); 789 mutex_unlock(&data->mutex); 790 return ret; 791 792 default: 793 return -EINVAL; 794 } 795 } 796 797 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 798 struct iio_chan_spec const *chan, int val, 799 int val2, long mask) 800 { 801 struct kxcjk1013_data *data = iio_priv(indio_dev); 802 int ret; 803 804 switch (mask) { 805 case IIO_CHAN_INFO_SAMP_FREQ: 806 mutex_lock(&data->mutex); 807 ret = kxcjk1013_set_odr(data, val, val2); 808 mutex_unlock(&data->mutex); 809 break; 810 case IIO_CHAN_INFO_SCALE: 811 if (val) 812 return -EINVAL; 813 814 mutex_lock(&data->mutex); 815 ret = kxcjk1013_set_scale(data, val2); 816 mutex_unlock(&data->mutex); 817 break; 818 default: 819 ret = -EINVAL; 820 } 821 822 return ret; 823 } 824 825 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 826 const struct iio_chan_spec *chan, 827 enum iio_event_type type, 828 enum iio_event_direction dir, 829 enum iio_event_info info, 830 int *val, int *val2) 831 { 832 struct kxcjk1013_data *data = iio_priv(indio_dev); 833 834 *val2 = 0; 835 switch (info) { 836 case IIO_EV_INFO_VALUE: 837 *val = data->wake_thres; 838 break; 839 case IIO_EV_INFO_PERIOD: 840 *val = data->wake_dur; 841 break; 842 default: 843 return -EINVAL; 844 } 845 846 return IIO_VAL_INT; 847 } 848 849 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 850 const struct iio_chan_spec *chan, 851 enum iio_event_type type, 852 enum iio_event_direction dir, 853 enum iio_event_info info, 854 int val, int val2) 855 { 856 struct kxcjk1013_data *data = iio_priv(indio_dev); 857 858 if (data->ev_enable_state) 859 return -EBUSY; 860 861 switch (info) { 862 case IIO_EV_INFO_VALUE: 863 data->wake_thres = val; 864 break; 865 case IIO_EV_INFO_PERIOD: 866 data->wake_dur = val; 867 break; 868 default: 869 return -EINVAL; 870 } 871 872 return 0; 873 } 874 875 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 876 const struct iio_chan_spec *chan, 877 enum iio_event_type type, 878 enum iio_event_direction dir) 879 { 880 struct kxcjk1013_data *data = iio_priv(indio_dev); 881 882 return data->ev_enable_state; 883 } 884 885 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 886 const struct iio_chan_spec *chan, 887 enum iio_event_type type, 888 enum iio_event_direction dir, 889 int state) 890 { 891 struct kxcjk1013_data *data = iio_priv(indio_dev); 892 int ret; 893 894 if (state && data->ev_enable_state) 895 return 0; 896 897 mutex_lock(&data->mutex); 898 899 if (!state && data->motion_trigger_on) { 900 data->ev_enable_state = 0; 901 mutex_unlock(&data->mutex); 902 return 0; 903 } 904 905 /* 906 * We will expect the enable and disable to do operation in 907 * in reverse order. This will happen here anyway as our 908 * resume operation uses sync mode runtime pm calls, the 909 * suspend operation will be delayed by autosuspend delay 910 * So the disable operation will still happen in reverse of 911 * enable operation. When runtime pm is disabled the mode 912 * is always on so sequence doesn't matter 913 */ 914 ret = kxcjk1013_set_power_state(data, state); 915 if (ret < 0) { 916 mutex_unlock(&data->mutex); 917 return ret; 918 } 919 920 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 921 if (ret < 0) { 922 kxcjk1013_set_power_state(data, false); 923 data->ev_enable_state = 0; 924 mutex_unlock(&data->mutex); 925 return ret; 926 } 927 928 data->ev_enable_state = state; 929 mutex_unlock(&data->mutex); 930 931 return 0; 932 } 933 934 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev) 935 { 936 struct kxcjk1013_data *data = iio_priv(indio_dev); 937 938 return kxcjk1013_set_power_state(data, true); 939 } 940 941 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev) 942 { 943 struct kxcjk1013_data *data = iio_priv(indio_dev); 944 945 return kxcjk1013_set_power_state(data, false); 946 } 947 948 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev, 949 struct device_attribute *attr, 950 char *buf) 951 { 952 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 953 struct kxcjk1013_data *data = iio_priv(indio_dev); 954 const char *str; 955 956 if (data->chipset == KXTF9) 957 str = kxtf9_samp_freq_avail; 958 else 959 str = kxcjk1013_samp_freq_avail; 960 961 return sprintf(buf, "%s\n", str); 962 } 963 964 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO, 965 kxcjk1013_get_samp_freq_avail, NULL, 0); 966 967 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 968 969 static struct attribute *kxcjk1013_attributes[] = { 970 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr, 971 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 972 NULL, 973 }; 974 975 static const struct attribute_group kxcjk1013_attrs_group = { 976 .attrs = kxcjk1013_attributes, 977 }; 978 979 static const struct iio_event_spec kxcjk1013_event = { 980 .type = IIO_EV_TYPE_THRESH, 981 .dir = IIO_EV_DIR_EITHER, 982 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 983 BIT(IIO_EV_INFO_ENABLE) | 984 BIT(IIO_EV_INFO_PERIOD) 985 }; 986 987 static const struct iio_mount_matrix * 988 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev, 989 const struct iio_chan_spec *chan) 990 { 991 struct kxcjk1013_data *data = iio_priv(indio_dev); 992 993 return &data->orientation; 994 } 995 996 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = { 997 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix), 998 { } 999 }; 1000 1001 #define KXCJK1013_CHANNEL(_axis) { \ 1002 .type = IIO_ACCEL, \ 1003 .modified = 1, \ 1004 .channel2 = IIO_MOD_##_axis, \ 1005 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 1006 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 1007 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 1008 .scan_index = AXIS_##_axis, \ 1009 .scan_type = { \ 1010 .sign = 's', \ 1011 .realbits = 12, \ 1012 .storagebits = 16, \ 1013 .shift = 4, \ 1014 .endianness = IIO_LE, \ 1015 }, \ 1016 .event_spec = &kxcjk1013_event, \ 1017 .ext_info = kxcjk1013_ext_info, \ 1018 .num_event_specs = 1 \ 1019 } 1020 1021 static const struct iio_chan_spec kxcjk1013_channels[] = { 1022 KXCJK1013_CHANNEL(X), 1023 KXCJK1013_CHANNEL(Y), 1024 KXCJK1013_CHANNEL(Z), 1025 IIO_CHAN_SOFT_TIMESTAMP(3), 1026 }; 1027 1028 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1029 .preenable = kxcjk1013_buffer_preenable, 1030 .postdisable = kxcjk1013_buffer_postdisable, 1031 }; 1032 1033 static const struct iio_info kxcjk1013_info = { 1034 .attrs = &kxcjk1013_attrs_group, 1035 .read_raw = kxcjk1013_read_raw, 1036 .write_raw = kxcjk1013_write_raw, 1037 .read_event_value = kxcjk1013_read_event, 1038 .write_event_value = kxcjk1013_write_event, 1039 .write_event_config = kxcjk1013_write_event_config, 1040 .read_event_config = kxcjk1013_read_event_config, 1041 }; 1042 1043 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 1044 1045 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 1046 { 1047 struct iio_poll_func *pf = p; 1048 struct iio_dev *indio_dev = pf->indio_dev; 1049 struct kxcjk1013_data *data = iio_priv(indio_dev); 1050 int ret; 1051 1052 mutex_lock(&data->mutex); 1053 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 1054 KXCJK1013_REG_XOUT_L, 1055 AXIS_MAX * 2, 1056 (u8 *)data->buffer); 1057 mutex_unlock(&data->mutex); 1058 if (ret < 0) 1059 goto err; 1060 1061 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 1062 data->timestamp); 1063 err: 1064 iio_trigger_notify_done(indio_dev->trig); 1065 1066 return IRQ_HANDLED; 1067 } 1068 1069 static int kxcjk1013_trig_try_reen(struct iio_trigger *trig) 1070 { 1071 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1072 struct kxcjk1013_data *data = iio_priv(indio_dev); 1073 int ret; 1074 1075 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 1076 if (ret < 0) { 1077 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1078 return ret; 1079 } 1080 1081 return 0; 1082 } 1083 1084 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 1085 bool state) 1086 { 1087 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1088 struct kxcjk1013_data *data = iio_priv(indio_dev); 1089 int ret; 1090 1091 mutex_lock(&data->mutex); 1092 1093 if (!state && data->ev_enable_state && data->motion_trigger_on) { 1094 data->motion_trigger_on = false; 1095 mutex_unlock(&data->mutex); 1096 return 0; 1097 } 1098 1099 ret = kxcjk1013_set_power_state(data, state); 1100 if (ret < 0) { 1101 mutex_unlock(&data->mutex); 1102 return ret; 1103 } 1104 if (data->motion_trig == trig) 1105 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1106 else 1107 ret = kxcjk1013_setup_new_data_interrupt(data, state); 1108 if (ret < 0) { 1109 kxcjk1013_set_power_state(data, false); 1110 mutex_unlock(&data->mutex); 1111 return ret; 1112 } 1113 if (data->motion_trig == trig) 1114 data->motion_trigger_on = state; 1115 else 1116 data->dready_trigger_on = state; 1117 1118 mutex_unlock(&data->mutex); 1119 1120 return 0; 1121 } 1122 1123 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1124 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1125 .try_reenable = kxcjk1013_trig_try_reen, 1126 }; 1127 1128 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev) 1129 { 1130 struct kxcjk1013_data *data = iio_priv(indio_dev); 1131 1132 int ret = i2c_smbus_read_byte_data(data->client, 1133 KXCJK1013_REG_INT_SRC2); 1134 if (ret < 0) { 1135 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1136 return; 1137 } 1138 1139 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1140 iio_push_event(indio_dev, 1141 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1142 0, 1143 IIO_MOD_X, 1144 IIO_EV_TYPE_THRESH, 1145 IIO_EV_DIR_FALLING), 1146 data->timestamp); 1147 1148 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1149 iio_push_event(indio_dev, 1150 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1151 0, 1152 IIO_MOD_X, 1153 IIO_EV_TYPE_THRESH, 1154 IIO_EV_DIR_RISING), 1155 data->timestamp); 1156 1157 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1158 iio_push_event(indio_dev, 1159 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1160 0, 1161 IIO_MOD_Y, 1162 IIO_EV_TYPE_THRESH, 1163 IIO_EV_DIR_FALLING), 1164 data->timestamp); 1165 1166 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1167 iio_push_event(indio_dev, 1168 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1169 0, 1170 IIO_MOD_Y, 1171 IIO_EV_TYPE_THRESH, 1172 IIO_EV_DIR_RISING), 1173 data->timestamp); 1174 1175 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1176 iio_push_event(indio_dev, 1177 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1178 0, 1179 IIO_MOD_Z, 1180 IIO_EV_TYPE_THRESH, 1181 IIO_EV_DIR_FALLING), 1182 data->timestamp); 1183 1184 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1185 iio_push_event(indio_dev, 1186 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1187 0, 1188 IIO_MOD_Z, 1189 IIO_EV_TYPE_THRESH, 1190 IIO_EV_DIR_RISING), 1191 data->timestamp); 1192 } 1193 1194 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1195 { 1196 struct iio_dev *indio_dev = private; 1197 struct kxcjk1013_data *data = iio_priv(indio_dev); 1198 int ret; 1199 1200 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1); 1201 if (ret < 0) { 1202 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1203 goto ack_intr; 1204 } 1205 1206 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) { 1207 if (data->chipset == KXTF9) 1208 iio_push_event(indio_dev, 1209 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1210 0, 1211 IIO_MOD_X_AND_Y_AND_Z, 1212 IIO_EV_TYPE_THRESH, 1213 IIO_EV_DIR_RISING), 1214 data->timestamp); 1215 else 1216 kxcjk1013_report_motion_event(indio_dev); 1217 } 1218 1219 ack_intr: 1220 if (data->dready_trigger_on) 1221 return IRQ_HANDLED; 1222 1223 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 1224 if (ret < 0) 1225 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1226 1227 return IRQ_HANDLED; 1228 } 1229 1230 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1231 { 1232 struct iio_dev *indio_dev = private; 1233 struct kxcjk1013_data *data = iio_priv(indio_dev); 1234 1235 data->timestamp = iio_get_time_ns(indio_dev); 1236 1237 if (data->dready_trigger_on) 1238 iio_trigger_poll(data->dready_trig); 1239 else if (data->motion_trigger_on) 1240 iio_trigger_poll(data->motion_trig); 1241 1242 if (data->ev_enable_state) 1243 return IRQ_WAKE_THREAD; 1244 else 1245 return IRQ_HANDLED; 1246 } 1247 1248 static const char *kxcjk1013_match_acpi_device(struct device *dev, 1249 enum kx_chipset *chipset, 1250 bool *is_smo8500_device) 1251 { 1252 const struct acpi_device_id *id; 1253 1254 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1255 if (!id) 1256 return NULL; 1257 1258 if (strcmp(id->id, "SMO8500") == 0) 1259 *is_smo8500_device = true; 1260 1261 *chipset = (enum kx_chipset)id->driver_data; 1262 1263 return dev_name(dev); 1264 } 1265 1266 static int kxcjk1013_probe(struct i2c_client *client, 1267 const struct i2c_device_id *id) 1268 { 1269 struct kxcjk1013_data *data; 1270 struct iio_dev *indio_dev; 1271 struct kxcjk_1013_platform_data *pdata; 1272 const char *name; 1273 int ret; 1274 1275 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1276 if (!indio_dev) 1277 return -ENOMEM; 1278 1279 data = iio_priv(indio_dev); 1280 i2c_set_clientdata(client, indio_dev); 1281 data->client = client; 1282 1283 pdata = dev_get_platdata(&client->dev); 1284 if (pdata) { 1285 data->active_high_intr = pdata->active_high_intr; 1286 data->orientation = pdata->orientation; 1287 } else { 1288 data->active_high_intr = true; /* default polarity */ 1289 1290 ret = iio_read_mount_matrix(&client->dev, "mount-matrix", 1291 &data->orientation); 1292 if (ret) 1293 return ret; 1294 } 1295 1296 if (id) { 1297 data->chipset = (enum kx_chipset)(id->driver_data); 1298 name = id->name; 1299 } else if (ACPI_HANDLE(&client->dev)) { 1300 name = kxcjk1013_match_acpi_device(&client->dev, 1301 &data->chipset, 1302 &data->is_smo8500_device); 1303 } else 1304 return -ENODEV; 1305 1306 ret = kxcjk1013_chip_init(data); 1307 if (ret < 0) 1308 return ret; 1309 1310 mutex_init(&data->mutex); 1311 1312 indio_dev->channels = kxcjk1013_channels; 1313 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1314 indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1315 indio_dev->name = name; 1316 indio_dev->modes = INDIO_DIRECT_MODE; 1317 indio_dev->info = &kxcjk1013_info; 1318 1319 if (client->irq > 0 && !data->is_smo8500_device) { 1320 ret = devm_request_threaded_irq(&client->dev, client->irq, 1321 kxcjk1013_data_rdy_trig_poll, 1322 kxcjk1013_event_handler, 1323 IRQF_TRIGGER_RISING, 1324 KXCJK1013_IRQ_NAME, 1325 indio_dev); 1326 if (ret) 1327 goto err_poweroff; 1328 1329 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1330 "%s-dev%d", 1331 indio_dev->name, 1332 indio_dev->id); 1333 if (!data->dready_trig) { 1334 ret = -ENOMEM; 1335 goto err_poweroff; 1336 } 1337 1338 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1339 "%s-any-motion-dev%d", 1340 indio_dev->name, 1341 indio_dev->id); 1342 if (!data->motion_trig) { 1343 ret = -ENOMEM; 1344 goto err_poweroff; 1345 } 1346 1347 data->dready_trig->dev.parent = &client->dev; 1348 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1349 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1350 indio_dev->trig = data->dready_trig; 1351 iio_trigger_get(indio_dev->trig); 1352 ret = iio_trigger_register(data->dready_trig); 1353 if (ret) 1354 goto err_poweroff; 1355 1356 data->motion_trig->dev.parent = &client->dev; 1357 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1358 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1359 ret = iio_trigger_register(data->motion_trig); 1360 if (ret) { 1361 data->motion_trig = NULL; 1362 goto err_trigger_unregister; 1363 } 1364 } 1365 1366 ret = iio_triggered_buffer_setup(indio_dev, 1367 &iio_pollfunc_store_time, 1368 kxcjk1013_trigger_handler, 1369 &kxcjk1013_buffer_setup_ops); 1370 if (ret < 0) { 1371 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1372 goto err_trigger_unregister; 1373 } 1374 1375 ret = pm_runtime_set_active(&client->dev); 1376 if (ret) 1377 goto err_buffer_cleanup; 1378 1379 pm_runtime_enable(&client->dev); 1380 pm_runtime_set_autosuspend_delay(&client->dev, 1381 KXCJK1013_SLEEP_DELAY_MS); 1382 pm_runtime_use_autosuspend(&client->dev); 1383 1384 ret = iio_device_register(indio_dev); 1385 if (ret < 0) { 1386 dev_err(&client->dev, "unable to register iio device\n"); 1387 goto err_buffer_cleanup; 1388 } 1389 1390 return 0; 1391 1392 err_buffer_cleanup: 1393 if (data->dready_trig) 1394 iio_triggered_buffer_cleanup(indio_dev); 1395 err_trigger_unregister: 1396 if (data->dready_trig) 1397 iio_trigger_unregister(data->dready_trig); 1398 if (data->motion_trig) 1399 iio_trigger_unregister(data->motion_trig); 1400 err_poweroff: 1401 kxcjk1013_set_mode(data, STANDBY); 1402 1403 return ret; 1404 } 1405 1406 static int kxcjk1013_remove(struct i2c_client *client) 1407 { 1408 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1409 struct kxcjk1013_data *data = iio_priv(indio_dev); 1410 1411 iio_device_unregister(indio_dev); 1412 1413 pm_runtime_disable(&client->dev); 1414 pm_runtime_set_suspended(&client->dev); 1415 pm_runtime_put_noidle(&client->dev); 1416 1417 if (data->dready_trig) { 1418 iio_triggered_buffer_cleanup(indio_dev); 1419 iio_trigger_unregister(data->dready_trig); 1420 iio_trigger_unregister(data->motion_trig); 1421 } 1422 1423 mutex_lock(&data->mutex); 1424 kxcjk1013_set_mode(data, STANDBY); 1425 mutex_unlock(&data->mutex); 1426 1427 return 0; 1428 } 1429 1430 #ifdef CONFIG_PM_SLEEP 1431 static int kxcjk1013_suspend(struct device *dev) 1432 { 1433 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1434 struct kxcjk1013_data *data = iio_priv(indio_dev); 1435 int ret; 1436 1437 mutex_lock(&data->mutex); 1438 ret = kxcjk1013_set_mode(data, STANDBY); 1439 mutex_unlock(&data->mutex); 1440 1441 return ret; 1442 } 1443 1444 static int kxcjk1013_resume(struct device *dev) 1445 { 1446 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1447 struct kxcjk1013_data *data = iio_priv(indio_dev); 1448 int ret = 0; 1449 1450 mutex_lock(&data->mutex); 1451 ret = kxcjk1013_set_mode(data, OPERATION); 1452 if (ret == 0) 1453 ret = kxcjk1013_set_range(data, data->range); 1454 mutex_unlock(&data->mutex); 1455 1456 return ret; 1457 } 1458 #endif 1459 1460 #ifdef CONFIG_PM 1461 static int kxcjk1013_runtime_suspend(struct device *dev) 1462 { 1463 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1464 struct kxcjk1013_data *data = iio_priv(indio_dev); 1465 int ret; 1466 1467 ret = kxcjk1013_set_mode(data, STANDBY); 1468 if (ret < 0) { 1469 dev_err(&data->client->dev, "powering off device failed\n"); 1470 return -EAGAIN; 1471 } 1472 return 0; 1473 } 1474 1475 static int kxcjk1013_runtime_resume(struct device *dev) 1476 { 1477 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1478 struct kxcjk1013_data *data = iio_priv(indio_dev); 1479 int ret; 1480 int sleep_val; 1481 1482 ret = kxcjk1013_set_mode(data, OPERATION); 1483 if (ret < 0) 1484 return ret; 1485 1486 sleep_val = kxcjk1013_get_startup_times(data); 1487 if (sleep_val < 20000) 1488 usleep_range(sleep_val, 20000); 1489 else 1490 msleep_interruptible(sleep_val/1000); 1491 1492 return 0; 1493 } 1494 #endif 1495 1496 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1497 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1498 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, 1499 kxcjk1013_runtime_resume, NULL) 1500 }; 1501 1502 static const struct acpi_device_id kx_acpi_match[] = { 1503 {"KXCJ1013", KXCJK1013}, 1504 {"KXCJ1008", KXCJ91008}, 1505 {"KXCJ9000", KXCJ91008}, 1506 {"KIOX0008", KXCJ91008}, 1507 {"KIOX0009", KXTJ21009}, 1508 {"KIOX000A", KXCJ91008}, 1509 {"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */ 1510 {"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */ 1511 {"KXTJ1009", KXTJ21009}, 1512 {"KXJ2109", KXTJ21009}, 1513 {"SMO8500", KXCJ91008}, 1514 { }, 1515 }; 1516 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1517 1518 static const struct i2c_device_id kxcjk1013_id[] = { 1519 {"kxcjk1013", KXCJK1013}, 1520 {"kxcj91008", KXCJ91008}, 1521 {"kxtj21009", KXTJ21009}, 1522 {"kxtf9", KXTF9}, 1523 {"SMO8500", KXCJ91008}, 1524 {} 1525 }; 1526 1527 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1528 1529 static const struct of_device_id kxcjk1013_of_match[] = { 1530 { .compatible = "kionix,kxcjk1013", }, 1531 { .compatible = "kionix,kxcj91008", }, 1532 { .compatible = "kionix,kxtj21009", }, 1533 { .compatible = "kionix,kxtf9", }, 1534 { } 1535 }; 1536 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match); 1537 1538 static struct i2c_driver kxcjk1013_driver = { 1539 .driver = { 1540 .name = KXCJK1013_DRV_NAME, 1541 .acpi_match_table = ACPI_PTR(kx_acpi_match), 1542 .of_match_table = kxcjk1013_of_match, 1543 .pm = &kxcjk1013_pm_ops, 1544 }, 1545 .probe = kxcjk1013_probe, 1546 .remove = kxcjk1013_remove, 1547 .id_table = kxcjk1013_id, 1548 }; 1549 module_i2c_driver(kxcjk1013_driver); 1550 1551 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1552 MODULE_LICENSE("GPL v2"); 1553 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1554