xref: /openbmc/linux/drivers/iio/accel/kxcjk-1013.c (revision 8730046c)
1 /*
2  * KXCJK-1013 3-axis accelerometer driver
3  * Copyright (c) 2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/i2c.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/bitops.h>
20 #include <linux/slab.h>
21 #include <linux/string.h>
22 #include <linux/acpi.h>
23 #include <linux/pm.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/iio/iio.h>
26 #include <linux/iio/sysfs.h>
27 #include <linux/iio/buffer.h>
28 #include <linux/iio/trigger.h>
29 #include <linux/iio/events.h>
30 #include <linux/iio/trigger_consumer.h>
31 #include <linux/iio/triggered_buffer.h>
32 #include <linux/iio/accel/kxcjk_1013.h>
33 
34 #define KXCJK1013_DRV_NAME "kxcjk1013"
35 #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
36 
37 #define KXCJK1013_REG_XOUT_L		0x06
38 /*
39  * From low byte X axis register, all the other addresses of Y and Z can be
40  * obtained by just applying axis offset. The following axis defines are just
41  * provide clarity, but not used.
42  */
43 #define KXCJK1013_REG_XOUT_H		0x07
44 #define KXCJK1013_REG_YOUT_L		0x08
45 #define KXCJK1013_REG_YOUT_H		0x09
46 #define KXCJK1013_REG_ZOUT_L		0x0A
47 #define KXCJK1013_REG_ZOUT_H		0x0B
48 
49 #define KXCJK1013_REG_DCST_RESP		0x0C
50 #define KXCJK1013_REG_WHO_AM_I		0x0F
51 #define KXCJK1013_REG_INT_SRC1		0x16
52 #define KXCJK1013_REG_INT_SRC2		0x17
53 #define KXCJK1013_REG_STATUS_REG	0x18
54 #define KXCJK1013_REG_INT_REL		0x1A
55 #define KXCJK1013_REG_CTRL1		0x1B
56 #define KXCJK1013_REG_CTRL2		0x1D
57 #define KXCJK1013_REG_INT_CTRL1		0x1E
58 #define KXCJK1013_REG_INT_CTRL2		0x1F
59 #define KXCJK1013_REG_DATA_CTRL		0x21
60 #define KXCJK1013_REG_WAKE_TIMER	0x29
61 #define KXCJK1013_REG_SELF_TEST		0x3A
62 #define KXCJK1013_REG_WAKE_THRES	0x6A
63 
64 #define KXCJK1013_REG_CTRL1_BIT_PC1	BIT(7)
65 #define KXCJK1013_REG_CTRL1_BIT_RES	BIT(6)
66 #define KXCJK1013_REG_CTRL1_BIT_DRDY	BIT(5)
67 #define KXCJK1013_REG_CTRL1_BIT_GSEL1	BIT(4)
68 #define KXCJK1013_REG_CTRL1_BIT_GSEL0	BIT(3)
69 #define KXCJK1013_REG_CTRL1_BIT_WUFE	BIT(1)
70 #define KXCJK1013_REG_INT_REG1_BIT_IEA	BIT(4)
71 #define KXCJK1013_REG_INT_REG1_BIT_IEN	BIT(5)
72 
73 #define KXCJK1013_DATA_MASK_12_BIT	0x0FFF
74 #define KXCJK1013_MAX_STARTUP_TIME_US	100000
75 
76 #define KXCJK1013_SLEEP_DELAY_MS	2000
77 
78 #define KXCJK1013_REG_INT_SRC2_BIT_ZP	BIT(0)
79 #define KXCJK1013_REG_INT_SRC2_BIT_ZN	BIT(1)
80 #define KXCJK1013_REG_INT_SRC2_BIT_YP	BIT(2)
81 #define KXCJK1013_REG_INT_SRC2_BIT_YN	BIT(3)
82 #define KXCJK1013_REG_INT_SRC2_BIT_XP	BIT(4)
83 #define KXCJK1013_REG_INT_SRC2_BIT_XN	BIT(5)
84 
85 #define KXCJK1013_DEFAULT_WAKE_THRES	1
86 
87 enum kx_chipset {
88 	KXCJK1013,
89 	KXCJ91008,
90 	KXTJ21009,
91 	KX_MAX_CHIPS /* this must be last */
92 };
93 
94 struct kxcjk1013_data {
95 	struct i2c_client *client;
96 	struct iio_trigger *dready_trig;
97 	struct iio_trigger *motion_trig;
98 	struct mutex mutex;
99 	s16 buffer[8];
100 	u8 odr_bits;
101 	u8 range;
102 	int wake_thres;
103 	int wake_dur;
104 	bool active_high_intr;
105 	bool dready_trigger_on;
106 	int ev_enable_state;
107 	bool motion_trigger_on;
108 	int64_t timestamp;
109 	enum kx_chipset chipset;
110 	bool is_smo8500_device;
111 };
112 
113 enum kxcjk1013_axis {
114 	AXIS_X,
115 	AXIS_Y,
116 	AXIS_Z,
117 	AXIS_MAX,
118 };
119 
120 enum kxcjk1013_mode {
121 	STANDBY,
122 	OPERATION,
123 };
124 
125 enum kxcjk1013_range {
126 	KXCJK1013_RANGE_2G,
127 	KXCJK1013_RANGE_4G,
128 	KXCJK1013_RANGE_8G,
129 };
130 
131 static const struct {
132 	int val;
133 	int val2;
134 	int odr_bits;
135 } samp_freq_table[] = { {0, 781000, 0x08}, {1, 563000, 0x09},
136 			{3, 125000, 0x0A}, {6, 250000, 0x0B}, {12, 500000, 0},
137 			{25, 0, 0x01}, {50, 0, 0x02}, {100, 0, 0x03},
138 			{200, 0, 0x04}, {400, 0, 0x05}, {800, 0, 0x06},
139 			{1600, 0, 0x07} };
140 
141 /* Refer to section 4 of the specification */
142 static const struct {
143 	int odr_bits;
144 	int usec;
145 } odr_start_up_times[KX_MAX_CHIPS][12] = {
146 	/* KXCJK-1013 */
147 	{
148 		{0x08, 100000},
149 		{0x09, 100000},
150 		{0x0A, 100000},
151 		{0x0B, 100000},
152 		{0, 80000},
153 		{0x01, 41000},
154 		{0x02, 21000},
155 		{0x03, 11000},
156 		{0x04, 6400},
157 		{0x05, 3900},
158 		{0x06, 2700},
159 		{0x07, 2100},
160 	},
161 	/* KXCJ9-1008 */
162 	{
163 		{0x08, 100000},
164 		{0x09, 100000},
165 		{0x0A, 100000},
166 		{0x0B, 100000},
167 		{0, 80000},
168 		{0x01, 41000},
169 		{0x02, 21000},
170 		{0x03, 11000},
171 		{0x04, 6400},
172 		{0x05, 3900},
173 		{0x06, 2700},
174 		{0x07, 2100},
175 	},
176 	/* KXCTJ2-1009 */
177 	{
178 		{0x08, 1240000},
179 		{0x09, 621000},
180 		{0x0A, 309000},
181 		{0x0B, 151000},
182 		{0, 80000},
183 		{0x01, 41000},
184 		{0x02, 21000},
185 		{0x03, 11000},
186 		{0x04, 6000},
187 		{0x05, 4000},
188 		{0x06, 3000},
189 		{0x07, 2000},
190 	},
191 };
192 
193 static const struct {
194 	u16 scale;
195 	u8 gsel_0;
196 	u8 gsel_1;
197 } KXCJK1013_scale_table[] = { {9582, 0, 0},
198 			      {19163, 1, 0},
199 			      {38326, 0, 1} };
200 
201 static const struct {
202 	int val;
203 	int val2;
204 	int odr_bits;
205 } wake_odr_data_rate_table[] = { {0, 781000, 0x00},
206 				 {1, 563000, 0x01},
207 				 {3, 125000, 0x02},
208 				 {6, 250000, 0x03},
209 				 {12, 500000, 0x04},
210 				 {25, 0, 0x05},
211 				 {50, 0, 0x06},
212 				 {100, 0, 0x06},
213 				 {200, 0, 0x06},
214 				 {400, 0, 0x06},
215 				 {800, 0, 0x06},
216 				 {1600, 0, 0x06} };
217 
218 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
219 			      enum kxcjk1013_mode mode)
220 {
221 	int ret;
222 
223 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
224 	if (ret < 0) {
225 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
226 		return ret;
227 	}
228 
229 	if (mode == STANDBY)
230 		ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
231 	else
232 		ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
233 
234 	ret = i2c_smbus_write_byte_data(data->client,
235 					KXCJK1013_REG_CTRL1, ret);
236 	if (ret < 0) {
237 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
238 		return ret;
239 	}
240 
241 	return 0;
242 }
243 
244 static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
245 			      enum kxcjk1013_mode *mode)
246 {
247 	int ret;
248 
249 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
250 	if (ret < 0) {
251 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
252 		return ret;
253 	}
254 
255 	if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
256 		*mode = OPERATION;
257 	else
258 		*mode = STANDBY;
259 
260 	return 0;
261 }
262 
263 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
264 {
265 	int ret;
266 
267 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
268 	if (ret < 0) {
269 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
270 		return ret;
271 	}
272 
273 	ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
274 		 KXCJK1013_REG_CTRL1_BIT_GSEL1);
275 	ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
276 	ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
277 
278 	ret = i2c_smbus_write_byte_data(data->client,
279 					KXCJK1013_REG_CTRL1,
280 					ret);
281 	if (ret < 0) {
282 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
283 		return ret;
284 	}
285 
286 	data->range = range_index;
287 
288 	return 0;
289 }
290 
291 static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
292 {
293 	int ret;
294 
295 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
296 	if (ret < 0) {
297 		dev_err(&data->client->dev, "Error reading who_am_i\n");
298 		return ret;
299 	}
300 
301 	dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
302 
303 	ret = kxcjk1013_set_mode(data, STANDBY);
304 	if (ret < 0)
305 		return ret;
306 
307 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
308 	if (ret < 0) {
309 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
310 		return ret;
311 	}
312 
313 	/* Set 12 bit mode */
314 	ret |= KXCJK1013_REG_CTRL1_BIT_RES;
315 
316 	ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1,
317 					ret);
318 	if (ret < 0) {
319 		dev_err(&data->client->dev, "Error reading reg_ctrl\n");
320 		return ret;
321 	}
322 
323 	/* Setting range to 4G */
324 	ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
325 	if (ret < 0)
326 		return ret;
327 
328 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
329 	if (ret < 0) {
330 		dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
331 		return ret;
332 	}
333 
334 	data->odr_bits = ret;
335 
336 	/* Set up INT polarity */
337 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
338 	if (ret < 0) {
339 		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
340 		return ret;
341 	}
342 
343 	if (data->active_high_intr)
344 		ret |= KXCJK1013_REG_INT_REG1_BIT_IEA;
345 	else
346 		ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEA;
347 
348 	ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
349 					ret);
350 	if (ret < 0) {
351 		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
352 		return ret;
353 	}
354 
355 	ret = kxcjk1013_set_mode(data, OPERATION);
356 	if (ret < 0)
357 		return ret;
358 
359 	data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
360 
361 	return 0;
362 }
363 
364 #ifdef CONFIG_PM
365 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
366 {
367 	int i;
368 	int idx = data->chipset;
369 
370 	for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
371 		if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
372 			return odr_start_up_times[idx][i].usec;
373 	}
374 
375 	return KXCJK1013_MAX_STARTUP_TIME_US;
376 }
377 #endif
378 
379 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
380 {
381 #ifdef CONFIG_PM
382 	int ret;
383 
384 	if (on)
385 		ret = pm_runtime_get_sync(&data->client->dev);
386 	else {
387 		pm_runtime_mark_last_busy(&data->client->dev);
388 		ret = pm_runtime_put_autosuspend(&data->client->dev);
389 	}
390 	if (ret < 0) {
391 		dev_err(&data->client->dev,
392 			"Failed: kxcjk1013_set_power_state for %d\n", on);
393 		if (on)
394 			pm_runtime_put_noidle(&data->client->dev);
395 		return ret;
396 	}
397 #endif
398 
399 	return 0;
400 }
401 
402 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
403 {
404 	int ret;
405 
406 	ret = i2c_smbus_write_byte_data(data->client,
407 					KXCJK1013_REG_WAKE_TIMER,
408 					data->wake_dur);
409 	if (ret < 0) {
410 		dev_err(&data->client->dev,
411 			"Error writing reg_wake_timer\n");
412 		return ret;
413 	}
414 
415 	ret = i2c_smbus_write_byte_data(data->client,
416 					KXCJK1013_REG_WAKE_THRES,
417 					data->wake_thres);
418 	if (ret < 0) {
419 		dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
420 		return ret;
421 	}
422 
423 	return 0;
424 }
425 
426 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
427 						bool status)
428 {
429 	int ret;
430 	enum kxcjk1013_mode store_mode;
431 
432 	ret = kxcjk1013_get_mode(data, &store_mode);
433 	if (ret < 0)
434 		return ret;
435 
436 	/* This is requirement by spec to change state to STANDBY */
437 	ret = kxcjk1013_set_mode(data, STANDBY);
438 	if (ret < 0)
439 		return ret;
440 
441 	ret = kxcjk1013_chip_update_thresholds(data);
442 	if (ret < 0)
443 		return ret;
444 
445 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
446 	if (ret < 0) {
447 		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
448 		return ret;
449 	}
450 
451 	if (status)
452 		ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
453 	else
454 		ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
455 
456 	ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
457 					ret);
458 	if (ret < 0) {
459 		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
460 		return ret;
461 	}
462 
463 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
464 	if (ret < 0) {
465 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
466 		return ret;
467 	}
468 
469 	if (status)
470 		ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
471 	else
472 		ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
473 
474 	ret = i2c_smbus_write_byte_data(data->client,
475 					KXCJK1013_REG_CTRL1, ret);
476 	if (ret < 0) {
477 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
478 		return ret;
479 	}
480 
481 	if (store_mode == OPERATION) {
482 		ret = kxcjk1013_set_mode(data, OPERATION);
483 		if (ret < 0)
484 			return ret;
485 	}
486 
487 	return 0;
488 }
489 
490 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
491 					      bool status)
492 {
493 	int ret;
494 	enum kxcjk1013_mode store_mode;
495 
496 	ret = kxcjk1013_get_mode(data, &store_mode);
497 	if (ret < 0)
498 		return ret;
499 
500 	/* This is requirement by spec to change state to STANDBY */
501 	ret = kxcjk1013_set_mode(data, STANDBY);
502 	if (ret < 0)
503 		return ret;
504 
505 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
506 	if (ret < 0) {
507 		dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
508 		return ret;
509 	}
510 
511 	if (status)
512 		ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
513 	else
514 		ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
515 
516 	ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
517 					ret);
518 	if (ret < 0) {
519 		dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
520 		return ret;
521 	}
522 
523 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
524 	if (ret < 0) {
525 		dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
526 		return ret;
527 	}
528 
529 	if (status)
530 		ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
531 	else
532 		ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
533 
534 	ret = i2c_smbus_write_byte_data(data->client,
535 					KXCJK1013_REG_CTRL1, ret);
536 	if (ret < 0) {
537 		dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
538 		return ret;
539 	}
540 
541 	if (store_mode == OPERATION) {
542 		ret = kxcjk1013_set_mode(data, OPERATION);
543 		if (ret < 0)
544 			return ret;
545 	}
546 
547 	return 0;
548 }
549 
550 static int kxcjk1013_convert_freq_to_bit(int val, int val2)
551 {
552 	int i;
553 
554 	for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
555 		if (samp_freq_table[i].val == val &&
556 			samp_freq_table[i].val2 == val2) {
557 			return samp_freq_table[i].odr_bits;
558 		}
559 	}
560 
561 	return -EINVAL;
562 }
563 
564 static int kxcjk1013_convert_wake_odr_to_bit(int val, int val2)
565 {
566 	int i;
567 
568 	for (i = 0; i < ARRAY_SIZE(wake_odr_data_rate_table); ++i) {
569 		if (wake_odr_data_rate_table[i].val == val &&
570 			wake_odr_data_rate_table[i].val2 == val2) {
571 			return wake_odr_data_rate_table[i].odr_bits;
572 		}
573 	}
574 
575 	return -EINVAL;
576 }
577 
578 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
579 {
580 	int ret;
581 	int odr_bits;
582 	enum kxcjk1013_mode store_mode;
583 
584 	ret = kxcjk1013_get_mode(data, &store_mode);
585 	if (ret < 0)
586 		return ret;
587 
588 	odr_bits = kxcjk1013_convert_freq_to_bit(val, val2);
589 	if (odr_bits < 0)
590 		return odr_bits;
591 
592 	/* To change ODR, the chip must be set to STANDBY as per spec */
593 	ret = kxcjk1013_set_mode(data, STANDBY);
594 	if (ret < 0)
595 		return ret;
596 
597 	ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL,
598 					odr_bits);
599 	if (ret < 0) {
600 		dev_err(&data->client->dev, "Error writing data_ctrl\n");
601 		return ret;
602 	}
603 
604 	data->odr_bits = odr_bits;
605 
606 	odr_bits = kxcjk1013_convert_wake_odr_to_bit(val, val2);
607 	if (odr_bits < 0)
608 		return odr_bits;
609 
610 	ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2,
611 					odr_bits);
612 	if (ret < 0) {
613 		dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
614 		return ret;
615 	}
616 
617 	if (store_mode == OPERATION) {
618 		ret = kxcjk1013_set_mode(data, OPERATION);
619 		if (ret < 0)
620 			return ret;
621 	}
622 
623 	return 0;
624 }
625 
626 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
627 {
628 	int i;
629 
630 	for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
631 		if (samp_freq_table[i].odr_bits == data->odr_bits) {
632 			*val = samp_freq_table[i].val;
633 			*val2 = samp_freq_table[i].val2;
634 			return IIO_VAL_INT_PLUS_MICRO;
635 		}
636 	}
637 
638 	return -EINVAL;
639 }
640 
641 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
642 {
643 	u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
644 	int ret;
645 
646 	ret = i2c_smbus_read_word_data(data->client, reg);
647 	if (ret < 0) {
648 		dev_err(&data->client->dev,
649 			"failed to read accel_%c registers\n", 'x' + axis);
650 		return ret;
651 	}
652 
653 	return ret;
654 }
655 
656 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
657 {
658 	int ret, i;
659 	enum kxcjk1013_mode store_mode;
660 
661 	for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
662 		if (KXCJK1013_scale_table[i].scale == val) {
663 			ret = kxcjk1013_get_mode(data, &store_mode);
664 			if (ret < 0)
665 				return ret;
666 
667 			ret = kxcjk1013_set_mode(data, STANDBY);
668 			if (ret < 0)
669 				return ret;
670 
671 			ret = kxcjk1013_set_range(data, i);
672 			if (ret < 0)
673 				return ret;
674 
675 			if (store_mode == OPERATION) {
676 				ret = kxcjk1013_set_mode(data, OPERATION);
677 				if (ret)
678 					return ret;
679 			}
680 
681 			return 0;
682 		}
683 	}
684 
685 	return -EINVAL;
686 }
687 
688 static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
689 			      struct iio_chan_spec const *chan, int *val,
690 			      int *val2, long mask)
691 {
692 	struct kxcjk1013_data *data = iio_priv(indio_dev);
693 	int ret;
694 
695 	switch (mask) {
696 	case IIO_CHAN_INFO_RAW:
697 		mutex_lock(&data->mutex);
698 		if (iio_buffer_enabled(indio_dev))
699 			ret = -EBUSY;
700 		else {
701 			ret = kxcjk1013_set_power_state(data, true);
702 			if (ret < 0) {
703 				mutex_unlock(&data->mutex);
704 				return ret;
705 			}
706 			ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
707 			if (ret < 0) {
708 				kxcjk1013_set_power_state(data, false);
709 				mutex_unlock(&data->mutex);
710 				return ret;
711 			}
712 			*val = sign_extend32(ret >> 4, 11);
713 			ret = kxcjk1013_set_power_state(data, false);
714 		}
715 		mutex_unlock(&data->mutex);
716 
717 		if (ret < 0)
718 			return ret;
719 
720 		return IIO_VAL_INT;
721 
722 	case IIO_CHAN_INFO_SCALE:
723 		*val = 0;
724 		*val2 = KXCJK1013_scale_table[data->range].scale;
725 		return IIO_VAL_INT_PLUS_MICRO;
726 
727 	case IIO_CHAN_INFO_SAMP_FREQ:
728 		mutex_lock(&data->mutex);
729 		ret = kxcjk1013_get_odr(data, val, val2);
730 		mutex_unlock(&data->mutex);
731 		return ret;
732 
733 	default:
734 		return -EINVAL;
735 	}
736 }
737 
738 static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
739 			       struct iio_chan_spec const *chan, int val,
740 			       int val2, long mask)
741 {
742 	struct kxcjk1013_data *data = iio_priv(indio_dev);
743 	int ret;
744 
745 	switch (mask) {
746 	case IIO_CHAN_INFO_SAMP_FREQ:
747 		mutex_lock(&data->mutex);
748 		ret = kxcjk1013_set_odr(data, val, val2);
749 		mutex_unlock(&data->mutex);
750 		break;
751 	case IIO_CHAN_INFO_SCALE:
752 		if (val)
753 			return -EINVAL;
754 
755 		mutex_lock(&data->mutex);
756 		ret = kxcjk1013_set_scale(data, val2);
757 		mutex_unlock(&data->mutex);
758 		break;
759 	default:
760 		ret = -EINVAL;
761 	}
762 
763 	return ret;
764 }
765 
766 static int kxcjk1013_read_event(struct iio_dev *indio_dev,
767 				   const struct iio_chan_spec *chan,
768 				   enum iio_event_type type,
769 				   enum iio_event_direction dir,
770 				   enum iio_event_info info,
771 				   int *val, int *val2)
772 {
773 	struct kxcjk1013_data *data = iio_priv(indio_dev);
774 
775 	*val2 = 0;
776 	switch (info) {
777 	case IIO_EV_INFO_VALUE:
778 		*val = data->wake_thres;
779 		break;
780 	case IIO_EV_INFO_PERIOD:
781 		*val = data->wake_dur;
782 		break;
783 	default:
784 		return -EINVAL;
785 	}
786 
787 	return IIO_VAL_INT;
788 }
789 
790 static int kxcjk1013_write_event(struct iio_dev *indio_dev,
791 				    const struct iio_chan_spec *chan,
792 				    enum iio_event_type type,
793 				    enum iio_event_direction dir,
794 				    enum iio_event_info info,
795 				    int val, int val2)
796 {
797 	struct kxcjk1013_data *data = iio_priv(indio_dev);
798 
799 	if (data->ev_enable_state)
800 		return -EBUSY;
801 
802 	switch (info) {
803 	case IIO_EV_INFO_VALUE:
804 		data->wake_thres = val;
805 		break;
806 	case IIO_EV_INFO_PERIOD:
807 		data->wake_dur = val;
808 		break;
809 	default:
810 		return -EINVAL;
811 	}
812 
813 	return 0;
814 }
815 
816 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
817 					  const struct iio_chan_spec *chan,
818 					  enum iio_event_type type,
819 					  enum iio_event_direction dir)
820 {
821 	struct kxcjk1013_data *data = iio_priv(indio_dev);
822 
823 	return data->ev_enable_state;
824 }
825 
826 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
827 					   const struct iio_chan_spec *chan,
828 					   enum iio_event_type type,
829 					   enum iio_event_direction dir,
830 					   int state)
831 {
832 	struct kxcjk1013_data *data = iio_priv(indio_dev);
833 	int ret;
834 
835 	if (state && data->ev_enable_state)
836 		return 0;
837 
838 	mutex_lock(&data->mutex);
839 
840 	if (!state && data->motion_trigger_on) {
841 		data->ev_enable_state = 0;
842 		mutex_unlock(&data->mutex);
843 		return 0;
844 	}
845 
846 	/*
847 	 * We will expect the enable and disable to do operation in
848 	 * in reverse order. This will happen here anyway as our
849 	 * resume operation uses sync mode runtime pm calls, the
850 	 * suspend operation will be delayed by autosuspend delay
851 	 * So the disable operation will still happen in reverse of
852 	 * enable operation. When runtime pm is disabled the mode
853 	 * is always on so sequence doesn't matter
854 	 */
855 	ret = kxcjk1013_set_power_state(data, state);
856 	if (ret < 0) {
857 		mutex_unlock(&data->mutex);
858 		return ret;
859 	}
860 
861 	ret =  kxcjk1013_setup_any_motion_interrupt(data, state);
862 	if (ret < 0) {
863 		kxcjk1013_set_power_state(data, false);
864 		data->ev_enable_state = 0;
865 		mutex_unlock(&data->mutex);
866 		return ret;
867 	}
868 
869 	data->ev_enable_state = state;
870 	mutex_unlock(&data->mutex);
871 
872 	return 0;
873 }
874 
875 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
876 {
877 	struct kxcjk1013_data *data = iio_priv(indio_dev);
878 
879 	return kxcjk1013_set_power_state(data, true);
880 }
881 
882 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
883 {
884 	struct kxcjk1013_data *data = iio_priv(indio_dev);
885 
886 	return kxcjk1013_set_power_state(data, false);
887 }
888 
889 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
890 	"0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600");
891 
892 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
893 
894 static struct attribute *kxcjk1013_attributes[] = {
895 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
896 	&iio_const_attr_in_accel_scale_available.dev_attr.attr,
897 	NULL,
898 };
899 
900 static const struct attribute_group kxcjk1013_attrs_group = {
901 	.attrs = kxcjk1013_attributes,
902 };
903 
904 static const struct iio_event_spec kxcjk1013_event = {
905 		.type = IIO_EV_TYPE_THRESH,
906 		.dir = IIO_EV_DIR_EITHER,
907 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
908 				 BIT(IIO_EV_INFO_ENABLE) |
909 				 BIT(IIO_EV_INFO_PERIOD)
910 };
911 
912 #define KXCJK1013_CHANNEL(_axis) {					\
913 	.type = IIO_ACCEL,						\
914 	.modified = 1,							\
915 	.channel2 = IIO_MOD_##_axis,					\
916 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),			\
917 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |		\
918 				BIT(IIO_CHAN_INFO_SAMP_FREQ),		\
919 	.scan_index = AXIS_##_axis,					\
920 	.scan_type = {							\
921 		.sign = 's',						\
922 		.realbits = 12,						\
923 		.storagebits = 16,					\
924 		.shift = 4,						\
925 		.endianness = IIO_LE,					\
926 	},								\
927 	.event_spec = &kxcjk1013_event,				\
928 	.num_event_specs = 1						\
929 }
930 
931 static const struct iio_chan_spec kxcjk1013_channels[] = {
932 	KXCJK1013_CHANNEL(X),
933 	KXCJK1013_CHANNEL(Y),
934 	KXCJK1013_CHANNEL(Z),
935 	IIO_CHAN_SOFT_TIMESTAMP(3),
936 };
937 
938 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
939 	.preenable		= kxcjk1013_buffer_preenable,
940 	.postenable		= iio_triggered_buffer_postenable,
941 	.postdisable		= kxcjk1013_buffer_postdisable,
942 	.predisable		= iio_triggered_buffer_predisable,
943 };
944 
945 static const struct iio_info kxcjk1013_info = {
946 	.attrs			= &kxcjk1013_attrs_group,
947 	.read_raw		= kxcjk1013_read_raw,
948 	.write_raw		= kxcjk1013_write_raw,
949 	.read_event_value	= kxcjk1013_read_event,
950 	.write_event_value	= kxcjk1013_write_event,
951 	.write_event_config	= kxcjk1013_write_event_config,
952 	.read_event_config	= kxcjk1013_read_event_config,
953 	.driver_module		= THIS_MODULE,
954 };
955 
956 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
957 
958 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
959 {
960 	struct iio_poll_func *pf = p;
961 	struct iio_dev *indio_dev = pf->indio_dev;
962 	struct kxcjk1013_data *data = iio_priv(indio_dev);
963 	int ret;
964 
965 	mutex_lock(&data->mutex);
966 	ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
967 							KXCJK1013_REG_XOUT_L,
968 							AXIS_MAX * 2,
969 							(u8 *)data->buffer);
970 	mutex_unlock(&data->mutex);
971 	if (ret < 0)
972 		goto err;
973 
974 	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
975 					   data->timestamp);
976 err:
977 	iio_trigger_notify_done(indio_dev->trig);
978 
979 	return IRQ_HANDLED;
980 }
981 
982 static int kxcjk1013_trig_try_reen(struct iio_trigger *trig)
983 {
984 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
985 	struct kxcjk1013_data *data = iio_priv(indio_dev);
986 	int ret;
987 
988 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
989 	if (ret < 0) {
990 		dev_err(&data->client->dev, "Error reading reg_int_rel\n");
991 		return ret;
992 	}
993 
994 	return 0;
995 }
996 
997 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
998 						bool state)
999 {
1000 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1001 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1002 	int ret;
1003 
1004 	mutex_lock(&data->mutex);
1005 
1006 	if (!state && data->ev_enable_state && data->motion_trigger_on) {
1007 		data->motion_trigger_on = false;
1008 		mutex_unlock(&data->mutex);
1009 		return 0;
1010 	}
1011 
1012 	ret = kxcjk1013_set_power_state(data, state);
1013 	if (ret < 0) {
1014 		mutex_unlock(&data->mutex);
1015 		return ret;
1016 	}
1017 	if (data->motion_trig == trig)
1018 		ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1019 	else
1020 		ret = kxcjk1013_setup_new_data_interrupt(data, state);
1021 	if (ret < 0) {
1022 		kxcjk1013_set_power_state(data, false);
1023 		mutex_unlock(&data->mutex);
1024 		return ret;
1025 	}
1026 	if (data->motion_trig == trig)
1027 		data->motion_trigger_on = state;
1028 	else
1029 		data->dready_trigger_on = state;
1030 
1031 	mutex_unlock(&data->mutex);
1032 
1033 	return 0;
1034 }
1035 
1036 static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1037 	.set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1038 	.try_reenable = kxcjk1013_trig_try_reen,
1039 	.owner = THIS_MODULE,
1040 };
1041 
1042 static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1043 {
1044 	struct iio_dev *indio_dev = private;
1045 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1046 	int ret;
1047 
1048 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1);
1049 	if (ret < 0) {
1050 		dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1051 		goto ack_intr;
1052 	}
1053 
1054 	if (ret & 0x02) {
1055 		ret = i2c_smbus_read_byte_data(data->client,
1056 					       KXCJK1013_REG_INT_SRC2);
1057 		if (ret < 0) {
1058 			dev_err(&data->client->dev,
1059 				"Error reading reg_int_src2\n");
1060 			goto ack_intr;
1061 		}
1062 
1063 		if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1064 			iio_push_event(indio_dev,
1065 				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1066 				       0,
1067 				       IIO_MOD_X,
1068 				       IIO_EV_TYPE_THRESH,
1069 				       IIO_EV_DIR_FALLING),
1070 				       data->timestamp);
1071 		if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1072 			iio_push_event(indio_dev,
1073 				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1074 				       0,
1075 				       IIO_MOD_X,
1076 				       IIO_EV_TYPE_THRESH,
1077 				       IIO_EV_DIR_RISING),
1078 				       data->timestamp);
1079 
1080 
1081 		if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1082 			iio_push_event(indio_dev,
1083 				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1084 				       0,
1085 				       IIO_MOD_Y,
1086 				       IIO_EV_TYPE_THRESH,
1087 				       IIO_EV_DIR_FALLING),
1088 				       data->timestamp);
1089 		if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1090 			iio_push_event(indio_dev,
1091 				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1092 				       0,
1093 				       IIO_MOD_Y,
1094 				       IIO_EV_TYPE_THRESH,
1095 				       IIO_EV_DIR_RISING),
1096 				       data->timestamp);
1097 
1098 		if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1099 			iio_push_event(indio_dev,
1100 				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1101 				       0,
1102 				       IIO_MOD_Z,
1103 				       IIO_EV_TYPE_THRESH,
1104 				       IIO_EV_DIR_FALLING),
1105 				       data->timestamp);
1106 		if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1107 			iio_push_event(indio_dev,
1108 				       IIO_MOD_EVENT_CODE(IIO_ACCEL,
1109 				       0,
1110 				       IIO_MOD_Z,
1111 				       IIO_EV_TYPE_THRESH,
1112 				       IIO_EV_DIR_RISING),
1113 				       data->timestamp);
1114 	}
1115 
1116 ack_intr:
1117 	if (data->dready_trigger_on)
1118 		return IRQ_HANDLED;
1119 
1120 	ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
1121 	if (ret < 0)
1122 		dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1123 
1124 	return IRQ_HANDLED;
1125 }
1126 
1127 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1128 {
1129 	struct iio_dev *indio_dev = private;
1130 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1131 
1132 	data->timestamp = iio_get_time_ns(indio_dev);
1133 
1134 	if (data->dready_trigger_on)
1135 		iio_trigger_poll(data->dready_trig);
1136 	else if (data->motion_trigger_on)
1137 		iio_trigger_poll(data->motion_trig);
1138 
1139 	if (data->ev_enable_state)
1140 		return IRQ_WAKE_THREAD;
1141 	else
1142 		return IRQ_HANDLED;
1143 }
1144 
1145 static const char *kxcjk1013_match_acpi_device(struct device *dev,
1146 					       enum kx_chipset *chipset,
1147 					       bool *is_smo8500_device)
1148 {
1149 	const struct acpi_device_id *id;
1150 
1151 	id = acpi_match_device(dev->driver->acpi_match_table, dev);
1152 	if (!id)
1153 		return NULL;
1154 
1155 	if (strcmp(id->id, "SMO8500") == 0)
1156 		*is_smo8500_device = true;
1157 
1158 	*chipset = (enum kx_chipset)id->driver_data;
1159 
1160 	return dev_name(dev);
1161 }
1162 
1163 static int kxcjk1013_probe(struct i2c_client *client,
1164 			   const struct i2c_device_id *id)
1165 {
1166 	struct kxcjk1013_data *data;
1167 	struct iio_dev *indio_dev;
1168 	struct kxcjk_1013_platform_data *pdata;
1169 	const char *name;
1170 	int ret;
1171 
1172 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1173 	if (!indio_dev)
1174 		return -ENOMEM;
1175 
1176 	data = iio_priv(indio_dev);
1177 	i2c_set_clientdata(client, indio_dev);
1178 	data->client = client;
1179 
1180 	pdata = dev_get_platdata(&client->dev);
1181 	if (pdata)
1182 		data->active_high_intr = pdata->active_high_intr;
1183 	else
1184 		data->active_high_intr = true; /* default polarity */
1185 
1186 	if (id) {
1187 		data->chipset = (enum kx_chipset)(id->driver_data);
1188 		name = id->name;
1189 	} else if (ACPI_HANDLE(&client->dev)) {
1190 		name = kxcjk1013_match_acpi_device(&client->dev,
1191 						   &data->chipset,
1192 						   &data->is_smo8500_device);
1193 	} else
1194 		return -ENODEV;
1195 
1196 	ret = kxcjk1013_chip_init(data);
1197 	if (ret < 0)
1198 		return ret;
1199 
1200 	mutex_init(&data->mutex);
1201 
1202 	indio_dev->dev.parent = &client->dev;
1203 	indio_dev->channels = kxcjk1013_channels;
1204 	indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1205 	indio_dev->available_scan_masks = kxcjk1013_scan_masks;
1206 	indio_dev->name = name;
1207 	indio_dev->modes = INDIO_DIRECT_MODE;
1208 	indio_dev->info = &kxcjk1013_info;
1209 
1210 	if (client->irq > 0 && !data->is_smo8500_device) {
1211 		ret = devm_request_threaded_irq(&client->dev, client->irq,
1212 						kxcjk1013_data_rdy_trig_poll,
1213 						kxcjk1013_event_handler,
1214 						IRQF_TRIGGER_RISING,
1215 						KXCJK1013_IRQ_NAME,
1216 						indio_dev);
1217 		if (ret)
1218 			goto err_poweroff;
1219 
1220 		data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1221 							   "%s-dev%d",
1222 							   indio_dev->name,
1223 							   indio_dev->id);
1224 		if (!data->dready_trig) {
1225 			ret = -ENOMEM;
1226 			goto err_poweroff;
1227 		}
1228 
1229 		data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1230 							  "%s-any-motion-dev%d",
1231 							  indio_dev->name,
1232 							  indio_dev->id);
1233 		if (!data->motion_trig) {
1234 			ret = -ENOMEM;
1235 			goto err_poweroff;
1236 		}
1237 
1238 		data->dready_trig->dev.parent = &client->dev;
1239 		data->dready_trig->ops = &kxcjk1013_trigger_ops;
1240 		iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1241 		indio_dev->trig = data->dready_trig;
1242 		iio_trigger_get(indio_dev->trig);
1243 		ret = iio_trigger_register(data->dready_trig);
1244 		if (ret)
1245 			goto err_poweroff;
1246 
1247 		data->motion_trig->dev.parent = &client->dev;
1248 		data->motion_trig->ops = &kxcjk1013_trigger_ops;
1249 		iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1250 		ret = iio_trigger_register(data->motion_trig);
1251 		if (ret) {
1252 			data->motion_trig = NULL;
1253 			goto err_trigger_unregister;
1254 		}
1255 	}
1256 
1257 	ret = iio_triggered_buffer_setup(indio_dev,
1258 					 &iio_pollfunc_store_time,
1259 					 kxcjk1013_trigger_handler,
1260 					 &kxcjk1013_buffer_setup_ops);
1261 	if (ret < 0) {
1262 		dev_err(&client->dev, "iio triggered buffer setup failed\n");
1263 		goto err_trigger_unregister;
1264 	}
1265 
1266 	ret = pm_runtime_set_active(&client->dev);
1267 	if (ret)
1268 		goto err_buffer_cleanup;
1269 
1270 	pm_runtime_enable(&client->dev);
1271 	pm_runtime_set_autosuspend_delay(&client->dev,
1272 					 KXCJK1013_SLEEP_DELAY_MS);
1273 	pm_runtime_use_autosuspend(&client->dev);
1274 
1275 	ret = iio_device_register(indio_dev);
1276 	if (ret < 0) {
1277 		dev_err(&client->dev, "unable to register iio device\n");
1278 		goto err_buffer_cleanup;
1279 	}
1280 
1281 	return 0;
1282 
1283 err_buffer_cleanup:
1284 	if (data->dready_trig)
1285 		iio_triggered_buffer_cleanup(indio_dev);
1286 err_trigger_unregister:
1287 	if (data->dready_trig)
1288 		iio_trigger_unregister(data->dready_trig);
1289 	if (data->motion_trig)
1290 		iio_trigger_unregister(data->motion_trig);
1291 err_poweroff:
1292 	kxcjk1013_set_mode(data, STANDBY);
1293 
1294 	return ret;
1295 }
1296 
1297 static int kxcjk1013_remove(struct i2c_client *client)
1298 {
1299 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1300 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1301 
1302 	iio_device_unregister(indio_dev);
1303 
1304 	pm_runtime_disable(&client->dev);
1305 	pm_runtime_set_suspended(&client->dev);
1306 	pm_runtime_put_noidle(&client->dev);
1307 
1308 	if (data->dready_trig) {
1309 		iio_triggered_buffer_cleanup(indio_dev);
1310 		iio_trigger_unregister(data->dready_trig);
1311 		iio_trigger_unregister(data->motion_trig);
1312 	}
1313 
1314 	mutex_lock(&data->mutex);
1315 	kxcjk1013_set_mode(data, STANDBY);
1316 	mutex_unlock(&data->mutex);
1317 
1318 	return 0;
1319 }
1320 
1321 #ifdef CONFIG_PM_SLEEP
1322 static int kxcjk1013_suspend(struct device *dev)
1323 {
1324 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1325 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1326 	int ret;
1327 
1328 	mutex_lock(&data->mutex);
1329 	ret = kxcjk1013_set_mode(data, STANDBY);
1330 	mutex_unlock(&data->mutex);
1331 
1332 	return ret;
1333 }
1334 
1335 static int kxcjk1013_resume(struct device *dev)
1336 {
1337 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1338 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1339 	int ret = 0;
1340 
1341 	mutex_lock(&data->mutex);
1342 	ret = kxcjk1013_set_mode(data, OPERATION);
1343 	mutex_unlock(&data->mutex);
1344 
1345 	return ret;
1346 }
1347 #endif
1348 
1349 #ifdef CONFIG_PM
1350 static int kxcjk1013_runtime_suspend(struct device *dev)
1351 {
1352 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1353 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1354 	int ret;
1355 
1356 	ret = kxcjk1013_set_mode(data, STANDBY);
1357 	if (ret < 0) {
1358 		dev_err(&data->client->dev, "powering off device failed\n");
1359 		return -EAGAIN;
1360 	}
1361 	return 0;
1362 }
1363 
1364 static int kxcjk1013_runtime_resume(struct device *dev)
1365 {
1366 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1367 	struct kxcjk1013_data *data = iio_priv(indio_dev);
1368 	int ret;
1369 	int sleep_val;
1370 
1371 	ret = kxcjk1013_set_mode(data, OPERATION);
1372 	if (ret < 0)
1373 		return ret;
1374 
1375 	sleep_val = kxcjk1013_get_startup_times(data);
1376 	if (sleep_val < 20000)
1377 		usleep_range(sleep_val, 20000);
1378 	else
1379 		msleep_interruptible(sleep_val/1000);
1380 
1381 	return 0;
1382 }
1383 #endif
1384 
1385 static const struct dev_pm_ops kxcjk1013_pm_ops = {
1386 	SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1387 	SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1388 			   kxcjk1013_runtime_resume, NULL)
1389 };
1390 
1391 static const struct acpi_device_id kx_acpi_match[] = {
1392 	{"KXCJ1013", KXCJK1013},
1393 	{"KXCJ1008", KXCJ91008},
1394 	{"KXCJ9000", KXCJ91008},
1395 	{"KIOX000A", KXCJ91008},
1396 	{"KXTJ1009", KXTJ21009},
1397 	{"SMO8500",  KXCJ91008},
1398 	{ },
1399 };
1400 MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1401 
1402 static const struct i2c_device_id kxcjk1013_id[] = {
1403 	{"kxcjk1013", KXCJK1013},
1404 	{"kxcj91008", KXCJ91008},
1405 	{"kxtj21009", KXTJ21009},
1406 	{"SMO8500",   KXCJ91008},
1407 	{}
1408 };
1409 
1410 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1411 
1412 static struct i2c_driver kxcjk1013_driver = {
1413 	.driver = {
1414 		.name	= KXCJK1013_DRV_NAME,
1415 		.acpi_match_table = ACPI_PTR(kx_acpi_match),
1416 		.pm	= &kxcjk1013_pm_ops,
1417 	},
1418 	.probe		= kxcjk1013_probe,
1419 	.remove		= kxcjk1013_remove,
1420 	.id_table	= kxcjk1013_id,
1421 };
1422 module_i2c_driver(kxcjk1013_driver);
1423 
1424 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1425 MODULE_LICENSE("GPL v2");
1426 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");
1427