1 /* 2 * KXCJK-1013 3-axis accelerometer driver 3 * Copyright (c) 2014, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #include <linux/module.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/delay.h> 19 #include <linux/bitops.h> 20 #include <linux/slab.h> 21 #include <linux/string.h> 22 #include <linux/acpi.h> 23 #include <linux/gpio/consumer.h> 24 #include <linux/pm.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/iio/iio.h> 27 #include <linux/iio/sysfs.h> 28 #include <linux/iio/buffer.h> 29 #include <linux/iio/trigger.h> 30 #include <linux/iio/events.h> 31 #include <linux/iio/trigger_consumer.h> 32 #include <linux/iio/triggered_buffer.h> 33 #include <linux/iio/accel/kxcjk_1013.h> 34 35 #define KXCJK1013_DRV_NAME "kxcjk1013" 36 #define KXCJK1013_IRQ_NAME "kxcjk1013_event" 37 38 #define KXCJK1013_REG_XOUT_L 0x06 39 /* 40 * From low byte X axis register, all the other addresses of Y and Z can be 41 * obtained by just applying axis offset. The following axis defines are just 42 * provide clarity, but not used. 43 */ 44 #define KXCJK1013_REG_XOUT_H 0x07 45 #define KXCJK1013_REG_YOUT_L 0x08 46 #define KXCJK1013_REG_YOUT_H 0x09 47 #define KXCJK1013_REG_ZOUT_L 0x0A 48 #define KXCJK1013_REG_ZOUT_H 0x0B 49 50 #define KXCJK1013_REG_DCST_RESP 0x0C 51 #define KXCJK1013_REG_WHO_AM_I 0x0F 52 #define KXCJK1013_REG_INT_SRC1 0x16 53 #define KXCJK1013_REG_INT_SRC2 0x17 54 #define KXCJK1013_REG_STATUS_REG 0x18 55 #define KXCJK1013_REG_INT_REL 0x1A 56 #define KXCJK1013_REG_CTRL1 0x1B 57 #define KXCJK1013_REG_CTRL2 0x1D 58 #define KXCJK1013_REG_INT_CTRL1 0x1E 59 #define KXCJK1013_REG_INT_CTRL2 0x1F 60 #define KXCJK1013_REG_DATA_CTRL 0x21 61 #define KXCJK1013_REG_WAKE_TIMER 0x29 62 #define KXCJK1013_REG_SELF_TEST 0x3A 63 #define KXCJK1013_REG_WAKE_THRES 0x6A 64 65 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 66 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 67 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 68 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 69 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 70 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 71 #define KXCJK1013_REG_INT_REG1_BIT_IEA BIT(4) 72 #define KXCJK1013_REG_INT_REG1_BIT_IEN BIT(5) 73 74 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 75 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 76 77 #define KXCJK1013_SLEEP_DELAY_MS 2000 78 79 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 80 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 81 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 82 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 83 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 84 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 85 86 #define KXCJK1013_DEFAULT_WAKE_THRES 1 87 88 enum kx_chipset { 89 KXCJK1013, 90 KXCJ91008, 91 KXTJ21009, 92 KX_MAX_CHIPS /* this must be last */ 93 }; 94 95 struct kxcjk1013_data { 96 struct i2c_client *client; 97 struct iio_trigger *dready_trig; 98 struct iio_trigger *motion_trig; 99 struct mutex mutex; 100 s16 buffer[8]; 101 u8 odr_bits; 102 u8 range; 103 int wake_thres; 104 int wake_dur; 105 bool active_high_intr; 106 bool dready_trigger_on; 107 int ev_enable_state; 108 bool motion_trigger_on; 109 int64_t timestamp; 110 enum kx_chipset chipset; 111 }; 112 113 enum kxcjk1013_axis { 114 AXIS_X, 115 AXIS_Y, 116 AXIS_Z, 117 }; 118 119 enum kxcjk1013_mode { 120 STANDBY, 121 OPERATION, 122 }; 123 124 enum kxcjk1013_range { 125 KXCJK1013_RANGE_2G, 126 KXCJK1013_RANGE_4G, 127 KXCJK1013_RANGE_8G, 128 }; 129 130 static const struct { 131 int val; 132 int val2; 133 int odr_bits; 134 } samp_freq_table[] = { {0, 781000, 0x08}, {1, 563000, 0x09}, 135 {3, 125000, 0x0A}, {6, 250000, 0x0B}, {12, 500000, 0}, 136 {25, 0, 0x01}, {50, 0, 0x02}, {100, 0, 0x03}, 137 {200, 0, 0x04}, {400, 0, 0x05}, {800, 0, 0x06}, 138 {1600, 0, 0x07} }; 139 140 /* Refer to section 4 of the specification */ 141 static const struct { 142 int odr_bits; 143 int usec; 144 } odr_start_up_times[KX_MAX_CHIPS][12] = { 145 /* KXCJK-1013 */ 146 { 147 {0x08, 100000}, 148 {0x09, 100000}, 149 {0x0A, 100000}, 150 {0x0B, 100000}, 151 {0, 80000}, 152 {0x01, 41000}, 153 {0x02, 21000}, 154 {0x03, 11000}, 155 {0x04, 6400}, 156 {0x05, 3900}, 157 {0x06, 2700}, 158 {0x07, 2100}, 159 }, 160 /* KXCJ9-1008 */ 161 { 162 {0x08, 100000}, 163 {0x09, 100000}, 164 {0x0A, 100000}, 165 {0x0B, 100000}, 166 {0, 80000}, 167 {0x01, 41000}, 168 {0x02, 21000}, 169 {0x03, 11000}, 170 {0x04, 6400}, 171 {0x05, 3900}, 172 {0x06, 2700}, 173 {0x07, 2100}, 174 }, 175 /* KXCTJ2-1009 */ 176 { 177 {0x08, 1240000}, 178 {0x09, 621000}, 179 {0x0A, 309000}, 180 {0x0B, 151000}, 181 {0, 80000}, 182 {0x01, 41000}, 183 {0x02, 21000}, 184 {0x03, 11000}, 185 {0x04, 6000}, 186 {0x05, 4000}, 187 {0x06, 3000}, 188 {0x07, 2000}, 189 }, 190 }; 191 192 static const struct { 193 u16 scale; 194 u8 gsel_0; 195 u8 gsel_1; 196 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 197 {19163, 1, 0}, 198 {38326, 0, 1} }; 199 200 static const struct { 201 int val; 202 int val2; 203 int odr_bits; 204 } wake_odr_data_rate_table[] = { {0, 781000, 0x00}, 205 {1, 563000, 0x01}, 206 {3, 125000, 0x02}, 207 {6, 250000, 0x03}, 208 {12, 500000, 0x04}, 209 {25, 0, 0x05}, 210 {50, 0, 0x06}, 211 {100, 0, 0x06}, 212 {200, 0, 0x06}, 213 {400, 0, 0x06}, 214 {800, 0, 0x06}, 215 {1600, 0, 0x06} }; 216 217 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 218 enum kxcjk1013_mode mode) 219 { 220 int ret; 221 222 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 223 if (ret < 0) { 224 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 225 return ret; 226 } 227 228 if (mode == STANDBY) 229 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 230 else 231 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 232 233 ret = i2c_smbus_write_byte_data(data->client, 234 KXCJK1013_REG_CTRL1, ret); 235 if (ret < 0) { 236 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 237 return ret; 238 } 239 240 return 0; 241 } 242 243 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 244 enum kxcjk1013_mode *mode) 245 { 246 int ret; 247 248 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 249 if (ret < 0) { 250 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 251 return ret; 252 } 253 254 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 255 *mode = OPERATION; 256 else 257 *mode = STANDBY; 258 259 return 0; 260 } 261 262 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 263 { 264 int ret; 265 266 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 267 if (ret < 0) { 268 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 269 return ret; 270 } 271 272 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 273 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 274 275 ret = i2c_smbus_write_byte_data(data->client, 276 KXCJK1013_REG_CTRL1, 277 ret); 278 if (ret < 0) { 279 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 280 return ret; 281 } 282 283 data->range = range_index; 284 285 return 0; 286 } 287 288 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 289 { 290 int ret; 291 292 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 293 if (ret < 0) { 294 dev_err(&data->client->dev, "Error reading who_am_i\n"); 295 return ret; 296 } 297 298 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 299 300 ret = kxcjk1013_set_mode(data, STANDBY); 301 if (ret < 0) 302 return ret; 303 304 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 305 if (ret < 0) { 306 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 307 return ret; 308 } 309 310 /* Set 12 bit mode */ 311 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 312 313 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1, 314 ret); 315 if (ret < 0) { 316 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 317 return ret; 318 } 319 320 /* Setting range to 4G */ 321 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 322 if (ret < 0) 323 return ret; 324 325 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL); 326 if (ret < 0) { 327 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 328 return ret; 329 } 330 331 data->odr_bits = ret; 332 333 /* Set up INT polarity */ 334 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 335 if (ret < 0) { 336 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 337 return ret; 338 } 339 340 if (data->active_high_intr) 341 ret |= KXCJK1013_REG_INT_REG1_BIT_IEA; 342 else 343 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEA; 344 345 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 346 ret); 347 if (ret < 0) { 348 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 349 return ret; 350 } 351 352 ret = kxcjk1013_set_mode(data, OPERATION); 353 if (ret < 0) 354 return ret; 355 356 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 357 358 return 0; 359 } 360 361 #ifdef CONFIG_PM_RUNTIME 362 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 363 { 364 int i; 365 int idx = data->chipset; 366 367 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) { 368 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits) 369 return odr_start_up_times[idx][i].usec; 370 } 371 372 return KXCJK1013_MAX_STARTUP_TIME_US; 373 } 374 #endif 375 376 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 377 { 378 int ret; 379 380 if (on) 381 ret = pm_runtime_get_sync(&data->client->dev); 382 else { 383 pm_runtime_mark_last_busy(&data->client->dev); 384 ret = pm_runtime_put_autosuspend(&data->client->dev); 385 } 386 if (ret < 0) { 387 dev_err(&data->client->dev, 388 "Failed: kxcjk1013_set_power_state for %d\n", on); 389 return ret; 390 } 391 392 return 0; 393 } 394 395 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 396 { 397 int ret; 398 399 ret = i2c_smbus_write_byte_data(data->client, 400 KXCJK1013_REG_WAKE_TIMER, 401 data->wake_dur); 402 if (ret < 0) { 403 dev_err(&data->client->dev, 404 "Error writing reg_wake_timer\n"); 405 return ret; 406 } 407 408 ret = i2c_smbus_write_byte_data(data->client, 409 KXCJK1013_REG_WAKE_THRES, 410 data->wake_thres); 411 if (ret < 0) { 412 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 413 return ret; 414 } 415 416 return 0; 417 } 418 419 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data, 420 bool status) 421 { 422 int ret; 423 enum kxcjk1013_mode store_mode; 424 425 ret = kxcjk1013_get_mode(data, &store_mode); 426 if (ret < 0) 427 return ret; 428 429 /* This is requirement by spec to change state to STANDBY */ 430 ret = kxcjk1013_set_mode(data, STANDBY); 431 if (ret < 0) 432 return ret; 433 434 ret = kxcjk1013_chip_update_thresholds(data); 435 if (ret < 0) 436 return ret; 437 438 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 439 if (ret < 0) { 440 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 441 return ret; 442 } 443 444 if (status) 445 ret |= KXCJK1013_REG_INT_REG1_BIT_IEN; 446 else 447 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN; 448 449 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 450 ret); 451 if (ret < 0) { 452 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 453 return ret; 454 } 455 456 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 457 if (ret < 0) { 458 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 459 return ret; 460 } 461 462 if (status) 463 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 464 else 465 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 466 467 ret = i2c_smbus_write_byte_data(data->client, 468 KXCJK1013_REG_CTRL1, ret); 469 if (ret < 0) { 470 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 471 return ret; 472 } 473 474 if (store_mode == OPERATION) { 475 ret = kxcjk1013_set_mode(data, OPERATION); 476 if (ret < 0) 477 return ret; 478 } 479 480 return 0; 481 } 482 483 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data, 484 bool status) 485 { 486 int ret; 487 enum kxcjk1013_mode store_mode; 488 489 ret = kxcjk1013_get_mode(data, &store_mode); 490 if (ret < 0) 491 return ret; 492 493 /* This is requirement by spec to change state to STANDBY */ 494 ret = kxcjk1013_set_mode(data, STANDBY); 495 if (ret < 0) 496 return ret; 497 498 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 499 if (ret < 0) { 500 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 501 return ret; 502 } 503 504 if (status) 505 ret |= KXCJK1013_REG_INT_REG1_BIT_IEN; 506 else 507 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN; 508 509 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 510 ret); 511 if (ret < 0) { 512 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 513 return ret; 514 } 515 516 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 517 if (ret < 0) { 518 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 519 return ret; 520 } 521 522 if (status) 523 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 524 else 525 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 526 527 ret = i2c_smbus_write_byte_data(data->client, 528 KXCJK1013_REG_CTRL1, ret); 529 if (ret < 0) { 530 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 531 return ret; 532 } 533 534 if (store_mode == OPERATION) { 535 ret = kxcjk1013_set_mode(data, OPERATION); 536 if (ret < 0) 537 return ret; 538 } 539 540 return 0; 541 } 542 543 static int kxcjk1013_convert_freq_to_bit(int val, int val2) 544 { 545 int i; 546 547 for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) { 548 if (samp_freq_table[i].val == val && 549 samp_freq_table[i].val2 == val2) { 550 return samp_freq_table[i].odr_bits; 551 } 552 } 553 554 return -EINVAL; 555 } 556 557 static int kxcjk1013_convert_wake_odr_to_bit(int val, int val2) 558 { 559 int i; 560 561 for (i = 0; i < ARRAY_SIZE(wake_odr_data_rate_table); ++i) { 562 if (wake_odr_data_rate_table[i].val == val && 563 wake_odr_data_rate_table[i].val2 == val2) { 564 return wake_odr_data_rate_table[i].odr_bits; 565 } 566 } 567 568 return -EINVAL; 569 } 570 571 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 572 { 573 int ret; 574 int odr_bits; 575 enum kxcjk1013_mode store_mode; 576 577 ret = kxcjk1013_get_mode(data, &store_mode); 578 if (ret < 0) 579 return ret; 580 581 odr_bits = kxcjk1013_convert_freq_to_bit(val, val2); 582 if (odr_bits < 0) 583 return odr_bits; 584 585 /* To change ODR, the chip must be set to STANDBY as per spec */ 586 ret = kxcjk1013_set_mode(data, STANDBY); 587 if (ret < 0) 588 return ret; 589 590 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL, 591 odr_bits); 592 if (ret < 0) { 593 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 594 return ret; 595 } 596 597 data->odr_bits = odr_bits; 598 599 odr_bits = kxcjk1013_convert_wake_odr_to_bit(val, val2); 600 if (odr_bits < 0) 601 return odr_bits; 602 603 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2, 604 odr_bits); 605 if (ret < 0) { 606 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 607 return ret; 608 } 609 610 if (store_mode == OPERATION) { 611 ret = kxcjk1013_set_mode(data, OPERATION); 612 if (ret < 0) 613 return ret; 614 } 615 616 return 0; 617 } 618 619 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 620 { 621 int i; 622 623 for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) { 624 if (samp_freq_table[i].odr_bits == data->odr_bits) { 625 *val = samp_freq_table[i].val; 626 *val2 = samp_freq_table[i].val2; 627 return IIO_VAL_INT_PLUS_MICRO; 628 } 629 } 630 631 return -EINVAL; 632 } 633 634 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 635 { 636 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 637 int ret; 638 639 ret = i2c_smbus_read_word_data(data->client, reg); 640 if (ret < 0) { 641 dev_err(&data->client->dev, 642 "failed to read accel_%c registers\n", 'x' + axis); 643 return ret; 644 } 645 646 return ret; 647 } 648 649 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 650 { 651 int ret, i; 652 enum kxcjk1013_mode store_mode; 653 654 655 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 656 if (KXCJK1013_scale_table[i].scale == val) { 657 658 ret = kxcjk1013_get_mode(data, &store_mode); 659 if (ret < 0) 660 return ret; 661 662 ret = kxcjk1013_set_mode(data, STANDBY); 663 if (ret < 0) 664 return ret; 665 666 ret = kxcjk1013_set_range(data, i); 667 if (ret < 0) 668 return ret; 669 670 if (store_mode == OPERATION) { 671 ret = kxcjk1013_set_mode(data, OPERATION); 672 if (ret) 673 return ret; 674 } 675 676 return 0; 677 } 678 } 679 680 return -EINVAL; 681 } 682 683 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 684 struct iio_chan_spec const *chan, int *val, 685 int *val2, long mask) 686 { 687 struct kxcjk1013_data *data = iio_priv(indio_dev); 688 int ret; 689 690 switch (mask) { 691 case IIO_CHAN_INFO_RAW: 692 mutex_lock(&data->mutex); 693 if (iio_buffer_enabled(indio_dev)) 694 ret = -EBUSY; 695 else { 696 ret = kxcjk1013_set_power_state(data, true); 697 if (ret < 0) { 698 mutex_unlock(&data->mutex); 699 return ret; 700 } 701 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 702 if (ret < 0) { 703 kxcjk1013_set_power_state(data, false); 704 mutex_unlock(&data->mutex); 705 return ret; 706 } 707 *val = sign_extend32(ret >> 4, 11); 708 ret = kxcjk1013_set_power_state(data, false); 709 } 710 mutex_unlock(&data->mutex); 711 712 if (ret < 0) 713 return ret; 714 715 return IIO_VAL_INT; 716 717 case IIO_CHAN_INFO_SCALE: 718 *val = 0; 719 *val2 = KXCJK1013_scale_table[data->range].scale; 720 return IIO_VAL_INT_PLUS_MICRO; 721 722 case IIO_CHAN_INFO_SAMP_FREQ: 723 mutex_lock(&data->mutex); 724 ret = kxcjk1013_get_odr(data, val, val2); 725 mutex_unlock(&data->mutex); 726 return ret; 727 728 default: 729 return -EINVAL; 730 } 731 } 732 733 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 734 struct iio_chan_spec const *chan, int val, 735 int val2, long mask) 736 { 737 struct kxcjk1013_data *data = iio_priv(indio_dev); 738 int ret; 739 740 switch (mask) { 741 case IIO_CHAN_INFO_SAMP_FREQ: 742 mutex_lock(&data->mutex); 743 ret = kxcjk1013_set_odr(data, val, val2); 744 mutex_unlock(&data->mutex); 745 break; 746 case IIO_CHAN_INFO_SCALE: 747 if (val) 748 return -EINVAL; 749 750 mutex_lock(&data->mutex); 751 ret = kxcjk1013_set_scale(data, val2); 752 mutex_unlock(&data->mutex); 753 break; 754 default: 755 ret = -EINVAL; 756 } 757 758 return ret; 759 } 760 761 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 762 const struct iio_chan_spec *chan, 763 enum iio_event_type type, 764 enum iio_event_direction dir, 765 enum iio_event_info info, 766 int *val, int *val2) 767 { 768 struct kxcjk1013_data *data = iio_priv(indio_dev); 769 770 *val2 = 0; 771 switch (info) { 772 case IIO_EV_INFO_VALUE: 773 *val = data->wake_thres; 774 break; 775 case IIO_EV_INFO_PERIOD: 776 *val = data->wake_dur; 777 break; 778 default: 779 return -EINVAL; 780 } 781 782 return IIO_VAL_INT; 783 } 784 785 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 786 const struct iio_chan_spec *chan, 787 enum iio_event_type type, 788 enum iio_event_direction dir, 789 enum iio_event_info info, 790 int val, int val2) 791 { 792 struct kxcjk1013_data *data = iio_priv(indio_dev); 793 794 if (data->ev_enable_state) 795 return -EBUSY; 796 797 switch (info) { 798 case IIO_EV_INFO_VALUE: 799 data->wake_thres = val; 800 break; 801 case IIO_EV_INFO_PERIOD: 802 data->wake_dur = val; 803 break; 804 default: 805 return -EINVAL; 806 } 807 808 return 0; 809 } 810 811 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 812 const struct iio_chan_spec *chan, 813 enum iio_event_type type, 814 enum iio_event_direction dir) 815 { 816 817 struct kxcjk1013_data *data = iio_priv(indio_dev); 818 819 return data->ev_enable_state; 820 } 821 822 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 823 const struct iio_chan_spec *chan, 824 enum iio_event_type type, 825 enum iio_event_direction dir, 826 int state) 827 { 828 struct kxcjk1013_data *data = iio_priv(indio_dev); 829 int ret; 830 831 if (state && data->ev_enable_state) 832 return 0; 833 834 mutex_lock(&data->mutex); 835 836 if (!state && data->motion_trigger_on) { 837 data->ev_enable_state = 0; 838 mutex_unlock(&data->mutex); 839 return 0; 840 } 841 842 /* 843 * We will expect the enable and disable to do operation in 844 * in reverse order. This will happen here anyway as our 845 * resume operation uses sync mode runtime pm calls, the 846 * suspend operation will be delayed by autosuspend delay 847 * So the disable operation will still happen in reverse of 848 * enable operation. When runtime pm is disabled the mode 849 * is always on so sequence doesn't matter 850 */ 851 ret = kxcjk1013_set_power_state(data, state); 852 if (ret < 0) { 853 mutex_unlock(&data->mutex); 854 return ret; 855 } 856 857 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 858 if (ret < 0) { 859 mutex_unlock(&data->mutex); 860 return ret; 861 } 862 863 data->ev_enable_state = state; 864 mutex_unlock(&data->mutex); 865 866 return 0; 867 } 868 869 static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev, 870 struct iio_trigger *trig) 871 { 872 struct kxcjk1013_data *data = iio_priv(indio_dev); 873 874 if (data->dready_trig != trig && data->motion_trig != trig) 875 return -EINVAL; 876 877 return 0; 878 } 879 880 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 881 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"); 882 883 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 884 885 static struct attribute *kxcjk1013_attributes[] = { 886 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 887 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 888 NULL, 889 }; 890 891 static const struct attribute_group kxcjk1013_attrs_group = { 892 .attrs = kxcjk1013_attributes, 893 }; 894 895 static const struct iio_event_spec kxcjk1013_event = { 896 .type = IIO_EV_TYPE_THRESH, 897 .dir = IIO_EV_DIR_EITHER, 898 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 899 BIT(IIO_EV_INFO_ENABLE) | 900 BIT(IIO_EV_INFO_PERIOD) 901 }; 902 903 #define KXCJK1013_CHANNEL(_axis) { \ 904 .type = IIO_ACCEL, \ 905 .modified = 1, \ 906 .channel2 = IIO_MOD_##_axis, \ 907 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 908 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 909 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 910 .scan_index = AXIS_##_axis, \ 911 .scan_type = { \ 912 .sign = 's', \ 913 .realbits = 12, \ 914 .storagebits = 16, \ 915 .shift = 4, \ 916 .endianness = IIO_CPU, \ 917 }, \ 918 .event_spec = &kxcjk1013_event, \ 919 .num_event_specs = 1 \ 920 } 921 922 static const struct iio_chan_spec kxcjk1013_channels[] = { 923 KXCJK1013_CHANNEL(X), 924 KXCJK1013_CHANNEL(Y), 925 KXCJK1013_CHANNEL(Z), 926 IIO_CHAN_SOFT_TIMESTAMP(3), 927 }; 928 929 static const struct iio_info kxcjk1013_info = { 930 .attrs = &kxcjk1013_attrs_group, 931 .read_raw = kxcjk1013_read_raw, 932 .write_raw = kxcjk1013_write_raw, 933 .read_event_value = kxcjk1013_read_event, 934 .write_event_value = kxcjk1013_write_event, 935 .write_event_config = kxcjk1013_write_event_config, 936 .read_event_config = kxcjk1013_read_event_config, 937 .validate_trigger = kxcjk1013_validate_trigger, 938 .driver_module = THIS_MODULE, 939 }; 940 941 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 942 { 943 struct iio_poll_func *pf = p; 944 struct iio_dev *indio_dev = pf->indio_dev; 945 struct kxcjk1013_data *data = iio_priv(indio_dev); 946 int bit, ret, i = 0; 947 948 mutex_lock(&data->mutex); 949 950 for_each_set_bit(bit, indio_dev->buffer->scan_mask, 951 indio_dev->masklength) { 952 ret = kxcjk1013_get_acc_reg(data, bit); 953 if (ret < 0) { 954 mutex_unlock(&data->mutex); 955 goto err; 956 } 957 data->buffer[i++] = ret; 958 } 959 mutex_unlock(&data->mutex); 960 961 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 962 data->timestamp); 963 err: 964 iio_trigger_notify_done(indio_dev->trig); 965 966 return IRQ_HANDLED; 967 } 968 969 static int kxcjk1013_trig_try_reen(struct iio_trigger *trig) 970 { 971 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 972 struct kxcjk1013_data *data = iio_priv(indio_dev); 973 int ret; 974 975 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 976 if (ret < 0) { 977 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 978 return ret; 979 } 980 981 return 0; 982 } 983 984 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 985 bool state) 986 { 987 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 988 struct kxcjk1013_data *data = iio_priv(indio_dev); 989 int ret; 990 991 mutex_lock(&data->mutex); 992 993 if (!state && data->ev_enable_state && data->motion_trigger_on) { 994 data->motion_trigger_on = false; 995 mutex_unlock(&data->mutex); 996 return 0; 997 } 998 999 ret = kxcjk1013_set_power_state(data, state); 1000 if (ret < 0) { 1001 mutex_unlock(&data->mutex); 1002 return ret; 1003 } 1004 if (data->motion_trig == trig) 1005 ret = kxcjk1013_setup_any_motion_interrupt(data, state); 1006 else 1007 ret = kxcjk1013_setup_new_data_interrupt(data, state); 1008 if (ret < 0) { 1009 mutex_unlock(&data->mutex); 1010 return ret; 1011 } 1012 if (data->motion_trig == trig) 1013 data->motion_trigger_on = state; 1014 else 1015 data->dready_trigger_on = state; 1016 1017 mutex_unlock(&data->mutex); 1018 1019 return 0; 1020 } 1021 1022 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1023 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1024 .try_reenable = kxcjk1013_trig_try_reen, 1025 .owner = THIS_MODULE, 1026 }; 1027 1028 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1029 { 1030 struct iio_dev *indio_dev = private; 1031 struct kxcjk1013_data *data = iio_priv(indio_dev); 1032 int ret; 1033 1034 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1); 1035 if (ret < 0) { 1036 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1037 goto ack_intr; 1038 } 1039 1040 if (ret & 0x02) { 1041 ret = i2c_smbus_read_byte_data(data->client, 1042 KXCJK1013_REG_INT_SRC2); 1043 if (ret < 0) { 1044 dev_err(&data->client->dev, 1045 "Error reading reg_int_src2\n"); 1046 goto ack_intr; 1047 } 1048 1049 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1050 iio_push_event(indio_dev, 1051 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1052 0, 1053 IIO_MOD_X, 1054 IIO_EV_TYPE_THRESH, 1055 IIO_EV_DIR_FALLING), 1056 data->timestamp); 1057 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1058 iio_push_event(indio_dev, 1059 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1060 0, 1061 IIO_MOD_X, 1062 IIO_EV_TYPE_THRESH, 1063 IIO_EV_DIR_RISING), 1064 data->timestamp); 1065 1066 1067 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1068 iio_push_event(indio_dev, 1069 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1070 0, 1071 IIO_MOD_Y, 1072 IIO_EV_TYPE_THRESH, 1073 IIO_EV_DIR_FALLING), 1074 data->timestamp); 1075 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1076 iio_push_event(indio_dev, 1077 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1078 0, 1079 IIO_MOD_Y, 1080 IIO_EV_TYPE_THRESH, 1081 IIO_EV_DIR_RISING), 1082 data->timestamp); 1083 1084 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1085 iio_push_event(indio_dev, 1086 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1087 0, 1088 IIO_MOD_Z, 1089 IIO_EV_TYPE_THRESH, 1090 IIO_EV_DIR_FALLING), 1091 data->timestamp); 1092 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1093 iio_push_event(indio_dev, 1094 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1095 0, 1096 IIO_MOD_Z, 1097 IIO_EV_TYPE_THRESH, 1098 IIO_EV_DIR_RISING), 1099 data->timestamp); 1100 } 1101 1102 ack_intr: 1103 if (data->dready_trigger_on) 1104 return IRQ_HANDLED; 1105 1106 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 1107 if (ret < 0) 1108 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1109 1110 return IRQ_HANDLED; 1111 } 1112 1113 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1114 { 1115 struct iio_dev *indio_dev = private; 1116 struct kxcjk1013_data *data = iio_priv(indio_dev); 1117 1118 data->timestamp = iio_get_time_ns(); 1119 1120 if (data->dready_trigger_on) 1121 iio_trigger_poll(data->dready_trig); 1122 else if (data->motion_trigger_on) 1123 iio_trigger_poll(data->motion_trig); 1124 1125 if (data->ev_enable_state) 1126 return IRQ_WAKE_THREAD; 1127 else 1128 return IRQ_HANDLED; 1129 } 1130 1131 static const char *kxcjk1013_match_acpi_device(struct device *dev, 1132 enum kx_chipset *chipset) 1133 { 1134 const struct acpi_device_id *id; 1135 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1136 if (!id) 1137 return NULL; 1138 *chipset = (enum kx_chipset)id->driver_data; 1139 1140 return dev_name(dev); 1141 } 1142 1143 static int kxcjk1013_gpio_probe(struct i2c_client *client, 1144 struct kxcjk1013_data *data) 1145 { 1146 struct device *dev; 1147 struct gpio_desc *gpio; 1148 int ret; 1149 1150 if (!client) 1151 return -EINVAL; 1152 1153 dev = &client->dev; 1154 1155 /* data ready gpio interrupt pin */ 1156 gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0); 1157 if (IS_ERR(gpio)) { 1158 dev_err(dev, "acpi gpio get index failed\n"); 1159 return PTR_ERR(gpio); 1160 } 1161 1162 ret = gpiod_direction_input(gpio); 1163 if (ret) 1164 return ret; 1165 1166 ret = gpiod_to_irq(gpio); 1167 1168 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret); 1169 1170 return ret; 1171 } 1172 1173 static int kxcjk1013_probe(struct i2c_client *client, 1174 const struct i2c_device_id *id) 1175 { 1176 struct kxcjk1013_data *data; 1177 struct iio_dev *indio_dev; 1178 struct kxcjk_1013_platform_data *pdata; 1179 const char *name; 1180 int ret; 1181 1182 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1183 if (!indio_dev) 1184 return -ENOMEM; 1185 1186 data = iio_priv(indio_dev); 1187 i2c_set_clientdata(client, indio_dev); 1188 data->client = client; 1189 1190 pdata = dev_get_platdata(&client->dev); 1191 if (pdata) 1192 data->active_high_intr = pdata->active_high_intr; 1193 else 1194 data->active_high_intr = true; /* default polarity */ 1195 1196 if (id) { 1197 data->chipset = (enum kx_chipset)(id->driver_data); 1198 name = id->name; 1199 } else if (ACPI_HANDLE(&client->dev)) { 1200 name = kxcjk1013_match_acpi_device(&client->dev, 1201 &data->chipset); 1202 } else 1203 return -ENODEV; 1204 1205 ret = kxcjk1013_chip_init(data); 1206 if (ret < 0) 1207 return ret; 1208 1209 mutex_init(&data->mutex); 1210 1211 indio_dev->dev.parent = &client->dev; 1212 indio_dev->channels = kxcjk1013_channels; 1213 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1214 indio_dev->name = name; 1215 indio_dev->modes = INDIO_DIRECT_MODE; 1216 indio_dev->info = &kxcjk1013_info; 1217 1218 if (client->irq < 0) 1219 client->irq = kxcjk1013_gpio_probe(client, data); 1220 1221 if (client->irq >= 0) { 1222 ret = devm_request_threaded_irq(&client->dev, client->irq, 1223 kxcjk1013_data_rdy_trig_poll, 1224 kxcjk1013_event_handler, 1225 IRQF_TRIGGER_RISING, 1226 KXCJK1013_IRQ_NAME, 1227 indio_dev); 1228 if (ret) 1229 return ret; 1230 1231 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1232 "%s-dev%d", 1233 indio_dev->name, 1234 indio_dev->id); 1235 if (!data->dready_trig) 1236 return -ENOMEM; 1237 1238 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1239 "%s-any-motion-dev%d", 1240 indio_dev->name, 1241 indio_dev->id); 1242 if (!data->motion_trig) 1243 return -ENOMEM; 1244 1245 data->dready_trig->dev.parent = &client->dev; 1246 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1247 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1248 indio_dev->trig = data->dready_trig; 1249 iio_trigger_get(indio_dev->trig); 1250 ret = iio_trigger_register(data->dready_trig); 1251 if (ret) 1252 return ret; 1253 1254 data->motion_trig->dev.parent = &client->dev; 1255 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1256 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1257 ret = iio_trigger_register(data->motion_trig); 1258 if (ret) { 1259 data->motion_trig = NULL; 1260 goto err_trigger_unregister; 1261 } 1262 1263 ret = iio_triggered_buffer_setup(indio_dev, 1264 &iio_pollfunc_store_time, 1265 kxcjk1013_trigger_handler, 1266 NULL); 1267 if (ret < 0) { 1268 dev_err(&client->dev, 1269 "iio triggered buffer setup failed\n"); 1270 goto err_trigger_unregister; 1271 } 1272 } 1273 1274 ret = iio_device_register(indio_dev); 1275 if (ret < 0) { 1276 dev_err(&client->dev, "unable to register iio device\n"); 1277 goto err_buffer_cleanup; 1278 } 1279 1280 ret = pm_runtime_set_active(&client->dev); 1281 if (ret) 1282 goto err_iio_unregister; 1283 1284 pm_runtime_enable(&client->dev); 1285 pm_runtime_set_autosuspend_delay(&client->dev, 1286 KXCJK1013_SLEEP_DELAY_MS); 1287 pm_runtime_use_autosuspend(&client->dev); 1288 1289 return 0; 1290 1291 err_iio_unregister: 1292 iio_device_unregister(indio_dev); 1293 err_buffer_cleanup: 1294 if (data->dready_trig) 1295 iio_triggered_buffer_cleanup(indio_dev); 1296 err_trigger_unregister: 1297 if (data->dready_trig) 1298 iio_trigger_unregister(data->dready_trig); 1299 if (data->motion_trig) 1300 iio_trigger_unregister(data->motion_trig); 1301 1302 return ret; 1303 } 1304 1305 static int kxcjk1013_remove(struct i2c_client *client) 1306 { 1307 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1308 struct kxcjk1013_data *data = iio_priv(indio_dev); 1309 1310 pm_runtime_disable(&client->dev); 1311 pm_runtime_set_suspended(&client->dev); 1312 pm_runtime_put_noidle(&client->dev); 1313 1314 iio_device_unregister(indio_dev); 1315 1316 if (data->dready_trig) { 1317 iio_triggered_buffer_cleanup(indio_dev); 1318 iio_trigger_unregister(data->dready_trig); 1319 iio_trigger_unregister(data->motion_trig); 1320 } 1321 1322 mutex_lock(&data->mutex); 1323 kxcjk1013_set_mode(data, STANDBY); 1324 mutex_unlock(&data->mutex); 1325 1326 return 0; 1327 } 1328 1329 #ifdef CONFIG_PM_SLEEP 1330 static int kxcjk1013_suspend(struct device *dev) 1331 { 1332 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1333 struct kxcjk1013_data *data = iio_priv(indio_dev); 1334 int ret; 1335 1336 mutex_lock(&data->mutex); 1337 ret = kxcjk1013_set_mode(data, STANDBY); 1338 mutex_unlock(&data->mutex); 1339 1340 return ret; 1341 } 1342 1343 static int kxcjk1013_resume(struct device *dev) 1344 { 1345 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1346 struct kxcjk1013_data *data = iio_priv(indio_dev); 1347 int ret = 0; 1348 1349 mutex_lock(&data->mutex); 1350 /* Check, if the suspend occured while active */ 1351 if (data->dready_trigger_on || data->motion_trigger_on || 1352 data->ev_enable_state) 1353 ret = kxcjk1013_set_mode(data, OPERATION); 1354 mutex_unlock(&data->mutex); 1355 1356 return ret; 1357 } 1358 #endif 1359 1360 #ifdef CONFIG_PM_RUNTIME 1361 static int kxcjk1013_runtime_suspend(struct device *dev) 1362 { 1363 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1364 struct kxcjk1013_data *data = iio_priv(indio_dev); 1365 1366 return kxcjk1013_set_mode(data, STANDBY); 1367 } 1368 1369 static int kxcjk1013_runtime_resume(struct device *dev) 1370 { 1371 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1372 struct kxcjk1013_data *data = iio_priv(indio_dev); 1373 int ret; 1374 int sleep_val; 1375 1376 ret = kxcjk1013_set_mode(data, OPERATION); 1377 if (ret < 0) 1378 return ret; 1379 1380 sleep_val = kxcjk1013_get_startup_times(data); 1381 if (sleep_val < 20000) 1382 usleep_range(sleep_val, 20000); 1383 else 1384 msleep_interruptible(sleep_val/1000); 1385 1386 return 0; 1387 } 1388 #endif 1389 1390 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1391 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1392 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, 1393 kxcjk1013_runtime_resume, NULL) 1394 }; 1395 1396 static const struct acpi_device_id kx_acpi_match[] = { 1397 {"KXCJ1013", KXCJK1013}, 1398 {"KXCJ1008", KXCJ91008}, 1399 {"KXTJ1009", KXTJ21009}, 1400 { }, 1401 }; 1402 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1403 1404 static const struct i2c_device_id kxcjk1013_id[] = { 1405 {"kxcjk1013", KXCJK1013}, 1406 {"kxcj91008", KXCJ91008}, 1407 {"kxtj21009", KXTJ21009}, 1408 {} 1409 }; 1410 1411 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1412 1413 static struct i2c_driver kxcjk1013_driver = { 1414 .driver = { 1415 .name = KXCJK1013_DRV_NAME, 1416 .acpi_match_table = ACPI_PTR(kx_acpi_match), 1417 .pm = &kxcjk1013_pm_ops, 1418 }, 1419 .probe = kxcjk1013_probe, 1420 .remove = kxcjk1013_remove, 1421 .id_table = kxcjk1013_id, 1422 }; 1423 module_i2c_driver(kxcjk1013_driver); 1424 1425 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1426 MODULE_LICENSE("GPL v2"); 1427 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1428