1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * KXCJK-1013 3-axis accelerometer driver
4 * Copyright (c) 2014, Intel Corporation.
5 */
6
7 #include <linux/module.h>
8 #include <linux/i2c.h>
9 #include <linux/interrupt.h>
10 #include <linux/delay.h>
11 #include <linux/bitops.h>
12 #include <linux/slab.h>
13 #include <linux/string.h>
14 #include <linux/acpi.h>
15 #include <linux/pm.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/trigger.h>
22 #include <linux/iio/events.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/triggered_buffer.h>
25 #include <linux/iio/accel/kxcjk_1013.h>
26
27 #define KXCJK1013_DRV_NAME "kxcjk1013"
28 #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
29
30 #define KXTF9_REG_HP_XOUT_L 0x00
31 #define KXTF9_REG_HP_XOUT_H 0x01
32 #define KXTF9_REG_HP_YOUT_L 0x02
33 #define KXTF9_REG_HP_YOUT_H 0x03
34 #define KXTF9_REG_HP_ZOUT_L 0x04
35 #define KXTF9_REG_HP_ZOUT_H 0x05
36
37 #define KXCJK1013_REG_XOUT_L 0x06
38 /*
39 * From low byte X axis register, all the other addresses of Y and Z can be
40 * obtained by just applying axis offset. The following axis defines are just
41 * provide clarity, but not used.
42 */
43 #define KXCJK1013_REG_XOUT_H 0x07
44 #define KXCJK1013_REG_YOUT_L 0x08
45 #define KXCJK1013_REG_YOUT_H 0x09
46 #define KXCJK1013_REG_ZOUT_L 0x0A
47 #define KXCJK1013_REG_ZOUT_H 0x0B
48
49 #define KXCJK1013_REG_DCST_RESP 0x0C
50 #define KXCJK1013_REG_WHO_AM_I 0x0F
51 #define KXTF9_REG_TILT_POS_CUR 0x10
52 #define KXTF9_REG_TILT_POS_PREV 0x11
53 #define KXTF9_REG_INT_SRC1 0x15
54 #define KXTF9_REG_INT_SRC2 0x16
55 #define KXCJK1013_REG_INT_SRC1 0x16
56 #define KXCJK1013_REG_INT_SRC2 0x17
57 #define KXCJK1013_REG_STATUS_REG 0x18
58 #define KXCJK1013_REG_INT_REL 0x1A
59 #define KXCJK1013_REG_CTRL1 0x1B
60 #define KXTF9_REG_CTRL2 0x1C
61 #define KXTF9_REG_CTRL3 0x1D
62 #define KXCJK1013_REG_CTRL2 0x1D
63 #define KXCJK1013_REG_INT_CTRL1 0x1E
64 #define KXCJK1013_REG_INT_CTRL2 0x1F
65 #define KXTF9_REG_INT_CTRL3 0x20
66 #define KXCJK1013_REG_DATA_CTRL 0x21
67 #define KXTF9_REG_TILT_TIMER 0x28
68 #define KXCJK1013_REG_WAKE_TIMER 0x29
69 #define KXTF9_REG_TDT_TIMER 0x2B
70 #define KXTF9_REG_TDT_THRESH_H 0x2C
71 #define KXTF9_REG_TDT_THRESH_L 0x2D
72 #define KXTF9_REG_TDT_TAP_TIMER 0x2E
73 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F
74 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30
75 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31
76 #define KXCJK1013_REG_SELF_TEST 0x3A
77 #define KXTF9_REG_WAKE_THRESH 0x5A
78 #define KXTF9_REG_TILT_ANGLE 0x5C
79 #define KXTF9_REG_HYST_SET 0x5F
80 #define KXCJK1013_REG_WAKE_THRES 0x6A
81
82 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */
83 #define KX023_REG_INS1 0x12
84 #define KX023_REG_INS2 0x13
85 #define KX023_REG_INS3 0x14
86 #define KX023_REG_STAT 0x15
87 #define KX023_REG_INT_REL 0x17
88 #define KX023_REG_CNTL1 0x18
89 #define KX023_REG_CNTL2 0x19
90 #define KX023_REG_CNTL3 0x1A
91 #define KX023_REG_ODCNTL 0x1B
92 #define KX023_REG_INC1 0x1C
93 #define KX023_REG_INC2 0x1D
94 #define KX023_REG_INC3 0x1E
95 #define KX023_REG_INC4 0x1F
96 #define KX023_REG_INC5 0x20
97 #define KX023_REG_INC6 0x21
98 #define KX023_REG_TILT_TIMER 0x22
99 #define KX023_REG_WUFC 0x23
100 #define KX023_REG_TDTRC 0x24
101 #define KX023_REG_TDTC 0x25
102 #define KX023_REG_TTH 0x26
103 #define KX023_REG_TTL 0x27
104 #define KX023_REG_FTD 0x28
105 #define KX023_REG_STD 0x29
106 #define KX023_REG_TLT 0x2A
107 #define KX023_REG_TWS 0x2B
108 #define KX023_REG_ATH 0x30
109 #define KX023_REG_TILT_ANGLE_LL 0x32
110 #define KX023_REG_TILT_ANGLE_HL 0x33
111 #define KX023_REG_HYST_SET 0x34
112 #define KX023_REG_LP_CNTL 0x35
113 #define KX023_REG_BUF_CNTL1 0x3A
114 #define KX023_REG_BUF_CNTL2 0x3B
115 #define KX023_REG_BUF_STATUS_1 0x3C
116 #define KX023_REG_BUF_STATUS_2 0x3D
117 #define KX023_REG_BUF_CLEAR 0x3E
118 #define KX023_REG_BUF_READ 0x3F
119 #define KX023_REG_SELF_TEST 0x60
120
121 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
122 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
123 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
124 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
125 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
126 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
127
128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */
129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3)
130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4)
131 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5)
132
133 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5)
134 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4)
135 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3)
136 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2)
137 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1)
138 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0)
139
140 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
141 #define KXCJK1013_MAX_STARTUP_TIME_US 100000
142
143 #define KXCJK1013_SLEEP_DELAY_MS 2000
144
145 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */
146 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1)
147 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */
148 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0
149 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2)
150 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3)
151 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4)
152
153 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */
154 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
155 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
156 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
157 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
158 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
159 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
160
161 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */
162 #define KX023_REG_INC4_BFI1 BIT(6)
163 #define KX023_REG_INC4_WMI1 BIT(5)
164 #define KX023_REG_INC4_DRDY1 BIT(4)
165 #define KX023_REG_INC4_TDTI1 BIT(2)
166 #define KX023_REG_INC4_WUFI1 BIT(1)
167 #define KX023_REG_INC4_TPI1 BIT(0)
168
169 #define KXCJK1013_DEFAULT_WAKE_THRES 1
170
171 enum kx_chipset {
172 KXCJK1013,
173 KXCJ91008,
174 KXTJ21009,
175 KXTF9,
176 KX0231025,
177 KX_MAX_CHIPS /* this must be last */
178 };
179
180 enum kx_acpi_type {
181 ACPI_GENERIC,
182 ACPI_SMO8500,
183 ACPI_KIOX010A,
184 };
185
186 struct kx_chipset_regs {
187 u8 int_src1;
188 u8 int_src2;
189 u8 int_rel;
190 u8 ctrl1;
191 u8 wuf_ctrl;
192 u8 int_ctrl1;
193 u8 data_ctrl;
194 u8 wake_timer;
195 u8 wake_thres;
196 };
197
198 static const struct kx_chipset_regs kxcjk1013_regs = {
199 .int_src1 = KXCJK1013_REG_INT_SRC1,
200 .int_src2 = KXCJK1013_REG_INT_SRC2,
201 .int_rel = KXCJK1013_REG_INT_REL,
202 .ctrl1 = KXCJK1013_REG_CTRL1,
203 .wuf_ctrl = KXCJK1013_REG_CTRL2,
204 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
205 .data_ctrl = KXCJK1013_REG_DATA_CTRL,
206 .wake_timer = KXCJK1013_REG_WAKE_TIMER,
207 .wake_thres = KXCJK1013_REG_WAKE_THRES,
208 };
209
210 static const struct kx_chipset_regs kxtf9_regs = {
211 /* .int_src1 was moved to INT_SRC2 on KXTF9 */
212 .int_src1 = KXTF9_REG_INT_SRC2,
213 /* .int_src2 is not available */
214 .int_rel = KXCJK1013_REG_INT_REL,
215 .ctrl1 = KXCJK1013_REG_CTRL1,
216 .wuf_ctrl = KXTF9_REG_CTRL3,
217 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
218 .data_ctrl = KXCJK1013_REG_DATA_CTRL,
219 .wake_timer = KXCJK1013_REG_WAKE_TIMER,
220 .wake_thres = KXTF9_REG_WAKE_THRESH,
221 };
222
223 /* The registers have totally different names but the bits are compatible */
224 static const struct kx_chipset_regs kx0231025_regs = {
225 .int_src1 = KX023_REG_INS2,
226 .int_src2 = KX023_REG_INS3,
227 .int_rel = KX023_REG_INT_REL,
228 .ctrl1 = KX023_REG_CNTL1,
229 .wuf_ctrl = KX023_REG_CNTL3,
230 .int_ctrl1 = KX023_REG_INC1,
231 .data_ctrl = KX023_REG_ODCNTL,
232 .wake_timer = KX023_REG_WUFC,
233 .wake_thres = KX023_REG_ATH,
234 };
235
236 enum kxcjk1013_axis {
237 AXIS_X,
238 AXIS_Y,
239 AXIS_Z,
240 AXIS_MAX
241 };
242
243 struct kxcjk1013_data {
244 struct i2c_client *client;
245 struct iio_trigger *dready_trig;
246 struct iio_trigger *motion_trig;
247 struct iio_mount_matrix orientation;
248 struct mutex mutex;
249 /* Ensure timestamp naturally aligned */
250 struct {
251 s16 chans[AXIS_MAX];
252 s64 timestamp __aligned(8);
253 } scan;
254 u8 odr_bits;
255 u8 range;
256 int wake_thres;
257 int wake_dur;
258 bool active_high_intr;
259 bool dready_trigger_on;
260 int ev_enable_state;
261 bool motion_trigger_on;
262 int64_t timestamp;
263 enum kx_chipset chipset;
264 enum kx_acpi_type acpi_type;
265 const struct kx_chipset_regs *regs;
266 };
267
268 enum kxcjk1013_mode {
269 STANDBY,
270 OPERATION,
271 };
272
273 enum kxcjk1013_range {
274 KXCJK1013_RANGE_2G,
275 KXCJK1013_RANGE_4G,
276 KXCJK1013_RANGE_8G,
277 };
278
279 struct kx_odr_map {
280 int val;
281 int val2;
282 int odr_bits;
283 int wuf_bits;
284 };
285
286 static const struct kx_odr_map samp_freq_table[] = {
287 { 0, 781000, 0x08, 0x00 },
288 { 1, 563000, 0x09, 0x01 },
289 { 3, 125000, 0x0A, 0x02 },
290 { 6, 250000, 0x0B, 0x03 },
291 { 12, 500000, 0x00, 0x04 },
292 { 25, 0, 0x01, 0x05 },
293 { 50, 0, 0x02, 0x06 },
294 { 100, 0, 0x03, 0x06 },
295 { 200, 0, 0x04, 0x06 },
296 { 400, 0, 0x05, 0x06 },
297 { 800, 0, 0x06, 0x06 },
298 { 1600, 0, 0x07, 0x06 },
299 };
300
301 static const char *const kxcjk1013_samp_freq_avail =
302 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
303
304 static const struct kx_odr_map kxtf9_samp_freq_table[] = {
305 { 25, 0, 0x01, 0x00 },
306 { 50, 0, 0x02, 0x01 },
307 { 100, 0, 0x03, 0x01 },
308 { 200, 0, 0x04, 0x01 },
309 { 400, 0, 0x05, 0x01 },
310 { 800, 0, 0x06, 0x01 },
311 };
312
313 static const char *const kxtf9_samp_freq_avail =
314 "25 50 100 200 400 800";
315
316 /* Refer to section 4 of the specification */
317 static __maybe_unused const struct {
318 int odr_bits;
319 int usec;
320 } odr_start_up_times[KX_MAX_CHIPS][12] = {
321 /* KXCJK-1013 */
322 {
323 {0x08, 100000},
324 {0x09, 100000},
325 {0x0A, 100000},
326 {0x0B, 100000},
327 {0, 80000},
328 {0x01, 41000},
329 {0x02, 21000},
330 {0x03, 11000},
331 {0x04, 6400},
332 {0x05, 3900},
333 {0x06, 2700},
334 {0x07, 2100},
335 },
336 /* KXCJ9-1008 */
337 {
338 {0x08, 100000},
339 {0x09, 100000},
340 {0x0A, 100000},
341 {0x0B, 100000},
342 {0, 80000},
343 {0x01, 41000},
344 {0x02, 21000},
345 {0x03, 11000},
346 {0x04, 6400},
347 {0x05, 3900},
348 {0x06, 2700},
349 {0x07, 2100},
350 },
351 /* KXCTJ2-1009 */
352 {
353 {0x08, 1240000},
354 {0x09, 621000},
355 {0x0A, 309000},
356 {0x0B, 151000},
357 {0, 80000},
358 {0x01, 41000},
359 {0x02, 21000},
360 {0x03, 11000},
361 {0x04, 6000},
362 {0x05, 4000},
363 {0x06, 3000},
364 {0x07, 2000},
365 },
366 /* KXTF9 */
367 {
368 {0x01, 81000},
369 {0x02, 41000},
370 {0x03, 21000},
371 {0x04, 11000},
372 {0x05, 5100},
373 {0x06, 2700},
374 },
375 /* KX023-1025 */
376 {
377 /* First 4 are not in datasheet, taken from KXCTJ2-1009 */
378 {0x08, 1240000},
379 {0x09, 621000},
380 {0x0A, 309000},
381 {0x0B, 151000},
382 {0, 81000},
383 {0x01, 40000},
384 {0x02, 22000},
385 {0x03, 12000},
386 {0x04, 7000},
387 {0x05, 4400},
388 {0x06, 3000},
389 {0x07, 3000},
390 },
391 };
392
393 static const struct {
394 u16 scale;
395 u8 gsel_0;
396 u8 gsel_1;
397 } KXCJK1013_scale_table[] = { {9582, 0, 0},
398 {19163, 1, 0},
399 {38326, 0, 1} };
400
401 #ifdef CONFIG_ACPI
402 enum kiox010a_fn_index {
403 KIOX010A_SET_LAPTOP_MODE = 1,
404 KIOX010A_SET_TABLET_MODE = 2,
405 };
406
kiox010a_dsm(struct device * dev,int fn_index)407 static int kiox010a_dsm(struct device *dev, int fn_index)
408 {
409 acpi_handle handle = ACPI_HANDLE(dev);
410 guid_t kiox010a_dsm_guid;
411 union acpi_object *obj;
412
413 if (!handle)
414 return -ENODEV;
415
416 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
417
418 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
419 if (!obj)
420 return -EIO;
421
422 ACPI_FREE(obj);
423 return 0;
424 }
425 #endif
426
kxcjk1013_set_mode(struct kxcjk1013_data * data,enum kxcjk1013_mode mode)427 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
428 enum kxcjk1013_mode mode)
429 {
430 int ret;
431
432 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
433 if (ret < 0) {
434 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
435 return ret;
436 }
437
438 if (mode == STANDBY)
439 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
440 else
441 ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
442
443 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
444 if (ret < 0) {
445 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
446 return ret;
447 }
448
449 return 0;
450 }
451
kxcjk1013_get_mode(struct kxcjk1013_data * data,enum kxcjk1013_mode * mode)452 static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
453 enum kxcjk1013_mode *mode)
454 {
455 int ret;
456
457 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
458 if (ret < 0) {
459 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
460 return ret;
461 }
462
463 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
464 *mode = OPERATION;
465 else
466 *mode = STANDBY;
467
468 return 0;
469 }
470
kxcjk1013_set_range(struct kxcjk1013_data * data,int range_index)471 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
472 {
473 int ret;
474
475 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
476 if (ret < 0) {
477 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
478 return ret;
479 }
480
481 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
482 KXCJK1013_REG_CTRL1_BIT_GSEL1);
483 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
484 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
485
486 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
487 if (ret < 0) {
488 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
489 return ret;
490 }
491
492 data->range = range_index;
493
494 return 0;
495 }
496
kxcjk1013_chip_init(struct kxcjk1013_data * data)497 static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
498 {
499 int ret;
500
501 #ifdef CONFIG_ACPI
502 if (data->acpi_type == ACPI_KIOX010A) {
503 /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */
504 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
505 }
506 #endif
507
508 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
509 if (ret < 0) {
510 dev_err(&data->client->dev, "Error reading who_am_i\n");
511 return ret;
512 }
513
514 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
515
516 ret = kxcjk1013_set_mode(data, STANDBY);
517 if (ret < 0)
518 return ret;
519
520 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
521 if (ret < 0) {
522 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
523 return ret;
524 }
525
526 /* Set 12 bit mode */
527 ret |= KXCJK1013_REG_CTRL1_BIT_RES;
528
529 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
530 if (ret < 0) {
531 dev_err(&data->client->dev, "Error reading reg_ctrl\n");
532 return ret;
533 }
534
535 /* Setting range to 4G */
536 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
537 if (ret < 0)
538 return ret;
539
540 ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl);
541 if (ret < 0) {
542 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
543 return ret;
544 }
545
546 data->odr_bits = ret;
547
548 /* Set up INT polarity */
549 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
550 if (ret < 0) {
551 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
552 return ret;
553 }
554
555 if (data->active_high_intr)
556 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
557 else
558 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
559
560 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
561 if (ret < 0) {
562 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
563 return ret;
564 }
565
566 /* On KX023, route all used interrupts to INT1 for now */
567 if (data->chipset == KX0231025 && data->client->irq > 0) {
568 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4,
569 KX023_REG_INC4_DRDY1 |
570 KX023_REG_INC4_WUFI1);
571 if (ret < 0) {
572 dev_err(&data->client->dev, "Error writing reg_inc4\n");
573 return ret;
574 }
575 }
576
577 ret = kxcjk1013_set_mode(data, OPERATION);
578 if (ret < 0)
579 return ret;
580
581 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
582
583 return 0;
584 }
585
586 #ifdef CONFIG_PM
kxcjk1013_get_startup_times(struct kxcjk1013_data * data)587 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
588 {
589 int i;
590 int idx = data->chipset;
591
592 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
593 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
594 return odr_start_up_times[idx][i].usec;
595 }
596
597 return KXCJK1013_MAX_STARTUP_TIME_US;
598 }
599 #endif
600
kxcjk1013_set_power_state(struct kxcjk1013_data * data,bool on)601 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
602 {
603 #ifdef CONFIG_PM
604 int ret;
605
606 if (on)
607 ret = pm_runtime_resume_and_get(&data->client->dev);
608 else {
609 pm_runtime_mark_last_busy(&data->client->dev);
610 ret = pm_runtime_put_autosuspend(&data->client->dev);
611 }
612 if (ret < 0) {
613 dev_err(&data->client->dev,
614 "Failed: %s for %d\n", __func__, on);
615 return ret;
616 }
617 #endif
618
619 return 0;
620 }
621
kxcjk1013_chip_update_thresholds(struct kxcjk1013_data * data)622 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
623 {
624 int ret;
625
626 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer,
627 data->wake_dur);
628 if (ret < 0) {
629 dev_err(&data->client->dev,
630 "Error writing reg_wake_timer\n");
631 return ret;
632 }
633
634 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres,
635 data->wake_thres);
636 if (ret < 0) {
637 dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
638 return ret;
639 }
640
641 return 0;
642 }
643
kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data * data,bool status)644 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
645 bool status)
646 {
647 int ret;
648 enum kxcjk1013_mode store_mode;
649
650 ret = kxcjk1013_get_mode(data, &store_mode);
651 if (ret < 0)
652 return ret;
653
654 /* This is requirement by spec to change state to STANDBY */
655 ret = kxcjk1013_set_mode(data, STANDBY);
656 if (ret < 0)
657 return ret;
658
659 ret = kxcjk1013_chip_update_thresholds(data);
660 if (ret < 0)
661 return ret;
662
663 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
664 if (ret < 0) {
665 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
666 return ret;
667 }
668
669 if (status)
670 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
671 else
672 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
673
674 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
675 if (ret < 0) {
676 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
677 return ret;
678 }
679
680 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
681 if (ret < 0) {
682 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
683 return ret;
684 }
685
686 if (status)
687 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
688 else
689 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
690
691 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
692 if (ret < 0) {
693 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
694 return ret;
695 }
696
697 if (store_mode == OPERATION) {
698 ret = kxcjk1013_set_mode(data, OPERATION);
699 if (ret < 0)
700 return ret;
701 }
702
703 return 0;
704 }
705
kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data * data,bool status)706 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
707 bool status)
708 {
709 int ret;
710 enum kxcjk1013_mode store_mode;
711
712 ret = kxcjk1013_get_mode(data, &store_mode);
713 if (ret < 0)
714 return ret;
715
716 /* This is requirement by spec to change state to STANDBY */
717 ret = kxcjk1013_set_mode(data, STANDBY);
718 if (ret < 0)
719 return ret;
720
721 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
722 if (ret < 0) {
723 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
724 return ret;
725 }
726
727 if (status)
728 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
729 else
730 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
731
732 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
733 if (ret < 0) {
734 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
735 return ret;
736 }
737
738 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
739 if (ret < 0) {
740 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
741 return ret;
742 }
743
744 if (status)
745 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
746 else
747 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
748
749 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
750 if (ret < 0) {
751 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
752 return ret;
753 }
754
755 if (store_mode == OPERATION) {
756 ret = kxcjk1013_set_mode(data, OPERATION);
757 if (ret < 0)
758 return ret;
759 }
760
761 return 0;
762 }
763
kxcjk1013_find_odr_value(const struct kx_odr_map * map,size_t map_size,int val,int val2)764 static const struct kx_odr_map *kxcjk1013_find_odr_value(
765 const struct kx_odr_map *map, size_t map_size, int val, int val2)
766 {
767 int i;
768
769 for (i = 0; i < map_size; ++i) {
770 if (map[i].val == val && map[i].val2 == val2)
771 return &map[i];
772 }
773
774 return ERR_PTR(-EINVAL);
775 }
776
kxcjk1013_convert_odr_value(const struct kx_odr_map * map,size_t map_size,int odr_bits,int * val,int * val2)777 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
778 size_t map_size, int odr_bits,
779 int *val, int *val2)
780 {
781 int i;
782
783 for (i = 0; i < map_size; ++i) {
784 if (map[i].odr_bits == odr_bits) {
785 *val = map[i].val;
786 *val2 = map[i].val2;
787 return IIO_VAL_INT_PLUS_MICRO;
788 }
789 }
790
791 return -EINVAL;
792 }
793
kxcjk1013_set_odr(struct kxcjk1013_data * data,int val,int val2)794 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
795 {
796 int ret;
797 enum kxcjk1013_mode store_mode;
798 const struct kx_odr_map *odr_setting;
799
800 ret = kxcjk1013_get_mode(data, &store_mode);
801 if (ret < 0)
802 return ret;
803
804 if (data->chipset == KXTF9)
805 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
806 ARRAY_SIZE(kxtf9_samp_freq_table),
807 val, val2);
808 else
809 odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
810 ARRAY_SIZE(samp_freq_table),
811 val, val2);
812
813 if (IS_ERR(odr_setting))
814 return PTR_ERR(odr_setting);
815
816 /* To change ODR, the chip must be set to STANDBY as per spec */
817 ret = kxcjk1013_set_mode(data, STANDBY);
818 if (ret < 0)
819 return ret;
820
821 ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl,
822 odr_setting->odr_bits);
823 if (ret < 0) {
824 dev_err(&data->client->dev, "Error writing data_ctrl\n");
825 return ret;
826 }
827
828 data->odr_bits = odr_setting->odr_bits;
829
830 ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl,
831 odr_setting->wuf_bits);
832 if (ret < 0) {
833 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
834 return ret;
835 }
836
837 if (store_mode == OPERATION) {
838 ret = kxcjk1013_set_mode(data, OPERATION);
839 if (ret < 0)
840 return ret;
841 }
842
843 return 0;
844 }
845
kxcjk1013_get_odr(struct kxcjk1013_data * data,int * val,int * val2)846 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
847 {
848 if (data->chipset == KXTF9)
849 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
850 ARRAY_SIZE(kxtf9_samp_freq_table),
851 data->odr_bits, val, val2);
852 else
853 return kxcjk1013_convert_odr_value(samp_freq_table,
854 ARRAY_SIZE(samp_freq_table),
855 data->odr_bits, val, val2);
856 }
857
kxcjk1013_get_acc_reg(struct kxcjk1013_data * data,int axis)858 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
859 {
860 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
861 int ret;
862
863 ret = i2c_smbus_read_word_data(data->client, reg);
864 if (ret < 0) {
865 dev_err(&data->client->dev,
866 "failed to read accel_%c registers\n", 'x' + axis);
867 return ret;
868 }
869
870 return ret;
871 }
872
kxcjk1013_set_scale(struct kxcjk1013_data * data,int val)873 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
874 {
875 int ret, i;
876 enum kxcjk1013_mode store_mode;
877
878 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
879 if (KXCJK1013_scale_table[i].scale == val) {
880 ret = kxcjk1013_get_mode(data, &store_mode);
881 if (ret < 0)
882 return ret;
883
884 ret = kxcjk1013_set_mode(data, STANDBY);
885 if (ret < 0)
886 return ret;
887
888 ret = kxcjk1013_set_range(data, i);
889 if (ret < 0)
890 return ret;
891
892 if (store_mode == OPERATION) {
893 ret = kxcjk1013_set_mode(data, OPERATION);
894 if (ret)
895 return ret;
896 }
897
898 return 0;
899 }
900 }
901
902 return -EINVAL;
903 }
904
kxcjk1013_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)905 static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
906 struct iio_chan_spec const *chan, int *val,
907 int *val2, long mask)
908 {
909 struct kxcjk1013_data *data = iio_priv(indio_dev);
910 int ret;
911
912 switch (mask) {
913 case IIO_CHAN_INFO_RAW:
914 mutex_lock(&data->mutex);
915 if (iio_buffer_enabled(indio_dev))
916 ret = -EBUSY;
917 else {
918 ret = kxcjk1013_set_power_state(data, true);
919 if (ret < 0) {
920 mutex_unlock(&data->mutex);
921 return ret;
922 }
923 ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
924 if (ret < 0) {
925 kxcjk1013_set_power_state(data, false);
926 mutex_unlock(&data->mutex);
927 return ret;
928 }
929 *val = sign_extend32(ret >> chan->scan_type.shift,
930 chan->scan_type.realbits - 1);
931 ret = kxcjk1013_set_power_state(data, false);
932 }
933 mutex_unlock(&data->mutex);
934
935 if (ret < 0)
936 return ret;
937
938 return IIO_VAL_INT;
939
940 case IIO_CHAN_INFO_SCALE:
941 *val = 0;
942 *val2 = KXCJK1013_scale_table[data->range].scale;
943 return IIO_VAL_INT_PLUS_MICRO;
944
945 case IIO_CHAN_INFO_SAMP_FREQ:
946 mutex_lock(&data->mutex);
947 ret = kxcjk1013_get_odr(data, val, val2);
948 mutex_unlock(&data->mutex);
949 return ret;
950
951 default:
952 return -EINVAL;
953 }
954 }
955
kxcjk1013_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)956 static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
957 struct iio_chan_spec const *chan, int val,
958 int val2, long mask)
959 {
960 struct kxcjk1013_data *data = iio_priv(indio_dev);
961 int ret;
962
963 switch (mask) {
964 case IIO_CHAN_INFO_SAMP_FREQ:
965 mutex_lock(&data->mutex);
966 ret = kxcjk1013_set_odr(data, val, val2);
967 mutex_unlock(&data->mutex);
968 break;
969 case IIO_CHAN_INFO_SCALE:
970 if (val)
971 return -EINVAL;
972
973 mutex_lock(&data->mutex);
974 ret = kxcjk1013_set_scale(data, val2);
975 mutex_unlock(&data->mutex);
976 break;
977 default:
978 ret = -EINVAL;
979 }
980
981 return ret;
982 }
983
kxcjk1013_read_event(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)984 static int kxcjk1013_read_event(struct iio_dev *indio_dev,
985 const struct iio_chan_spec *chan,
986 enum iio_event_type type,
987 enum iio_event_direction dir,
988 enum iio_event_info info,
989 int *val, int *val2)
990 {
991 struct kxcjk1013_data *data = iio_priv(indio_dev);
992
993 *val2 = 0;
994 switch (info) {
995 case IIO_EV_INFO_VALUE:
996 *val = data->wake_thres;
997 break;
998 case IIO_EV_INFO_PERIOD:
999 *val = data->wake_dur;
1000 break;
1001 default:
1002 return -EINVAL;
1003 }
1004
1005 return IIO_VAL_INT;
1006 }
1007
kxcjk1013_write_event(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1008 static int kxcjk1013_write_event(struct iio_dev *indio_dev,
1009 const struct iio_chan_spec *chan,
1010 enum iio_event_type type,
1011 enum iio_event_direction dir,
1012 enum iio_event_info info,
1013 int val, int val2)
1014 {
1015 struct kxcjk1013_data *data = iio_priv(indio_dev);
1016
1017 if (data->ev_enable_state)
1018 return -EBUSY;
1019
1020 switch (info) {
1021 case IIO_EV_INFO_VALUE:
1022 data->wake_thres = val;
1023 break;
1024 case IIO_EV_INFO_PERIOD:
1025 data->wake_dur = val;
1026 break;
1027 default:
1028 return -EINVAL;
1029 }
1030
1031 return 0;
1032 }
1033
kxcjk1013_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1034 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
1035 const struct iio_chan_spec *chan,
1036 enum iio_event_type type,
1037 enum iio_event_direction dir)
1038 {
1039 struct kxcjk1013_data *data = iio_priv(indio_dev);
1040
1041 return data->ev_enable_state;
1042 }
1043
kxcjk1013_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)1044 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
1045 const struct iio_chan_spec *chan,
1046 enum iio_event_type type,
1047 enum iio_event_direction dir,
1048 int state)
1049 {
1050 struct kxcjk1013_data *data = iio_priv(indio_dev);
1051 int ret;
1052
1053 if (state && data->ev_enable_state)
1054 return 0;
1055
1056 mutex_lock(&data->mutex);
1057
1058 if (!state && data->motion_trigger_on) {
1059 data->ev_enable_state = 0;
1060 mutex_unlock(&data->mutex);
1061 return 0;
1062 }
1063
1064 /*
1065 * We will expect the enable and disable to do operation in
1066 * reverse order. This will happen here anyway as our
1067 * resume operation uses sync mode runtime pm calls, the
1068 * suspend operation will be delayed by autosuspend delay
1069 * So the disable operation will still happen in reverse of
1070 * enable operation. When runtime pm is disabled the mode
1071 * is always on so sequence doesn't matter
1072 */
1073 ret = kxcjk1013_set_power_state(data, state);
1074 if (ret < 0) {
1075 mutex_unlock(&data->mutex);
1076 return ret;
1077 }
1078
1079 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1080 if (ret < 0) {
1081 kxcjk1013_set_power_state(data, false);
1082 data->ev_enable_state = 0;
1083 mutex_unlock(&data->mutex);
1084 return ret;
1085 }
1086
1087 data->ev_enable_state = state;
1088 mutex_unlock(&data->mutex);
1089
1090 return 0;
1091 }
1092
kxcjk1013_buffer_preenable(struct iio_dev * indio_dev)1093 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
1094 {
1095 struct kxcjk1013_data *data = iio_priv(indio_dev);
1096
1097 return kxcjk1013_set_power_state(data, true);
1098 }
1099
kxcjk1013_buffer_postdisable(struct iio_dev * indio_dev)1100 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
1101 {
1102 struct kxcjk1013_data *data = iio_priv(indio_dev);
1103
1104 return kxcjk1013_set_power_state(data, false);
1105 }
1106
kxcjk1013_get_samp_freq_avail(struct device * dev,struct device_attribute * attr,char * buf)1107 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
1108 struct device_attribute *attr,
1109 char *buf)
1110 {
1111 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
1112 struct kxcjk1013_data *data = iio_priv(indio_dev);
1113 const char *str;
1114
1115 if (data->chipset == KXTF9)
1116 str = kxtf9_samp_freq_avail;
1117 else
1118 str = kxcjk1013_samp_freq_avail;
1119
1120 return sprintf(buf, "%s\n", str);
1121 }
1122
1123 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
1124 kxcjk1013_get_samp_freq_avail, NULL, 0);
1125
1126 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
1127
1128 static struct attribute *kxcjk1013_attributes[] = {
1129 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
1130 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1131 NULL,
1132 };
1133
1134 static const struct attribute_group kxcjk1013_attrs_group = {
1135 .attrs = kxcjk1013_attributes,
1136 };
1137
1138 static const struct iio_event_spec kxcjk1013_event = {
1139 .type = IIO_EV_TYPE_THRESH,
1140 .dir = IIO_EV_DIR_EITHER,
1141 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1142 BIT(IIO_EV_INFO_ENABLE) |
1143 BIT(IIO_EV_INFO_PERIOD)
1144 };
1145
1146 static const struct iio_mount_matrix *
kxcjk1013_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)1147 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev,
1148 const struct iio_chan_spec *chan)
1149 {
1150 struct kxcjk1013_data *data = iio_priv(indio_dev);
1151
1152 return &data->orientation;
1153 }
1154
1155 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = {
1156 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix),
1157 { }
1158 };
1159
1160 #define KXCJK1013_CHANNEL(_axis) { \
1161 .type = IIO_ACCEL, \
1162 .modified = 1, \
1163 .channel2 = IIO_MOD_##_axis, \
1164 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
1165 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
1166 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1167 .scan_index = AXIS_##_axis, \
1168 .scan_type = { \
1169 .sign = 's', \
1170 .realbits = 12, \
1171 .storagebits = 16, \
1172 .shift = 4, \
1173 .endianness = IIO_LE, \
1174 }, \
1175 .event_spec = &kxcjk1013_event, \
1176 .ext_info = kxcjk1013_ext_info, \
1177 .num_event_specs = 1 \
1178 }
1179
1180 static const struct iio_chan_spec kxcjk1013_channels[] = {
1181 KXCJK1013_CHANNEL(X),
1182 KXCJK1013_CHANNEL(Y),
1183 KXCJK1013_CHANNEL(Z),
1184 IIO_CHAN_SOFT_TIMESTAMP(3),
1185 };
1186
1187 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
1188 .preenable = kxcjk1013_buffer_preenable,
1189 .postdisable = kxcjk1013_buffer_postdisable,
1190 };
1191
1192 static const struct iio_info kxcjk1013_info = {
1193 .attrs = &kxcjk1013_attrs_group,
1194 .read_raw = kxcjk1013_read_raw,
1195 .write_raw = kxcjk1013_write_raw,
1196 .read_event_value = kxcjk1013_read_event,
1197 .write_event_value = kxcjk1013_write_event,
1198 .write_event_config = kxcjk1013_write_event_config,
1199 .read_event_config = kxcjk1013_read_event_config,
1200 };
1201
1202 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
1203
kxcjk1013_trigger_handler(int irq,void * p)1204 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
1205 {
1206 struct iio_poll_func *pf = p;
1207 struct iio_dev *indio_dev = pf->indio_dev;
1208 struct kxcjk1013_data *data = iio_priv(indio_dev);
1209 int ret;
1210
1211 mutex_lock(&data->mutex);
1212 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
1213 KXCJK1013_REG_XOUT_L,
1214 AXIS_MAX * 2,
1215 (u8 *)data->scan.chans);
1216 mutex_unlock(&data->mutex);
1217 if (ret < 0)
1218 goto err;
1219
1220 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
1221 data->timestamp);
1222 err:
1223 iio_trigger_notify_done(indio_dev->trig);
1224
1225 return IRQ_HANDLED;
1226 }
1227
kxcjk1013_trig_reen(struct iio_trigger * trig)1228 static void kxcjk1013_trig_reen(struct iio_trigger *trig)
1229 {
1230 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1231 struct kxcjk1013_data *data = iio_priv(indio_dev);
1232 int ret;
1233
1234 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
1235 if (ret < 0)
1236 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1237 }
1238
kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)1239 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
1240 bool state)
1241 {
1242 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1243 struct kxcjk1013_data *data = iio_priv(indio_dev);
1244 int ret;
1245
1246 mutex_lock(&data->mutex);
1247
1248 if (!state && data->ev_enable_state && data->motion_trigger_on) {
1249 data->motion_trigger_on = false;
1250 mutex_unlock(&data->mutex);
1251 return 0;
1252 }
1253
1254 ret = kxcjk1013_set_power_state(data, state);
1255 if (ret < 0) {
1256 mutex_unlock(&data->mutex);
1257 return ret;
1258 }
1259 if (data->motion_trig == trig)
1260 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1261 else
1262 ret = kxcjk1013_setup_new_data_interrupt(data, state);
1263 if (ret < 0) {
1264 kxcjk1013_set_power_state(data, false);
1265 mutex_unlock(&data->mutex);
1266 return ret;
1267 }
1268 if (data->motion_trig == trig)
1269 data->motion_trigger_on = state;
1270 else
1271 data->dready_trigger_on = state;
1272
1273 mutex_unlock(&data->mutex);
1274
1275 return 0;
1276 }
1277
1278 static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1279 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1280 .reenable = kxcjk1013_trig_reen,
1281 };
1282
kxcjk1013_report_motion_event(struct iio_dev * indio_dev)1283 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
1284 {
1285 struct kxcjk1013_data *data = iio_priv(indio_dev);
1286
1287 int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2);
1288 if (ret < 0) {
1289 dev_err(&data->client->dev, "Error reading reg_int_src2\n");
1290 return;
1291 }
1292
1293 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1294 iio_push_event(indio_dev,
1295 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1296 0,
1297 IIO_MOD_X,
1298 IIO_EV_TYPE_THRESH,
1299 IIO_EV_DIR_FALLING),
1300 data->timestamp);
1301
1302 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1303 iio_push_event(indio_dev,
1304 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1305 0,
1306 IIO_MOD_X,
1307 IIO_EV_TYPE_THRESH,
1308 IIO_EV_DIR_RISING),
1309 data->timestamp);
1310
1311 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1312 iio_push_event(indio_dev,
1313 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1314 0,
1315 IIO_MOD_Y,
1316 IIO_EV_TYPE_THRESH,
1317 IIO_EV_DIR_FALLING),
1318 data->timestamp);
1319
1320 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1321 iio_push_event(indio_dev,
1322 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1323 0,
1324 IIO_MOD_Y,
1325 IIO_EV_TYPE_THRESH,
1326 IIO_EV_DIR_RISING),
1327 data->timestamp);
1328
1329 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1330 iio_push_event(indio_dev,
1331 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1332 0,
1333 IIO_MOD_Z,
1334 IIO_EV_TYPE_THRESH,
1335 IIO_EV_DIR_FALLING),
1336 data->timestamp);
1337
1338 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1339 iio_push_event(indio_dev,
1340 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1341 0,
1342 IIO_MOD_Z,
1343 IIO_EV_TYPE_THRESH,
1344 IIO_EV_DIR_RISING),
1345 data->timestamp);
1346 }
1347
kxcjk1013_event_handler(int irq,void * private)1348 static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1349 {
1350 struct iio_dev *indio_dev = private;
1351 struct kxcjk1013_data *data = iio_priv(indio_dev);
1352 int ret;
1353
1354 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1);
1355 if (ret < 0) {
1356 dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1357 goto ack_intr;
1358 }
1359
1360 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
1361 if (data->chipset == KXTF9)
1362 iio_push_event(indio_dev,
1363 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1364 0,
1365 IIO_MOD_X_AND_Y_AND_Z,
1366 IIO_EV_TYPE_THRESH,
1367 IIO_EV_DIR_RISING),
1368 data->timestamp);
1369 else
1370 kxcjk1013_report_motion_event(indio_dev);
1371 }
1372
1373 ack_intr:
1374 if (data->dready_trigger_on)
1375 return IRQ_HANDLED;
1376
1377 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
1378 if (ret < 0)
1379 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1380
1381 return IRQ_HANDLED;
1382 }
1383
kxcjk1013_data_rdy_trig_poll(int irq,void * private)1384 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1385 {
1386 struct iio_dev *indio_dev = private;
1387 struct kxcjk1013_data *data = iio_priv(indio_dev);
1388
1389 data->timestamp = iio_get_time_ns(indio_dev);
1390
1391 if (data->dready_trigger_on)
1392 iio_trigger_poll(data->dready_trig);
1393 else if (data->motion_trigger_on)
1394 iio_trigger_poll(data->motion_trig);
1395
1396 if (data->ev_enable_state)
1397 return IRQ_WAKE_THREAD;
1398 else
1399 return IRQ_HANDLED;
1400 }
1401
kxcjk1013_match_acpi_device(struct device * dev,enum kx_chipset * chipset,enum kx_acpi_type * acpi_type,const char ** label)1402 static const char *kxcjk1013_match_acpi_device(struct device *dev,
1403 enum kx_chipset *chipset,
1404 enum kx_acpi_type *acpi_type,
1405 const char **label)
1406 {
1407 const struct acpi_device_id *id;
1408
1409 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1410 if (!id)
1411 return NULL;
1412
1413 if (strcmp(id->id, "SMO8500") == 0) {
1414 *acpi_type = ACPI_SMO8500;
1415 } else if (strcmp(id->id, "KIOX010A") == 0) {
1416 *acpi_type = ACPI_KIOX010A;
1417 *label = "accel-display";
1418 } else if (strcmp(id->id, "KIOX020A") == 0) {
1419 *label = "accel-base";
1420 }
1421
1422 *chipset = (enum kx_chipset)id->driver_data;
1423
1424 return dev_name(dev);
1425 }
1426
kxcjk1013_probe(struct i2c_client * client)1427 static int kxcjk1013_probe(struct i2c_client *client)
1428 {
1429 const struct i2c_device_id *id = i2c_client_get_device_id(client);
1430 static const char * const regulator_names[] = { "vdd", "vddio" };
1431 struct kxcjk1013_data *data;
1432 struct iio_dev *indio_dev;
1433 struct kxcjk_1013_platform_data *pdata;
1434 const char *name;
1435 int ret;
1436
1437 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1438 if (!indio_dev)
1439 return -ENOMEM;
1440
1441 data = iio_priv(indio_dev);
1442 i2c_set_clientdata(client, indio_dev);
1443 data->client = client;
1444
1445 pdata = dev_get_platdata(&client->dev);
1446 if (pdata) {
1447 data->active_high_intr = pdata->active_high_intr;
1448 data->orientation = pdata->orientation;
1449 } else {
1450 data->active_high_intr = true; /* default polarity */
1451
1452 ret = iio_read_mount_matrix(&client->dev, &data->orientation);
1453 if (ret)
1454 return ret;
1455 }
1456
1457 ret = devm_regulator_bulk_get_enable(&client->dev,
1458 ARRAY_SIZE(regulator_names),
1459 regulator_names);
1460 if (ret)
1461 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n");
1462
1463 /*
1464 * A typical delay of 10ms is required for powering up
1465 * according to the data sheets of supported chips.
1466 * Hence double that to play safe.
1467 */
1468 msleep(20);
1469
1470 if (id) {
1471 data->chipset = (enum kx_chipset)(id->driver_data);
1472 name = id->name;
1473 } else if (ACPI_HANDLE(&client->dev)) {
1474 name = kxcjk1013_match_acpi_device(&client->dev,
1475 &data->chipset,
1476 &data->acpi_type,
1477 &indio_dev->label);
1478 } else
1479 return -ENODEV;
1480
1481 switch (data->chipset) {
1482 case KXCJK1013:
1483 case KXCJ91008:
1484 case KXTJ21009:
1485 data->regs = &kxcjk1013_regs;
1486 break;
1487 case KXTF9:
1488 data->regs = &kxtf9_regs;
1489 break;
1490 case KX0231025:
1491 data->regs = &kx0231025_regs;
1492 break;
1493 default:
1494 return -EINVAL;
1495 }
1496
1497 ret = kxcjk1013_chip_init(data);
1498 if (ret < 0)
1499 return ret;
1500
1501 mutex_init(&data->mutex);
1502
1503 indio_dev->channels = kxcjk1013_channels;
1504 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1505 indio_dev->available_scan_masks = kxcjk1013_scan_masks;
1506 indio_dev->name = name;
1507 indio_dev->modes = INDIO_DIRECT_MODE;
1508 indio_dev->info = &kxcjk1013_info;
1509
1510 if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
1511 ret = devm_request_threaded_irq(&client->dev, client->irq,
1512 kxcjk1013_data_rdy_trig_poll,
1513 kxcjk1013_event_handler,
1514 IRQF_TRIGGER_RISING,
1515 KXCJK1013_IRQ_NAME,
1516 indio_dev);
1517 if (ret)
1518 goto err_poweroff;
1519
1520 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1521 "%s-dev%d",
1522 indio_dev->name,
1523 iio_device_id(indio_dev));
1524 if (!data->dready_trig) {
1525 ret = -ENOMEM;
1526 goto err_poweroff;
1527 }
1528
1529 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1530 "%s-any-motion-dev%d",
1531 indio_dev->name,
1532 iio_device_id(indio_dev));
1533 if (!data->motion_trig) {
1534 ret = -ENOMEM;
1535 goto err_poweroff;
1536 }
1537
1538 data->dready_trig->ops = &kxcjk1013_trigger_ops;
1539 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1540 ret = iio_trigger_register(data->dready_trig);
1541 if (ret)
1542 goto err_poweroff;
1543
1544 indio_dev->trig = iio_trigger_get(data->dready_trig);
1545
1546 data->motion_trig->ops = &kxcjk1013_trigger_ops;
1547 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1548 ret = iio_trigger_register(data->motion_trig);
1549 if (ret) {
1550 data->motion_trig = NULL;
1551 goto err_trigger_unregister;
1552 }
1553 }
1554
1555 ret = iio_triggered_buffer_setup(indio_dev,
1556 &iio_pollfunc_store_time,
1557 kxcjk1013_trigger_handler,
1558 &kxcjk1013_buffer_setup_ops);
1559 if (ret < 0) {
1560 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1561 goto err_trigger_unregister;
1562 }
1563
1564 ret = pm_runtime_set_active(&client->dev);
1565 if (ret)
1566 goto err_buffer_cleanup;
1567
1568 pm_runtime_enable(&client->dev);
1569 pm_runtime_set_autosuspend_delay(&client->dev,
1570 KXCJK1013_SLEEP_DELAY_MS);
1571 pm_runtime_use_autosuspend(&client->dev);
1572
1573 ret = iio_device_register(indio_dev);
1574 if (ret < 0) {
1575 dev_err(&client->dev, "unable to register iio device\n");
1576 goto err_pm_cleanup;
1577 }
1578
1579 return 0;
1580
1581 err_pm_cleanup:
1582 pm_runtime_dont_use_autosuspend(&client->dev);
1583 pm_runtime_disable(&client->dev);
1584 err_buffer_cleanup:
1585 iio_triggered_buffer_cleanup(indio_dev);
1586 err_trigger_unregister:
1587 if (data->dready_trig)
1588 iio_trigger_unregister(data->dready_trig);
1589 if (data->motion_trig)
1590 iio_trigger_unregister(data->motion_trig);
1591 err_poweroff:
1592 kxcjk1013_set_mode(data, STANDBY);
1593
1594 return ret;
1595 }
1596
kxcjk1013_remove(struct i2c_client * client)1597 static void kxcjk1013_remove(struct i2c_client *client)
1598 {
1599 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1600 struct kxcjk1013_data *data = iio_priv(indio_dev);
1601
1602 iio_device_unregister(indio_dev);
1603
1604 pm_runtime_disable(&client->dev);
1605 pm_runtime_set_suspended(&client->dev);
1606
1607 iio_triggered_buffer_cleanup(indio_dev);
1608 if (data->dready_trig) {
1609 iio_trigger_unregister(data->dready_trig);
1610 iio_trigger_unregister(data->motion_trig);
1611 }
1612
1613 mutex_lock(&data->mutex);
1614 kxcjk1013_set_mode(data, STANDBY);
1615 mutex_unlock(&data->mutex);
1616 }
1617
1618 #ifdef CONFIG_PM_SLEEP
kxcjk1013_suspend(struct device * dev)1619 static int kxcjk1013_suspend(struct device *dev)
1620 {
1621 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1622 struct kxcjk1013_data *data = iio_priv(indio_dev);
1623 int ret;
1624
1625 mutex_lock(&data->mutex);
1626 ret = kxcjk1013_set_mode(data, STANDBY);
1627 mutex_unlock(&data->mutex);
1628
1629 return ret;
1630 }
1631
kxcjk1013_resume(struct device * dev)1632 static int kxcjk1013_resume(struct device *dev)
1633 {
1634 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1635 struct kxcjk1013_data *data = iio_priv(indio_dev);
1636 int ret = 0;
1637
1638 mutex_lock(&data->mutex);
1639 ret = kxcjk1013_set_mode(data, OPERATION);
1640 if (ret == 0)
1641 ret = kxcjk1013_set_range(data, data->range);
1642 mutex_unlock(&data->mutex);
1643
1644 return ret;
1645 }
1646 #endif
1647
1648 #ifdef CONFIG_PM
kxcjk1013_runtime_suspend(struct device * dev)1649 static int kxcjk1013_runtime_suspend(struct device *dev)
1650 {
1651 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1652 struct kxcjk1013_data *data = iio_priv(indio_dev);
1653 int ret;
1654
1655 ret = kxcjk1013_set_mode(data, STANDBY);
1656 if (ret < 0) {
1657 dev_err(&data->client->dev, "powering off device failed\n");
1658 return -EAGAIN;
1659 }
1660 return 0;
1661 }
1662
kxcjk1013_runtime_resume(struct device * dev)1663 static int kxcjk1013_runtime_resume(struct device *dev)
1664 {
1665 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1666 struct kxcjk1013_data *data = iio_priv(indio_dev);
1667 int ret;
1668 int sleep_val;
1669
1670 ret = kxcjk1013_set_mode(data, OPERATION);
1671 if (ret < 0)
1672 return ret;
1673
1674 sleep_val = kxcjk1013_get_startup_times(data);
1675 if (sleep_val < 20000)
1676 usleep_range(sleep_val, 20000);
1677 else
1678 msleep_interruptible(sleep_val/1000);
1679
1680 return 0;
1681 }
1682 #endif
1683
1684 static const struct dev_pm_ops kxcjk1013_pm_ops = {
1685 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1686 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1687 kxcjk1013_runtime_resume, NULL)
1688 };
1689
1690 static const struct acpi_device_id kx_acpi_match[] = {
1691 {"KXCJ1013", KXCJK1013},
1692 {"KXCJ1008", KXCJ91008},
1693 {"KXCJ9000", KXCJ91008},
1694 {"KIOX0008", KXCJ91008},
1695 {"KIOX0009", KXTJ21009},
1696 {"KIOX000A", KXCJ91008},
1697 {"KIOX010A", KXCJ91008}, /* KXCJ91008 in the display of a yoga 2-in-1 */
1698 {"KIOX020A", KXCJ91008}, /* KXCJ91008 in the base of a yoga 2-in-1 */
1699 {"KXTJ1009", KXTJ21009},
1700 {"KXJ2109", KXTJ21009},
1701 {"SMO8500", KXCJ91008},
1702 { },
1703 };
1704 MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1705
1706 static const struct i2c_device_id kxcjk1013_id[] = {
1707 {"kxcjk1013", KXCJK1013},
1708 {"kxcj91008", KXCJ91008},
1709 {"kxtj21009", KXTJ21009},
1710 {"kxtf9", KXTF9},
1711 {"kx023-1025", KX0231025},
1712 {"SMO8500", KXCJ91008},
1713 {}
1714 };
1715
1716 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1717
1718 static const struct of_device_id kxcjk1013_of_match[] = {
1719 { .compatible = "kionix,kxcjk1013", },
1720 { .compatible = "kionix,kxcj91008", },
1721 { .compatible = "kionix,kxtj21009", },
1722 { .compatible = "kionix,kxtf9", },
1723 { .compatible = "kionix,kx023-1025", },
1724 { }
1725 };
1726 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match);
1727
1728 static struct i2c_driver kxcjk1013_driver = {
1729 .driver = {
1730 .name = KXCJK1013_DRV_NAME,
1731 .acpi_match_table = ACPI_PTR(kx_acpi_match),
1732 .of_match_table = kxcjk1013_of_match,
1733 .pm = &kxcjk1013_pm_ops,
1734 },
1735 .probe = kxcjk1013_probe,
1736 .remove = kxcjk1013_remove,
1737 .id_table = kxcjk1013_id,
1738 };
1739 module_i2c_driver(kxcjk1013_driver);
1740
1741 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1742 MODULE_LICENSE("GPL v2");
1743 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");
1744