1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Core IIO driver for Bosch BMA400 triaxial acceleration sensor. 4 * 5 * Copyright 2019 Dan Robertson <dan@dlrobertson.com> 6 * 7 * TODO: 8 * - Support for power management 9 * - Support events and interrupts 10 * - Create channel for step count 11 * - Create channel for sensor time 12 */ 13 14 #include <linux/bitops.h> 15 #include <linux/device.h> 16 #include <linux/iio/iio.h> 17 #include <linux/iio/sysfs.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/mutex.h> 21 #include <linux/regmap.h> 22 #include <linux/regulator/consumer.h> 23 24 #include "bma400.h" 25 26 /* 27 * The G-range selection may be one of 2g, 4g, 8, or 16g. The scale may 28 * be selected with the acc_range bits of the ACC_CONFIG1 register. 29 * NB: This buffer is populated in the device init. 30 */ 31 static int bma400_scales[8]; 32 33 /* 34 * See the ACC_CONFIG1 section of the datasheet. 35 * NB: This buffer is populated in the device init. 36 */ 37 static int bma400_sample_freqs[14]; 38 39 static const int bma400_osr_range[] = { 0, 1, 3 }; 40 41 /* See the ACC_CONFIG0 section of the datasheet */ 42 enum bma400_power_mode { 43 POWER_MODE_SLEEP = 0x00, 44 POWER_MODE_LOW = 0x01, 45 POWER_MODE_NORMAL = 0x02, 46 POWER_MODE_INVALID = 0x03, 47 }; 48 49 struct bma400_sample_freq { 50 int hz; 51 int uhz; 52 }; 53 54 struct bma400_data { 55 struct device *dev; 56 struct regmap *regmap; 57 struct regulator_bulk_data regulators[BMA400_NUM_REGULATORS]; 58 struct mutex mutex; /* data register lock */ 59 struct iio_mount_matrix orientation; 60 enum bma400_power_mode power_mode; 61 struct bma400_sample_freq sample_freq; 62 int oversampling_ratio; 63 int scale; 64 }; 65 66 static bool bma400_is_writable_reg(struct device *dev, unsigned int reg) 67 { 68 switch (reg) { 69 case BMA400_CHIP_ID_REG: 70 case BMA400_ERR_REG: 71 case BMA400_STATUS_REG: 72 case BMA400_X_AXIS_LSB_REG: 73 case BMA400_X_AXIS_MSB_REG: 74 case BMA400_Y_AXIS_LSB_REG: 75 case BMA400_Y_AXIS_MSB_REG: 76 case BMA400_Z_AXIS_LSB_REG: 77 case BMA400_Z_AXIS_MSB_REG: 78 case BMA400_SENSOR_TIME0: 79 case BMA400_SENSOR_TIME1: 80 case BMA400_SENSOR_TIME2: 81 case BMA400_EVENT_REG: 82 case BMA400_INT_STAT0_REG: 83 case BMA400_INT_STAT1_REG: 84 case BMA400_INT_STAT2_REG: 85 case BMA400_TEMP_DATA_REG: 86 case BMA400_FIFO_LENGTH0_REG: 87 case BMA400_FIFO_LENGTH1_REG: 88 case BMA400_FIFO_DATA_REG: 89 case BMA400_STEP_CNT0_REG: 90 case BMA400_STEP_CNT1_REG: 91 case BMA400_STEP_CNT3_REG: 92 case BMA400_STEP_STAT_REG: 93 return false; 94 default: 95 return true; 96 } 97 } 98 99 static bool bma400_is_volatile_reg(struct device *dev, unsigned int reg) 100 { 101 switch (reg) { 102 case BMA400_ERR_REG: 103 case BMA400_STATUS_REG: 104 case BMA400_X_AXIS_LSB_REG: 105 case BMA400_X_AXIS_MSB_REG: 106 case BMA400_Y_AXIS_LSB_REG: 107 case BMA400_Y_AXIS_MSB_REG: 108 case BMA400_Z_AXIS_LSB_REG: 109 case BMA400_Z_AXIS_MSB_REG: 110 case BMA400_SENSOR_TIME0: 111 case BMA400_SENSOR_TIME1: 112 case BMA400_SENSOR_TIME2: 113 case BMA400_EVENT_REG: 114 case BMA400_INT_STAT0_REG: 115 case BMA400_INT_STAT1_REG: 116 case BMA400_INT_STAT2_REG: 117 case BMA400_TEMP_DATA_REG: 118 case BMA400_FIFO_LENGTH0_REG: 119 case BMA400_FIFO_LENGTH1_REG: 120 case BMA400_FIFO_DATA_REG: 121 case BMA400_STEP_CNT0_REG: 122 case BMA400_STEP_CNT1_REG: 123 case BMA400_STEP_CNT3_REG: 124 case BMA400_STEP_STAT_REG: 125 return true; 126 default: 127 return false; 128 } 129 } 130 131 const struct regmap_config bma400_regmap_config = { 132 .reg_bits = 8, 133 .val_bits = 8, 134 .max_register = BMA400_CMD_REG, 135 .cache_type = REGCACHE_RBTREE, 136 .writeable_reg = bma400_is_writable_reg, 137 .volatile_reg = bma400_is_volatile_reg, 138 }; 139 EXPORT_SYMBOL(bma400_regmap_config); 140 141 static const struct iio_mount_matrix * 142 bma400_accel_get_mount_matrix(const struct iio_dev *indio_dev, 143 const struct iio_chan_spec *chan) 144 { 145 struct bma400_data *data = iio_priv(indio_dev); 146 147 return &data->orientation; 148 } 149 150 static const struct iio_chan_spec_ext_info bma400_ext_info[] = { 151 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma400_accel_get_mount_matrix), 152 { } 153 }; 154 155 #define BMA400_ACC_CHANNEL(_axis) { \ 156 .type = IIO_ACCEL, \ 157 .modified = 1, \ 158 .channel2 = IIO_MOD_##_axis, \ 159 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 160 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 161 BIT(IIO_CHAN_INFO_SCALE) | \ 162 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 163 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 164 BIT(IIO_CHAN_INFO_SCALE) | \ 165 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 166 .ext_info = bma400_ext_info, \ 167 } 168 169 static const struct iio_chan_spec bma400_channels[] = { 170 BMA400_ACC_CHANNEL(X), 171 BMA400_ACC_CHANNEL(Y), 172 BMA400_ACC_CHANNEL(Z), 173 { 174 .type = IIO_TEMP, 175 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 176 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), 177 }, 178 }; 179 180 static int bma400_get_temp_reg(struct bma400_data *data, int *val, int *val2) 181 { 182 unsigned int raw_temp; 183 int host_temp; 184 int ret; 185 186 if (data->power_mode == POWER_MODE_SLEEP) 187 return -EBUSY; 188 189 ret = regmap_read(data->regmap, BMA400_TEMP_DATA_REG, &raw_temp); 190 if (ret) 191 return ret; 192 193 host_temp = sign_extend32(raw_temp, 7); 194 /* 195 * The formula for the TEMP_DATA register in the datasheet 196 * is: x * 0.5 + 23 197 */ 198 *val = (host_temp >> 1) + 23; 199 *val2 = (host_temp & 0x1) * 500000; 200 return IIO_VAL_INT_PLUS_MICRO; 201 } 202 203 static int bma400_get_accel_reg(struct bma400_data *data, 204 const struct iio_chan_spec *chan, 205 int *val) 206 { 207 __le16 raw_accel; 208 int lsb_reg; 209 int ret; 210 211 if (data->power_mode == POWER_MODE_SLEEP) 212 return -EBUSY; 213 214 switch (chan->channel2) { 215 case IIO_MOD_X: 216 lsb_reg = BMA400_X_AXIS_LSB_REG; 217 break; 218 case IIO_MOD_Y: 219 lsb_reg = BMA400_Y_AXIS_LSB_REG; 220 break; 221 case IIO_MOD_Z: 222 lsb_reg = BMA400_Z_AXIS_LSB_REG; 223 break; 224 default: 225 dev_err(data->dev, "invalid axis channel modifier\n"); 226 return -EINVAL; 227 } 228 229 /* bulk read two registers, with the base being the LSB register */ 230 ret = regmap_bulk_read(data->regmap, lsb_reg, &raw_accel, 231 sizeof(raw_accel)); 232 if (ret) 233 return ret; 234 235 *val = sign_extend32(le16_to_cpu(raw_accel), 11); 236 return IIO_VAL_INT; 237 } 238 239 static void bma400_output_data_rate_from_raw(int raw, unsigned int *val, 240 unsigned int *val2) 241 { 242 *val = BMA400_ACC_ODR_MAX_HZ >> (BMA400_ACC_ODR_MAX_RAW - raw); 243 if (raw > BMA400_ACC_ODR_MIN_RAW) 244 *val2 = 0; 245 else 246 *val2 = 500000; 247 } 248 249 static int bma400_get_accel_output_data_rate(struct bma400_data *data) 250 { 251 unsigned int val; 252 unsigned int odr; 253 int ret; 254 255 switch (data->power_mode) { 256 case POWER_MODE_LOW: 257 /* 258 * Runs at a fixed rate in low-power mode. See section 4.3 259 * in the datasheet. 260 */ 261 bma400_output_data_rate_from_raw(BMA400_ACC_ODR_LP_RAW, 262 &data->sample_freq.hz, 263 &data->sample_freq.uhz); 264 return 0; 265 case POWER_MODE_NORMAL: 266 /* 267 * In normal mode the ODR can be found in the ACC_CONFIG1 268 * register. 269 */ 270 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val); 271 if (ret) 272 goto error; 273 274 odr = val & BMA400_ACC_ODR_MASK; 275 if (odr < BMA400_ACC_ODR_MIN_RAW || 276 odr > BMA400_ACC_ODR_MAX_RAW) { 277 ret = -EINVAL; 278 goto error; 279 } 280 281 bma400_output_data_rate_from_raw(odr, &data->sample_freq.hz, 282 &data->sample_freq.uhz); 283 return 0; 284 case POWER_MODE_SLEEP: 285 data->sample_freq.hz = 0; 286 data->sample_freq.uhz = 0; 287 return 0; 288 default: 289 ret = 0; 290 goto error; 291 } 292 error: 293 data->sample_freq.hz = -1; 294 data->sample_freq.uhz = -1; 295 return ret; 296 } 297 298 static int bma400_set_accel_output_data_rate(struct bma400_data *data, 299 int hz, int uhz) 300 { 301 unsigned int idx; 302 unsigned int odr; 303 unsigned int val; 304 int ret; 305 306 if (hz >= BMA400_ACC_ODR_MIN_WHOLE_HZ) { 307 if (uhz || hz > BMA400_ACC_ODR_MAX_HZ) 308 return -EINVAL; 309 310 /* Note this works because MIN_WHOLE_HZ is odd */ 311 idx = __ffs(hz); 312 313 if (hz >> idx != BMA400_ACC_ODR_MIN_WHOLE_HZ) 314 return -EINVAL; 315 316 idx += BMA400_ACC_ODR_MIN_RAW + 1; 317 } else if (hz == BMA400_ACC_ODR_MIN_HZ && uhz == 500000) { 318 idx = BMA400_ACC_ODR_MIN_RAW; 319 } else { 320 return -EINVAL; 321 } 322 323 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val); 324 if (ret) 325 return ret; 326 327 /* preserve the range and normal mode osr */ 328 odr = (~BMA400_ACC_ODR_MASK & val) | idx; 329 330 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG, odr); 331 if (ret) 332 return ret; 333 334 bma400_output_data_rate_from_raw(idx, &data->sample_freq.hz, 335 &data->sample_freq.uhz); 336 return 0; 337 } 338 339 static int bma400_get_accel_oversampling_ratio(struct bma400_data *data) 340 { 341 unsigned int val; 342 unsigned int osr; 343 int ret; 344 345 /* 346 * The oversampling ratio is stored in a different register 347 * based on the power-mode. In normal mode the OSR is stored 348 * in ACC_CONFIG1. In low-power mode it is stored in 349 * ACC_CONFIG0. 350 */ 351 switch (data->power_mode) { 352 case POWER_MODE_LOW: 353 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val); 354 if (ret) { 355 data->oversampling_ratio = -1; 356 return ret; 357 } 358 359 osr = (val & BMA400_LP_OSR_MASK) >> BMA400_LP_OSR_SHIFT; 360 361 data->oversampling_ratio = osr; 362 return 0; 363 case POWER_MODE_NORMAL: 364 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val); 365 if (ret) { 366 data->oversampling_ratio = -1; 367 return ret; 368 } 369 370 osr = (val & BMA400_NP_OSR_MASK) >> BMA400_NP_OSR_SHIFT; 371 372 data->oversampling_ratio = osr; 373 return 0; 374 case POWER_MODE_SLEEP: 375 data->oversampling_ratio = 0; 376 return 0; 377 default: 378 data->oversampling_ratio = -1; 379 return -EINVAL; 380 } 381 } 382 383 static int bma400_set_accel_oversampling_ratio(struct bma400_data *data, 384 int val) 385 { 386 unsigned int acc_config; 387 int ret; 388 389 if (val & ~BMA400_TWO_BITS_MASK) 390 return -EINVAL; 391 392 /* 393 * The oversampling ratio is stored in a different register 394 * based on the power-mode. 395 */ 396 switch (data->power_mode) { 397 case POWER_MODE_LOW: 398 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, 399 &acc_config); 400 if (ret) 401 return ret; 402 403 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG, 404 (acc_config & ~BMA400_LP_OSR_MASK) | 405 (val << BMA400_LP_OSR_SHIFT)); 406 if (ret) { 407 dev_err(data->dev, "Failed to write out OSR\n"); 408 return ret; 409 } 410 411 data->oversampling_ratio = val; 412 return 0; 413 case POWER_MODE_NORMAL: 414 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, 415 &acc_config); 416 if (ret) 417 return ret; 418 419 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG, 420 (acc_config & ~BMA400_NP_OSR_MASK) | 421 (val << BMA400_NP_OSR_SHIFT)); 422 if (ret) { 423 dev_err(data->dev, "Failed to write out OSR\n"); 424 return ret; 425 } 426 427 data->oversampling_ratio = val; 428 return 0; 429 default: 430 return -EINVAL; 431 } 432 return ret; 433 } 434 435 static int bma400_accel_scale_to_raw(struct bma400_data *data, 436 unsigned int val) 437 { 438 int raw; 439 440 if (val == 0) 441 return -EINVAL; 442 443 /* Note this works because BMA400_SCALE_MIN is odd */ 444 raw = __ffs(val); 445 446 if (val >> raw != BMA400_SCALE_MIN) 447 return -EINVAL; 448 449 return raw; 450 } 451 452 static int bma400_get_accel_scale(struct bma400_data *data) 453 { 454 unsigned int raw_scale; 455 unsigned int val; 456 int ret; 457 458 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &val); 459 if (ret) 460 return ret; 461 462 raw_scale = (val & BMA400_ACC_SCALE_MASK) >> BMA400_SCALE_SHIFT; 463 if (raw_scale > BMA400_TWO_BITS_MASK) 464 return -EINVAL; 465 466 data->scale = BMA400_SCALE_MIN << raw_scale; 467 468 return 0; 469 } 470 471 static int bma400_set_accel_scale(struct bma400_data *data, unsigned int val) 472 { 473 unsigned int acc_config; 474 int raw; 475 int ret; 476 477 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG1_REG, &acc_config); 478 if (ret) 479 return ret; 480 481 raw = bma400_accel_scale_to_raw(data, val); 482 if (raw < 0) 483 return raw; 484 485 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG, 486 (acc_config & ~BMA400_ACC_SCALE_MASK) | 487 (raw << BMA400_SCALE_SHIFT)); 488 if (ret) 489 return ret; 490 491 data->scale = val; 492 return 0; 493 } 494 495 static int bma400_get_power_mode(struct bma400_data *data) 496 { 497 unsigned int val; 498 int ret; 499 500 ret = regmap_read(data->regmap, BMA400_STATUS_REG, &val); 501 if (ret) { 502 dev_err(data->dev, "Failed to read status register\n"); 503 return ret; 504 } 505 506 data->power_mode = (val >> 1) & BMA400_TWO_BITS_MASK; 507 return 0; 508 } 509 510 static int bma400_set_power_mode(struct bma400_data *data, 511 enum bma400_power_mode mode) 512 { 513 unsigned int val; 514 int ret; 515 516 ret = regmap_read(data->regmap, BMA400_ACC_CONFIG0_REG, &val); 517 if (ret) 518 return ret; 519 520 if (data->power_mode == mode) 521 return 0; 522 523 if (mode == POWER_MODE_INVALID) 524 return -EINVAL; 525 526 /* Preserve the low-power oversample ratio etc */ 527 ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG, 528 mode | (val & ~BMA400_TWO_BITS_MASK)); 529 if (ret) { 530 dev_err(data->dev, "Failed to write to power-mode\n"); 531 return ret; 532 } 533 534 data->power_mode = mode; 535 536 /* 537 * Update our cached osr and odr based on the new 538 * power-mode. 539 */ 540 bma400_get_accel_output_data_rate(data); 541 bma400_get_accel_oversampling_ratio(data); 542 return 0; 543 } 544 545 static void bma400_init_tables(void) 546 { 547 int raw; 548 int i; 549 550 for (i = 0; i + 1 < ARRAY_SIZE(bma400_sample_freqs); i += 2) { 551 raw = (i / 2) + 5; 552 bma400_output_data_rate_from_raw(raw, &bma400_sample_freqs[i], 553 &bma400_sample_freqs[i + 1]); 554 } 555 556 for (i = 0; i + 1 < ARRAY_SIZE(bma400_scales); i += 2) { 557 raw = i / 2; 558 bma400_scales[i] = 0; 559 bma400_scales[i + 1] = BMA400_SCALE_MIN << raw; 560 } 561 } 562 563 static int bma400_init(struct bma400_data *data) 564 { 565 unsigned int val; 566 int ret; 567 568 /* Try to read chip_id register. It must return 0x90. */ 569 ret = regmap_read(data->regmap, BMA400_CHIP_ID_REG, &val); 570 if (ret) { 571 dev_err(data->dev, "Failed to read chip id register\n"); 572 goto out; 573 } 574 575 if (val != BMA400_ID_REG_VAL) { 576 dev_err(data->dev, "Chip ID mismatch\n"); 577 ret = -ENODEV; 578 goto out; 579 } 580 581 data->regulators[BMA400_VDD_REGULATOR].supply = "vdd"; 582 data->regulators[BMA400_VDDIO_REGULATOR].supply = "vddio"; 583 ret = devm_regulator_bulk_get(data->dev, 584 ARRAY_SIZE(data->regulators), 585 data->regulators); 586 if (ret) { 587 if (ret != -EPROBE_DEFER) 588 dev_err(data->dev, 589 "Failed to get regulators: %d\n", 590 ret); 591 592 goto out; 593 } 594 ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators), 595 data->regulators); 596 if (ret) { 597 dev_err(data->dev, "Failed to enable regulators: %d\n", 598 ret); 599 goto out; 600 } 601 602 ret = bma400_get_power_mode(data); 603 if (ret) { 604 dev_err(data->dev, "Failed to get the initial power-mode\n"); 605 goto err_reg_disable; 606 } 607 608 if (data->power_mode != POWER_MODE_NORMAL) { 609 ret = bma400_set_power_mode(data, POWER_MODE_NORMAL); 610 if (ret) { 611 dev_err(data->dev, "Failed to wake up the device\n"); 612 goto err_reg_disable; 613 } 614 /* 615 * TODO: The datasheet waits 1500us here in the example, but 616 * lists 2/ODR as the wakeup time. 617 */ 618 usleep_range(1500, 2000); 619 } 620 621 bma400_init_tables(); 622 623 ret = bma400_get_accel_output_data_rate(data); 624 if (ret) 625 goto err_reg_disable; 626 627 ret = bma400_get_accel_oversampling_ratio(data); 628 if (ret) 629 goto err_reg_disable; 630 631 ret = bma400_get_accel_scale(data); 632 if (ret) 633 goto err_reg_disable; 634 635 /* 636 * Once the interrupt engine is supported we might use the 637 * data_src_reg, but for now ensure this is set to the 638 * variable ODR filter selectable by the sample frequency 639 * channel. 640 */ 641 return regmap_write(data->regmap, BMA400_ACC_CONFIG2_REG, 0x00); 642 643 err_reg_disable: 644 regulator_bulk_disable(ARRAY_SIZE(data->regulators), 645 data->regulators); 646 out: 647 return ret; 648 } 649 650 static int bma400_read_raw(struct iio_dev *indio_dev, 651 struct iio_chan_spec const *chan, int *val, 652 int *val2, long mask) 653 { 654 struct bma400_data *data = iio_priv(indio_dev); 655 int ret; 656 657 switch (mask) { 658 case IIO_CHAN_INFO_PROCESSED: 659 mutex_lock(&data->mutex); 660 ret = bma400_get_temp_reg(data, val, val2); 661 mutex_unlock(&data->mutex); 662 return ret; 663 case IIO_CHAN_INFO_RAW: 664 mutex_lock(&data->mutex); 665 ret = bma400_get_accel_reg(data, chan, val); 666 mutex_unlock(&data->mutex); 667 return ret; 668 case IIO_CHAN_INFO_SAMP_FREQ: 669 switch (chan->type) { 670 case IIO_ACCEL: 671 if (data->sample_freq.hz < 0) 672 return -EINVAL; 673 674 *val = data->sample_freq.hz; 675 *val2 = data->sample_freq.uhz; 676 return IIO_VAL_INT_PLUS_MICRO; 677 case IIO_TEMP: 678 /* 679 * Runs at a fixed sampling frequency. See Section 4.4 680 * of the datasheet. 681 */ 682 *val = 6; 683 *val2 = 250000; 684 return IIO_VAL_INT_PLUS_MICRO; 685 default: 686 return -EINVAL; 687 } 688 case IIO_CHAN_INFO_SCALE: 689 *val = 0; 690 *val2 = data->scale; 691 return IIO_VAL_INT_PLUS_MICRO; 692 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 693 /* 694 * TODO: We could avoid this logic and returning -EINVAL here if 695 * we set both the low-power and normal mode OSR registers when 696 * we configure the device. 697 */ 698 if (data->oversampling_ratio < 0) 699 return -EINVAL; 700 701 *val = data->oversampling_ratio; 702 return IIO_VAL_INT; 703 default: 704 return -EINVAL; 705 } 706 } 707 708 static int bma400_read_avail(struct iio_dev *indio_dev, 709 struct iio_chan_spec const *chan, 710 const int **vals, int *type, int *length, 711 long mask) 712 { 713 switch (mask) { 714 case IIO_CHAN_INFO_SCALE: 715 *type = IIO_VAL_INT_PLUS_MICRO; 716 *vals = bma400_scales; 717 *length = ARRAY_SIZE(bma400_scales); 718 return IIO_AVAIL_LIST; 719 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 720 *type = IIO_VAL_INT; 721 *vals = bma400_osr_range; 722 *length = ARRAY_SIZE(bma400_osr_range); 723 return IIO_AVAIL_RANGE; 724 case IIO_CHAN_INFO_SAMP_FREQ: 725 *type = IIO_VAL_INT_PLUS_MICRO; 726 *vals = bma400_sample_freqs; 727 *length = ARRAY_SIZE(bma400_sample_freqs); 728 return IIO_AVAIL_LIST; 729 default: 730 return -EINVAL; 731 } 732 } 733 734 static int bma400_write_raw(struct iio_dev *indio_dev, 735 struct iio_chan_spec const *chan, int val, int val2, 736 long mask) 737 { 738 struct bma400_data *data = iio_priv(indio_dev); 739 int ret; 740 741 switch (mask) { 742 case IIO_CHAN_INFO_SAMP_FREQ: 743 /* 744 * The sample frequency is readonly for the temperature 745 * register and a fixed value in low-power mode. 746 */ 747 if (chan->type != IIO_ACCEL) 748 return -EINVAL; 749 750 mutex_lock(&data->mutex); 751 ret = bma400_set_accel_output_data_rate(data, val, val2); 752 mutex_unlock(&data->mutex); 753 return ret; 754 case IIO_CHAN_INFO_SCALE: 755 if (val != 0 || 756 val2 < BMA400_SCALE_MIN || val2 > BMA400_SCALE_MAX) 757 return -EINVAL; 758 759 mutex_lock(&data->mutex); 760 ret = bma400_set_accel_scale(data, val2); 761 mutex_unlock(&data->mutex); 762 return ret; 763 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 764 mutex_lock(&data->mutex); 765 ret = bma400_set_accel_oversampling_ratio(data, val); 766 mutex_unlock(&data->mutex); 767 return ret; 768 default: 769 return -EINVAL; 770 } 771 } 772 773 static int bma400_write_raw_get_fmt(struct iio_dev *indio_dev, 774 struct iio_chan_spec const *chan, 775 long mask) 776 { 777 switch (mask) { 778 case IIO_CHAN_INFO_SAMP_FREQ: 779 return IIO_VAL_INT_PLUS_MICRO; 780 case IIO_CHAN_INFO_SCALE: 781 return IIO_VAL_INT_PLUS_MICRO; 782 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 783 return IIO_VAL_INT; 784 default: 785 return -EINVAL; 786 } 787 } 788 789 static const struct iio_info bma400_info = { 790 .read_raw = bma400_read_raw, 791 .read_avail = bma400_read_avail, 792 .write_raw = bma400_write_raw, 793 .write_raw_get_fmt = bma400_write_raw_get_fmt, 794 }; 795 796 int bma400_probe(struct device *dev, struct regmap *regmap, const char *name) 797 { 798 struct iio_dev *indio_dev; 799 struct bma400_data *data; 800 int ret; 801 802 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 803 if (!indio_dev) 804 return -ENOMEM; 805 806 data = iio_priv(indio_dev); 807 data->regmap = regmap; 808 data->dev = dev; 809 810 ret = bma400_init(data); 811 if (ret) 812 return ret; 813 814 ret = iio_read_mount_matrix(dev, "mount-matrix", &data->orientation); 815 if (ret) 816 return ret; 817 818 mutex_init(&data->mutex); 819 indio_dev->name = name; 820 indio_dev->info = &bma400_info; 821 indio_dev->channels = bma400_channels; 822 indio_dev->num_channels = ARRAY_SIZE(bma400_channels); 823 indio_dev->modes = INDIO_DIRECT_MODE; 824 825 dev_set_drvdata(dev, indio_dev); 826 827 return iio_device_register(indio_dev); 828 } 829 EXPORT_SYMBOL(bma400_probe); 830 831 int bma400_remove(struct device *dev) 832 { 833 struct iio_dev *indio_dev = dev_get_drvdata(dev); 834 struct bma400_data *data = iio_priv(indio_dev); 835 int ret; 836 837 mutex_lock(&data->mutex); 838 ret = bma400_set_power_mode(data, POWER_MODE_SLEEP); 839 mutex_unlock(&data->mutex); 840 841 regulator_bulk_disable(ARRAY_SIZE(data->regulators), 842 data->regulators); 843 844 iio_device_unregister(indio_dev); 845 846 return ret; 847 } 848 EXPORT_SYMBOL(bma400_remove); 849 850 MODULE_AUTHOR("Dan Robertson <dan@dlrobertson.com>"); 851 MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor core"); 852 MODULE_LICENSE("GPL"); 853