xref: /openbmc/linux/drivers/iio/accel/bma400.h (revision 12cecbf9)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Register constants and other forward declarations needed by the bma400
4  * sources.
5  *
6  * Copyright 2019 Dan Robertson <dan@dlrobertson.com>
7  */
8 
9 #ifndef _BMA400_H_
10 #define _BMA400_H_
11 
12 #include <linux/bits.h>
13 #include <linux/regmap.h>
14 
15 /*
16  * Read-Only Registers
17  */
18 
19 /* Status and ID registers */
20 #define BMA400_CHIP_ID_REG          0x00
21 #define BMA400_ERR_REG              0x02
22 #define BMA400_STATUS_REG           0x03
23 
24 /* Acceleration registers */
25 #define BMA400_X_AXIS_LSB_REG       0x04
26 #define BMA400_X_AXIS_MSB_REG       0x05
27 #define BMA400_Y_AXIS_LSB_REG       0x06
28 #define BMA400_Y_AXIS_MSB_REG       0x07
29 #define BMA400_Z_AXIS_LSB_REG       0x08
30 #define BMA400_Z_AXIS_MSB_REG       0x09
31 
32 /* Sensor time registers */
33 #define BMA400_SENSOR_TIME0         0x0a
34 #define BMA400_SENSOR_TIME1         0x0b
35 #define BMA400_SENSOR_TIME2         0x0c
36 
37 /* Event and interrupt registers */
38 #define BMA400_EVENT_REG            0x0d
39 #define BMA400_INT_STAT0_REG        0x0e
40 #define BMA400_INT_STAT1_REG        0x0f
41 #define BMA400_INT_STAT2_REG        0x10
42 #define BMA400_INT12_MAP_REG        0x23
43 
44 /* Temperature register */
45 #define BMA400_TEMP_DATA_REG        0x11
46 
47 /* FIFO length and data registers */
48 #define BMA400_FIFO_LENGTH0_REG     0x12
49 #define BMA400_FIFO_LENGTH1_REG     0x13
50 #define BMA400_FIFO_DATA_REG        0x14
51 
52 /* Step count registers */
53 #define BMA400_STEP_CNT0_REG        0x15
54 #define BMA400_STEP_CNT1_REG        0x16
55 #define BMA400_STEP_CNT3_REG        0x17
56 #define BMA400_STEP_STAT_REG        0x18
57 #define BMA400_STEP_INT_MSK         BIT(0)
58 #define BMA400_STEP_RAW_LEN         0x03
59 #define BMA400_STEP_STAT_MASK       GENMASK(9, 8)
60 
61 /*
62  * Read-write configuration registers
63  */
64 #define BMA400_ACC_CONFIG0_REG      0x19
65 #define BMA400_ACC_CONFIG1_REG      0x1a
66 #define BMA400_ACC_CONFIG2_REG      0x1b
67 #define BMA400_CMD_REG              0x7e
68 
69 /* Interrupt registers */
70 #define BMA400_INT_CONFIG0_REG	    0x1f
71 #define BMA400_INT_CONFIG1_REG	    0x20
72 #define BMA400_INT1_MAP_REG	    0x21
73 #define BMA400_INT_IO_CTRL_REG	    0x24
74 #define BMA400_INT_DRDY_MSK	    BIT(7)
75 
76 /* Chip ID of BMA 400 devices found in the chip ID register. */
77 #define BMA400_ID_REG_VAL           0x90
78 
79 #define BMA400_LP_OSR_SHIFT         5
80 #define BMA400_NP_OSR_SHIFT         4
81 #define BMA400_SCALE_SHIFT          6
82 
83 #define BMA400_TWO_BITS_MASK        GENMASK(1, 0)
84 #define BMA400_LP_OSR_MASK          GENMASK(6, 5)
85 #define BMA400_NP_OSR_MASK          GENMASK(5, 4)
86 #define BMA400_ACC_ODR_MASK         GENMASK(3, 0)
87 #define BMA400_ACC_SCALE_MASK       GENMASK(7, 6)
88 
89 #define BMA400_ACC_ODR_MIN_RAW      0x05
90 #define BMA400_ACC_ODR_LP_RAW       0x06
91 #define BMA400_ACC_ODR_MAX_RAW      0x0b
92 
93 #define BMA400_ACC_ODR_MAX_HZ       800
94 #define BMA400_ACC_ODR_MIN_WHOLE_HZ 25
95 #define BMA400_ACC_ODR_MIN_HZ       12
96 
97 /* Generic interrupts register */
98 #define BMA400_GEN1INT_CONFIG0      0x3f
99 #define BMA400_GEN2INT_CONFIG0      0x4A
100 #define BMA400_GEN_CONFIG1_OFF      0x01
101 #define BMA400_GEN_CONFIG2_OFF      0x02
102 #define BMA400_GEN_CONFIG3_OFF      0x03
103 #define BMA400_GEN_CONFIG31_OFF     0x04
104 #define BMA400_INT_GEN1_MSK         BIT(2)
105 #define BMA400_INT_GEN2_MSK         BIT(3)
106 #define BMA400_GEN_HYST_MSK         GENMASK(1, 0)
107 
108 /*
109  * BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before
110  * converting to micro values for +-2g range.
111  *
112  * For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
113  * For +-4g - 1 LSB = 1.953125 milli g = 0.019153 m/s^2
114  * For +-16g - 1 LSB = 7.8125 milli g = 0.076614 m/s^2
115  *
116  * The raw value which is used to select the different ranges is determined
117  * by the first bit set position from the scale value, so BMA400_SCALE_MIN
118  * should be odd.
119  *
120  * Scale values for +-2g, +-4g, +-8g and +-16g are populated into bma400_scales
121  * array by left shifting BMA400_SCALE_MIN.
122  * e.g.:
123  * To select +-2g = 9577 << 0 = raw value to write is 0.
124  * To select +-8g = 9577 << 2 = raw value to write is 2.
125  * To select +-16g = 9577 << 3 = raw value to write is 3.
126  */
127 #define BMA400_SCALE_MIN            9577
128 #define BMA400_SCALE_MAX            76617
129 
130 #define BMA400_NUM_REGULATORS       2
131 #define BMA400_VDD_REGULATOR        0
132 #define BMA400_VDDIO_REGULATOR      1
133 
134 extern const struct regmap_config bma400_regmap_config;
135 
136 int bma400_probe(struct device *dev, struct regmap *regmap, int irq,
137 		 const char *name);
138 
139 #endif
140