1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * ADXL313 3-Axis Digital Accelerometer 4 * 5 * Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com> 6 */ 7 8 #ifndef _ADXL313_H_ 9 #define _ADXL313_H_ 10 11 /* ADXL313 register definitions */ 12 #define ADXL313_REG_DEVID0 0x00 13 #define ADXL313_REG_DEVID1 0x01 14 #define ADXL313_REG_PARTID 0x02 15 #define ADXL313_REG_XID 0x04 16 #define ADXL313_REG_SOFT_RESET 0x18 17 #define ADXL313_REG_OFS_AXIS(index) (0x1E + (index)) 18 #define ADXL313_REG_THRESH_ACT 0x24 19 #define ADXL313_REG_ACT_INACT_CTL 0x27 20 #define ADXL313_REG_BW_RATE 0x2C 21 #define ADXL313_REG_POWER_CTL 0x2D 22 #define ADXL313_REG_INT_MAP 0x2F 23 #define ADXL313_REG_DATA_FORMAT 0x31 24 #define ADXL313_REG_DATA_AXIS(index) (0x32 + ((index) * 2)) 25 #define ADXL313_REG_FIFO_CTL 0x38 26 #define ADXL313_REG_FIFO_STATUS 0x39 27 28 #define ADXL313_DEVID0 0xAD 29 #define ADXL313_DEVID1 0x1D 30 #define ADXL313_PARTID 0xCB 31 #define ADXL313_SOFT_RESET 0x52 32 33 #define ADXL313_RATE_MSK GENMASK(3, 0) 34 #define ADXL313_RATE_BASE 6 35 36 #define ADXL313_POWER_CTL_MSK GENMASK(3, 2) 37 #define ADXL313_MEASUREMENT_MODE BIT(3) 38 39 #define ADXL313_RANGE_MSK GENMASK(1, 0) 40 #define ADXL313_RANGE_4G 3 41 42 #define ADXL313_FULL_RES BIT(3) 43 #define ADXL313_SPI_3WIRE BIT(6) 44 #define ADXL313_I2C_DISABLE BIT(6) 45 46 extern const struct regmap_access_table adxl313_readable_regs_table; 47 48 extern const struct regmap_access_table adxl313_writable_regs_table; 49 50 int adxl313_core_probe(struct device *dev, 51 struct regmap *regmap, 52 const char *name, 53 int (*setup)(struct device *, struct regmap *)); 54 #endif /* _ADXL313_H_ */ 55