xref: /openbmc/linux/drivers/iio/accel/adis16209.c (revision 524c7628)
1524c7628SShreeya Patel /*
2524c7628SShreeya Patel  * ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer
3524c7628SShreeya Patel  *
4524c7628SShreeya Patel  * Copyright 2010 Analog Devices Inc.
5524c7628SShreeya Patel  *
6524c7628SShreeya Patel  * Licensed under the GPL-2 or later.
7524c7628SShreeya Patel  */
8524c7628SShreeya Patel 
9524c7628SShreeya Patel #include <linux/device.h>
10524c7628SShreeya Patel #include <linux/kernel.h>
11524c7628SShreeya Patel #include <linux/list.h>
12524c7628SShreeya Patel #include <linux/module.h>
13524c7628SShreeya Patel #include <linux/spi/spi.h>
14524c7628SShreeya Patel #include <linux/slab.h>
15524c7628SShreeya Patel #include <linux/sysfs.h>
16524c7628SShreeya Patel 
17524c7628SShreeya Patel #include <linux/iio/iio.h>
18524c7628SShreeya Patel #include <linux/iio/imu/adis.h>
19524c7628SShreeya Patel 
20524c7628SShreeya Patel #define ADIS16209_STARTUP_DELAY_MS	220
21524c7628SShreeya Patel #define ADIS16209_FLASH_CNT_REG		0x00
22524c7628SShreeya Patel 
23524c7628SShreeya Patel /* Data Output Register Definitions */
24524c7628SShreeya Patel #define ADIS16209_SUPPLY_OUT_REG	0x02
25524c7628SShreeya Patel #define ADIS16209_XACCL_OUT_REG		0x04
26524c7628SShreeya Patel #define ADIS16209_YACCL_OUT_REG		0x06
27524c7628SShreeya Patel /* Output, auxiliary ADC input */
28524c7628SShreeya Patel #define ADIS16209_AUX_ADC_REG		0x08
29524c7628SShreeya Patel /* Output, temperature */
30524c7628SShreeya Patel #define ADIS16209_TEMP_OUT_REG		0x0A
31524c7628SShreeya Patel /* Output, +/- 90 degrees X-axis inclination */
32524c7628SShreeya Patel #define ADIS16209_XINCL_OUT_REG		0x0C
33524c7628SShreeya Patel #define ADIS16209_YINCL_OUT_REG		0x0E
34524c7628SShreeya Patel /* Output, +/-180 vertical rotational position */
35524c7628SShreeya Patel #define ADIS16209_ROT_OUT_REG		0x10
36524c7628SShreeya Patel 
37524c7628SShreeya Patel /*
38524c7628SShreeya Patel  * Calibration Register Definitions.
39524c7628SShreeya Patel  * Acceleration, inclination or rotation offset null.
40524c7628SShreeya Patel  */
41524c7628SShreeya Patel #define ADIS16209_XACCL_NULL_REG	0x12
42524c7628SShreeya Patel #define ADIS16209_YACCL_NULL_REG	0x14
43524c7628SShreeya Patel #define ADIS16209_XINCL_NULL_REG	0x16
44524c7628SShreeya Patel #define ADIS16209_YINCL_NULL_REG	0x18
45524c7628SShreeya Patel #define ADIS16209_ROT_NULL_REG		0x1A
46524c7628SShreeya Patel 
47524c7628SShreeya Patel /* Alarm Register Definitions */
48524c7628SShreeya Patel #define ADIS16209_ALM_MAG1_REG		0x20
49524c7628SShreeya Patel #define ADIS16209_ALM_MAG2_REG		0x22
50524c7628SShreeya Patel #define ADIS16209_ALM_SMPL1_REG		0x24
51524c7628SShreeya Patel #define ADIS16209_ALM_SMPL2_REG		0x26
52524c7628SShreeya Patel #define ADIS16209_ALM_CTRL_REG		0x28
53524c7628SShreeya Patel 
54524c7628SShreeya Patel #define ADIS16209_AUX_DAC_REG		0x30
55524c7628SShreeya Patel #define ADIS16209_GPIO_CTRL_REG		0x32
56524c7628SShreeya Patel #define ADIS16209_SMPL_PRD_REG		0x36
57524c7628SShreeya Patel #define ADIS16209_AVG_CNT_REG		0x38
58524c7628SShreeya Patel #define ADIS16209_SLP_CNT_REG		0x3A
59524c7628SShreeya Patel 
60524c7628SShreeya Patel #define ADIS16209_MSC_CTRL_REG			0x34
61524c7628SShreeya Patel #define  ADIS16209_MSC_CTRL_PWRUP_SELF_TEST	BIT(10)
62524c7628SShreeya Patel #define  ADIS16209_MSC_CTRL_SELF_TEST_EN	BIT(8)
63524c7628SShreeya Patel #define  ADIS16209_MSC_CTRL_DATA_RDY_EN		BIT(2)
64524c7628SShreeya Patel /* Data-ready polarity: 1 = active high, 0 = active low */
65524c7628SShreeya Patel #define  ADIS16209_MSC_CTRL_ACTIVE_HIGH		BIT(1)
66524c7628SShreeya Patel #define  ADIS16209_MSC_CTRL_DATA_RDY_DIO2	BIT(0)
67524c7628SShreeya Patel 
68524c7628SShreeya Patel #define ADIS16209_STAT_REG			0x3C
69524c7628SShreeya Patel #define  ADIS16209_STAT_ALARM2			BIT(9)
70524c7628SShreeya Patel #define  ADIS16209_STAT_ALARM1			BIT(8)
71524c7628SShreeya Patel #define  ADIS16209_STAT_SELFTEST_FAIL_BIT	5
72524c7628SShreeya Patel #define  ADIS16209_STAT_SPI_FAIL_BIT		3
73524c7628SShreeya Patel #define  ADIS16209_STAT_FLASH_UPT_FAIL_BIT	2
74524c7628SShreeya Patel /* Power supply above 3.625 V */
75524c7628SShreeya Patel #define  ADIS16209_STAT_POWER_HIGH_BIT		1
76524c7628SShreeya Patel /* Power supply below 3.15 V */
77524c7628SShreeya Patel #define  ADIS16209_STAT_POWER_LOW_BIT		0
78524c7628SShreeya Patel 
79524c7628SShreeya Patel #define ADIS16209_CMD_REG			0x3E
80524c7628SShreeya Patel #define  ADIS16209_CMD_SW_RESET			BIT(7)
81524c7628SShreeya Patel #define  ADIS16209_CMD_CLEAR_STAT		BIT(4)
82524c7628SShreeya Patel #define  ADIS16209_CMD_FACTORY_CAL		BIT(1)
83524c7628SShreeya Patel 
84524c7628SShreeya Patel #define ADIS16209_ERROR_ACTIVE			BIT(14)
85524c7628SShreeya Patel 
86524c7628SShreeya Patel enum adis16209_scan {
87524c7628SShreeya Patel 	ADIS16209_SCAN_SUPPLY,
88524c7628SShreeya Patel 	ADIS16209_SCAN_ACC_X,
89524c7628SShreeya Patel 	ADIS16209_SCAN_ACC_Y,
90524c7628SShreeya Patel 	ADIS16209_SCAN_AUX_ADC,
91524c7628SShreeya Patel 	ADIS16209_SCAN_TEMP,
92524c7628SShreeya Patel 	ADIS16209_SCAN_INCLI_X,
93524c7628SShreeya Patel 	ADIS16209_SCAN_INCLI_Y,
94524c7628SShreeya Patel 	ADIS16209_SCAN_ROT,
95524c7628SShreeya Patel };
96524c7628SShreeya Patel 
97524c7628SShreeya Patel static const u8 adis16209_addresses[8][1] = {
98524c7628SShreeya Patel 	[ADIS16209_SCAN_SUPPLY] = { },
99524c7628SShreeya Patel 	[ADIS16209_SCAN_AUX_ADC] = { },
100524c7628SShreeya Patel 	[ADIS16209_SCAN_ACC_X] = { ADIS16209_XACCL_NULL_REG },
101524c7628SShreeya Patel 	[ADIS16209_SCAN_ACC_Y] = { ADIS16209_YACCL_NULL_REG },
102524c7628SShreeya Patel 	[ADIS16209_SCAN_INCLI_X] = { ADIS16209_XINCL_NULL_REG },
103524c7628SShreeya Patel 	[ADIS16209_SCAN_INCLI_Y] = { ADIS16209_YINCL_NULL_REG },
104524c7628SShreeya Patel 	[ADIS16209_SCAN_ROT] = { },
105524c7628SShreeya Patel 	[ADIS16209_SCAN_TEMP] = { },
106524c7628SShreeya Patel };
107524c7628SShreeya Patel 
108524c7628SShreeya Patel static int adis16209_write_raw(struct iio_dev *indio_dev,
109524c7628SShreeya Patel 			       struct iio_chan_spec const *chan,
110524c7628SShreeya Patel 			       int val,
111524c7628SShreeya Patel 			       int val2,
112524c7628SShreeya Patel 			       long mask)
113524c7628SShreeya Patel {
114524c7628SShreeya Patel 	struct adis *st = iio_priv(indio_dev);
115524c7628SShreeya Patel 	int m;
116524c7628SShreeya Patel 
117524c7628SShreeya Patel 	if (mask != IIO_CHAN_INFO_CALIBBIAS)
118524c7628SShreeya Patel 		return -EINVAL;
119524c7628SShreeya Patel 
120524c7628SShreeya Patel 	switch (chan->type) {
121524c7628SShreeya Patel 	case IIO_ACCEL:
122524c7628SShreeya Patel 	case IIO_INCLI:
123524c7628SShreeya Patel 		m = GENMASK(13, 0);
124524c7628SShreeya Patel 		break;
125524c7628SShreeya Patel 	default:
126524c7628SShreeya Patel 		return -EINVAL;
127524c7628SShreeya Patel 	}
128524c7628SShreeya Patel 
129524c7628SShreeya Patel 	return adis_write_reg_16(st, adis16209_addresses[chan->scan_index][0],
130524c7628SShreeya Patel 				 val & m);
131524c7628SShreeya Patel }
132524c7628SShreeya Patel 
133524c7628SShreeya Patel static int adis16209_read_raw(struct iio_dev *indio_dev,
134524c7628SShreeya Patel 			      struct iio_chan_spec const *chan,
135524c7628SShreeya Patel 			      int *val, int *val2,
136524c7628SShreeya Patel 			      long mask)
137524c7628SShreeya Patel {
138524c7628SShreeya Patel 	struct adis *st = iio_priv(indio_dev);
139524c7628SShreeya Patel 	int ret;
140524c7628SShreeya Patel 	int bits;
141524c7628SShreeya Patel 	u8 addr;
142524c7628SShreeya Patel 	s16 val16;
143524c7628SShreeya Patel 
144524c7628SShreeya Patel 	switch (mask) {
145524c7628SShreeya Patel 	case IIO_CHAN_INFO_RAW:
146524c7628SShreeya Patel 		return adis_single_conversion(indio_dev, chan,
147524c7628SShreeya Patel 			ADIS16209_ERROR_ACTIVE, val);
148524c7628SShreeya Patel 	case IIO_CHAN_INFO_SCALE:
149524c7628SShreeya Patel 		switch (chan->type) {
150524c7628SShreeya Patel 		case IIO_VOLTAGE:
151524c7628SShreeya Patel 			*val = 0;
152524c7628SShreeya Patel 			switch (chan->channel) {
153524c7628SShreeya Patel 			case 0:
154524c7628SShreeya Patel 				*val2 = 305180; /* 0.30518 mV */
155524c7628SShreeya Patel 				break;
156524c7628SShreeya Patel 			case 1:
157524c7628SShreeya Patel 				*val2 = 610500; /* 0.6105 mV */
158524c7628SShreeya Patel 				break;
159524c7628SShreeya Patel 			default:
160524c7628SShreeya Patel 				return -EINVAL;
161524c7628SShreeya Patel 			}
162524c7628SShreeya Patel 			return IIO_VAL_INT_PLUS_MICRO;
163524c7628SShreeya Patel 		case IIO_TEMP:
164524c7628SShreeya Patel 			*val = -470;
165524c7628SShreeya Patel 			*val2 = 0;
166524c7628SShreeya Patel 			return IIO_VAL_INT_PLUS_MICRO;
167524c7628SShreeya Patel 		case IIO_ACCEL:
168524c7628SShreeya Patel 			/*
169524c7628SShreeya Patel 			 * IIO base unit for sensitivity of accelerometer
170524c7628SShreeya Patel 			 * is milli g.
171524c7628SShreeya Patel 			 * 1 LSB represents 0.244 mg.
172524c7628SShreeya Patel 			 */
173524c7628SShreeya Patel 			*val = 0;
174524c7628SShreeya Patel 			*val2 = IIO_G_TO_M_S_2(244140);
175524c7628SShreeya Patel 			return IIO_VAL_INT_PLUS_NANO;
176524c7628SShreeya Patel 		case IIO_INCLI:
177524c7628SShreeya Patel 		case IIO_ROT:
178524c7628SShreeya Patel 			/*
179524c7628SShreeya Patel 			 * IIO base units for rotation are degrees.
180524c7628SShreeya Patel 			 * 1 LSB represents 0.025 milli degrees.
181524c7628SShreeya Patel 			 */
182524c7628SShreeya Patel 			*val = 0;
183524c7628SShreeya Patel 			*val2 = 25000;
184524c7628SShreeya Patel 			return IIO_VAL_INT_PLUS_MICRO;
185524c7628SShreeya Patel 		default:
186524c7628SShreeya Patel 			return -EINVAL;
187524c7628SShreeya Patel 		}
188524c7628SShreeya Patel 		break;
189524c7628SShreeya Patel 	case IIO_CHAN_INFO_OFFSET:
190524c7628SShreeya Patel 		/*
191524c7628SShreeya Patel 		 * The raw ADC value is 0x4FE when the temperature
192524c7628SShreeya Patel 		 * is 45 degrees and the scale factor per milli
193524c7628SShreeya Patel 		 * degree celcius is -470.
194524c7628SShreeya Patel 		 */
195524c7628SShreeya Patel 		*val = 25000 / -470 - 0x4FE;
196524c7628SShreeya Patel 		return IIO_VAL_INT;
197524c7628SShreeya Patel 	case IIO_CHAN_INFO_CALIBBIAS:
198524c7628SShreeya Patel 		switch (chan->type) {
199524c7628SShreeya Patel 		case IIO_ACCEL:
200524c7628SShreeya Patel 			bits = 14;
201524c7628SShreeya Patel 			break;
202524c7628SShreeya Patel 		default:
203524c7628SShreeya Patel 			return -EINVAL;
204524c7628SShreeya Patel 		}
205524c7628SShreeya Patel 		addr = adis16209_addresses[chan->scan_index][0];
206524c7628SShreeya Patel 		ret = adis_read_reg_16(st, addr, &val16);
207524c7628SShreeya Patel 		if (ret)
208524c7628SShreeya Patel 			return ret;
209524c7628SShreeya Patel 
210524c7628SShreeya Patel 		*val = sign_extend32(val16, bits - 1);
211524c7628SShreeya Patel 		return IIO_VAL_INT;
212524c7628SShreeya Patel 	}
213524c7628SShreeya Patel 	return -EINVAL;
214524c7628SShreeya Patel }
215524c7628SShreeya Patel 
216524c7628SShreeya Patel static const struct iio_chan_spec adis16209_channels[] = {
217524c7628SShreeya Patel 	ADIS_SUPPLY_CHAN(ADIS16209_SUPPLY_OUT_REG, ADIS16209_SCAN_SUPPLY,
218524c7628SShreeya Patel 			 0, 14),
219524c7628SShreeya Patel 	ADIS_TEMP_CHAN(ADIS16209_TEMP_OUT_REG, ADIS16209_SCAN_TEMP, 0, 12),
220524c7628SShreeya Patel 	ADIS_ACCEL_CHAN(X, ADIS16209_XACCL_OUT_REG, ADIS16209_SCAN_ACC_X,
221524c7628SShreeya Patel 			BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
222524c7628SShreeya Patel 	ADIS_ACCEL_CHAN(Y, ADIS16209_YACCL_OUT_REG, ADIS16209_SCAN_ACC_Y,
223524c7628SShreeya Patel 			BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
224524c7628SShreeya Patel 	ADIS_AUX_ADC_CHAN(ADIS16209_AUX_ADC_REG, ADIS16209_SCAN_AUX_ADC, 0, 12),
225524c7628SShreeya Patel 	ADIS_INCLI_CHAN(X, ADIS16209_XINCL_OUT_REG, ADIS16209_SCAN_INCLI_X,
226524c7628SShreeya Patel 			0, 0, 14),
227524c7628SShreeya Patel 	ADIS_INCLI_CHAN(Y, ADIS16209_YINCL_OUT_REG, ADIS16209_SCAN_INCLI_Y,
228524c7628SShreeya Patel 			0, 0, 14),
229524c7628SShreeya Patel 	ADIS_ROT_CHAN(X, ADIS16209_ROT_OUT_REG, ADIS16209_SCAN_ROT, 0, 0, 14),
230524c7628SShreeya Patel 	IIO_CHAN_SOFT_TIMESTAMP(8)
231524c7628SShreeya Patel };
232524c7628SShreeya Patel 
233524c7628SShreeya Patel static const struct iio_info adis16209_info = {
234524c7628SShreeya Patel 	.read_raw = adis16209_read_raw,
235524c7628SShreeya Patel 	.write_raw = adis16209_write_raw,
236524c7628SShreeya Patel 	.update_scan_mode = adis_update_scan_mode,
237524c7628SShreeya Patel };
238524c7628SShreeya Patel 
239524c7628SShreeya Patel static const char * const adis16209_status_error_msgs[] = {
240524c7628SShreeya Patel 	[ADIS16209_STAT_SELFTEST_FAIL_BIT] = "Self test failure",
241524c7628SShreeya Patel 	[ADIS16209_STAT_SPI_FAIL_BIT] = "SPI failure",
242524c7628SShreeya Patel 	[ADIS16209_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
243524c7628SShreeya Patel 	[ADIS16209_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
244524c7628SShreeya Patel 	[ADIS16209_STAT_POWER_LOW_BIT] = "Power supply below 3.15V",
245524c7628SShreeya Patel };
246524c7628SShreeya Patel 
247524c7628SShreeya Patel static const struct adis_data adis16209_data = {
248524c7628SShreeya Patel 	.read_delay = 30,
249524c7628SShreeya Patel 	.msc_ctrl_reg = ADIS16209_MSC_CTRL_REG,
250524c7628SShreeya Patel 	.glob_cmd_reg = ADIS16209_CMD_REG,
251524c7628SShreeya Patel 	.diag_stat_reg = ADIS16209_STAT_REG,
252524c7628SShreeya Patel 
253524c7628SShreeya Patel 	.self_test_mask = ADIS16209_MSC_CTRL_SELF_TEST_EN,
254524c7628SShreeya Patel 	.self_test_no_autoclear = true,
255524c7628SShreeya Patel 	.startup_delay = ADIS16209_STARTUP_DELAY_MS,
256524c7628SShreeya Patel 
257524c7628SShreeya Patel 	.status_error_msgs = adis16209_status_error_msgs,
258524c7628SShreeya Patel 	.status_error_mask = BIT(ADIS16209_STAT_SELFTEST_FAIL_BIT) |
259524c7628SShreeya Patel 		BIT(ADIS16209_STAT_SPI_FAIL_BIT) |
260524c7628SShreeya Patel 		BIT(ADIS16209_STAT_FLASH_UPT_FAIL_BIT) |
261524c7628SShreeya Patel 		BIT(ADIS16209_STAT_POWER_HIGH_BIT) |
262524c7628SShreeya Patel 		BIT(ADIS16209_STAT_POWER_LOW_BIT),
263524c7628SShreeya Patel };
264524c7628SShreeya Patel 
265524c7628SShreeya Patel static int adis16209_probe(struct spi_device *spi)
266524c7628SShreeya Patel {
267524c7628SShreeya Patel 	struct iio_dev *indio_dev;
268524c7628SShreeya Patel 	struct adis *st;
269524c7628SShreeya Patel 	int ret;
270524c7628SShreeya Patel 
271524c7628SShreeya Patel 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
272524c7628SShreeya Patel 	if (!indio_dev)
273524c7628SShreeya Patel 		return -ENOMEM;
274524c7628SShreeya Patel 
275524c7628SShreeya Patel 	st = iio_priv(indio_dev);
276524c7628SShreeya Patel 	spi_set_drvdata(spi, indio_dev);
277524c7628SShreeya Patel 
278524c7628SShreeya Patel 	indio_dev->name = spi->dev.driver->name;
279524c7628SShreeya Patel 	indio_dev->dev.parent = &spi->dev;
280524c7628SShreeya Patel 	indio_dev->info = &adis16209_info;
281524c7628SShreeya Patel 	indio_dev->channels = adis16209_channels;
282524c7628SShreeya Patel 	indio_dev->num_channels = ARRAY_SIZE(adis16209_channels);
283524c7628SShreeya Patel 	indio_dev->modes = INDIO_DIRECT_MODE;
284524c7628SShreeya Patel 
285524c7628SShreeya Patel 	ret = adis_init(st, indio_dev, spi, &adis16209_data);
286524c7628SShreeya Patel 	if (ret)
287524c7628SShreeya Patel 		return ret;
288524c7628SShreeya Patel 
289524c7628SShreeya Patel 	ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
290524c7628SShreeya Patel 	if (ret)
291524c7628SShreeya Patel 		return ret;
292524c7628SShreeya Patel 
293524c7628SShreeya Patel 	ret = adis_initial_startup(st);
294524c7628SShreeya Patel 	if (ret)
295524c7628SShreeya Patel 		goto error_cleanup_buffer_trigger;
296524c7628SShreeya Patel 	ret = iio_device_register(indio_dev);
297524c7628SShreeya Patel 	if (ret)
298524c7628SShreeya Patel 		goto error_cleanup_buffer_trigger;
299524c7628SShreeya Patel 
300524c7628SShreeya Patel 	return 0;
301524c7628SShreeya Patel 
302524c7628SShreeya Patel error_cleanup_buffer_trigger:
303524c7628SShreeya Patel 	adis_cleanup_buffer_and_trigger(st, indio_dev);
304524c7628SShreeya Patel 	return ret;
305524c7628SShreeya Patel }
306524c7628SShreeya Patel 
307524c7628SShreeya Patel static int adis16209_remove(struct spi_device *spi)
308524c7628SShreeya Patel {
309524c7628SShreeya Patel 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
310524c7628SShreeya Patel 	struct adis *st = iio_priv(indio_dev);
311524c7628SShreeya Patel 
312524c7628SShreeya Patel 	iio_device_unregister(indio_dev);
313524c7628SShreeya Patel 	adis_cleanup_buffer_and_trigger(st, indio_dev);
314524c7628SShreeya Patel 
315524c7628SShreeya Patel 	return 0;
316524c7628SShreeya Patel }
317524c7628SShreeya Patel 
318524c7628SShreeya Patel static struct spi_driver adis16209_driver = {
319524c7628SShreeya Patel 	.driver = {
320524c7628SShreeya Patel 		.name = "adis16209",
321524c7628SShreeya Patel 	},
322524c7628SShreeya Patel 	.probe = adis16209_probe,
323524c7628SShreeya Patel 	.remove = adis16209_remove,
324524c7628SShreeya Patel };
325524c7628SShreeya Patel module_spi_driver(adis16209_driver);
326524c7628SShreeya Patel 
327524c7628SShreeya Patel MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
328524c7628SShreeya Patel MODULE_DESCRIPTION("Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer");
329524c7628SShreeya Patel MODULE_LICENSE("GPL v2");
330524c7628SShreeya Patel MODULE_ALIAS("spi:adis16209");
331