180503b23SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2524c7628SShreeya Patel /*
3524c7628SShreeya Patel * ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer
4524c7628SShreeya Patel *
5524c7628SShreeya Patel * Copyright 2010 Analog Devices Inc.
6524c7628SShreeya Patel */
7524c7628SShreeya Patel
8524c7628SShreeya Patel #include <linux/device.h>
9524c7628SShreeya Patel #include <linux/kernel.h>
10524c7628SShreeya Patel #include <linux/module.h>
11524c7628SShreeya Patel #include <linux/spi/spi.h>
12524c7628SShreeya Patel
13524c7628SShreeya Patel #include <linux/iio/iio.h>
14524c7628SShreeya Patel #include <linux/iio/imu/adis.h>
15524c7628SShreeya Patel
16524c7628SShreeya Patel #define ADIS16209_STARTUP_DELAY_MS 220
17524c7628SShreeya Patel #define ADIS16209_FLASH_CNT_REG 0x00
18524c7628SShreeya Patel
19524c7628SShreeya Patel /* Data Output Register Definitions */
20524c7628SShreeya Patel #define ADIS16209_SUPPLY_OUT_REG 0x02
21524c7628SShreeya Patel #define ADIS16209_XACCL_OUT_REG 0x04
22524c7628SShreeya Patel #define ADIS16209_YACCL_OUT_REG 0x06
23524c7628SShreeya Patel /* Output, auxiliary ADC input */
24524c7628SShreeya Patel #define ADIS16209_AUX_ADC_REG 0x08
25524c7628SShreeya Patel /* Output, temperature */
26524c7628SShreeya Patel #define ADIS16209_TEMP_OUT_REG 0x0A
27524c7628SShreeya Patel /* Output, +/- 90 degrees X-axis inclination */
28524c7628SShreeya Patel #define ADIS16209_XINCL_OUT_REG 0x0C
29524c7628SShreeya Patel #define ADIS16209_YINCL_OUT_REG 0x0E
30524c7628SShreeya Patel /* Output, +/-180 vertical rotational position */
31524c7628SShreeya Patel #define ADIS16209_ROT_OUT_REG 0x10
32524c7628SShreeya Patel
33524c7628SShreeya Patel /*
34524c7628SShreeya Patel * Calibration Register Definitions.
35524c7628SShreeya Patel * Acceleration, inclination or rotation offset null.
36524c7628SShreeya Patel */
37524c7628SShreeya Patel #define ADIS16209_XACCL_NULL_REG 0x12
38524c7628SShreeya Patel #define ADIS16209_YACCL_NULL_REG 0x14
39524c7628SShreeya Patel #define ADIS16209_XINCL_NULL_REG 0x16
40524c7628SShreeya Patel #define ADIS16209_YINCL_NULL_REG 0x18
41524c7628SShreeya Patel #define ADIS16209_ROT_NULL_REG 0x1A
42524c7628SShreeya Patel
43524c7628SShreeya Patel /* Alarm Register Definitions */
44524c7628SShreeya Patel #define ADIS16209_ALM_MAG1_REG 0x20
45524c7628SShreeya Patel #define ADIS16209_ALM_MAG2_REG 0x22
46524c7628SShreeya Patel #define ADIS16209_ALM_SMPL1_REG 0x24
47524c7628SShreeya Patel #define ADIS16209_ALM_SMPL2_REG 0x26
48524c7628SShreeya Patel #define ADIS16209_ALM_CTRL_REG 0x28
49524c7628SShreeya Patel
50524c7628SShreeya Patel #define ADIS16209_AUX_DAC_REG 0x30
51524c7628SShreeya Patel #define ADIS16209_GPIO_CTRL_REG 0x32
52524c7628SShreeya Patel #define ADIS16209_SMPL_PRD_REG 0x36
53524c7628SShreeya Patel #define ADIS16209_AVG_CNT_REG 0x38
54524c7628SShreeya Patel #define ADIS16209_SLP_CNT_REG 0x3A
55524c7628SShreeya Patel
56524c7628SShreeya Patel #define ADIS16209_MSC_CTRL_REG 0x34
57524c7628SShreeya Patel #define ADIS16209_MSC_CTRL_PWRUP_SELF_TEST BIT(10)
58524c7628SShreeya Patel #define ADIS16209_MSC_CTRL_SELF_TEST_EN BIT(8)
59524c7628SShreeya Patel #define ADIS16209_MSC_CTRL_DATA_RDY_EN BIT(2)
60524c7628SShreeya Patel /* Data-ready polarity: 1 = active high, 0 = active low */
61524c7628SShreeya Patel #define ADIS16209_MSC_CTRL_ACTIVE_HIGH BIT(1)
62524c7628SShreeya Patel #define ADIS16209_MSC_CTRL_DATA_RDY_DIO2 BIT(0)
63524c7628SShreeya Patel
64524c7628SShreeya Patel #define ADIS16209_STAT_REG 0x3C
65524c7628SShreeya Patel #define ADIS16209_STAT_ALARM2 BIT(9)
66524c7628SShreeya Patel #define ADIS16209_STAT_ALARM1 BIT(8)
67524c7628SShreeya Patel #define ADIS16209_STAT_SELFTEST_FAIL_BIT 5
68524c7628SShreeya Patel #define ADIS16209_STAT_SPI_FAIL_BIT 3
69524c7628SShreeya Patel #define ADIS16209_STAT_FLASH_UPT_FAIL_BIT 2
70524c7628SShreeya Patel /* Power supply above 3.625 V */
71524c7628SShreeya Patel #define ADIS16209_STAT_POWER_HIGH_BIT 1
7210dd571cSAlexandru Ardelean /* Power supply below 2.975 V */
73524c7628SShreeya Patel #define ADIS16209_STAT_POWER_LOW_BIT 0
74524c7628SShreeya Patel
75524c7628SShreeya Patel #define ADIS16209_CMD_REG 0x3E
76524c7628SShreeya Patel #define ADIS16209_CMD_SW_RESET BIT(7)
77524c7628SShreeya Patel #define ADIS16209_CMD_CLEAR_STAT BIT(4)
78524c7628SShreeya Patel #define ADIS16209_CMD_FACTORY_CAL BIT(1)
79524c7628SShreeya Patel
80524c7628SShreeya Patel #define ADIS16209_ERROR_ACTIVE BIT(14)
81524c7628SShreeya Patel
82524c7628SShreeya Patel enum adis16209_scan {
83524c7628SShreeya Patel ADIS16209_SCAN_SUPPLY,
84524c7628SShreeya Patel ADIS16209_SCAN_ACC_X,
85524c7628SShreeya Patel ADIS16209_SCAN_ACC_Y,
86524c7628SShreeya Patel ADIS16209_SCAN_AUX_ADC,
87524c7628SShreeya Patel ADIS16209_SCAN_TEMP,
88524c7628SShreeya Patel ADIS16209_SCAN_INCLI_X,
89524c7628SShreeya Patel ADIS16209_SCAN_INCLI_Y,
90524c7628SShreeya Patel ADIS16209_SCAN_ROT,
91524c7628SShreeya Patel };
92524c7628SShreeya Patel
93524c7628SShreeya Patel static const u8 adis16209_addresses[8][1] = {
94524c7628SShreeya Patel [ADIS16209_SCAN_SUPPLY] = { },
95524c7628SShreeya Patel [ADIS16209_SCAN_AUX_ADC] = { },
96524c7628SShreeya Patel [ADIS16209_SCAN_ACC_X] = { ADIS16209_XACCL_NULL_REG },
97524c7628SShreeya Patel [ADIS16209_SCAN_ACC_Y] = { ADIS16209_YACCL_NULL_REG },
98524c7628SShreeya Patel [ADIS16209_SCAN_INCLI_X] = { ADIS16209_XINCL_NULL_REG },
99524c7628SShreeya Patel [ADIS16209_SCAN_INCLI_Y] = { ADIS16209_YINCL_NULL_REG },
100524c7628SShreeya Patel [ADIS16209_SCAN_ROT] = { },
101524c7628SShreeya Patel [ADIS16209_SCAN_TEMP] = { },
102524c7628SShreeya Patel };
103524c7628SShreeya Patel
adis16209_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)104524c7628SShreeya Patel static int adis16209_write_raw(struct iio_dev *indio_dev,
105524c7628SShreeya Patel struct iio_chan_spec const *chan,
106524c7628SShreeya Patel int val,
107524c7628SShreeya Patel int val2,
108524c7628SShreeya Patel long mask)
109524c7628SShreeya Patel {
110524c7628SShreeya Patel struct adis *st = iio_priv(indio_dev);
111524c7628SShreeya Patel int m;
112524c7628SShreeya Patel
113524c7628SShreeya Patel if (mask != IIO_CHAN_INFO_CALIBBIAS)
114524c7628SShreeya Patel return -EINVAL;
115524c7628SShreeya Patel
116524c7628SShreeya Patel switch (chan->type) {
117524c7628SShreeya Patel case IIO_ACCEL:
118524c7628SShreeya Patel case IIO_INCLI:
119524c7628SShreeya Patel m = GENMASK(13, 0);
120524c7628SShreeya Patel break;
121524c7628SShreeya Patel default:
122524c7628SShreeya Patel return -EINVAL;
123524c7628SShreeya Patel }
124524c7628SShreeya Patel
125524c7628SShreeya Patel return adis_write_reg_16(st, adis16209_addresses[chan->scan_index][0],
126524c7628SShreeya Patel val & m);
127524c7628SShreeya Patel }
128524c7628SShreeya Patel
adis16209_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)129524c7628SShreeya Patel static int adis16209_read_raw(struct iio_dev *indio_dev,
130524c7628SShreeya Patel struct iio_chan_spec const *chan,
131524c7628SShreeya Patel int *val, int *val2,
132524c7628SShreeya Patel long mask)
133524c7628SShreeya Patel {
134524c7628SShreeya Patel struct adis *st = iio_priv(indio_dev);
135524c7628SShreeya Patel int ret;
136524c7628SShreeya Patel int bits;
137524c7628SShreeya Patel u8 addr;
138524c7628SShreeya Patel s16 val16;
139524c7628SShreeya Patel
140524c7628SShreeya Patel switch (mask) {
141524c7628SShreeya Patel case IIO_CHAN_INFO_RAW:
142524c7628SShreeya Patel return adis_single_conversion(indio_dev, chan,
143524c7628SShreeya Patel ADIS16209_ERROR_ACTIVE, val);
144524c7628SShreeya Patel case IIO_CHAN_INFO_SCALE:
145524c7628SShreeya Patel switch (chan->type) {
146524c7628SShreeya Patel case IIO_VOLTAGE:
147524c7628SShreeya Patel *val = 0;
148524c7628SShreeya Patel switch (chan->channel) {
149524c7628SShreeya Patel case 0:
150524c7628SShreeya Patel *val2 = 305180; /* 0.30518 mV */
151524c7628SShreeya Patel break;
152524c7628SShreeya Patel case 1:
153524c7628SShreeya Patel *val2 = 610500; /* 0.6105 mV */
154524c7628SShreeya Patel break;
155524c7628SShreeya Patel default:
156524c7628SShreeya Patel return -EINVAL;
157524c7628SShreeya Patel }
158524c7628SShreeya Patel return IIO_VAL_INT_PLUS_MICRO;
159524c7628SShreeya Patel case IIO_TEMP:
160524c7628SShreeya Patel *val = -470;
161524c7628SShreeya Patel *val2 = 0;
162524c7628SShreeya Patel return IIO_VAL_INT_PLUS_MICRO;
163524c7628SShreeya Patel case IIO_ACCEL:
164524c7628SShreeya Patel /*
165524c7628SShreeya Patel * IIO base unit for sensitivity of accelerometer
166524c7628SShreeya Patel * is milli g.
167524c7628SShreeya Patel * 1 LSB represents 0.244 mg.
168524c7628SShreeya Patel */
169524c7628SShreeya Patel *val = 0;
170524c7628SShreeya Patel *val2 = IIO_G_TO_M_S_2(244140);
171524c7628SShreeya Patel return IIO_VAL_INT_PLUS_NANO;
172524c7628SShreeya Patel case IIO_INCLI:
173524c7628SShreeya Patel case IIO_ROT:
174524c7628SShreeya Patel /*
175524c7628SShreeya Patel * IIO base units for rotation are degrees.
176524c7628SShreeya Patel * 1 LSB represents 0.025 milli degrees.
177524c7628SShreeya Patel */
178524c7628SShreeya Patel *val = 0;
179524c7628SShreeya Patel *val2 = 25000;
180524c7628SShreeya Patel return IIO_VAL_INT_PLUS_MICRO;
181524c7628SShreeya Patel default:
182524c7628SShreeya Patel return -EINVAL;
183524c7628SShreeya Patel }
184524c7628SShreeya Patel break;
185524c7628SShreeya Patel case IIO_CHAN_INFO_OFFSET:
186524c7628SShreeya Patel /*
187524c7628SShreeya Patel * The raw ADC value is 0x4FE when the temperature
188524c7628SShreeya Patel * is 45 degrees and the scale factor per milli
189524c7628SShreeya Patel * degree celcius is -470.
190524c7628SShreeya Patel */
191524c7628SShreeya Patel *val = 25000 / -470 - 0x4FE;
192524c7628SShreeya Patel return IIO_VAL_INT;
193524c7628SShreeya Patel case IIO_CHAN_INFO_CALIBBIAS:
194524c7628SShreeya Patel switch (chan->type) {
195524c7628SShreeya Patel case IIO_ACCEL:
196524c7628SShreeya Patel bits = 14;
197524c7628SShreeya Patel break;
198524c7628SShreeya Patel default:
199524c7628SShreeya Patel return -EINVAL;
200524c7628SShreeya Patel }
201524c7628SShreeya Patel addr = adis16209_addresses[chan->scan_index][0];
202524c7628SShreeya Patel ret = adis_read_reg_16(st, addr, &val16);
203524c7628SShreeya Patel if (ret)
204524c7628SShreeya Patel return ret;
205524c7628SShreeya Patel
206524c7628SShreeya Patel *val = sign_extend32(val16, bits - 1);
207524c7628SShreeya Patel return IIO_VAL_INT;
208524c7628SShreeya Patel }
209524c7628SShreeya Patel return -EINVAL;
210524c7628SShreeya Patel }
211524c7628SShreeya Patel
212524c7628SShreeya Patel static const struct iio_chan_spec adis16209_channels[] = {
213524c7628SShreeya Patel ADIS_SUPPLY_CHAN(ADIS16209_SUPPLY_OUT_REG, ADIS16209_SCAN_SUPPLY,
214524c7628SShreeya Patel 0, 14),
215524c7628SShreeya Patel ADIS_TEMP_CHAN(ADIS16209_TEMP_OUT_REG, ADIS16209_SCAN_TEMP, 0, 12),
216524c7628SShreeya Patel ADIS_ACCEL_CHAN(X, ADIS16209_XACCL_OUT_REG, ADIS16209_SCAN_ACC_X,
217524c7628SShreeya Patel BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
218524c7628SShreeya Patel ADIS_ACCEL_CHAN(Y, ADIS16209_YACCL_OUT_REG, ADIS16209_SCAN_ACC_Y,
219524c7628SShreeya Patel BIT(IIO_CHAN_INFO_CALIBBIAS), 0, 14),
220524c7628SShreeya Patel ADIS_AUX_ADC_CHAN(ADIS16209_AUX_ADC_REG, ADIS16209_SCAN_AUX_ADC, 0, 12),
221524c7628SShreeya Patel ADIS_INCLI_CHAN(X, ADIS16209_XINCL_OUT_REG, ADIS16209_SCAN_INCLI_X,
222524c7628SShreeya Patel 0, 0, 14),
223524c7628SShreeya Patel ADIS_INCLI_CHAN(Y, ADIS16209_YINCL_OUT_REG, ADIS16209_SCAN_INCLI_Y,
224524c7628SShreeya Patel 0, 0, 14),
225524c7628SShreeya Patel ADIS_ROT_CHAN(X, ADIS16209_ROT_OUT_REG, ADIS16209_SCAN_ROT, 0, 0, 14),
226524c7628SShreeya Patel IIO_CHAN_SOFT_TIMESTAMP(8)
227524c7628SShreeya Patel };
228524c7628SShreeya Patel
229524c7628SShreeya Patel static const struct iio_info adis16209_info = {
230524c7628SShreeya Patel .read_raw = adis16209_read_raw,
231524c7628SShreeya Patel .write_raw = adis16209_write_raw,
232524c7628SShreeya Patel .update_scan_mode = adis_update_scan_mode,
233524c7628SShreeya Patel };
234524c7628SShreeya Patel
235524c7628SShreeya Patel static const char * const adis16209_status_error_msgs[] = {
236524c7628SShreeya Patel [ADIS16209_STAT_SELFTEST_FAIL_BIT] = "Self test failure",
237524c7628SShreeya Patel [ADIS16209_STAT_SPI_FAIL_BIT] = "SPI failure",
238524c7628SShreeya Patel [ADIS16209_STAT_FLASH_UPT_FAIL_BIT] = "Flash update failed",
239524c7628SShreeya Patel [ADIS16209_STAT_POWER_HIGH_BIT] = "Power supply above 3.625V",
24010dd571cSAlexandru Ardelean [ADIS16209_STAT_POWER_LOW_BIT] = "Power supply below 2.975V",
241524c7628SShreeya Patel };
242524c7628SShreeya Patel
243380b107bSNuno Sá static const struct adis_timeout adis16209_timeouts = {
244380b107bSNuno Sá .reset_ms = ADIS16209_STARTUP_DELAY_MS,
245380b107bSNuno Sá .self_test_ms = ADIS16209_STARTUP_DELAY_MS,
246380b107bSNuno Sá .sw_reset_ms = ADIS16209_STARTUP_DELAY_MS,
247380b107bSNuno Sá };
248380b107bSNuno Sá
249524c7628SShreeya Patel static const struct adis_data adis16209_data = {
250524c7628SShreeya Patel .read_delay = 30,
251524c7628SShreeya Patel .msc_ctrl_reg = ADIS16209_MSC_CTRL_REG,
252524c7628SShreeya Patel .glob_cmd_reg = ADIS16209_CMD_REG,
253524c7628SShreeya Patel .diag_stat_reg = ADIS16209_STAT_REG,
254524c7628SShreeya Patel
255524c7628SShreeya Patel .self_test_mask = ADIS16209_MSC_CTRL_SELF_TEST_EN,
256fdcf6bbbSNuno Sá .self_test_reg = ADIS16209_MSC_CTRL_REG,
257524c7628SShreeya Patel .self_test_no_autoclear = true,
258380b107bSNuno Sá .timeouts = &adis16209_timeouts,
259524c7628SShreeya Patel
260524c7628SShreeya Patel .status_error_msgs = adis16209_status_error_msgs,
261524c7628SShreeya Patel .status_error_mask = BIT(ADIS16209_STAT_SELFTEST_FAIL_BIT) |
262524c7628SShreeya Patel BIT(ADIS16209_STAT_SPI_FAIL_BIT) |
263524c7628SShreeya Patel BIT(ADIS16209_STAT_FLASH_UPT_FAIL_BIT) |
264524c7628SShreeya Patel BIT(ADIS16209_STAT_POWER_HIGH_BIT) |
265524c7628SShreeya Patel BIT(ADIS16209_STAT_POWER_LOW_BIT),
266524c7628SShreeya Patel };
267524c7628SShreeya Patel
adis16209_probe(struct spi_device * spi)268524c7628SShreeya Patel static int adis16209_probe(struct spi_device *spi)
269524c7628SShreeya Patel {
270524c7628SShreeya Patel struct iio_dev *indio_dev;
271524c7628SShreeya Patel struct adis *st;
272524c7628SShreeya Patel int ret;
273524c7628SShreeya Patel
274524c7628SShreeya Patel indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
275524c7628SShreeya Patel if (!indio_dev)
276524c7628SShreeya Patel return -ENOMEM;
277524c7628SShreeya Patel
278524c7628SShreeya Patel st = iio_priv(indio_dev);
279524c7628SShreeya Patel
280524c7628SShreeya Patel indio_dev->name = spi->dev.driver->name;
281524c7628SShreeya Patel indio_dev->info = &adis16209_info;
282524c7628SShreeya Patel indio_dev->channels = adis16209_channels;
283524c7628SShreeya Patel indio_dev->num_channels = ARRAY_SIZE(adis16209_channels);
284524c7628SShreeya Patel indio_dev->modes = INDIO_DIRECT_MODE;
285524c7628SShreeya Patel
286524c7628SShreeya Patel ret = adis_init(st, indio_dev, spi, &adis16209_data);
287524c7628SShreeya Patel if (ret)
288524c7628SShreeya Patel return ret;
289524c7628SShreeya Patel
29017ff204cSNuno Sá ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
291524c7628SShreeya Patel if (ret)
292524c7628SShreeya Patel return ret;
293524c7628SShreeya Patel
294*09f8360fSRamona Bolboaca ret = __adis_initial_startup(st);
295524c7628SShreeya Patel if (ret)
296524c7628SShreeya Patel return ret;
297524c7628SShreeya Patel
29817ff204cSNuno Sá return devm_iio_device_register(&spi->dev, indio_dev);
299524c7628SShreeya Patel }
300524c7628SShreeya Patel
301524c7628SShreeya Patel static struct spi_driver adis16209_driver = {
302524c7628SShreeya Patel .driver = {
303524c7628SShreeya Patel .name = "adis16209",
304524c7628SShreeya Patel },
305524c7628SShreeya Patel .probe = adis16209_probe,
306524c7628SShreeya Patel };
307524c7628SShreeya Patel module_spi_driver(adis16209_driver);
308524c7628SShreeya Patel
309524c7628SShreeya Patel MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
310524c7628SShreeya Patel MODULE_DESCRIPTION("Analog Devices ADIS16209 Dual-Axis Digital Inclinometer and Accelerometer");
311524c7628SShreeya Patel MODULE_LICENSE("GPL v2");
312524c7628SShreeya Patel MODULE_ALIAS("spi:adis16209");
3136c9304d6SJonathan Cameron MODULE_IMPORT_NS(IIO_ADISLIB);
314