126717172SLen Brown /* 226717172SLen Brown * intel_idle.c - native hardware idle loop for modern Intel processors 326717172SLen Brown * 426717172SLen Brown * Copyright (c) 2010, Intel Corporation. 526717172SLen Brown * Len Brown <len.brown@intel.com> 626717172SLen Brown * 726717172SLen Brown * This program is free software; you can redistribute it and/or modify it 826717172SLen Brown * under the terms and conditions of the GNU General Public License, 926717172SLen Brown * version 2, as published by the Free Software Foundation. 1026717172SLen Brown * 1126717172SLen Brown * This program is distributed in the hope it will be useful, but WITHOUT 1226717172SLen Brown * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1326717172SLen Brown * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1426717172SLen Brown * more details. 1526717172SLen Brown * 1626717172SLen Brown * You should have received a copy of the GNU General Public License along with 1726717172SLen Brown * this program; if not, write to the Free Software Foundation, Inc., 1826717172SLen Brown * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 1926717172SLen Brown */ 2026717172SLen Brown 2126717172SLen Brown /* 2226717172SLen Brown * intel_idle is a cpuidle driver that loads on specific Intel processors 2326717172SLen Brown * in lieu of the legacy ACPI processor_idle driver. The intent is to 2426717172SLen Brown * make Linux more efficient on these processors, as intel_idle knows 2526717172SLen Brown * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs. 2626717172SLen Brown */ 2726717172SLen Brown 2826717172SLen Brown /* 2926717172SLen Brown * Design Assumptions 3026717172SLen Brown * 3126717172SLen Brown * All CPUs have same idle states as boot CPU 3226717172SLen Brown * 3326717172SLen Brown * Chipset BM_STS (bus master status) bit is a NOP 3426717172SLen Brown * for preventing entry into deep C-stats 3526717172SLen Brown */ 3626717172SLen Brown 3726717172SLen Brown /* 3826717172SLen Brown * Known limitations 3926717172SLen Brown * 4026717172SLen Brown * The driver currently initializes for_each_online_cpu() upon modprobe. 4126717172SLen Brown * It it unaware of subsequent processors hot-added to the system. 4226717172SLen Brown * This means that if you boot with maxcpus=n and later online 4326717172SLen Brown * processors above n, those processors will use C1 only. 4426717172SLen Brown * 4526717172SLen Brown * ACPI has a .suspend hack to turn off deep c-statees during suspend 4626717172SLen Brown * to avoid complications with the lapic timer workaround. 4726717172SLen Brown * Have not seen issues with suspend, but may need same workaround here. 4826717172SLen Brown * 4926717172SLen Brown * There is currently no kernel-based automatic probing/loading mechanism 5026717172SLen Brown * if the driver is built as a module. 5126717172SLen Brown */ 5226717172SLen Brown 5326717172SLen Brown /* un-comment DEBUG to enable pr_debug() statements */ 5426717172SLen Brown #define DEBUG 5526717172SLen Brown 5626717172SLen Brown #include <linux/kernel.h> 5726717172SLen Brown #include <linux/cpuidle.h> 5826717172SLen Brown #include <linux/clockchips.h> 5926717172SLen Brown #include <linux/hrtimer.h> /* ktime_get_real() */ 6026717172SLen Brown #include <trace/events/power.h> 6126717172SLen Brown #include <linux/sched.h> 622a2d31c8SShaohua Li #include <linux/notifier.h> 632a2d31c8SShaohua Li #include <linux/cpu.h> 64bc83ccccSH. Peter Anvin #include <asm/mwait.h> 6526717172SLen Brown 6626717172SLen Brown #define INTEL_IDLE_VERSION "0.4" 6726717172SLen Brown #define PREFIX "intel_idle: " 6826717172SLen Brown 6926717172SLen Brown static struct cpuidle_driver intel_idle_driver = { 7026717172SLen Brown .name = "intel_idle", 7126717172SLen Brown .owner = THIS_MODULE, 7226717172SLen Brown }; 7326717172SLen Brown /* intel_idle.max_cstate=0 disables driver */ 7426717172SLen Brown static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1; 7526717172SLen Brown 76c4236282SLen Brown static unsigned int mwait_substates; 7726717172SLen Brown 782a2d31c8SShaohua Li #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF 7926717172SLen Brown /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ 80d13780d4SLen Brown static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */ 8126717172SLen Brown 823265eba0SNamhyung Kim static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; 8326717172SLen Brown static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state); 8426717172SLen Brown 8526717172SLen Brown static struct cpuidle_state *cpuidle_state_table; 8626717172SLen Brown 8726717172SLen Brown /* 88956d033fSLen Brown * Set this flag for states where the HW flushes the TLB for us 89956d033fSLen Brown * and so we don't need cross-calls to keep it consistent. 90956d033fSLen Brown * If this flag is set, SW flushes the TLB, so even if the 91956d033fSLen Brown * HW doesn't do the flushing, this flag is safe to use. 92956d033fSLen Brown */ 93956d033fSLen Brown #define CPUIDLE_FLAG_TLB_FLUSHED 0x10000 94956d033fSLen Brown 95956d033fSLen Brown /* 9626717172SLen Brown * States are indexed by the cstate number, 9726717172SLen Brown * which is also the index into the MWAIT hint array. 9826717172SLen Brown * Thus C0 is a dummy. 9926717172SLen Brown */ 10026717172SLen Brown static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { 10126717172SLen Brown { /* MWAIT C0 */ }, 10226717172SLen Brown { /* MWAIT C1 */ 10326717172SLen Brown .name = "NHM-C1", 10426717172SLen Brown .desc = "MWAIT 0x00", 10526717172SLen Brown .driver_data = (void *) 0x00, 10626717172SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 10726717172SLen Brown .exit_latency = 3, 10826717172SLen Brown .target_residency = 6, 10926717172SLen Brown .enter = &intel_idle }, 11026717172SLen Brown { /* MWAIT C2 */ 11126717172SLen Brown .name = "NHM-C3", 11226717172SLen Brown .desc = "MWAIT 0x10", 11326717172SLen Brown .driver_data = (void *) 0x10, 1146110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 11526717172SLen Brown .exit_latency = 20, 11626717172SLen Brown .target_residency = 80, 11726717172SLen Brown .enter = &intel_idle }, 11826717172SLen Brown { /* MWAIT C3 */ 11926717172SLen Brown .name = "NHM-C6", 12026717172SLen Brown .desc = "MWAIT 0x20", 12126717172SLen Brown .driver_data = (void *) 0x20, 1226110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 12326717172SLen Brown .exit_latency = 200, 12426717172SLen Brown .target_residency = 800, 12526717172SLen Brown .enter = &intel_idle }, 12626717172SLen Brown }; 12726717172SLen Brown 128d13780d4SLen Brown static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { 129d13780d4SLen Brown { /* MWAIT C0 */ }, 130d13780d4SLen Brown { /* MWAIT C1 */ 131d13780d4SLen Brown .name = "SNB-C1", 132d13780d4SLen Brown .desc = "MWAIT 0x00", 133d13780d4SLen Brown .driver_data = (void *) 0x00, 134d13780d4SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 135d13780d4SLen Brown .exit_latency = 1, 136ddbd550dSLen Brown .target_residency = 1, 137d13780d4SLen Brown .enter = &intel_idle }, 138d13780d4SLen Brown { /* MWAIT C2 */ 139d13780d4SLen Brown .name = "SNB-C3", 140d13780d4SLen Brown .desc = "MWAIT 0x10", 141d13780d4SLen Brown .driver_data = (void *) 0x10, 14200527cc6SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 143d13780d4SLen Brown .exit_latency = 80, 144ddbd550dSLen Brown .target_residency = 211, 145d13780d4SLen Brown .enter = &intel_idle }, 146d13780d4SLen Brown { /* MWAIT C3 */ 147d13780d4SLen Brown .name = "SNB-C6", 148d13780d4SLen Brown .desc = "MWAIT 0x20", 149d13780d4SLen Brown .driver_data = (void *) 0x20, 15000527cc6SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 151d13780d4SLen Brown .exit_latency = 104, 152ddbd550dSLen Brown .target_residency = 345, 153d13780d4SLen Brown .enter = &intel_idle }, 154d13780d4SLen Brown { /* MWAIT C4 */ 155d13780d4SLen Brown .name = "SNB-C7", 156d13780d4SLen Brown .desc = "MWAIT 0x30", 157d13780d4SLen Brown .driver_data = (void *) 0x30, 15800527cc6SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 159d13780d4SLen Brown .exit_latency = 109, 160ddbd550dSLen Brown .target_residency = 345, 161d13780d4SLen Brown .enter = &intel_idle }, 162d13780d4SLen Brown }; 163d13780d4SLen Brown 16426717172SLen Brown static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { 16526717172SLen Brown { /* MWAIT C0 */ }, 16626717172SLen Brown { /* MWAIT C1 */ 16726717172SLen Brown .name = "ATM-C1", 16826717172SLen Brown .desc = "MWAIT 0x00", 16926717172SLen Brown .driver_data = (void *) 0x00, 17026717172SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 17126717172SLen Brown .exit_latency = 1, 17226717172SLen Brown .target_residency = 4, 17326717172SLen Brown .enter = &intel_idle }, 17426717172SLen Brown { /* MWAIT C2 */ 17526717172SLen Brown .name = "ATM-C2", 17626717172SLen Brown .desc = "MWAIT 0x10", 17726717172SLen Brown .driver_data = (void *) 0x10, 17826717172SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 17926717172SLen Brown .exit_latency = 20, 18026717172SLen Brown .target_residency = 80, 18126717172SLen Brown .enter = &intel_idle }, 18226717172SLen Brown { /* MWAIT C3 */ }, 18326717172SLen Brown { /* MWAIT C4 */ 18426717172SLen Brown .name = "ATM-C4", 18526717172SLen Brown .desc = "MWAIT 0x30", 18626717172SLen Brown .driver_data = (void *) 0x30, 1876110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 18826717172SLen Brown .exit_latency = 100, 18926717172SLen Brown .target_residency = 400, 19026717172SLen Brown .enter = &intel_idle }, 19126717172SLen Brown { /* MWAIT C5 */ }, 19226717172SLen Brown { /* MWAIT C6 */ 19326717172SLen Brown .name = "ATM-C6", 1947fcca7d9SLen Brown .desc = "MWAIT 0x52", 1957fcca7d9SLen Brown .driver_data = (void *) 0x52, 1966110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 1977fcca7d9SLen Brown .exit_latency = 140, 1987fcca7d9SLen Brown .target_residency = 560, 1997fcca7d9SLen Brown .enter = &intel_idle }, 20026717172SLen Brown }; 20126717172SLen Brown 20226717172SLen Brown /** 20326717172SLen Brown * intel_idle 20426717172SLen Brown * @dev: cpuidle_device 20526717172SLen Brown * @state: cpuidle state 20626717172SLen Brown * 20726717172SLen Brown */ 20826717172SLen Brown static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state) 20926717172SLen Brown { 21026717172SLen Brown unsigned long ecx = 1; /* break on interrupt flag */ 21126717172SLen Brown unsigned long eax = (unsigned long)cpuidle_get_statedata(state); 21226717172SLen Brown unsigned int cstate; 21326717172SLen Brown ktime_t kt_before, kt_after; 21426717172SLen Brown s64 usec_delta; 21526717172SLen Brown int cpu = smp_processor_id(); 21626717172SLen Brown 21726717172SLen Brown cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1; 21826717172SLen Brown 21926717172SLen Brown local_irq_disable(); 22026717172SLen Brown 2216110a1f4SSuresh Siddha /* 222c8381cc3SLen Brown * leave_mm() to avoid costly and often unnecessary wakeups 223c8381cc3SLen Brown * for flushing the user TLB's associated with the active mm. 2246110a1f4SSuresh Siddha */ 225c8381cc3SLen Brown if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED) 2266110a1f4SSuresh Siddha leave_mm(cpu); 2276110a1f4SSuresh Siddha 22826717172SLen Brown if (!(lapic_timer_reliable_states & (1 << (cstate)))) 22926717172SLen Brown clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); 23026717172SLen Brown 23126717172SLen Brown kt_before = ktime_get_real(); 23226717172SLen Brown 23326717172SLen Brown stop_critical_timings(); 23426717172SLen Brown if (!need_resched()) { 23526717172SLen Brown 23626717172SLen Brown __monitor((void *)¤t_thread_info()->flags, 0, 0); 23726717172SLen Brown smp_mb(); 23826717172SLen Brown if (!need_resched()) 23926717172SLen Brown __mwait(eax, ecx); 24026717172SLen Brown } 24126717172SLen Brown 24226717172SLen Brown start_critical_timings(); 24326717172SLen Brown 24426717172SLen Brown kt_after = ktime_get_real(); 24526717172SLen Brown usec_delta = ktime_to_us(ktime_sub(kt_after, kt_before)); 24626717172SLen Brown 24726717172SLen Brown local_irq_enable(); 24826717172SLen Brown 24926717172SLen Brown if (!(lapic_timer_reliable_states & (1 << (cstate)))) 25026717172SLen Brown clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu); 25126717172SLen Brown 25226717172SLen Brown return usec_delta; 25326717172SLen Brown } 25426717172SLen Brown 2552a2d31c8SShaohua Li static void __setup_broadcast_timer(void *arg) 2562a2d31c8SShaohua Li { 2572a2d31c8SShaohua Li unsigned long reason = (unsigned long)arg; 2582a2d31c8SShaohua Li int cpu = smp_processor_id(); 2592a2d31c8SShaohua Li 2602a2d31c8SShaohua Li reason = reason ? 2612a2d31c8SShaohua Li CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; 2622a2d31c8SShaohua Li 2632a2d31c8SShaohua Li clockevents_notify(reason, &cpu); 2642a2d31c8SShaohua Li } 2652a2d31c8SShaohua Li 266ec30f343SShaohua Li static int setup_broadcast_cpuhp_notify(struct notifier_block *n, 2672a2d31c8SShaohua Li unsigned long action, void *hcpu) 2682a2d31c8SShaohua Li { 2692a2d31c8SShaohua Li int hotcpu = (unsigned long)hcpu; 2702a2d31c8SShaohua Li 2712a2d31c8SShaohua Li switch (action & 0xf) { 2722a2d31c8SShaohua Li case CPU_ONLINE: 2732a2d31c8SShaohua Li smp_call_function_single(hotcpu, __setup_broadcast_timer, 2742a2d31c8SShaohua Li (void *)true, 1); 2752a2d31c8SShaohua Li break; 2762a2d31c8SShaohua Li } 2772a2d31c8SShaohua Li return NOTIFY_OK; 2782a2d31c8SShaohua Li } 2792a2d31c8SShaohua Li 280ec30f343SShaohua Li static struct notifier_block setup_broadcast_notifier = { 2812a2d31c8SShaohua Li .notifier_call = setup_broadcast_cpuhp_notify, 2822a2d31c8SShaohua Li }; 2832a2d31c8SShaohua Li 28426717172SLen Brown /* 28526717172SLen Brown * intel_idle_probe() 28626717172SLen Brown */ 28726717172SLen Brown static int intel_idle_probe(void) 28826717172SLen Brown { 289c4236282SLen Brown unsigned int eax, ebx, ecx; 29026717172SLen Brown 29126717172SLen Brown if (max_cstate == 0) { 29226717172SLen Brown pr_debug(PREFIX "disabled\n"); 29326717172SLen Brown return -EPERM; 29426717172SLen Brown } 29526717172SLen Brown 29626717172SLen Brown if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 29726717172SLen Brown return -ENODEV; 29826717172SLen Brown 29926717172SLen Brown if (!boot_cpu_has(X86_FEATURE_MWAIT)) 30026717172SLen Brown return -ENODEV; 30126717172SLen Brown 30226717172SLen Brown if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) 30326717172SLen Brown return -ENODEV; 30426717172SLen Brown 305c4236282SLen Brown cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates); 30626717172SLen Brown 30726717172SLen Brown if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) || 30826717172SLen Brown !(ecx & CPUID5_ECX_INTERRUPT_BREAK)) 30926717172SLen Brown return -ENODEV; 31026717172SLen Brown 311c4236282SLen Brown pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates); 31226717172SLen Brown 31326717172SLen Brown 31426717172SLen Brown if (boot_cpu_data.x86 != 6) /* family 6 */ 31526717172SLen Brown return -ENODEV; 31626717172SLen Brown 31726717172SLen Brown switch (boot_cpu_data.x86_model) { 31826717172SLen Brown 31926717172SLen Brown case 0x1A: /* Core i7, Xeon 5500 series */ 32026717172SLen Brown case 0x1E: /* Core i7 and i5 Processor - Lynnfield Jasper Forest */ 32126717172SLen Brown case 0x1F: /* Core i7 and i5 Processor - Nehalem */ 32226717172SLen Brown case 0x2E: /* Nehalem-EX Xeon */ 323ec67a2baSLen Brown case 0x2F: /* Westmere-EX Xeon */ 32426717172SLen Brown case 0x25: /* Westmere */ 32526717172SLen Brown case 0x2C: /* Westmere */ 32626717172SLen Brown cpuidle_state_table = nehalem_cstates; 32726717172SLen Brown break; 32826717172SLen Brown 32926717172SLen Brown case 0x1C: /* 28 - Atom Processor */ 3304725fd3cSArjan van de Ven case 0x26: /* 38 - Lincroft Atom Processor */ 33126717172SLen Brown cpuidle_state_table = atom_cstates; 33226717172SLen Brown break; 333d13780d4SLen Brown 334d13780d4SLen Brown case 0x2A: /* SNB */ 335d13780d4SLen Brown case 0x2D: /* SNB Xeon */ 336d13780d4SLen Brown cpuidle_state_table = snb_cstates; 337d13780d4SLen Brown break; 33826717172SLen Brown 33926717172SLen Brown default: 34026717172SLen Brown pr_debug(PREFIX "does not run on family %d model %d\n", 34126717172SLen Brown boot_cpu_data.x86, boot_cpu_data.x86_model); 34226717172SLen Brown return -ENODEV; 34326717172SLen Brown } 34426717172SLen Brown 34556b9aea3SLen Brown if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */ 3462a2d31c8SShaohua Li lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE; 3472a2d31c8SShaohua Li else { 3482a2d31c8SShaohua Li smp_call_function(__setup_broadcast_timer, (void *)true, 1); 3492a2d31c8SShaohua Li register_cpu_notifier(&setup_broadcast_notifier); 3502a2d31c8SShaohua Li } 35156b9aea3SLen Brown 35226717172SLen Brown pr_debug(PREFIX "v" INTEL_IDLE_VERSION 35326717172SLen Brown " model 0x%X\n", boot_cpu_data.x86_model); 35426717172SLen Brown 35526717172SLen Brown pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n", 35626717172SLen Brown lapic_timer_reliable_states); 35726717172SLen Brown return 0; 35826717172SLen Brown } 35926717172SLen Brown 36026717172SLen Brown /* 36126717172SLen Brown * intel_idle_cpuidle_devices_uninit() 36226717172SLen Brown * unregister, free cpuidle_devices 36326717172SLen Brown */ 36426717172SLen Brown static void intel_idle_cpuidle_devices_uninit(void) 36526717172SLen Brown { 36626717172SLen Brown int i; 36726717172SLen Brown struct cpuidle_device *dev; 36826717172SLen Brown 36926717172SLen Brown for_each_online_cpu(i) { 37026717172SLen Brown dev = per_cpu_ptr(intel_idle_cpuidle_devices, i); 37126717172SLen Brown cpuidle_unregister_device(dev); 37226717172SLen Brown } 37326717172SLen Brown 37426717172SLen Brown free_percpu(intel_idle_cpuidle_devices); 37526717172SLen Brown return; 37626717172SLen Brown } 37726717172SLen Brown /* 37826717172SLen Brown * intel_idle_cpuidle_devices_init() 37926717172SLen Brown * allocate, initialize, register cpuidle_devices 38026717172SLen Brown */ 38126717172SLen Brown static int intel_idle_cpuidle_devices_init(void) 38226717172SLen Brown { 38326717172SLen Brown int i, cstate; 38426717172SLen Brown struct cpuidle_device *dev; 38526717172SLen Brown 38626717172SLen Brown intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device); 38726717172SLen Brown if (intel_idle_cpuidle_devices == NULL) 38826717172SLen Brown return -ENOMEM; 38926717172SLen Brown 39026717172SLen Brown for_each_online_cpu(i) { 39126717172SLen Brown dev = per_cpu_ptr(intel_idle_cpuidle_devices, i); 39226717172SLen Brown 39326717172SLen Brown dev->state_count = 1; 39426717172SLen Brown 39526717172SLen Brown for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) { 39626717172SLen Brown int num_substates; 39726717172SLen Brown 39826717172SLen Brown if (cstate > max_cstate) { 39926717172SLen Brown printk(PREFIX "max_cstate %d reached\n", 40026717172SLen Brown max_cstate); 40126717172SLen Brown break; 40226717172SLen Brown } 40326717172SLen Brown 40426717172SLen Brown /* does the state exist in CPUID.MWAIT? */ 405c4236282SLen Brown num_substates = (mwait_substates >> ((cstate) * 4)) 40626717172SLen Brown & MWAIT_SUBSTATE_MASK; 40726717172SLen Brown if (num_substates == 0) 40826717172SLen Brown continue; 40926717172SLen Brown /* is the state not enabled? */ 41026717172SLen Brown if (cpuidle_state_table[cstate].enter == NULL) { 41126717172SLen Brown /* does the driver not know about the state? */ 41226717172SLen Brown if (*cpuidle_state_table[cstate].name == '\0') 41326717172SLen Brown pr_debug(PREFIX "unaware of model 0x%x" 41426717172SLen Brown " MWAIT %d please" 41526717172SLen Brown " contact lenb@kernel.org", 41626717172SLen Brown boot_cpu_data.x86_model, cstate); 41726717172SLen Brown continue; 41826717172SLen Brown } 41926717172SLen Brown 42026717172SLen Brown if ((cstate > 2) && 42126717172SLen Brown !boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 42226717172SLen Brown mark_tsc_unstable("TSC halts in idle" 42326717172SLen Brown " states deeper than C2"); 42426717172SLen Brown 42526717172SLen Brown dev->states[dev->state_count] = /* structure copy */ 42626717172SLen Brown cpuidle_state_table[cstate]; 42726717172SLen Brown 42826717172SLen Brown dev->state_count += 1; 42926717172SLen Brown } 43026717172SLen Brown 43126717172SLen Brown dev->cpu = i; 43226717172SLen Brown if (cpuidle_register_device(dev)) { 43326717172SLen Brown pr_debug(PREFIX "cpuidle_register_device %d failed!\n", 43426717172SLen Brown i); 43526717172SLen Brown intel_idle_cpuidle_devices_uninit(); 43626717172SLen Brown return -EIO; 43726717172SLen Brown } 43826717172SLen Brown } 43926717172SLen Brown 44026717172SLen Brown return 0; 44126717172SLen Brown } 44226717172SLen Brown 44326717172SLen Brown 44426717172SLen Brown static int __init intel_idle_init(void) 44526717172SLen Brown { 44626717172SLen Brown int retval; 44726717172SLen Brown 448d1896049SThomas Renninger /* Do not load intel_idle at all for now if idle= is passed */ 449d1896049SThomas Renninger if (boot_option_idle_override != IDLE_NO_OVERRIDE) 450d1896049SThomas Renninger return -ENODEV; 451d1896049SThomas Renninger 45226717172SLen Brown retval = intel_idle_probe(); 45326717172SLen Brown if (retval) 45426717172SLen Brown return retval; 45526717172SLen Brown 45626717172SLen Brown retval = cpuidle_register_driver(&intel_idle_driver); 45726717172SLen Brown if (retval) { 45826717172SLen Brown printk(KERN_DEBUG PREFIX "intel_idle yielding to %s", 45926717172SLen Brown cpuidle_get_driver()->name); 46026717172SLen Brown return retval; 46126717172SLen Brown } 46226717172SLen Brown 46326717172SLen Brown retval = intel_idle_cpuidle_devices_init(); 46426717172SLen Brown if (retval) { 46526717172SLen Brown cpuidle_unregister_driver(&intel_idle_driver); 46626717172SLen Brown return retval; 46726717172SLen Brown } 46826717172SLen Brown 46926717172SLen Brown return 0; 47026717172SLen Brown } 47126717172SLen Brown 47226717172SLen Brown static void __exit intel_idle_exit(void) 47326717172SLen Brown { 47426717172SLen Brown intel_idle_cpuidle_devices_uninit(); 47526717172SLen Brown cpuidle_unregister_driver(&intel_idle_driver); 47626717172SLen Brown 4772a2d31c8SShaohua Li if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) { 4782a2d31c8SShaohua Li smp_call_function(__setup_broadcast_timer, (void *)false, 1); 4792a2d31c8SShaohua Li unregister_cpu_notifier(&setup_broadcast_notifier); 4802a2d31c8SShaohua Li } 4812a2d31c8SShaohua Li 48226717172SLen Brown return; 48326717172SLen Brown } 48426717172SLen Brown 48526717172SLen Brown module_init(intel_idle_init); 48626717172SLen Brown module_exit(intel_idle_exit); 48726717172SLen Brown 48826717172SLen Brown module_param(max_cstate, int, 0444); 48926717172SLen Brown 49026717172SLen Brown MODULE_AUTHOR("Len Brown <len.brown@intel.com>"); 49126717172SLen Brown MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION); 49226717172SLen Brown MODULE_LICENSE("GPL"); 493