xref: /openbmc/linux/drivers/idle/intel_idle.c (revision bea57077) 
126717172SLen Brown /*
226717172SLen Brown  * intel_idle.c - native hardware idle loop for modern Intel processors
326717172SLen Brown  *
4fab04b22SLen Brown  * Copyright (c) 2013, Intel Corporation.
526717172SLen Brown  * Len Brown <len.brown@intel.com>
626717172SLen Brown  *
726717172SLen Brown  * This program is free software; you can redistribute it and/or modify it
826717172SLen Brown  * under the terms and conditions of the GNU General Public License,
926717172SLen Brown  * version 2, as published by the Free Software Foundation.
1026717172SLen Brown  *
1126717172SLen Brown  * This program is distributed in the hope it will be useful, but WITHOUT
1226717172SLen Brown  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1326717172SLen Brown  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
1426717172SLen Brown  * more details.
1526717172SLen Brown  *
1626717172SLen Brown  * You should have received a copy of the GNU General Public License along with
1726717172SLen Brown  * this program; if not, write to the Free Software Foundation, Inc.,
1826717172SLen Brown  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
1926717172SLen Brown  */
2026717172SLen Brown 
2126717172SLen Brown /*
2226717172SLen Brown  * intel_idle is a cpuidle driver that loads on specific Intel processors
2326717172SLen Brown  * in lieu of the legacy ACPI processor_idle driver.  The intent is to
2426717172SLen Brown  * make Linux more efficient on these processors, as intel_idle knows
2526717172SLen Brown  * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
2626717172SLen Brown  */
2726717172SLen Brown 
2826717172SLen Brown /*
2926717172SLen Brown  * Design Assumptions
3026717172SLen Brown  *
3126717172SLen Brown  * All CPUs have same idle states as boot CPU
3226717172SLen Brown  *
3326717172SLen Brown  * Chipset BM_STS (bus master status) bit is a NOP
3426717172SLen Brown  *	for preventing entry into deep C-stats
3526717172SLen Brown  */
3626717172SLen Brown 
3726717172SLen Brown /*
3826717172SLen Brown  * Known limitations
3926717172SLen Brown  *
4026717172SLen Brown  * The driver currently initializes for_each_online_cpu() upon modprobe.
4126717172SLen Brown  * It it unaware of subsequent processors hot-added to the system.
4226717172SLen Brown  * This means that if you boot with maxcpus=n and later online
4326717172SLen Brown  * processors above n, those processors will use C1 only.
4426717172SLen Brown  *
4526717172SLen Brown  * ACPI has a .suspend hack to turn off deep c-statees during suspend
4626717172SLen Brown  * to avoid complications with the lapic timer workaround.
4726717172SLen Brown  * Have not seen issues with suspend, but may need same workaround here.
4826717172SLen Brown  *
4926717172SLen Brown  * There is currently no kernel-based automatic probing/loading mechanism
5026717172SLen Brown  * if the driver is built as a module.
5126717172SLen Brown  */
5226717172SLen Brown 
5326717172SLen Brown /* un-comment DEBUG to enable pr_debug() statements */
5426717172SLen Brown #define DEBUG
5526717172SLen Brown 
5626717172SLen Brown #include <linux/kernel.h>
5726717172SLen Brown #include <linux/cpuidle.h>
5826717172SLen Brown #include <linux/clockchips.h>
5926717172SLen Brown #include <trace/events/power.h>
6026717172SLen Brown #include <linux/sched.h>
612a2d31c8SShaohua Li #include <linux/notifier.h>
622a2d31c8SShaohua Li #include <linux/cpu.h>
637c52d551SPaul Gortmaker #include <linux/module.h>
64b66b8b9aSAndi Kleen #include <asm/cpu_device_id.h>
65bc83ccccSH. Peter Anvin #include <asm/mwait.h>
6614796fcaSLen Brown #include <asm/msr.h>
6726717172SLen Brown 
6826717172SLen Brown #define INTEL_IDLE_VERSION "0.4"
6926717172SLen Brown #define PREFIX "intel_idle: "
7026717172SLen Brown 
7126717172SLen Brown static struct cpuidle_driver intel_idle_driver = {
7226717172SLen Brown 	.name = "intel_idle",
7326717172SLen Brown 	.owner = THIS_MODULE,
7426717172SLen Brown };
7526717172SLen Brown /* intel_idle.max_cstate=0 disables driver */
76137ecc77SLen Brown static int max_cstate = CPUIDLE_STATE_MAX - 1;
7726717172SLen Brown 
78c4236282SLen Brown static unsigned int mwait_substates;
7926717172SLen Brown 
802a2d31c8SShaohua Li #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
8126717172SLen Brown /* Reliable LAPIC Timer States, bit 1 for C1 etc.  */
82d13780d4SLen Brown static unsigned int lapic_timer_reliable_states = (1 << 1);	 /* Default to only C1 */
8326717172SLen Brown 
84b66b8b9aSAndi Kleen struct idle_cpu {
85b66b8b9aSAndi Kleen 	struct cpuidle_state *state_table;
8626717172SLen Brown 
8726717172SLen Brown 	/*
8814796fcaSLen Brown 	 * Hardware C-state auto-demotion may not always be optimal.
8914796fcaSLen Brown 	 * Indicate which enable bits to clear here.
9014796fcaSLen Brown 	 */
91b66b8b9aSAndi Kleen 	unsigned long auto_demotion_disable_flags;
928c058d53SLen Brown 	bool byt_auto_demotion_disable_flag;
9332e95180SLen Brown 	bool disable_promotion_to_c1e;
94b66b8b9aSAndi Kleen };
95b66b8b9aSAndi Kleen 
96b66b8b9aSAndi Kleen static const struct idle_cpu *icpu;
97b66b8b9aSAndi Kleen static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
98b66b8b9aSAndi Kleen static int intel_idle(struct cpuidle_device *dev,
99b66b8b9aSAndi Kleen 			struct cpuidle_driver *drv, int index);
10025ac7761SDaniel Lezcano static int intel_idle_cpu_init(int cpu);
101b66b8b9aSAndi Kleen 
102b66b8b9aSAndi Kleen static struct cpuidle_state *cpuidle_state_table;
10314796fcaSLen Brown 
10414796fcaSLen Brown /*
105956d033fSLen Brown  * Set this flag for states where the HW flushes the TLB for us
106956d033fSLen Brown  * and so we don't need cross-calls to keep it consistent.
107956d033fSLen Brown  * If this flag is set, SW flushes the TLB, so even if the
108956d033fSLen Brown  * HW doesn't do the flushing, this flag is safe to use.
109956d033fSLen Brown  */
110956d033fSLen Brown #define CPUIDLE_FLAG_TLB_FLUSHED	0x10000
111956d033fSLen Brown 
112956d033fSLen Brown /*
113b1beab48SLen Brown  * MWAIT takes an 8-bit "hint" in EAX "suggesting"
114b1beab48SLen Brown  * the C-state (top nibble) and sub-state (bottom nibble)
115b1beab48SLen Brown  * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc.
116b1beab48SLen Brown  *
117b1beab48SLen Brown  * We store the hint at the top of our "flags" for each state.
118b1beab48SLen Brown  */
119b1beab48SLen Brown #define flg2MWAIT(flags) (((flags) >> 24) & 0xFF)
120b1beab48SLen Brown #define MWAIT2flg(eax) ((eax & 0xFF) << 24)
121b1beab48SLen Brown 
122b1beab48SLen Brown /*
12326717172SLen Brown  * States are indexed by the cstate number,
12426717172SLen Brown  * which is also the index into the MWAIT hint array.
12526717172SLen Brown  * Thus C0 is a dummy.
12626717172SLen Brown  */
127ba0dc81eSJiang Liu static struct cpuidle_state nehalem_cstates[] = {
128e022e7ebSLen Brown 	{
12915e123e5SThomas Renninger 		.name = "C1-NHM",
13026717172SLen Brown 		.desc = "MWAIT 0x00",
131b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
13226717172SLen Brown 		.exit_latency = 3,
13326717172SLen Brown 		.target_residency = 6,
13426717172SLen Brown 		.enter = &intel_idle },
135e022e7ebSLen Brown 	{
13632e95180SLen Brown 		.name = "C1E-NHM",
13732e95180SLen Brown 		.desc = "MWAIT 0x01",
138b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
13932e95180SLen Brown 		.exit_latency = 10,
14032e95180SLen Brown 		.target_residency = 20,
14132e95180SLen Brown 		.enter = &intel_idle },
14232e95180SLen Brown 	{
14315e123e5SThomas Renninger 		.name = "C3-NHM",
14426717172SLen Brown 		.desc = "MWAIT 0x10",
145b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
14626717172SLen Brown 		.exit_latency = 20,
14726717172SLen Brown 		.target_residency = 80,
14826717172SLen Brown 		.enter = &intel_idle },
149e022e7ebSLen Brown 	{
15015e123e5SThomas Renninger 		.name = "C6-NHM",
15126717172SLen Brown 		.desc = "MWAIT 0x20",
152b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
15326717172SLen Brown 		.exit_latency = 200,
15426717172SLen Brown 		.target_residency = 800,
15526717172SLen Brown 		.enter = &intel_idle },
156e022e7ebSLen Brown 	{
157e022e7ebSLen Brown 		.enter = NULL }
15826717172SLen Brown };
15926717172SLen Brown 
160ba0dc81eSJiang Liu static struct cpuidle_state snb_cstates[] = {
161e022e7ebSLen Brown 	{
16215e123e5SThomas Renninger 		.name = "C1-SNB",
163d13780d4SLen Brown 		.desc = "MWAIT 0x00",
164b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
16532e95180SLen Brown 		.exit_latency = 2,
16632e95180SLen Brown 		.target_residency = 2,
16732e95180SLen Brown 		.enter = &intel_idle },
16832e95180SLen Brown 	{
16932e95180SLen Brown 		.name = "C1E-SNB",
17032e95180SLen Brown 		.desc = "MWAIT 0x01",
171b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
17232e95180SLen Brown 		.exit_latency = 10,
17332e95180SLen Brown 		.target_residency = 20,
174d13780d4SLen Brown 		.enter = &intel_idle },
175e022e7ebSLen Brown 	{
17615e123e5SThomas Renninger 		.name = "C3-SNB",
177d13780d4SLen Brown 		.desc = "MWAIT 0x10",
178b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
179d13780d4SLen Brown 		.exit_latency = 80,
180ddbd550dSLen Brown 		.target_residency = 211,
181d13780d4SLen Brown 		.enter = &intel_idle },
182e022e7ebSLen Brown 	{
18315e123e5SThomas Renninger 		.name = "C6-SNB",
184d13780d4SLen Brown 		.desc = "MWAIT 0x20",
185b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
186d13780d4SLen Brown 		.exit_latency = 104,
187ddbd550dSLen Brown 		.target_residency = 345,
188d13780d4SLen Brown 		.enter = &intel_idle },
189e022e7ebSLen Brown 	{
19015e123e5SThomas Renninger 		.name = "C7-SNB",
191d13780d4SLen Brown 		.desc = "MWAIT 0x30",
192b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
193d13780d4SLen Brown 		.exit_latency = 109,
194ddbd550dSLen Brown 		.target_residency = 345,
195d13780d4SLen Brown 		.enter = &intel_idle },
196e022e7ebSLen Brown 	{
197e022e7ebSLen Brown 		.enter = NULL }
198d13780d4SLen Brown };
199d13780d4SLen Brown 
200718987d6SLen Brown static struct cpuidle_state byt_cstates[] = {
201718987d6SLen Brown 	{
202718987d6SLen Brown 		.name = "C1-BYT",
203718987d6SLen Brown 		.desc = "MWAIT 0x00",
204b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
205718987d6SLen Brown 		.exit_latency = 1,
206718987d6SLen Brown 		.target_residency = 1,
207718987d6SLen Brown 		.enter = &intel_idle },
208718987d6SLen Brown 	{
209718987d6SLen Brown 		.name = "C1E-BYT",
210718987d6SLen Brown 		.desc = "MWAIT 0x01",
211b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
212718987d6SLen Brown 		.exit_latency = 15,
213718987d6SLen Brown 		.target_residency = 30,
214718987d6SLen Brown 		.enter = &intel_idle },
215718987d6SLen Brown 	{
216718987d6SLen Brown 		.name = "C6N-BYT",
217718987d6SLen Brown 		.desc = "MWAIT 0x58",
218b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
219718987d6SLen Brown 		.exit_latency = 40,
220718987d6SLen Brown 		.target_residency = 275,
221718987d6SLen Brown 		.enter = &intel_idle },
222718987d6SLen Brown 	{
223718987d6SLen Brown 		.name = "C6S-BYT",
224718987d6SLen Brown 		.desc = "MWAIT 0x52",
225b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
226718987d6SLen Brown 		.exit_latency = 140,
227718987d6SLen Brown 		.target_residency = 560,
228718987d6SLen Brown 		.enter = &intel_idle },
229718987d6SLen Brown 	{
230718987d6SLen Brown 		.name = "C7-BYT",
231718987d6SLen Brown 		.desc = "MWAIT 0x60",
232b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
233718987d6SLen Brown 		.exit_latency = 1200,
234718987d6SLen Brown 		.target_residency = 1500,
235718987d6SLen Brown 		.enter = &intel_idle },
236718987d6SLen Brown 	{
237718987d6SLen Brown 		.name = "C7S-BYT",
238718987d6SLen Brown 		.desc = "MWAIT 0x64",
239b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
240718987d6SLen Brown 		.exit_latency = 10000,
241718987d6SLen Brown 		.target_residency = 20000,
242718987d6SLen Brown 		.enter = &intel_idle },
243718987d6SLen Brown 	{
244718987d6SLen Brown 		.enter = NULL }
245718987d6SLen Brown };
246718987d6SLen Brown 
247ba0dc81eSJiang Liu static struct cpuidle_state ivb_cstates[] = {
248e022e7ebSLen Brown 	{
2496edab08cSLen Brown 		.name = "C1-IVB",
2506edab08cSLen Brown 		.desc = "MWAIT 0x00",
251b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
2526edab08cSLen Brown 		.exit_latency = 1,
2536edab08cSLen Brown 		.target_residency = 1,
2546edab08cSLen Brown 		.enter = &intel_idle },
255e022e7ebSLen Brown 	{
25632e95180SLen Brown 		.name = "C1E-IVB",
25732e95180SLen Brown 		.desc = "MWAIT 0x01",
258b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
25932e95180SLen Brown 		.exit_latency = 10,
26032e95180SLen Brown 		.target_residency = 20,
26132e95180SLen Brown 		.enter = &intel_idle },
26232e95180SLen Brown 	{
2636edab08cSLen Brown 		.name = "C3-IVB",
2646edab08cSLen Brown 		.desc = "MWAIT 0x10",
265b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
2666edab08cSLen Brown 		.exit_latency = 59,
2676edab08cSLen Brown 		.target_residency = 156,
2686edab08cSLen Brown 		.enter = &intel_idle },
269e022e7ebSLen Brown 	{
2706edab08cSLen Brown 		.name = "C6-IVB",
2716edab08cSLen Brown 		.desc = "MWAIT 0x20",
272b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
2736edab08cSLen Brown 		.exit_latency = 80,
2746edab08cSLen Brown 		.target_residency = 300,
2756edab08cSLen Brown 		.enter = &intel_idle },
276e022e7ebSLen Brown 	{
2776edab08cSLen Brown 		.name = "C7-IVB",
2786edab08cSLen Brown 		.desc = "MWAIT 0x30",
279b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
2806edab08cSLen Brown 		.exit_latency = 87,
2816edab08cSLen Brown 		.target_residency = 300,
2826edab08cSLen Brown 		.enter = &intel_idle },
283e022e7ebSLen Brown 	{
284e022e7ebSLen Brown 		.enter = NULL }
2856edab08cSLen Brown };
2866edab08cSLen Brown 
2870138d8f0SLen Brown static struct cpuidle_state ivt_cstates[] = {
2880138d8f0SLen Brown 	{
2890138d8f0SLen Brown 		.name = "C1-IVT",
2900138d8f0SLen Brown 		.desc = "MWAIT 0x00",
291b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
2920138d8f0SLen Brown 		.exit_latency = 1,
2930138d8f0SLen Brown 		.target_residency = 1,
2940138d8f0SLen Brown 		.enter = &intel_idle },
2950138d8f0SLen Brown 	{
2960138d8f0SLen Brown 		.name = "C1E-IVT",
2970138d8f0SLen Brown 		.desc = "MWAIT 0x01",
298b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
2990138d8f0SLen Brown 		.exit_latency = 10,
3000138d8f0SLen Brown 		.target_residency = 80,
3010138d8f0SLen Brown 		.enter = &intel_idle },
3020138d8f0SLen Brown 	{
3030138d8f0SLen Brown 		.name = "C3-IVT",
3040138d8f0SLen Brown 		.desc = "MWAIT 0x10",
305b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
3060138d8f0SLen Brown 		.exit_latency = 59,
3070138d8f0SLen Brown 		.target_residency = 156,
3080138d8f0SLen Brown 		.enter = &intel_idle },
3090138d8f0SLen Brown 	{
3100138d8f0SLen Brown 		.name = "C6-IVT",
3110138d8f0SLen Brown 		.desc = "MWAIT 0x20",
312b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
3130138d8f0SLen Brown 		.exit_latency = 82,
3140138d8f0SLen Brown 		.target_residency = 300,
3150138d8f0SLen Brown 		.enter = &intel_idle },
3160138d8f0SLen Brown 	{
3170138d8f0SLen Brown 		.enter = NULL }
3180138d8f0SLen Brown };
3190138d8f0SLen Brown 
3200138d8f0SLen Brown static struct cpuidle_state ivt_cstates_4s[] = {
3210138d8f0SLen Brown 	{
3220138d8f0SLen Brown 		.name = "C1-IVT-4S",
3230138d8f0SLen Brown 		.desc = "MWAIT 0x00",
324b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
3250138d8f0SLen Brown 		.exit_latency = 1,
3260138d8f0SLen Brown 		.target_residency = 1,
3270138d8f0SLen Brown 		.enter = &intel_idle },
3280138d8f0SLen Brown 	{
3290138d8f0SLen Brown 		.name = "C1E-IVT-4S",
3300138d8f0SLen Brown 		.desc = "MWAIT 0x01",
331b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
3320138d8f0SLen Brown 		.exit_latency = 10,
3330138d8f0SLen Brown 		.target_residency = 250,
3340138d8f0SLen Brown 		.enter = &intel_idle },
3350138d8f0SLen Brown 	{
3360138d8f0SLen Brown 		.name = "C3-IVT-4S",
3370138d8f0SLen Brown 		.desc = "MWAIT 0x10",
338b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
3390138d8f0SLen Brown 		.exit_latency = 59,
3400138d8f0SLen Brown 		.target_residency = 300,
3410138d8f0SLen Brown 		.enter = &intel_idle },
3420138d8f0SLen Brown 	{
3430138d8f0SLen Brown 		.name = "C6-IVT-4S",
3440138d8f0SLen Brown 		.desc = "MWAIT 0x20",
345b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
3460138d8f0SLen Brown 		.exit_latency = 84,
3470138d8f0SLen Brown 		.target_residency = 400,
3480138d8f0SLen Brown 		.enter = &intel_idle },
3490138d8f0SLen Brown 	{
3500138d8f0SLen Brown 		.enter = NULL }
3510138d8f0SLen Brown };
3520138d8f0SLen Brown 
3530138d8f0SLen Brown static struct cpuidle_state ivt_cstates_8s[] = {
3540138d8f0SLen Brown 	{
3550138d8f0SLen Brown 		.name = "C1-IVT-8S",
3560138d8f0SLen Brown 		.desc = "MWAIT 0x00",
357b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
3580138d8f0SLen Brown 		.exit_latency = 1,
3590138d8f0SLen Brown 		.target_residency = 1,
3600138d8f0SLen Brown 		.enter = &intel_idle },
3610138d8f0SLen Brown 	{
3620138d8f0SLen Brown 		.name = "C1E-IVT-8S",
3630138d8f0SLen Brown 		.desc = "MWAIT 0x01",
364b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
3650138d8f0SLen Brown 		.exit_latency = 10,
3660138d8f0SLen Brown 		.target_residency = 500,
3670138d8f0SLen Brown 		.enter = &intel_idle },
3680138d8f0SLen Brown 	{
3690138d8f0SLen Brown 		.name = "C3-IVT-8S",
3700138d8f0SLen Brown 		.desc = "MWAIT 0x10",
371b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
3720138d8f0SLen Brown 		.exit_latency = 59,
3730138d8f0SLen Brown 		.target_residency = 600,
3740138d8f0SLen Brown 		.enter = &intel_idle },
3750138d8f0SLen Brown 	{
3760138d8f0SLen Brown 		.name = "C6-IVT-8S",
3770138d8f0SLen Brown 		.desc = "MWAIT 0x20",
378b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
3790138d8f0SLen Brown 		.exit_latency = 88,
3800138d8f0SLen Brown 		.target_residency = 700,
3810138d8f0SLen Brown 		.enter = &intel_idle },
3820138d8f0SLen Brown 	{
3830138d8f0SLen Brown 		.enter = NULL }
3840138d8f0SLen Brown };
3850138d8f0SLen Brown 
386ba0dc81eSJiang Liu static struct cpuidle_state hsw_cstates[] = {
387e022e7ebSLen Brown 	{
38885a4d2d4SLen Brown 		.name = "C1-HSW",
38985a4d2d4SLen Brown 		.desc = "MWAIT 0x00",
390b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
39185a4d2d4SLen Brown 		.exit_latency = 2,
39285a4d2d4SLen Brown 		.target_residency = 2,
39385a4d2d4SLen Brown 		.enter = &intel_idle },
394e022e7ebSLen Brown 	{
39532e95180SLen Brown 		.name = "C1E-HSW",
39632e95180SLen Brown 		.desc = "MWAIT 0x01",
397b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
39832e95180SLen Brown 		.exit_latency = 10,
39932e95180SLen Brown 		.target_residency = 20,
40032e95180SLen Brown 		.enter = &intel_idle },
40132e95180SLen Brown 	{
40285a4d2d4SLen Brown 		.name = "C3-HSW",
40385a4d2d4SLen Brown 		.desc = "MWAIT 0x10",
404b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
40585a4d2d4SLen Brown 		.exit_latency = 33,
40685a4d2d4SLen Brown 		.target_residency = 100,
40785a4d2d4SLen Brown 		.enter = &intel_idle },
408e022e7ebSLen Brown 	{
40985a4d2d4SLen Brown 		.name = "C6-HSW",
41085a4d2d4SLen Brown 		.desc = "MWAIT 0x20",
411b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
41285a4d2d4SLen Brown 		.exit_latency = 133,
41385a4d2d4SLen Brown 		.target_residency = 400,
41485a4d2d4SLen Brown 		.enter = &intel_idle },
415e022e7ebSLen Brown 	{
41685a4d2d4SLen Brown 		.name = "C7s-HSW",
41785a4d2d4SLen Brown 		.desc = "MWAIT 0x32",
418b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
41985a4d2d4SLen Brown 		.exit_latency = 166,
42085a4d2d4SLen Brown 		.target_residency = 500,
42185a4d2d4SLen Brown 		.enter = &intel_idle },
422e022e7ebSLen Brown 	{
42386239cebSLen Brown 		.name = "C8-HSW",
42486239cebSLen Brown 		.desc = "MWAIT 0x40",
425b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
42686239cebSLen Brown 		.exit_latency = 300,
42786239cebSLen Brown 		.target_residency = 900,
42886239cebSLen Brown 		.enter = &intel_idle },
42986239cebSLen Brown 	{
43086239cebSLen Brown 		.name = "C9-HSW",
43186239cebSLen Brown 		.desc = "MWAIT 0x50",
432b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
43386239cebSLen Brown 		.exit_latency = 600,
43486239cebSLen Brown 		.target_residency = 1800,
43586239cebSLen Brown 		.enter = &intel_idle },
43686239cebSLen Brown 	{
43786239cebSLen Brown 		.name = "C10-HSW",
43886239cebSLen Brown 		.desc = "MWAIT 0x60",
439b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
44086239cebSLen Brown 		.exit_latency = 2600,
44186239cebSLen Brown 		.target_residency = 7700,
44286239cebSLen Brown 		.enter = &intel_idle },
44386239cebSLen Brown 	{
444e022e7ebSLen Brown 		.enter = NULL }
44585a4d2d4SLen Brown };
446a138b568SLen Brown static struct cpuidle_state bdw_cstates[] = {
447a138b568SLen Brown 	{
448a138b568SLen Brown 		.name = "C1-BDW",
449a138b568SLen Brown 		.desc = "MWAIT 0x00",
450b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
451a138b568SLen Brown 		.exit_latency = 2,
452a138b568SLen Brown 		.target_residency = 2,
453a138b568SLen Brown 		.enter = &intel_idle },
454a138b568SLen Brown 	{
455a138b568SLen Brown 		.name = "C1E-BDW",
456a138b568SLen Brown 		.desc = "MWAIT 0x01",
457b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x01),
458a138b568SLen Brown 		.exit_latency = 10,
459a138b568SLen Brown 		.target_residency = 20,
460a138b568SLen Brown 		.enter = &intel_idle },
461a138b568SLen Brown 	{
462a138b568SLen Brown 		.name = "C3-BDW",
463a138b568SLen Brown 		.desc = "MWAIT 0x10",
464b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
465a138b568SLen Brown 		.exit_latency = 40,
466a138b568SLen Brown 		.target_residency = 100,
467a138b568SLen Brown 		.enter = &intel_idle },
468a138b568SLen Brown 	{
469a138b568SLen Brown 		.name = "C6-BDW",
470a138b568SLen Brown 		.desc = "MWAIT 0x20",
471b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
472a138b568SLen Brown 		.exit_latency = 133,
473a138b568SLen Brown 		.target_residency = 400,
474a138b568SLen Brown 		.enter = &intel_idle },
475a138b568SLen Brown 	{
476a138b568SLen Brown 		.name = "C7s-BDW",
477a138b568SLen Brown 		.desc = "MWAIT 0x32",
478b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
479a138b568SLen Brown 		.exit_latency = 166,
480a138b568SLen Brown 		.target_residency = 500,
481a138b568SLen Brown 		.enter = &intel_idle },
482a138b568SLen Brown 	{
483a138b568SLen Brown 		.name = "C8-BDW",
484a138b568SLen Brown 		.desc = "MWAIT 0x40",
485b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
486a138b568SLen Brown 		.exit_latency = 300,
487a138b568SLen Brown 		.target_residency = 900,
488a138b568SLen Brown 		.enter = &intel_idle },
489a138b568SLen Brown 	{
490a138b568SLen Brown 		.name = "C9-BDW",
491a138b568SLen Brown 		.desc = "MWAIT 0x50",
492b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
493a138b568SLen Brown 		.exit_latency = 600,
494a138b568SLen Brown 		.target_residency = 1800,
495a138b568SLen Brown 		.enter = &intel_idle },
496a138b568SLen Brown 	{
497a138b568SLen Brown 		.name = "C10-BDW",
498a138b568SLen Brown 		.desc = "MWAIT 0x60",
499b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
500a138b568SLen Brown 		.exit_latency = 2600,
501a138b568SLen Brown 		.target_residency = 7700,
502a138b568SLen Brown 		.enter = &intel_idle },
503a138b568SLen Brown 	{
504a138b568SLen Brown 		.enter = NULL }
505a138b568SLen Brown };
50685a4d2d4SLen Brown 
507ba0dc81eSJiang Liu static struct cpuidle_state atom_cstates[] = {
508e022e7ebSLen Brown 	{
50932e95180SLen Brown 		.name = "C1E-ATM",
51026717172SLen Brown 		.desc = "MWAIT 0x00",
511b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
51232e95180SLen Brown 		.exit_latency = 10,
51332e95180SLen Brown 		.target_residency = 20,
51426717172SLen Brown 		.enter = &intel_idle },
515e022e7ebSLen Brown 	{
51615e123e5SThomas Renninger 		.name = "C2-ATM",
51726717172SLen Brown 		.desc = "MWAIT 0x10",
518b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x10),
51926717172SLen Brown 		.exit_latency = 20,
52026717172SLen Brown 		.target_residency = 80,
52126717172SLen Brown 		.enter = &intel_idle },
522e022e7ebSLen Brown 	{
52315e123e5SThomas Renninger 		.name = "C4-ATM",
52426717172SLen Brown 		.desc = "MWAIT 0x30",
525b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
52626717172SLen Brown 		.exit_latency = 100,
52726717172SLen Brown 		.target_residency = 400,
52826717172SLen Brown 		.enter = &intel_idle },
529e022e7ebSLen Brown 	{
53015e123e5SThomas Renninger 		.name = "C6-ATM",
5317fcca7d9SLen Brown 		.desc = "MWAIT 0x52",
532b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
5337fcca7d9SLen Brown 		.exit_latency = 140,
5347fcca7d9SLen Brown 		.target_residency = 560,
5357fcca7d9SLen Brown 		.enter = &intel_idle },
536e022e7ebSLen Brown 	{
537e022e7ebSLen Brown 		.enter = NULL }
53826717172SLen Brown };
53988390996SJiang Liu static struct cpuidle_state avn_cstates[] = {
540fab04b22SLen Brown 	{
541fab04b22SLen Brown 		.name = "C1-AVN",
542fab04b22SLen Brown 		.desc = "MWAIT 0x00",
543b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x00),
544fab04b22SLen Brown 		.exit_latency = 2,
545fab04b22SLen Brown 		.target_residency = 2,
546fab04b22SLen Brown 		.enter = &intel_idle },
547fab04b22SLen Brown 	{
548fab04b22SLen Brown 		.name = "C6-AVN",
549fab04b22SLen Brown 		.desc = "MWAIT 0x51",
550b82b6ccaSDaniel Lezcano 		.flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TLB_FLUSHED,
551fab04b22SLen Brown 		.exit_latency = 15,
552fab04b22SLen Brown 		.target_residency = 45,
553fab04b22SLen Brown 		.enter = &intel_idle },
55488390996SJiang Liu 	{
55588390996SJiang Liu 		.enter = NULL }
556fab04b22SLen Brown };
55726717172SLen Brown 
55826717172SLen Brown /**
55926717172SLen Brown  * intel_idle
56026717172SLen Brown  * @dev: cpuidle_device
56146bcfad7SDeepthi Dharwar  * @drv: cpuidle driver
562e978aa7dSDeepthi Dharwar  * @index: index of cpuidle state
56326717172SLen Brown  *
56463ff07beSYanmin Zhang  * Must be called under local_irq_disable().
56526717172SLen Brown  */
56646bcfad7SDeepthi Dharwar static int intel_idle(struct cpuidle_device *dev,
56746bcfad7SDeepthi Dharwar 		struct cpuidle_driver *drv, int index)
56826717172SLen Brown {
56926717172SLen Brown 	unsigned long ecx = 1; /* break on interrupt flag */
57046bcfad7SDeepthi Dharwar 	struct cpuidle_state *state = &drv->states[index];
571b1beab48SLen Brown 	unsigned long eax = flg2MWAIT(state->flags);
57226717172SLen Brown 	unsigned int cstate;
57326717172SLen Brown 	int cpu = smp_processor_id();
57426717172SLen Brown 
57526717172SLen Brown 	cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
57626717172SLen Brown 
5776110a1f4SSuresh Siddha 	/*
578c8381cc3SLen Brown 	 * leave_mm() to avoid costly and often unnecessary wakeups
579c8381cc3SLen Brown 	 * for flushing the user TLB's associated with the active mm.
5806110a1f4SSuresh Siddha 	 */
581c8381cc3SLen Brown 	if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
5826110a1f4SSuresh Siddha 		leave_mm(cpu);
5836110a1f4SSuresh Siddha 
58426717172SLen Brown 	if (!(lapic_timer_reliable_states & (1 << (cstate))))
58526717172SLen Brown 		clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
58626717172SLen Brown 
58716824255SPeter Zijlstra 	mwait_idle_with_hints(eax, ecx);
58826717172SLen Brown 
58926717172SLen Brown 	if (!(lapic_timer_reliable_states & (1 << (cstate))))
59026717172SLen Brown 		clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
59126717172SLen Brown 
592e978aa7dSDeepthi Dharwar 	return index;
59326717172SLen Brown }
59426717172SLen Brown 
5952a2d31c8SShaohua Li static void __setup_broadcast_timer(void *arg)
5962a2d31c8SShaohua Li {
5972a2d31c8SShaohua Li 	unsigned long reason = (unsigned long)arg;
5982a2d31c8SShaohua Li 	int cpu = smp_processor_id();
5992a2d31c8SShaohua Li 
6002a2d31c8SShaohua Li 	reason = reason ?
6012a2d31c8SShaohua Li 		CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
6022a2d31c8SShaohua Li 
6032a2d31c8SShaohua Li 	clockevents_notify(reason, &cpu);
6042a2d31c8SShaohua Li }
6052a2d31c8SShaohua Li 
60625ac7761SDaniel Lezcano static int cpu_hotplug_notify(struct notifier_block *n,
6072a2d31c8SShaohua Li 			      unsigned long action, void *hcpu)
6082a2d31c8SShaohua Li {
6092a2d31c8SShaohua Li 	int hotcpu = (unsigned long)hcpu;
61025ac7761SDaniel Lezcano 	struct cpuidle_device *dev;
6112a2d31c8SShaohua Li 
612e2401453SPrarit Bhargava 	switch (action & ~CPU_TASKS_FROZEN) {
6132a2d31c8SShaohua Li 	case CPU_ONLINE:
61425ac7761SDaniel Lezcano 
61525ac7761SDaniel Lezcano 		if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
6162a2d31c8SShaohua Li 			smp_call_function_single(hotcpu, __setup_broadcast_timer,
6172a2d31c8SShaohua Li 						 (void *)true, 1);
61825ac7761SDaniel Lezcano 
61925ac7761SDaniel Lezcano 		/*
62025ac7761SDaniel Lezcano 		 * Some systems can hotplug a cpu at runtime after
62125ac7761SDaniel Lezcano 		 * the kernel has booted, we have to initialize the
62225ac7761SDaniel Lezcano 		 * driver in this case
62325ac7761SDaniel Lezcano 		 */
62425ac7761SDaniel Lezcano 		dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu);
62525ac7761SDaniel Lezcano 		if (!dev->registered)
62625ac7761SDaniel Lezcano 			intel_idle_cpu_init(hotcpu);
62725ac7761SDaniel Lezcano 
6282a2d31c8SShaohua Li 		break;
6292a2d31c8SShaohua Li 	}
6302a2d31c8SShaohua Li 	return NOTIFY_OK;
6312a2d31c8SShaohua Li }
6322a2d31c8SShaohua Li 
63325ac7761SDaniel Lezcano static struct notifier_block cpu_hotplug_notifier = {
63425ac7761SDaniel Lezcano 	.notifier_call = cpu_hotplug_notify,
6352a2d31c8SShaohua Li };
6362a2d31c8SShaohua Li 
63714796fcaSLen Brown static void auto_demotion_disable(void *dummy)
63814796fcaSLen Brown {
63914796fcaSLen Brown 	unsigned long long msr_bits;
64014796fcaSLen Brown 
64114796fcaSLen Brown 	rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
642b66b8b9aSAndi Kleen 	msr_bits &= ~(icpu->auto_demotion_disable_flags);
64314796fcaSLen Brown 	wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
64414796fcaSLen Brown }
64532e95180SLen Brown static void c1e_promotion_disable(void *dummy)
64632e95180SLen Brown {
64732e95180SLen Brown 	unsigned long long msr_bits;
64832e95180SLen Brown 
64932e95180SLen Brown 	rdmsrl(MSR_IA32_POWER_CTL, msr_bits);
65032e95180SLen Brown 	msr_bits &= ~0x2;
65132e95180SLen Brown 	wrmsrl(MSR_IA32_POWER_CTL, msr_bits);
65232e95180SLen Brown }
65314796fcaSLen Brown 
654b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_nehalem = {
655b66b8b9aSAndi Kleen 	.state_table = nehalem_cstates,
656b66b8b9aSAndi Kleen 	.auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
65732e95180SLen Brown 	.disable_promotion_to_c1e = true,
658b66b8b9aSAndi Kleen };
659b66b8b9aSAndi Kleen 
660b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_atom = {
661b66b8b9aSAndi Kleen 	.state_table = atom_cstates,
662b66b8b9aSAndi Kleen };
663b66b8b9aSAndi Kleen 
664b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_lincroft = {
665b66b8b9aSAndi Kleen 	.state_table = atom_cstates,
666b66b8b9aSAndi Kleen 	.auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE,
667b66b8b9aSAndi Kleen };
668b66b8b9aSAndi Kleen 
669b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_snb = {
670b66b8b9aSAndi Kleen 	.state_table = snb_cstates,
67132e95180SLen Brown 	.disable_promotion_to_c1e = true,
672b66b8b9aSAndi Kleen };
673b66b8b9aSAndi Kleen 
674718987d6SLen Brown static const struct idle_cpu idle_cpu_byt = {
675718987d6SLen Brown 	.state_table = byt_cstates,
676718987d6SLen Brown 	.disable_promotion_to_c1e = true,
6778c058d53SLen Brown 	.byt_auto_demotion_disable_flag = true,
678718987d6SLen Brown };
679718987d6SLen Brown 
6806edab08cSLen Brown static const struct idle_cpu idle_cpu_ivb = {
6816edab08cSLen Brown 	.state_table = ivb_cstates,
68232e95180SLen Brown 	.disable_promotion_to_c1e = true,
6836edab08cSLen Brown };
6846edab08cSLen Brown 
6850138d8f0SLen Brown static const struct idle_cpu idle_cpu_ivt = {
6860138d8f0SLen Brown 	.state_table = ivt_cstates,
6870138d8f0SLen Brown 	.disable_promotion_to_c1e = true,
6880138d8f0SLen Brown };
6890138d8f0SLen Brown 
69085a4d2d4SLen Brown static const struct idle_cpu idle_cpu_hsw = {
69185a4d2d4SLen Brown 	.state_table = hsw_cstates,
69232e95180SLen Brown 	.disable_promotion_to_c1e = true,
69385a4d2d4SLen Brown };
69485a4d2d4SLen Brown 
695a138b568SLen Brown static const struct idle_cpu idle_cpu_bdw = {
696a138b568SLen Brown 	.state_table = bdw_cstates,
697a138b568SLen Brown 	.disable_promotion_to_c1e = true,
698a138b568SLen Brown };
699a138b568SLen Brown 
700fab04b22SLen Brown static const struct idle_cpu idle_cpu_avn = {
701fab04b22SLen Brown 	.state_table = avn_cstates,
702fab04b22SLen Brown 	.disable_promotion_to_c1e = true,
703fab04b22SLen Brown };
704fab04b22SLen Brown 
705b66b8b9aSAndi Kleen #define ICPU(model, cpu) \
706b66b8b9aSAndi Kleen 	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
707b66b8b9aSAndi Kleen 
708b66b8b9aSAndi Kleen static const struct x86_cpu_id intel_idle_ids[] = {
709b66b8b9aSAndi Kleen 	ICPU(0x1a, idle_cpu_nehalem),
710b66b8b9aSAndi Kleen 	ICPU(0x1e, idle_cpu_nehalem),
711b66b8b9aSAndi Kleen 	ICPU(0x1f, idle_cpu_nehalem),
7128bf11938SBen Hutchings 	ICPU(0x25, idle_cpu_nehalem),
7138bf11938SBen Hutchings 	ICPU(0x2c, idle_cpu_nehalem),
7148bf11938SBen Hutchings 	ICPU(0x2e, idle_cpu_nehalem),
715b66b8b9aSAndi Kleen 	ICPU(0x1c, idle_cpu_atom),
716b66b8b9aSAndi Kleen 	ICPU(0x26, idle_cpu_lincroft),
7178bf11938SBen Hutchings 	ICPU(0x2f, idle_cpu_nehalem),
718b66b8b9aSAndi Kleen 	ICPU(0x2a, idle_cpu_snb),
719b66b8b9aSAndi Kleen 	ICPU(0x2d, idle_cpu_snb),
720acead1b0SJan Kiszka 	ICPU(0x36, idle_cpu_atom),
721718987d6SLen Brown 	ICPU(0x37, idle_cpu_byt),
7226edab08cSLen Brown 	ICPU(0x3a, idle_cpu_ivb),
7230138d8f0SLen Brown 	ICPU(0x3e, idle_cpu_ivt),
72485a4d2d4SLen Brown 	ICPU(0x3c, idle_cpu_hsw),
72585a4d2d4SLen Brown 	ICPU(0x3f, idle_cpu_hsw),
72685a4d2d4SLen Brown 	ICPU(0x45, idle_cpu_hsw),
7270b15841bSLen Brown 	ICPU(0x46, idle_cpu_hsw),
728a138b568SLen Brown 	ICPU(0x4d, idle_cpu_avn),
729a138b568SLen Brown 	ICPU(0x3d, idle_cpu_bdw),
730bea57077SLen Brown 	ICPU(0x47, idle_cpu_bdw),
731a138b568SLen Brown 	ICPU(0x4f, idle_cpu_bdw),
732a138b568SLen Brown 	ICPU(0x56, idle_cpu_bdw),
733b66b8b9aSAndi Kleen 	{}
734b66b8b9aSAndi Kleen };
735b66b8b9aSAndi Kleen MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
736b66b8b9aSAndi Kleen 
73726717172SLen Brown /*
73826717172SLen Brown  * intel_idle_probe()
73926717172SLen Brown  */
74000f3e755SBartlomiej Zolnierkiewicz static int __init intel_idle_probe(void)
74126717172SLen Brown {
742c4236282SLen Brown 	unsigned int eax, ebx, ecx;
743b66b8b9aSAndi Kleen 	const struct x86_cpu_id *id;
74426717172SLen Brown 
74526717172SLen Brown 	if (max_cstate == 0) {
74626717172SLen Brown 		pr_debug(PREFIX "disabled\n");
74726717172SLen Brown 		return -EPERM;
74826717172SLen Brown 	}
74926717172SLen Brown 
750b66b8b9aSAndi Kleen 	id = x86_match_cpu(intel_idle_ids);
751b66b8b9aSAndi Kleen 	if (!id) {
752b66b8b9aSAndi Kleen 		if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
753b66b8b9aSAndi Kleen 		    boot_cpu_data.x86 == 6)
754b66b8b9aSAndi Kleen 			pr_debug(PREFIX "does not run on family %d model %d\n",
755b66b8b9aSAndi Kleen 				boot_cpu_data.x86, boot_cpu_data.x86_model);
75626717172SLen Brown 		return -ENODEV;
757b66b8b9aSAndi Kleen 	}
75826717172SLen Brown 
75926717172SLen Brown 	if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
76026717172SLen Brown 		return -ENODEV;
76126717172SLen Brown 
762c4236282SLen Brown 	cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
76326717172SLen Brown 
76426717172SLen Brown 	if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
7655c2a9f06SThomas Renninger 	    !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
7665c2a9f06SThomas Renninger 	    !mwait_substates)
76726717172SLen Brown 			return -ENODEV;
76826717172SLen Brown 
769c4236282SLen Brown 	pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
77026717172SLen Brown 
771b66b8b9aSAndi Kleen 	icpu = (const struct idle_cpu *)id->driver_data;
772b66b8b9aSAndi Kleen 	cpuidle_state_table = icpu->state_table;
77326717172SLen Brown 
77456b9aea3SLen Brown 	if (boot_cpu_has(X86_FEATURE_ARAT))	/* Always Reliable APIC Timer */
7752a2d31c8SShaohua Li 		lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
77625ac7761SDaniel Lezcano 	else
77739a74fdeSShaohua Li 		on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
77825ac7761SDaniel Lezcano 
77926717172SLen Brown 	pr_debug(PREFIX "v" INTEL_IDLE_VERSION
78026717172SLen Brown 		" model 0x%X\n", boot_cpu_data.x86_model);
78126717172SLen Brown 
78226717172SLen Brown 	pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
78326717172SLen Brown 		lapic_timer_reliable_states);
78426717172SLen Brown 	return 0;
78526717172SLen Brown }
78626717172SLen Brown 
78726717172SLen Brown /*
78826717172SLen Brown  * intel_idle_cpuidle_devices_uninit()
78926717172SLen Brown  * unregister, free cpuidle_devices
79026717172SLen Brown  */
79126717172SLen Brown static void intel_idle_cpuidle_devices_uninit(void)
79226717172SLen Brown {
79326717172SLen Brown 	int i;
79426717172SLen Brown 	struct cpuidle_device *dev;
79526717172SLen Brown 
79626717172SLen Brown 	for_each_online_cpu(i) {
79726717172SLen Brown 		dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
79826717172SLen Brown 		cpuidle_unregister_device(dev);
79926717172SLen Brown 	}
80026717172SLen Brown 
80126717172SLen Brown 	free_percpu(intel_idle_cpuidle_devices);
80226717172SLen Brown 	return;
80326717172SLen Brown }
8040138d8f0SLen Brown 
8050138d8f0SLen Brown /*
8060138d8f0SLen Brown  * intel_idle_state_table_update()
8070138d8f0SLen Brown  *
8080138d8f0SLen Brown  * Update the default state_table for this CPU-id
8090138d8f0SLen Brown  *
8100138d8f0SLen Brown  * Currently used to access tuned IVT multi-socket targets
8110138d8f0SLen Brown  * Assumption: num_sockets == (max_package_num + 1)
8120138d8f0SLen Brown  */
8130138d8f0SLen Brown void intel_idle_state_table_update(void)
8140138d8f0SLen Brown {
8150138d8f0SLen Brown 	/* IVT uses a different table for 1-2, 3-4, and > 4 sockets */
8160138d8f0SLen Brown 	if (boot_cpu_data.x86_model == 0x3e) { /* IVT */
8170138d8f0SLen Brown 		int cpu, package_num, num_sockets = 1;
8180138d8f0SLen Brown 
8190138d8f0SLen Brown 		for_each_online_cpu(cpu) {
8200138d8f0SLen Brown 			package_num = topology_physical_package_id(cpu);
8210138d8f0SLen Brown 			if (package_num + 1 > num_sockets) {
8220138d8f0SLen Brown 				num_sockets = package_num + 1;
8230138d8f0SLen Brown 
824d27dca42SChristoph Jaeger 				if (num_sockets > 4) {
8250138d8f0SLen Brown 					cpuidle_state_table = ivt_cstates_8s;
8260138d8f0SLen Brown 					return;
8270138d8f0SLen Brown 				}
8280138d8f0SLen Brown 			}
829d27dca42SChristoph Jaeger 		}
8300138d8f0SLen Brown 
8310138d8f0SLen Brown 		if (num_sockets > 2)
8320138d8f0SLen Brown 			cpuidle_state_table = ivt_cstates_4s;
8330138d8f0SLen Brown 		/* else, 1 and 2 socket systems use default ivt_cstates */
8340138d8f0SLen Brown 	}
8350138d8f0SLen Brown 	return;
8360138d8f0SLen Brown }
8370138d8f0SLen Brown 
83826717172SLen Brown /*
83946bcfad7SDeepthi Dharwar  * intel_idle_cpuidle_driver_init()
84046bcfad7SDeepthi Dharwar  * allocate, initialize cpuidle_states
84146bcfad7SDeepthi Dharwar  */
84200f3e755SBartlomiej Zolnierkiewicz static int __init intel_idle_cpuidle_driver_init(void)
84346bcfad7SDeepthi Dharwar {
84446bcfad7SDeepthi Dharwar 	int cstate;
84546bcfad7SDeepthi Dharwar 	struct cpuidle_driver *drv = &intel_idle_driver;
84646bcfad7SDeepthi Dharwar 
8470138d8f0SLen Brown 	intel_idle_state_table_update();
8480138d8f0SLen Brown 
84946bcfad7SDeepthi Dharwar 	drv->state_count = 1;
85046bcfad7SDeepthi Dharwar 
851e022e7ebSLen Brown 	for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) {
85224bfa950SLen Brown 		int num_substates, mwait_hint, mwait_cstate;
85346bcfad7SDeepthi Dharwar 
854e022e7ebSLen Brown 		if (cpuidle_state_table[cstate].enter == NULL)
855e022e7ebSLen Brown 			break;
856e022e7ebSLen Brown 
857e022e7ebSLen Brown 		if (cstate + 1 > max_cstate) {
85846bcfad7SDeepthi Dharwar 			printk(PREFIX "max_cstate %d reached\n",
85946bcfad7SDeepthi Dharwar 				max_cstate);
86046bcfad7SDeepthi Dharwar 			break;
86146bcfad7SDeepthi Dharwar 		}
86246bcfad7SDeepthi Dharwar 
863e022e7ebSLen Brown 		mwait_hint = flg2MWAIT(cpuidle_state_table[cstate].flags);
864e022e7ebSLen Brown 		mwait_cstate = MWAIT_HINT2CSTATE(mwait_hint);
86546bcfad7SDeepthi Dharwar 
86624bfa950SLen Brown 		/* number of sub-states for this state in CPUID.MWAIT */
867e022e7ebSLen Brown 		num_substates = (mwait_substates >> ((mwait_cstate + 1) * 4))
868e022e7ebSLen Brown 					& MWAIT_SUBSTATE_MASK;
869e022e7ebSLen Brown 
87024bfa950SLen Brown 		/* if NO sub-states for this state in CPUID, skip it */
87124bfa950SLen Brown 		if (num_substates == 0)
872e022e7ebSLen Brown 			continue;
873e022e7ebSLen Brown 
874e022e7ebSLen Brown 		if (((mwait_cstate + 1) > 2) &&
87546bcfad7SDeepthi Dharwar 			!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
87646bcfad7SDeepthi Dharwar 			mark_tsc_unstable("TSC halts in idle"
87746bcfad7SDeepthi Dharwar 					" states deeper than C2");
87846bcfad7SDeepthi Dharwar 
87946bcfad7SDeepthi Dharwar 		drv->states[drv->state_count] =	/* structure copy */
88046bcfad7SDeepthi Dharwar 			cpuidle_state_table[cstate];
88146bcfad7SDeepthi Dharwar 
88246bcfad7SDeepthi Dharwar 		drv->state_count += 1;
88346bcfad7SDeepthi Dharwar 	}
88446bcfad7SDeepthi Dharwar 
885b66b8b9aSAndi Kleen 	if (icpu->auto_demotion_disable_flags)
88639a74fdeSShaohua Li 		on_each_cpu(auto_demotion_disable, NULL, 1);
88746bcfad7SDeepthi Dharwar 
8888c058d53SLen Brown 	if (icpu->byt_auto_demotion_disable_flag) {
8898c058d53SLen Brown 		wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
8908c058d53SLen Brown 		wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
8918c058d53SLen Brown 	}
8928c058d53SLen Brown 
89332e95180SLen Brown 	if (icpu->disable_promotion_to_c1e)	/* each-cpu is redundant */
89432e95180SLen Brown 		on_each_cpu(c1e_promotion_disable, NULL, 1);
89532e95180SLen Brown 
89646bcfad7SDeepthi Dharwar 	return 0;
89746bcfad7SDeepthi Dharwar }
89846bcfad7SDeepthi Dharwar 
89946bcfad7SDeepthi Dharwar 
90046bcfad7SDeepthi Dharwar /*
90165b7f839SThomas Renninger  * intel_idle_cpu_init()
90226717172SLen Brown  * allocate, initialize, register cpuidle_devices
90365b7f839SThomas Renninger  * @cpu: cpu/core to initialize
90426717172SLen Brown  */
90525ac7761SDaniel Lezcano static int intel_idle_cpu_init(int cpu)
90626717172SLen Brown {
90726717172SLen Brown 	struct cpuidle_device *dev;
90826717172SLen Brown 
90965b7f839SThomas Renninger 	dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
91026717172SLen Brown 
91165b7f839SThomas Renninger 	dev->cpu = cpu;
91226717172SLen Brown 
91326717172SLen Brown 	if (cpuidle_register_device(dev)) {
91465b7f839SThomas Renninger 		pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
91526717172SLen Brown 		intel_idle_cpuidle_devices_uninit();
91626717172SLen Brown 		return -EIO;
91726717172SLen Brown 	}
91865b7f839SThomas Renninger 
919b66b8b9aSAndi Kleen 	if (icpu->auto_demotion_disable_flags)
92065b7f839SThomas Renninger 		smp_call_function_single(cpu, auto_demotion_disable, NULL, 1);
92126717172SLen Brown 
922dbf87ab8SBartlomiej Zolnierkiewicz 	if (icpu->disable_promotion_to_c1e)
923dbf87ab8SBartlomiej Zolnierkiewicz 		smp_call_function_single(cpu, c1e_promotion_disable, NULL, 1);
924dbf87ab8SBartlomiej Zolnierkiewicz 
92526717172SLen Brown 	return 0;
92626717172SLen Brown }
92726717172SLen Brown 
92826717172SLen Brown static int __init intel_idle_init(void)
92926717172SLen Brown {
93065b7f839SThomas Renninger 	int retval, i;
93126717172SLen Brown 
932d1896049SThomas Renninger 	/* Do not load intel_idle at all for now if idle= is passed */
933d1896049SThomas Renninger 	if (boot_option_idle_override != IDLE_NO_OVERRIDE)
934d1896049SThomas Renninger 		return -ENODEV;
935d1896049SThomas Renninger 
93626717172SLen Brown 	retval = intel_idle_probe();
93726717172SLen Brown 	if (retval)
93826717172SLen Brown 		return retval;
93926717172SLen Brown 
94046bcfad7SDeepthi Dharwar 	intel_idle_cpuidle_driver_init();
94126717172SLen Brown 	retval = cpuidle_register_driver(&intel_idle_driver);
94226717172SLen Brown 	if (retval) {
9433735d524SKonrad Rzeszutek Wilk 		struct cpuidle_driver *drv = cpuidle_get_driver();
94426717172SLen Brown 		printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
9453735d524SKonrad Rzeszutek Wilk 			drv ? drv->name : "none");
94626717172SLen Brown 		return retval;
94726717172SLen Brown 	}
94826717172SLen Brown 
94965b7f839SThomas Renninger 	intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
95065b7f839SThomas Renninger 	if (intel_idle_cpuidle_devices == NULL)
95165b7f839SThomas Renninger 		return -ENOMEM;
95265b7f839SThomas Renninger 
95307494d54SSrivatsa S. Bhat 	cpu_notifier_register_begin();
95407494d54SSrivatsa S. Bhat 
95565b7f839SThomas Renninger 	for_each_online_cpu(i) {
95665b7f839SThomas Renninger 		retval = intel_idle_cpu_init(i);
95726717172SLen Brown 		if (retval) {
95807494d54SSrivatsa S. Bhat 			cpu_notifier_register_done();
95926717172SLen Brown 			cpuidle_unregister_driver(&intel_idle_driver);
96026717172SLen Brown 			return retval;
96126717172SLen Brown 		}
96265b7f839SThomas Renninger 	}
96307494d54SSrivatsa S. Bhat 	__register_cpu_notifier(&cpu_hotplug_notifier);
96407494d54SSrivatsa S. Bhat 
96507494d54SSrivatsa S. Bhat 	cpu_notifier_register_done();
96626717172SLen Brown 
96726717172SLen Brown 	return 0;
96826717172SLen Brown }
96926717172SLen Brown 
97026717172SLen Brown static void __exit intel_idle_exit(void)
97126717172SLen Brown {
97226717172SLen Brown 	intel_idle_cpuidle_devices_uninit();
97326717172SLen Brown 	cpuidle_unregister_driver(&intel_idle_driver);
97426717172SLen Brown 
97507494d54SSrivatsa S. Bhat 	cpu_notifier_register_begin();
97625ac7761SDaniel Lezcano 
97725ac7761SDaniel Lezcano 	if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
97839a74fdeSShaohua Li 		on_each_cpu(__setup_broadcast_timer, (void *)false, 1);
97907494d54SSrivatsa S. Bhat 	__unregister_cpu_notifier(&cpu_hotplug_notifier);
98007494d54SSrivatsa S. Bhat 
98107494d54SSrivatsa S. Bhat 	cpu_notifier_register_done();
9822a2d31c8SShaohua Li 
98326717172SLen Brown 	return;
98426717172SLen Brown }
98526717172SLen Brown 
98626717172SLen Brown module_init(intel_idle_init);
98726717172SLen Brown module_exit(intel_idle_exit);
98826717172SLen Brown 
98926717172SLen Brown module_param(max_cstate, int, 0444);
99026717172SLen Brown 
99126717172SLen Brown MODULE_AUTHOR("Len Brown <len.brown@intel.com>");
99226717172SLen Brown MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION);
99326717172SLen Brown MODULE_LICENSE("GPL");
994