126717172SLen Brown /* 226717172SLen Brown * intel_idle.c - native hardware idle loop for modern Intel processors 326717172SLen Brown * 426717172SLen Brown * Copyright (c) 2010, Intel Corporation. 526717172SLen Brown * Len Brown <len.brown@intel.com> 626717172SLen Brown * 726717172SLen Brown * This program is free software; you can redistribute it and/or modify it 826717172SLen Brown * under the terms and conditions of the GNU General Public License, 926717172SLen Brown * version 2, as published by the Free Software Foundation. 1026717172SLen Brown * 1126717172SLen Brown * This program is distributed in the hope it will be useful, but WITHOUT 1226717172SLen Brown * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1326717172SLen Brown * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1426717172SLen Brown * more details. 1526717172SLen Brown * 1626717172SLen Brown * You should have received a copy of the GNU General Public License along with 1726717172SLen Brown * this program; if not, write to the Free Software Foundation, Inc., 1826717172SLen Brown * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 1926717172SLen Brown */ 2026717172SLen Brown 2126717172SLen Brown /* 2226717172SLen Brown * intel_idle is a cpuidle driver that loads on specific Intel processors 2326717172SLen Brown * in lieu of the legacy ACPI processor_idle driver. The intent is to 2426717172SLen Brown * make Linux more efficient on these processors, as intel_idle knows 2526717172SLen Brown * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs. 2626717172SLen Brown */ 2726717172SLen Brown 2826717172SLen Brown /* 2926717172SLen Brown * Design Assumptions 3026717172SLen Brown * 3126717172SLen Brown * All CPUs have same idle states as boot CPU 3226717172SLen Brown * 3326717172SLen Brown * Chipset BM_STS (bus master status) bit is a NOP 3426717172SLen Brown * for preventing entry into deep C-stats 3526717172SLen Brown */ 3626717172SLen Brown 3726717172SLen Brown /* 3826717172SLen Brown * Known limitations 3926717172SLen Brown * 4026717172SLen Brown * The driver currently initializes for_each_online_cpu() upon modprobe. 4126717172SLen Brown * It it unaware of subsequent processors hot-added to the system. 4226717172SLen Brown * This means that if you boot with maxcpus=n and later online 4326717172SLen Brown * processors above n, those processors will use C1 only. 4426717172SLen Brown * 4526717172SLen Brown * ACPI has a .suspend hack to turn off deep c-statees during suspend 4626717172SLen Brown * to avoid complications with the lapic timer workaround. 4726717172SLen Brown * Have not seen issues with suspend, but may need same workaround here. 4826717172SLen Brown * 4926717172SLen Brown * There is currently no kernel-based automatic probing/loading mechanism 5026717172SLen Brown * if the driver is built as a module. 5126717172SLen Brown */ 5226717172SLen Brown 5326717172SLen Brown /* un-comment DEBUG to enable pr_debug() statements */ 5426717172SLen Brown #define DEBUG 5526717172SLen Brown 5626717172SLen Brown #include <linux/kernel.h> 5726717172SLen Brown #include <linux/cpuidle.h> 5826717172SLen Brown #include <linux/clockchips.h> 5926717172SLen Brown #include <linux/hrtimer.h> /* ktime_get_real() */ 6026717172SLen Brown #include <trace/events/power.h> 6126717172SLen Brown #include <linux/sched.h> 622a2d31c8SShaohua Li #include <linux/notifier.h> 632a2d31c8SShaohua Li #include <linux/cpu.h> 647c52d551SPaul Gortmaker #include <linux/module.h> 65bc83ccccSH. Peter Anvin #include <asm/mwait.h> 6614796fcaSLen Brown #include <asm/msr.h> 6726717172SLen Brown 6826717172SLen Brown #define INTEL_IDLE_VERSION "0.4" 6926717172SLen Brown #define PREFIX "intel_idle: " 7026717172SLen Brown 7126717172SLen Brown static struct cpuidle_driver intel_idle_driver = { 7226717172SLen Brown .name = "intel_idle", 7326717172SLen Brown .owner = THIS_MODULE, 7426717172SLen Brown }; 7526717172SLen Brown /* intel_idle.max_cstate=0 disables driver */ 7626717172SLen Brown static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1; 7726717172SLen Brown 78c4236282SLen Brown static unsigned int mwait_substates; 7926717172SLen Brown 802a2d31c8SShaohua Li #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF 8126717172SLen Brown /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ 82d13780d4SLen Brown static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */ 8326717172SLen Brown 843265eba0SNamhyung Kim static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; 8546bcfad7SDeepthi Dharwar static int intel_idle(struct cpuidle_device *dev, 8646bcfad7SDeepthi Dharwar struct cpuidle_driver *drv, int index); 8726717172SLen Brown 8826717172SLen Brown static struct cpuidle_state *cpuidle_state_table; 8926717172SLen Brown 9026717172SLen Brown /* 9114796fcaSLen Brown * Hardware C-state auto-demotion may not always be optimal. 9214796fcaSLen Brown * Indicate which enable bits to clear here. 9314796fcaSLen Brown */ 9414796fcaSLen Brown static unsigned long long auto_demotion_disable_flags; 9514796fcaSLen Brown 9614796fcaSLen Brown /* 97956d033fSLen Brown * Set this flag for states where the HW flushes the TLB for us 98956d033fSLen Brown * and so we don't need cross-calls to keep it consistent. 99956d033fSLen Brown * If this flag is set, SW flushes the TLB, so even if the 100956d033fSLen Brown * HW doesn't do the flushing, this flag is safe to use. 101956d033fSLen Brown */ 102956d033fSLen Brown #define CPUIDLE_FLAG_TLB_FLUSHED 0x10000 103956d033fSLen Brown 104956d033fSLen Brown /* 10526717172SLen Brown * States are indexed by the cstate number, 10626717172SLen Brown * which is also the index into the MWAIT hint array. 10726717172SLen Brown * Thus C0 is a dummy. 10826717172SLen Brown */ 10926717172SLen Brown static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { 11026717172SLen Brown { /* MWAIT C0 */ }, 11126717172SLen Brown { /* MWAIT C1 */ 11215e123e5SThomas Renninger .name = "C1-NHM", 11326717172SLen Brown .desc = "MWAIT 0x00", 11426717172SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 11526717172SLen Brown .exit_latency = 3, 11626717172SLen Brown .target_residency = 6, 11726717172SLen Brown .enter = &intel_idle }, 11826717172SLen Brown { /* MWAIT C2 */ 11915e123e5SThomas Renninger .name = "C3-NHM", 12026717172SLen Brown .desc = "MWAIT 0x10", 1216110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 12226717172SLen Brown .exit_latency = 20, 12326717172SLen Brown .target_residency = 80, 12426717172SLen Brown .enter = &intel_idle }, 12526717172SLen Brown { /* MWAIT C3 */ 12615e123e5SThomas Renninger .name = "C6-NHM", 12726717172SLen Brown .desc = "MWAIT 0x20", 1286110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 12926717172SLen Brown .exit_latency = 200, 13026717172SLen Brown .target_residency = 800, 13126717172SLen Brown .enter = &intel_idle }, 13226717172SLen Brown }; 13326717172SLen Brown 134d13780d4SLen Brown static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { 135d13780d4SLen Brown { /* MWAIT C0 */ }, 136d13780d4SLen Brown { /* MWAIT C1 */ 13715e123e5SThomas Renninger .name = "C1-SNB", 138d13780d4SLen Brown .desc = "MWAIT 0x00", 139d13780d4SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 140d13780d4SLen Brown .exit_latency = 1, 141ddbd550dSLen Brown .target_residency = 1, 142d13780d4SLen Brown .enter = &intel_idle }, 143d13780d4SLen Brown { /* MWAIT C2 */ 14415e123e5SThomas Renninger .name = "C3-SNB", 145d13780d4SLen Brown .desc = "MWAIT 0x10", 14600527cc6SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 147d13780d4SLen Brown .exit_latency = 80, 148ddbd550dSLen Brown .target_residency = 211, 149d13780d4SLen Brown .enter = &intel_idle }, 150d13780d4SLen Brown { /* MWAIT C3 */ 15115e123e5SThomas Renninger .name = "C6-SNB", 152d13780d4SLen Brown .desc = "MWAIT 0x20", 15300527cc6SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 154d13780d4SLen Brown .exit_latency = 104, 155ddbd550dSLen Brown .target_residency = 345, 156d13780d4SLen Brown .enter = &intel_idle }, 157d13780d4SLen Brown { /* MWAIT C4 */ 15815e123e5SThomas Renninger .name = "C7-SNB", 159d13780d4SLen Brown .desc = "MWAIT 0x30", 16000527cc6SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 161d13780d4SLen Brown .exit_latency = 109, 162ddbd550dSLen Brown .target_residency = 345, 163d13780d4SLen Brown .enter = &intel_idle }, 164d13780d4SLen Brown }; 165d13780d4SLen Brown 16626717172SLen Brown static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { 16726717172SLen Brown { /* MWAIT C0 */ }, 16826717172SLen Brown { /* MWAIT C1 */ 16915e123e5SThomas Renninger .name = "C1-ATM", 17026717172SLen Brown .desc = "MWAIT 0x00", 17126717172SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 17226717172SLen Brown .exit_latency = 1, 17326717172SLen Brown .target_residency = 4, 17426717172SLen Brown .enter = &intel_idle }, 17526717172SLen Brown { /* MWAIT C2 */ 17615e123e5SThomas Renninger .name = "C2-ATM", 17726717172SLen Brown .desc = "MWAIT 0x10", 17826717172SLen Brown .flags = CPUIDLE_FLAG_TIME_VALID, 17926717172SLen Brown .exit_latency = 20, 18026717172SLen Brown .target_residency = 80, 18126717172SLen Brown .enter = &intel_idle }, 18226717172SLen Brown { /* MWAIT C3 */ }, 18326717172SLen Brown { /* MWAIT C4 */ 18415e123e5SThomas Renninger .name = "C4-ATM", 18526717172SLen Brown .desc = "MWAIT 0x30", 1866110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 18726717172SLen Brown .exit_latency = 100, 18826717172SLen Brown .target_residency = 400, 18926717172SLen Brown .enter = &intel_idle }, 19026717172SLen Brown { /* MWAIT C5 */ }, 19126717172SLen Brown { /* MWAIT C6 */ 19215e123e5SThomas Renninger .name = "C6-ATM", 1937fcca7d9SLen Brown .desc = "MWAIT 0x52", 1946110a1f4SSuresh Siddha .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 1957fcca7d9SLen Brown .exit_latency = 140, 1967fcca7d9SLen Brown .target_residency = 560, 1977fcca7d9SLen Brown .enter = &intel_idle }, 19826717172SLen Brown }; 19926717172SLen Brown 20095e3ec11SDavid Howells static long get_driver_data(int cstate) 2014202735eSDeepthi Dharwar { 2024202735eSDeepthi Dharwar int driver_data; 2034202735eSDeepthi Dharwar switch (cstate) { 2044202735eSDeepthi Dharwar 2054202735eSDeepthi Dharwar case 1: /* MWAIT C1 */ 2064202735eSDeepthi Dharwar driver_data = 0x00; 2074202735eSDeepthi Dharwar break; 2084202735eSDeepthi Dharwar case 2: /* MWAIT C2 */ 2094202735eSDeepthi Dharwar driver_data = 0x10; 2104202735eSDeepthi Dharwar break; 2114202735eSDeepthi Dharwar case 3: /* MWAIT C3 */ 2124202735eSDeepthi Dharwar driver_data = 0x20; 2134202735eSDeepthi Dharwar break; 2144202735eSDeepthi Dharwar case 4: /* MWAIT C4 */ 2154202735eSDeepthi Dharwar driver_data = 0x30; 2164202735eSDeepthi Dharwar break; 2174202735eSDeepthi Dharwar case 5: /* MWAIT C5 */ 2184202735eSDeepthi Dharwar driver_data = 0x40; 2194202735eSDeepthi Dharwar break; 2204202735eSDeepthi Dharwar case 6: /* MWAIT C6 */ 2214202735eSDeepthi Dharwar driver_data = 0x52; 2224202735eSDeepthi Dharwar break; 2234202735eSDeepthi Dharwar default: 2244202735eSDeepthi Dharwar driver_data = 0x00; 2254202735eSDeepthi Dharwar } 2264202735eSDeepthi Dharwar return driver_data; 2274202735eSDeepthi Dharwar } 2284202735eSDeepthi Dharwar 22926717172SLen Brown /** 23026717172SLen Brown * intel_idle 23126717172SLen Brown * @dev: cpuidle_device 23246bcfad7SDeepthi Dharwar * @drv: cpuidle driver 233e978aa7dSDeepthi Dharwar * @index: index of cpuidle state 23426717172SLen Brown * 23563ff07beSYanmin Zhang * Must be called under local_irq_disable(). 23626717172SLen Brown */ 23746bcfad7SDeepthi Dharwar static int intel_idle(struct cpuidle_device *dev, 23846bcfad7SDeepthi Dharwar struct cpuidle_driver *drv, int index) 23926717172SLen Brown { 24026717172SLen Brown unsigned long ecx = 1; /* break on interrupt flag */ 24146bcfad7SDeepthi Dharwar struct cpuidle_state *state = &drv->states[index]; 2424202735eSDeepthi Dharwar struct cpuidle_state_usage *state_usage = &dev->states_usage[index]; 2434202735eSDeepthi Dharwar unsigned long eax = (unsigned long)cpuidle_get_statedata(state_usage); 24426717172SLen Brown unsigned int cstate; 24526717172SLen Brown ktime_t kt_before, kt_after; 24626717172SLen Brown s64 usec_delta; 24726717172SLen Brown int cpu = smp_processor_id(); 24826717172SLen Brown 24926717172SLen Brown cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1; 25026717172SLen Brown 2516110a1f4SSuresh Siddha /* 252c8381cc3SLen Brown * leave_mm() to avoid costly and often unnecessary wakeups 253c8381cc3SLen Brown * for flushing the user TLB's associated with the active mm. 2546110a1f4SSuresh Siddha */ 255c8381cc3SLen Brown if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED) 2566110a1f4SSuresh Siddha leave_mm(cpu); 2576110a1f4SSuresh Siddha 25826717172SLen Brown if (!(lapic_timer_reliable_states & (1 << (cstate)))) 25926717172SLen Brown clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); 26026717172SLen Brown 26126717172SLen Brown kt_before = ktime_get_real(); 26226717172SLen Brown 26326717172SLen Brown stop_critical_timings(); 26426717172SLen Brown if (!need_resched()) { 26526717172SLen Brown 26626717172SLen Brown __monitor((void *)¤t_thread_info()->flags, 0, 0); 26726717172SLen Brown smp_mb(); 26826717172SLen Brown if (!need_resched()) 26926717172SLen Brown __mwait(eax, ecx); 27026717172SLen Brown } 27126717172SLen Brown 27226717172SLen Brown start_critical_timings(); 27326717172SLen Brown 27426717172SLen Brown kt_after = ktime_get_real(); 27526717172SLen Brown usec_delta = ktime_to_us(ktime_sub(kt_after, kt_before)); 27626717172SLen Brown 27726717172SLen Brown local_irq_enable(); 27826717172SLen Brown 27926717172SLen Brown if (!(lapic_timer_reliable_states & (1 << (cstate)))) 28026717172SLen Brown clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu); 28126717172SLen Brown 282e978aa7dSDeepthi Dharwar /* Update cpuidle counters */ 283e978aa7dSDeepthi Dharwar dev->last_residency = (int)usec_delta; 284e978aa7dSDeepthi Dharwar 285e978aa7dSDeepthi Dharwar return index; 28626717172SLen Brown } 28726717172SLen Brown 2882a2d31c8SShaohua Li static void __setup_broadcast_timer(void *arg) 2892a2d31c8SShaohua Li { 2902a2d31c8SShaohua Li unsigned long reason = (unsigned long)arg; 2912a2d31c8SShaohua Li int cpu = smp_processor_id(); 2922a2d31c8SShaohua Li 2932a2d31c8SShaohua Li reason = reason ? 2942a2d31c8SShaohua Li CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; 2952a2d31c8SShaohua Li 2962a2d31c8SShaohua Li clockevents_notify(reason, &cpu); 2972a2d31c8SShaohua Li } 2982a2d31c8SShaohua Li 299ec30f343SShaohua Li static int setup_broadcast_cpuhp_notify(struct notifier_block *n, 3002a2d31c8SShaohua Li unsigned long action, void *hcpu) 3012a2d31c8SShaohua Li { 3022a2d31c8SShaohua Li int hotcpu = (unsigned long)hcpu; 3032a2d31c8SShaohua Li 3042a2d31c8SShaohua Li switch (action & 0xf) { 3052a2d31c8SShaohua Li case CPU_ONLINE: 3062a2d31c8SShaohua Li smp_call_function_single(hotcpu, __setup_broadcast_timer, 3072a2d31c8SShaohua Li (void *)true, 1); 3082a2d31c8SShaohua Li break; 3092a2d31c8SShaohua Li } 3102a2d31c8SShaohua Li return NOTIFY_OK; 3112a2d31c8SShaohua Li } 3122a2d31c8SShaohua Li 313ec30f343SShaohua Li static struct notifier_block setup_broadcast_notifier = { 3142a2d31c8SShaohua Li .notifier_call = setup_broadcast_cpuhp_notify, 3152a2d31c8SShaohua Li }; 3162a2d31c8SShaohua Li 31714796fcaSLen Brown static void auto_demotion_disable(void *dummy) 31814796fcaSLen Brown { 31914796fcaSLen Brown unsigned long long msr_bits; 32014796fcaSLen Brown 32114796fcaSLen Brown rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); 32214796fcaSLen Brown msr_bits &= ~auto_demotion_disable_flags; 32314796fcaSLen Brown wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); 32414796fcaSLen Brown } 32514796fcaSLen Brown 32626717172SLen Brown /* 32726717172SLen Brown * intel_idle_probe() 32826717172SLen Brown */ 32926717172SLen Brown static int intel_idle_probe(void) 33026717172SLen Brown { 331c4236282SLen Brown unsigned int eax, ebx, ecx; 33226717172SLen Brown 33326717172SLen Brown if (max_cstate == 0) { 33426717172SLen Brown pr_debug(PREFIX "disabled\n"); 33526717172SLen Brown return -EPERM; 33626717172SLen Brown } 33726717172SLen Brown 33826717172SLen Brown if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 33926717172SLen Brown return -ENODEV; 34026717172SLen Brown 34126717172SLen Brown if (!boot_cpu_has(X86_FEATURE_MWAIT)) 34226717172SLen Brown return -ENODEV; 34326717172SLen Brown 34426717172SLen Brown if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) 34526717172SLen Brown return -ENODEV; 34626717172SLen Brown 347c4236282SLen Brown cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates); 34826717172SLen Brown 34926717172SLen Brown if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) || 35026717172SLen Brown !(ecx & CPUID5_ECX_INTERRUPT_BREAK)) 35126717172SLen Brown return -ENODEV; 35226717172SLen Brown 353c4236282SLen Brown pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates); 35426717172SLen Brown 35526717172SLen Brown 35626717172SLen Brown if (boot_cpu_data.x86 != 6) /* family 6 */ 35726717172SLen Brown return -ENODEV; 35826717172SLen Brown 35926717172SLen Brown switch (boot_cpu_data.x86_model) { 36026717172SLen Brown 36126717172SLen Brown case 0x1A: /* Core i7, Xeon 5500 series */ 36226717172SLen Brown case 0x1E: /* Core i7 and i5 Processor - Lynnfield Jasper Forest */ 36326717172SLen Brown case 0x1F: /* Core i7 and i5 Processor - Nehalem */ 36426717172SLen Brown case 0x2E: /* Nehalem-EX Xeon */ 365ec67a2baSLen Brown case 0x2F: /* Westmere-EX Xeon */ 36626717172SLen Brown case 0x25: /* Westmere */ 36726717172SLen Brown case 0x2C: /* Westmere */ 36826717172SLen Brown cpuidle_state_table = nehalem_cstates; 36914796fcaSLen Brown auto_demotion_disable_flags = 37014796fcaSLen Brown (NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE); 37126717172SLen Brown break; 37226717172SLen Brown 37326717172SLen Brown case 0x1C: /* 28 - Atom Processor */ 374bfb53ccfSLen Brown cpuidle_state_table = atom_cstates; 375bfb53ccfSLen Brown break; 376bfb53ccfSLen Brown 3774725fd3cSArjan van de Ven case 0x26: /* 38 - Lincroft Atom Processor */ 37826717172SLen Brown cpuidle_state_table = atom_cstates; 379bfb53ccfSLen Brown auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE; 38026717172SLen Brown break; 381d13780d4SLen Brown 382d13780d4SLen Brown case 0x2A: /* SNB */ 383d13780d4SLen Brown case 0x2D: /* SNB Xeon */ 384d13780d4SLen Brown cpuidle_state_table = snb_cstates; 385d13780d4SLen Brown break; 38626717172SLen Brown 38726717172SLen Brown default: 38826717172SLen Brown pr_debug(PREFIX "does not run on family %d model %d\n", 38926717172SLen Brown boot_cpu_data.x86, boot_cpu_data.x86_model); 39026717172SLen Brown return -ENODEV; 39126717172SLen Brown } 39226717172SLen Brown 39356b9aea3SLen Brown if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */ 3942a2d31c8SShaohua Li lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE; 3952a2d31c8SShaohua Li else { 39639a74fdeSShaohua Li on_each_cpu(__setup_broadcast_timer, (void *)true, 1); 3972a2d31c8SShaohua Li register_cpu_notifier(&setup_broadcast_notifier); 3982a2d31c8SShaohua Li } 39956b9aea3SLen Brown 40026717172SLen Brown pr_debug(PREFIX "v" INTEL_IDLE_VERSION 40126717172SLen Brown " model 0x%X\n", boot_cpu_data.x86_model); 40226717172SLen Brown 40326717172SLen Brown pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n", 40426717172SLen Brown lapic_timer_reliable_states); 40526717172SLen Brown return 0; 40626717172SLen Brown } 40726717172SLen Brown 40826717172SLen Brown /* 40926717172SLen Brown * intel_idle_cpuidle_devices_uninit() 41026717172SLen Brown * unregister, free cpuidle_devices 41126717172SLen Brown */ 41226717172SLen Brown static void intel_idle_cpuidle_devices_uninit(void) 41326717172SLen Brown { 41426717172SLen Brown int i; 41526717172SLen Brown struct cpuidle_device *dev; 41626717172SLen Brown 41726717172SLen Brown for_each_online_cpu(i) { 41826717172SLen Brown dev = per_cpu_ptr(intel_idle_cpuidle_devices, i); 41926717172SLen Brown cpuidle_unregister_device(dev); 42026717172SLen Brown } 42126717172SLen Brown 42226717172SLen Brown free_percpu(intel_idle_cpuidle_devices); 42326717172SLen Brown return; 42426717172SLen Brown } 42526717172SLen Brown /* 42646bcfad7SDeepthi Dharwar * intel_idle_cpuidle_driver_init() 42746bcfad7SDeepthi Dharwar * allocate, initialize cpuidle_states 42846bcfad7SDeepthi Dharwar */ 42946bcfad7SDeepthi Dharwar static int intel_idle_cpuidle_driver_init(void) 43046bcfad7SDeepthi Dharwar { 43146bcfad7SDeepthi Dharwar int cstate; 43246bcfad7SDeepthi Dharwar struct cpuidle_driver *drv = &intel_idle_driver; 43346bcfad7SDeepthi Dharwar 43446bcfad7SDeepthi Dharwar drv->state_count = 1; 43546bcfad7SDeepthi Dharwar 43646bcfad7SDeepthi Dharwar for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) { 43746bcfad7SDeepthi Dharwar int num_substates; 43846bcfad7SDeepthi Dharwar 43946bcfad7SDeepthi Dharwar if (cstate > max_cstate) { 44046bcfad7SDeepthi Dharwar printk(PREFIX "max_cstate %d reached\n", 44146bcfad7SDeepthi Dharwar max_cstate); 44246bcfad7SDeepthi Dharwar break; 44346bcfad7SDeepthi Dharwar } 44446bcfad7SDeepthi Dharwar 44546bcfad7SDeepthi Dharwar /* does the state exist in CPUID.MWAIT? */ 44646bcfad7SDeepthi Dharwar num_substates = (mwait_substates >> ((cstate) * 4)) 44746bcfad7SDeepthi Dharwar & MWAIT_SUBSTATE_MASK; 44846bcfad7SDeepthi Dharwar if (num_substates == 0) 44946bcfad7SDeepthi Dharwar continue; 45046bcfad7SDeepthi Dharwar /* is the state not enabled? */ 45146bcfad7SDeepthi Dharwar if (cpuidle_state_table[cstate].enter == NULL) { 45246bcfad7SDeepthi Dharwar /* does the driver not know about the state? */ 45346bcfad7SDeepthi Dharwar if (*cpuidle_state_table[cstate].name == '\0') 45446bcfad7SDeepthi Dharwar pr_debug(PREFIX "unaware of model 0x%x" 45546bcfad7SDeepthi Dharwar " MWAIT %d please" 45646bcfad7SDeepthi Dharwar " contact lenb@kernel.org", 45746bcfad7SDeepthi Dharwar boot_cpu_data.x86_model, cstate); 45846bcfad7SDeepthi Dharwar continue; 45946bcfad7SDeepthi Dharwar } 46046bcfad7SDeepthi Dharwar 46146bcfad7SDeepthi Dharwar if ((cstate > 2) && 46246bcfad7SDeepthi Dharwar !boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 46346bcfad7SDeepthi Dharwar mark_tsc_unstable("TSC halts in idle" 46446bcfad7SDeepthi Dharwar " states deeper than C2"); 46546bcfad7SDeepthi Dharwar 46646bcfad7SDeepthi Dharwar drv->states[drv->state_count] = /* structure copy */ 46746bcfad7SDeepthi Dharwar cpuidle_state_table[cstate]; 46846bcfad7SDeepthi Dharwar 46946bcfad7SDeepthi Dharwar drv->state_count += 1; 47046bcfad7SDeepthi Dharwar } 47146bcfad7SDeepthi Dharwar 47246bcfad7SDeepthi Dharwar if (auto_demotion_disable_flags) 47339a74fdeSShaohua Li on_each_cpu(auto_demotion_disable, NULL, 1); 47446bcfad7SDeepthi Dharwar 47546bcfad7SDeepthi Dharwar return 0; 47646bcfad7SDeepthi Dharwar } 47746bcfad7SDeepthi Dharwar 47846bcfad7SDeepthi Dharwar 47946bcfad7SDeepthi Dharwar /* 48026717172SLen Brown * intel_idle_cpuidle_devices_init() 48126717172SLen Brown * allocate, initialize, register cpuidle_devices 48226717172SLen Brown */ 48326717172SLen Brown static int intel_idle_cpuidle_devices_init(void) 48426717172SLen Brown { 48526717172SLen Brown int i, cstate; 48626717172SLen Brown struct cpuidle_device *dev; 48726717172SLen Brown 48826717172SLen Brown intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device); 48926717172SLen Brown if (intel_idle_cpuidle_devices == NULL) 49026717172SLen Brown return -ENOMEM; 49126717172SLen Brown 49226717172SLen Brown for_each_online_cpu(i) { 49326717172SLen Brown dev = per_cpu_ptr(intel_idle_cpuidle_devices, i); 49426717172SLen Brown 49526717172SLen Brown dev->state_count = 1; 49626717172SLen Brown 49726717172SLen Brown for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) { 49826717172SLen Brown int num_substates; 49926717172SLen Brown 50026717172SLen Brown if (cstate > max_cstate) { 50126717172SLen Brown printk(PREFIX "max_cstate %d reached\n", 50226717172SLen Brown max_cstate); 50326717172SLen Brown break; 50426717172SLen Brown } 50526717172SLen Brown 50626717172SLen Brown /* does the state exist in CPUID.MWAIT? */ 507c4236282SLen Brown num_substates = (mwait_substates >> ((cstate) * 4)) 50826717172SLen Brown & MWAIT_SUBSTATE_MASK; 50926717172SLen Brown if (num_substates == 0) 51026717172SLen Brown continue; 51126717172SLen Brown /* is the state not enabled? */ 51226717172SLen Brown if (cpuidle_state_table[cstate].enter == NULL) { 51326717172SLen Brown continue; 51426717172SLen Brown } 51526717172SLen Brown 5164202735eSDeepthi Dharwar dev->states_usage[dev->state_count].driver_data = 5174202735eSDeepthi Dharwar (void *)get_driver_data(cstate); 51826717172SLen Brown 51926717172SLen Brown dev->state_count += 1; 52026717172SLen Brown } 52126717172SLen Brown 52226717172SLen Brown dev->cpu = i; 52326717172SLen Brown if (cpuidle_register_device(dev)) { 52426717172SLen Brown pr_debug(PREFIX "cpuidle_register_device %d failed!\n", 52526717172SLen Brown i); 52626717172SLen Brown intel_idle_cpuidle_devices_uninit(); 52726717172SLen Brown return -EIO; 52826717172SLen Brown } 52926717172SLen Brown } 53026717172SLen Brown 53126717172SLen Brown return 0; 53226717172SLen Brown } 53326717172SLen Brown 53426717172SLen Brown 53526717172SLen Brown static int __init intel_idle_init(void) 53626717172SLen Brown { 53726717172SLen Brown int retval; 53826717172SLen Brown 539d1896049SThomas Renninger /* Do not load intel_idle at all for now if idle= is passed */ 540d1896049SThomas Renninger if (boot_option_idle_override != IDLE_NO_OVERRIDE) 541d1896049SThomas Renninger return -ENODEV; 542d1896049SThomas Renninger 54326717172SLen Brown retval = intel_idle_probe(); 54426717172SLen Brown if (retval) 54526717172SLen Brown return retval; 54626717172SLen Brown 54746bcfad7SDeepthi Dharwar intel_idle_cpuidle_driver_init(); 54826717172SLen Brown retval = cpuidle_register_driver(&intel_idle_driver); 54926717172SLen Brown if (retval) { 55026717172SLen Brown printk(KERN_DEBUG PREFIX "intel_idle yielding to %s", 55126717172SLen Brown cpuidle_get_driver()->name); 55226717172SLen Brown return retval; 55326717172SLen Brown } 55426717172SLen Brown 55526717172SLen Brown retval = intel_idle_cpuidle_devices_init(); 55626717172SLen Brown if (retval) { 55726717172SLen Brown cpuidle_unregister_driver(&intel_idle_driver); 55826717172SLen Brown return retval; 55926717172SLen Brown } 56026717172SLen Brown 56126717172SLen Brown return 0; 56226717172SLen Brown } 56326717172SLen Brown 56426717172SLen Brown static void __exit intel_idle_exit(void) 56526717172SLen Brown { 56626717172SLen Brown intel_idle_cpuidle_devices_uninit(); 56726717172SLen Brown cpuidle_unregister_driver(&intel_idle_driver); 56826717172SLen Brown 5692a2d31c8SShaohua Li if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) { 57039a74fdeSShaohua Li on_each_cpu(__setup_broadcast_timer, (void *)false, 1); 5712a2d31c8SShaohua Li unregister_cpu_notifier(&setup_broadcast_notifier); 5722a2d31c8SShaohua Li } 5732a2d31c8SShaohua Li 57426717172SLen Brown return; 57526717172SLen Brown } 57626717172SLen Brown 57726717172SLen Brown module_init(intel_idle_init); 57826717172SLen Brown module_exit(intel_idle_exit); 57926717172SLen Brown 58026717172SLen Brown module_param(max_cstate, int, 0444); 58126717172SLen Brown 58226717172SLen Brown MODULE_AUTHOR("Len Brown <len.brown@intel.com>"); 58326717172SLen Brown MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION); 58426717172SLen Brown MODULE_LICENSE("GPL"); 585