126717172SLen Brown /* 226717172SLen Brown * intel_idle.c - native hardware idle loop for modern Intel processors 326717172SLen Brown * 426717172SLen Brown * Copyright (c) 2010, Intel Corporation. 526717172SLen Brown * Len Brown <len.brown@intel.com> 626717172SLen Brown * 726717172SLen Brown * This program is free software; you can redistribute it and/or modify it 826717172SLen Brown * under the terms and conditions of the GNU General Public License, 926717172SLen Brown * version 2, as published by the Free Software Foundation. 1026717172SLen Brown * 1126717172SLen Brown * This program is distributed in the hope it will be useful, but WITHOUT 1226717172SLen Brown * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1326717172SLen Brown * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1426717172SLen Brown * more details. 1526717172SLen Brown * 1626717172SLen Brown * You should have received a copy of the GNU General Public License along with 1726717172SLen Brown * this program; if not, write to the Free Software Foundation, Inc., 1826717172SLen Brown * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 1926717172SLen Brown */ 2026717172SLen Brown 2126717172SLen Brown /* 2226717172SLen Brown * intel_idle is a cpuidle driver that loads on specific Intel processors 2326717172SLen Brown * in lieu of the legacy ACPI processor_idle driver. The intent is to 2426717172SLen Brown * make Linux more efficient on these processors, as intel_idle knows 2526717172SLen Brown * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs. 2626717172SLen Brown */ 2726717172SLen Brown 2826717172SLen Brown /* 2926717172SLen Brown * Design Assumptions 3026717172SLen Brown * 3126717172SLen Brown * All CPUs have same idle states as boot CPU 3226717172SLen Brown * 3326717172SLen Brown * Chipset BM_STS (bus master status) bit is a NOP 3426717172SLen Brown * for preventing entry into deep C-stats 3526717172SLen Brown */ 3626717172SLen Brown 3726717172SLen Brown /* 3826717172SLen Brown * Known limitations 3926717172SLen Brown * 4026717172SLen Brown * The driver currently initializes for_each_online_cpu() upon modprobe. 4126717172SLen Brown * It it unaware of subsequent processors hot-added to the system. 4226717172SLen Brown * This means that if you boot with maxcpus=n and later online 4326717172SLen Brown * processors above n, those processors will use C1 only. 4426717172SLen Brown * 4526717172SLen Brown * ACPI has a .suspend hack to turn off deep c-statees during suspend 4626717172SLen Brown * to avoid complications with the lapic timer workaround. 4726717172SLen Brown * Have not seen issues with suspend, but may need same workaround here. 4826717172SLen Brown * 4926717172SLen Brown * There is currently no kernel-based automatic probing/loading mechanism 5026717172SLen Brown * if the driver is built as a module. 5126717172SLen Brown */ 5226717172SLen Brown 5326717172SLen Brown /* un-comment DEBUG to enable pr_debug() statements */ 5426717172SLen Brown #define DEBUG 5526717172SLen Brown 5626717172SLen Brown #include <linux/kernel.h> 5726717172SLen Brown #include <linux/cpuidle.h> 5826717172SLen Brown #include <linux/clockchips.h> 5926717172SLen Brown #include <trace/events/power.h> 6026717172SLen Brown #include <linux/sched.h> 612a2d31c8SShaohua Li #include <linux/notifier.h> 622a2d31c8SShaohua Li #include <linux/cpu.h> 637c52d551SPaul Gortmaker #include <linux/module.h> 64b66b8b9aSAndi Kleen #include <asm/cpu_device_id.h> 65bc83ccccSH. Peter Anvin #include <asm/mwait.h> 6614796fcaSLen Brown #include <asm/msr.h> 6726717172SLen Brown 6826717172SLen Brown #define INTEL_IDLE_VERSION "0.4" 6926717172SLen Brown #define PREFIX "intel_idle: " 7026717172SLen Brown 7126717172SLen Brown static struct cpuidle_driver intel_idle_driver = { 7226717172SLen Brown .name = "intel_idle", 7326717172SLen Brown .owner = THIS_MODULE, 74a474a515SJulius Werner .en_core_tk_irqen = 1, 7526717172SLen Brown }; 7626717172SLen Brown /* intel_idle.max_cstate=0 disables driver */ 7726717172SLen Brown static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1; 7826717172SLen Brown 79c4236282SLen Brown static unsigned int mwait_substates; 8026717172SLen Brown 812a2d31c8SShaohua Li #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF 8226717172SLen Brown /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ 83d13780d4SLen Brown static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */ 8426717172SLen Brown 85b66b8b9aSAndi Kleen struct idle_cpu { 86b66b8b9aSAndi Kleen struct cpuidle_state *state_table; 8726717172SLen Brown 8826717172SLen Brown /* 8914796fcaSLen Brown * Hardware C-state auto-demotion may not always be optimal. 9014796fcaSLen Brown * Indicate which enable bits to clear here. 9114796fcaSLen Brown */ 92b66b8b9aSAndi Kleen unsigned long auto_demotion_disable_flags; 93b66b8b9aSAndi Kleen }; 94b66b8b9aSAndi Kleen 95b66b8b9aSAndi Kleen static const struct idle_cpu *icpu; 96b66b8b9aSAndi Kleen static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; 97b66b8b9aSAndi Kleen static int intel_idle(struct cpuidle_device *dev, 98b66b8b9aSAndi Kleen struct cpuidle_driver *drv, int index); 9925ac7761SDaniel Lezcano static int intel_idle_cpu_init(int cpu); 100b66b8b9aSAndi Kleen 101b66b8b9aSAndi Kleen static struct cpuidle_state *cpuidle_state_table; 10214796fcaSLen Brown 10314796fcaSLen Brown /* 104956d033fSLen Brown * Set this flag for states where the HW flushes the TLB for us 105956d033fSLen Brown * and so we don't need cross-calls to keep it consistent. 106956d033fSLen Brown * If this flag is set, SW flushes the TLB, so even if the 107956d033fSLen Brown * HW doesn't do the flushing, this flag is safe to use. 108956d033fSLen Brown */ 109956d033fSLen Brown #define CPUIDLE_FLAG_TLB_FLUSHED 0x10000 110956d033fSLen Brown 111956d033fSLen Brown /* 112b1beab48SLen Brown * MWAIT takes an 8-bit "hint" in EAX "suggesting" 113b1beab48SLen Brown * the C-state (top nibble) and sub-state (bottom nibble) 114b1beab48SLen Brown * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc. 115b1beab48SLen Brown * 116b1beab48SLen Brown * We store the hint at the top of our "flags" for each state. 117b1beab48SLen Brown */ 118b1beab48SLen Brown #define flg2MWAIT(flags) (((flags) >> 24) & 0xFF) 119b1beab48SLen Brown #define MWAIT2flg(eax) ((eax & 0xFF) << 24) 120b1beab48SLen Brown 121b1beab48SLen Brown /* 12226717172SLen Brown * States are indexed by the cstate number, 12326717172SLen Brown * which is also the index into the MWAIT hint array. 12426717172SLen Brown * Thus C0 is a dummy. 12526717172SLen Brown */ 12626717172SLen Brown static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { 12726717172SLen Brown { /* MWAIT C0 */ }, 12826717172SLen Brown { /* MWAIT C1 */ 12915e123e5SThomas Renninger .name = "C1-NHM", 13026717172SLen Brown .desc = "MWAIT 0x00", 131b1beab48SLen Brown .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, 13226717172SLen Brown .exit_latency = 3, 13326717172SLen Brown .target_residency = 6, 13426717172SLen Brown .enter = &intel_idle }, 13526717172SLen Brown { /* MWAIT C2 */ 13615e123e5SThomas Renninger .name = "C3-NHM", 13726717172SLen Brown .desc = "MWAIT 0x10", 138b1beab48SLen Brown .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 13926717172SLen Brown .exit_latency = 20, 14026717172SLen Brown .target_residency = 80, 14126717172SLen Brown .enter = &intel_idle }, 14226717172SLen Brown { /* MWAIT C3 */ 14315e123e5SThomas Renninger .name = "C6-NHM", 14426717172SLen Brown .desc = "MWAIT 0x20", 145b1beab48SLen Brown .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 14626717172SLen Brown .exit_latency = 200, 14726717172SLen Brown .target_residency = 800, 14826717172SLen Brown .enter = &intel_idle }, 14926717172SLen Brown }; 15026717172SLen Brown 151d13780d4SLen Brown static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { 152d13780d4SLen Brown { /* MWAIT C0 */ }, 153d13780d4SLen Brown { /* MWAIT C1 */ 15415e123e5SThomas Renninger .name = "C1-SNB", 155d13780d4SLen Brown .desc = "MWAIT 0x00", 156b1beab48SLen Brown .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, 157d13780d4SLen Brown .exit_latency = 1, 158ddbd550dSLen Brown .target_residency = 1, 159d13780d4SLen Brown .enter = &intel_idle }, 160d13780d4SLen Brown { /* MWAIT C2 */ 16115e123e5SThomas Renninger .name = "C3-SNB", 162d13780d4SLen Brown .desc = "MWAIT 0x10", 163b1beab48SLen Brown .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 164d13780d4SLen Brown .exit_latency = 80, 165ddbd550dSLen Brown .target_residency = 211, 166d13780d4SLen Brown .enter = &intel_idle }, 167d13780d4SLen Brown { /* MWAIT C3 */ 16815e123e5SThomas Renninger .name = "C6-SNB", 169d13780d4SLen Brown .desc = "MWAIT 0x20", 170b1beab48SLen Brown .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 171d13780d4SLen Brown .exit_latency = 104, 172ddbd550dSLen Brown .target_residency = 345, 173d13780d4SLen Brown .enter = &intel_idle }, 174d13780d4SLen Brown { /* MWAIT C4 */ 17515e123e5SThomas Renninger .name = "C7-SNB", 176d13780d4SLen Brown .desc = "MWAIT 0x30", 177b1beab48SLen Brown .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 178d13780d4SLen Brown .exit_latency = 109, 179ddbd550dSLen Brown .target_residency = 345, 180d13780d4SLen Brown .enter = &intel_idle }, 181d13780d4SLen Brown }; 182d13780d4SLen Brown 1836edab08cSLen Brown static struct cpuidle_state ivb_cstates[MWAIT_MAX_NUM_CSTATES] = { 1846edab08cSLen Brown { /* MWAIT C0 */ }, 1856edab08cSLen Brown { /* MWAIT C1 */ 1866edab08cSLen Brown .name = "C1-IVB", 1876edab08cSLen Brown .desc = "MWAIT 0x00", 188b1beab48SLen Brown .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, 1896edab08cSLen Brown .exit_latency = 1, 1906edab08cSLen Brown .target_residency = 1, 1916edab08cSLen Brown .enter = &intel_idle }, 1926edab08cSLen Brown { /* MWAIT C2 */ 1936edab08cSLen Brown .name = "C3-IVB", 1946edab08cSLen Brown .desc = "MWAIT 0x10", 195b1beab48SLen Brown .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 1966edab08cSLen Brown .exit_latency = 59, 1976edab08cSLen Brown .target_residency = 156, 1986edab08cSLen Brown .enter = &intel_idle }, 1996edab08cSLen Brown { /* MWAIT C3 */ 2006edab08cSLen Brown .name = "C6-IVB", 2016edab08cSLen Brown .desc = "MWAIT 0x20", 202b1beab48SLen Brown .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 2036edab08cSLen Brown .exit_latency = 80, 2046edab08cSLen Brown .target_residency = 300, 2056edab08cSLen Brown .enter = &intel_idle }, 2066edab08cSLen Brown { /* MWAIT C4 */ 2076edab08cSLen Brown .name = "C7-IVB", 2086edab08cSLen Brown .desc = "MWAIT 0x30", 209b1beab48SLen Brown .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 2106edab08cSLen Brown .exit_latency = 87, 2116edab08cSLen Brown .target_residency = 300, 2126edab08cSLen Brown .enter = &intel_idle }, 2136edab08cSLen Brown }; 2146edab08cSLen Brown 21585a4d2d4SLen Brown static struct cpuidle_state hsw_cstates[MWAIT_MAX_NUM_CSTATES] = { 21685a4d2d4SLen Brown { /* MWAIT C0 */ }, 21785a4d2d4SLen Brown { /* MWAIT C1 */ 21885a4d2d4SLen Brown .name = "C1-HSW", 21985a4d2d4SLen Brown .desc = "MWAIT 0x00", 22085a4d2d4SLen Brown .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, 22185a4d2d4SLen Brown .exit_latency = 2, 22285a4d2d4SLen Brown .target_residency = 2, 22385a4d2d4SLen Brown .enter = &intel_idle }, 22485a4d2d4SLen Brown { /* MWAIT C2 */ 22585a4d2d4SLen Brown .name = "C3-HSW", 22685a4d2d4SLen Brown .desc = "MWAIT 0x10", 22785a4d2d4SLen Brown .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 22885a4d2d4SLen Brown .exit_latency = 33, 22985a4d2d4SLen Brown .target_residency = 100, 23085a4d2d4SLen Brown .enter = &intel_idle }, 23185a4d2d4SLen Brown { /* MWAIT C3 */ 23285a4d2d4SLen Brown .name = "C6-HSW", 23385a4d2d4SLen Brown .desc = "MWAIT 0x20", 23485a4d2d4SLen Brown .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 23585a4d2d4SLen Brown .exit_latency = 133, 23685a4d2d4SLen Brown .target_residency = 400, 23785a4d2d4SLen Brown .enter = &intel_idle }, 23885a4d2d4SLen Brown { /* MWAIT C4 */ 23985a4d2d4SLen Brown .name = "C7s-HSW", 24085a4d2d4SLen Brown .desc = "MWAIT 0x32", 24185a4d2d4SLen Brown .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 24285a4d2d4SLen Brown .exit_latency = 166, 24385a4d2d4SLen Brown .target_residency = 500, 24485a4d2d4SLen Brown .enter = &intel_idle }, 24585a4d2d4SLen Brown }; 24685a4d2d4SLen Brown 24726717172SLen Brown static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { 24826717172SLen Brown { /* MWAIT C0 */ }, 24926717172SLen Brown { /* MWAIT C1 */ 25015e123e5SThomas Renninger .name = "C1-ATM", 25126717172SLen Brown .desc = "MWAIT 0x00", 252b1beab48SLen Brown .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, 25326717172SLen Brown .exit_latency = 1, 25426717172SLen Brown .target_residency = 4, 25526717172SLen Brown .enter = &intel_idle }, 25626717172SLen Brown { /* MWAIT C2 */ 25715e123e5SThomas Renninger .name = "C2-ATM", 25826717172SLen Brown .desc = "MWAIT 0x10", 259b1beab48SLen Brown .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID, 26026717172SLen Brown .exit_latency = 20, 26126717172SLen Brown .target_residency = 80, 26226717172SLen Brown .enter = &intel_idle }, 26326717172SLen Brown { /* MWAIT C3 */ }, 26426717172SLen Brown { /* MWAIT C4 */ 26515e123e5SThomas Renninger .name = "C4-ATM", 26626717172SLen Brown .desc = "MWAIT 0x30", 267b1beab48SLen Brown .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 26826717172SLen Brown .exit_latency = 100, 26926717172SLen Brown .target_residency = 400, 27026717172SLen Brown .enter = &intel_idle }, 27126717172SLen Brown { /* MWAIT C5 */ }, 27226717172SLen Brown { /* MWAIT C6 */ 27315e123e5SThomas Renninger .name = "C6-ATM", 2747fcca7d9SLen Brown .desc = "MWAIT 0x52", 275b1beab48SLen Brown .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, 2767fcca7d9SLen Brown .exit_latency = 140, 2777fcca7d9SLen Brown .target_residency = 560, 2787fcca7d9SLen Brown .enter = &intel_idle }, 27926717172SLen Brown }; 28026717172SLen Brown 28126717172SLen Brown /** 28226717172SLen Brown * intel_idle 28326717172SLen Brown * @dev: cpuidle_device 28446bcfad7SDeepthi Dharwar * @drv: cpuidle driver 285e978aa7dSDeepthi Dharwar * @index: index of cpuidle state 28626717172SLen Brown * 28763ff07beSYanmin Zhang * Must be called under local_irq_disable(). 28826717172SLen Brown */ 28946bcfad7SDeepthi Dharwar static int intel_idle(struct cpuidle_device *dev, 29046bcfad7SDeepthi Dharwar struct cpuidle_driver *drv, int index) 29126717172SLen Brown { 29226717172SLen Brown unsigned long ecx = 1; /* break on interrupt flag */ 29346bcfad7SDeepthi Dharwar struct cpuidle_state *state = &drv->states[index]; 294b1beab48SLen Brown unsigned long eax = flg2MWAIT(state->flags); 29526717172SLen Brown unsigned int cstate; 29626717172SLen Brown int cpu = smp_processor_id(); 29726717172SLen Brown 29826717172SLen Brown cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1; 29926717172SLen Brown 3006110a1f4SSuresh Siddha /* 301c8381cc3SLen Brown * leave_mm() to avoid costly and often unnecessary wakeups 302c8381cc3SLen Brown * for flushing the user TLB's associated with the active mm. 3036110a1f4SSuresh Siddha */ 304c8381cc3SLen Brown if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED) 3056110a1f4SSuresh Siddha leave_mm(cpu); 3066110a1f4SSuresh Siddha 30726717172SLen Brown if (!(lapic_timer_reliable_states & (1 << (cstate)))) 30826717172SLen Brown clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); 30926717172SLen Brown 31026717172SLen Brown stop_critical_timings(); 31126717172SLen Brown if (!need_resched()) { 31226717172SLen Brown 31326717172SLen Brown __monitor((void *)¤t_thread_info()->flags, 0, 0); 31426717172SLen Brown smp_mb(); 31526717172SLen Brown if (!need_resched()) 31626717172SLen Brown __mwait(eax, ecx); 31726717172SLen Brown } 31826717172SLen Brown 31926717172SLen Brown start_critical_timings(); 32026717172SLen Brown 32126717172SLen Brown if (!(lapic_timer_reliable_states & (1 << (cstate)))) 32226717172SLen Brown clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu); 32326717172SLen Brown 324e978aa7dSDeepthi Dharwar return index; 32526717172SLen Brown } 32626717172SLen Brown 3272a2d31c8SShaohua Li static void __setup_broadcast_timer(void *arg) 3282a2d31c8SShaohua Li { 3292a2d31c8SShaohua Li unsigned long reason = (unsigned long)arg; 3302a2d31c8SShaohua Li int cpu = smp_processor_id(); 3312a2d31c8SShaohua Li 3322a2d31c8SShaohua Li reason = reason ? 3332a2d31c8SShaohua Li CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; 3342a2d31c8SShaohua Li 3352a2d31c8SShaohua Li clockevents_notify(reason, &cpu); 3362a2d31c8SShaohua Li } 3372a2d31c8SShaohua Li 33825ac7761SDaniel Lezcano static int cpu_hotplug_notify(struct notifier_block *n, 3392a2d31c8SShaohua Li unsigned long action, void *hcpu) 3402a2d31c8SShaohua Li { 3412a2d31c8SShaohua Li int hotcpu = (unsigned long)hcpu; 34225ac7761SDaniel Lezcano struct cpuidle_device *dev; 3432a2d31c8SShaohua Li 3442a2d31c8SShaohua Li switch (action & 0xf) { 3452a2d31c8SShaohua Li case CPU_ONLINE: 34625ac7761SDaniel Lezcano 34725ac7761SDaniel Lezcano if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) 3482a2d31c8SShaohua Li smp_call_function_single(hotcpu, __setup_broadcast_timer, 3492a2d31c8SShaohua Li (void *)true, 1); 35025ac7761SDaniel Lezcano 35125ac7761SDaniel Lezcano /* 35225ac7761SDaniel Lezcano * Some systems can hotplug a cpu at runtime after 35325ac7761SDaniel Lezcano * the kernel has booted, we have to initialize the 35425ac7761SDaniel Lezcano * driver in this case 35525ac7761SDaniel Lezcano */ 35625ac7761SDaniel Lezcano dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu); 35725ac7761SDaniel Lezcano if (!dev->registered) 35825ac7761SDaniel Lezcano intel_idle_cpu_init(hotcpu); 35925ac7761SDaniel Lezcano 3602a2d31c8SShaohua Li break; 3612a2d31c8SShaohua Li } 3622a2d31c8SShaohua Li return NOTIFY_OK; 3632a2d31c8SShaohua Li } 3642a2d31c8SShaohua Li 36525ac7761SDaniel Lezcano static struct notifier_block cpu_hotplug_notifier = { 36625ac7761SDaniel Lezcano .notifier_call = cpu_hotplug_notify, 3672a2d31c8SShaohua Li }; 3682a2d31c8SShaohua Li 36914796fcaSLen Brown static void auto_demotion_disable(void *dummy) 37014796fcaSLen Brown { 37114796fcaSLen Brown unsigned long long msr_bits; 37214796fcaSLen Brown 37314796fcaSLen Brown rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); 374b66b8b9aSAndi Kleen msr_bits &= ~(icpu->auto_demotion_disable_flags); 37514796fcaSLen Brown wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); 37614796fcaSLen Brown } 37714796fcaSLen Brown 378b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_nehalem = { 379b66b8b9aSAndi Kleen .state_table = nehalem_cstates, 380b66b8b9aSAndi Kleen .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE, 381b66b8b9aSAndi Kleen }; 382b66b8b9aSAndi Kleen 383b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_atom = { 384b66b8b9aSAndi Kleen .state_table = atom_cstates, 385b66b8b9aSAndi Kleen }; 386b66b8b9aSAndi Kleen 387b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_lincroft = { 388b66b8b9aSAndi Kleen .state_table = atom_cstates, 389b66b8b9aSAndi Kleen .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE, 390b66b8b9aSAndi Kleen }; 391b66b8b9aSAndi Kleen 392b66b8b9aSAndi Kleen static const struct idle_cpu idle_cpu_snb = { 393b66b8b9aSAndi Kleen .state_table = snb_cstates, 394b66b8b9aSAndi Kleen }; 395b66b8b9aSAndi Kleen 3966edab08cSLen Brown static const struct idle_cpu idle_cpu_ivb = { 3976edab08cSLen Brown .state_table = ivb_cstates, 3986edab08cSLen Brown }; 3996edab08cSLen Brown 40085a4d2d4SLen Brown static const struct idle_cpu idle_cpu_hsw = { 40185a4d2d4SLen Brown .state_table = hsw_cstates, 40285a4d2d4SLen Brown }; 40385a4d2d4SLen Brown 404b66b8b9aSAndi Kleen #define ICPU(model, cpu) \ 405b66b8b9aSAndi Kleen { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } 406b66b8b9aSAndi Kleen 407b66b8b9aSAndi Kleen static const struct x86_cpu_id intel_idle_ids[] = { 408b66b8b9aSAndi Kleen ICPU(0x1a, idle_cpu_nehalem), 409b66b8b9aSAndi Kleen ICPU(0x1e, idle_cpu_nehalem), 410b66b8b9aSAndi Kleen ICPU(0x1f, idle_cpu_nehalem), 4118bf11938SBen Hutchings ICPU(0x25, idle_cpu_nehalem), 4128bf11938SBen Hutchings ICPU(0x2c, idle_cpu_nehalem), 4138bf11938SBen Hutchings ICPU(0x2e, idle_cpu_nehalem), 414b66b8b9aSAndi Kleen ICPU(0x1c, idle_cpu_atom), 415b66b8b9aSAndi Kleen ICPU(0x26, idle_cpu_lincroft), 4168bf11938SBen Hutchings ICPU(0x2f, idle_cpu_nehalem), 417b66b8b9aSAndi Kleen ICPU(0x2a, idle_cpu_snb), 418b66b8b9aSAndi Kleen ICPU(0x2d, idle_cpu_snb), 4196edab08cSLen Brown ICPU(0x3a, idle_cpu_ivb), 42023795e58SLen Brown ICPU(0x3e, idle_cpu_ivb), 42185a4d2d4SLen Brown ICPU(0x3c, idle_cpu_hsw), 42285a4d2d4SLen Brown ICPU(0x3f, idle_cpu_hsw), 42385a4d2d4SLen Brown ICPU(0x45, idle_cpu_hsw), 424b66b8b9aSAndi Kleen {} 425b66b8b9aSAndi Kleen }; 426b66b8b9aSAndi Kleen MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); 427b66b8b9aSAndi Kleen 42826717172SLen Brown /* 42926717172SLen Brown * intel_idle_probe() 43026717172SLen Brown */ 43126717172SLen Brown static int intel_idle_probe(void) 43226717172SLen Brown { 433c4236282SLen Brown unsigned int eax, ebx, ecx; 434b66b8b9aSAndi Kleen const struct x86_cpu_id *id; 43526717172SLen Brown 43626717172SLen Brown if (max_cstate == 0) { 43726717172SLen Brown pr_debug(PREFIX "disabled\n"); 43826717172SLen Brown return -EPERM; 43926717172SLen Brown } 44026717172SLen Brown 441b66b8b9aSAndi Kleen id = x86_match_cpu(intel_idle_ids); 442b66b8b9aSAndi Kleen if (!id) { 443b66b8b9aSAndi Kleen if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && 444b66b8b9aSAndi Kleen boot_cpu_data.x86 == 6) 445b66b8b9aSAndi Kleen pr_debug(PREFIX "does not run on family %d model %d\n", 446b66b8b9aSAndi Kleen boot_cpu_data.x86, boot_cpu_data.x86_model); 44726717172SLen Brown return -ENODEV; 448b66b8b9aSAndi Kleen } 44926717172SLen Brown 45026717172SLen Brown if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) 45126717172SLen Brown return -ENODEV; 45226717172SLen Brown 453c4236282SLen Brown cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates); 45426717172SLen Brown 45526717172SLen Brown if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) || 4565c2a9f06SThomas Renninger !(ecx & CPUID5_ECX_INTERRUPT_BREAK) || 4575c2a9f06SThomas Renninger !mwait_substates) 45826717172SLen Brown return -ENODEV; 45926717172SLen Brown 460c4236282SLen Brown pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates); 46126717172SLen Brown 462b66b8b9aSAndi Kleen icpu = (const struct idle_cpu *)id->driver_data; 463b66b8b9aSAndi Kleen cpuidle_state_table = icpu->state_table; 46426717172SLen Brown 46556b9aea3SLen Brown if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */ 4662a2d31c8SShaohua Li lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE; 46725ac7761SDaniel Lezcano else 46839a74fdeSShaohua Li on_each_cpu(__setup_broadcast_timer, (void *)true, 1); 46925ac7761SDaniel Lezcano 47026717172SLen Brown pr_debug(PREFIX "v" INTEL_IDLE_VERSION 47126717172SLen Brown " model 0x%X\n", boot_cpu_data.x86_model); 47226717172SLen Brown 47326717172SLen Brown pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n", 47426717172SLen Brown lapic_timer_reliable_states); 47526717172SLen Brown return 0; 47626717172SLen Brown } 47726717172SLen Brown 47826717172SLen Brown /* 47926717172SLen Brown * intel_idle_cpuidle_devices_uninit() 48026717172SLen Brown * unregister, free cpuidle_devices 48126717172SLen Brown */ 48226717172SLen Brown static void intel_idle_cpuidle_devices_uninit(void) 48326717172SLen Brown { 48426717172SLen Brown int i; 48526717172SLen Brown struct cpuidle_device *dev; 48626717172SLen Brown 48726717172SLen Brown for_each_online_cpu(i) { 48826717172SLen Brown dev = per_cpu_ptr(intel_idle_cpuidle_devices, i); 48926717172SLen Brown cpuidle_unregister_device(dev); 49026717172SLen Brown } 49126717172SLen Brown 49226717172SLen Brown free_percpu(intel_idle_cpuidle_devices); 49326717172SLen Brown return; 49426717172SLen Brown } 49526717172SLen Brown /* 49646bcfad7SDeepthi Dharwar * intel_idle_cpuidle_driver_init() 49746bcfad7SDeepthi Dharwar * allocate, initialize cpuidle_states 49846bcfad7SDeepthi Dharwar */ 49946bcfad7SDeepthi Dharwar static int intel_idle_cpuidle_driver_init(void) 50046bcfad7SDeepthi Dharwar { 50146bcfad7SDeepthi Dharwar int cstate; 50246bcfad7SDeepthi Dharwar struct cpuidle_driver *drv = &intel_idle_driver; 50346bcfad7SDeepthi Dharwar 50446bcfad7SDeepthi Dharwar drv->state_count = 1; 50546bcfad7SDeepthi Dharwar 50646bcfad7SDeepthi Dharwar for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) { 50746bcfad7SDeepthi Dharwar int num_substates; 50846bcfad7SDeepthi Dharwar 50946bcfad7SDeepthi Dharwar if (cstate > max_cstate) { 51046bcfad7SDeepthi Dharwar printk(PREFIX "max_cstate %d reached\n", 51146bcfad7SDeepthi Dharwar max_cstate); 51246bcfad7SDeepthi Dharwar break; 51346bcfad7SDeepthi Dharwar } 51446bcfad7SDeepthi Dharwar 51546bcfad7SDeepthi Dharwar /* does the state exist in CPUID.MWAIT? */ 51646bcfad7SDeepthi Dharwar num_substates = (mwait_substates >> ((cstate) * 4)) 51746bcfad7SDeepthi Dharwar & MWAIT_SUBSTATE_MASK; 51846bcfad7SDeepthi Dharwar if (num_substates == 0) 51946bcfad7SDeepthi Dharwar continue; 52046bcfad7SDeepthi Dharwar /* is the state not enabled? */ 52146bcfad7SDeepthi Dharwar if (cpuidle_state_table[cstate].enter == NULL) { 52246bcfad7SDeepthi Dharwar /* does the driver not know about the state? */ 52346bcfad7SDeepthi Dharwar if (*cpuidle_state_table[cstate].name == '\0') 52446bcfad7SDeepthi Dharwar pr_debug(PREFIX "unaware of model 0x%x" 52546bcfad7SDeepthi Dharwar " MWAIT %d please" 52617915d58SYouquan Song " contact lenb@kernel.org\n", 52746bcfad7SDeepthi Dharwar boot_cpu_data.x86_model, cstate); 52846bcfad7SDeepthi Dharwar continue; 52946bcfad7SDeepthi Dharwar } 53046bcfad7SDeepthi Dharwar 53146bcfad7SDeepthi Dharwar if ((cstate > 2) && 53246bcfad7SDeepthi Dharwar !boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 53346bcfad7SDeepthi Dharwar mark_tsc_unstable("TSC halts in idle" 53446bcfad7SDeepthi Dharwar " states deeper than C2"); 53546bcfad7SDeepthi Dharwar 53646bcfad7SDeepthi Dharwar drv->states[drv->state_count] = /* structure copy */ 53746bcfad7SDeepthi Dharwar cpuidle_state_table[cstate]; 53846bcfad7SDeepthi Dharwar 53946bcfad7SDeepthi Dharwar drv->state_count += 1; 54046bcfad7SDeepthi Dharwar } 54146bcfad7SDeepthi Dharwar 542b66b8b9aSAndi Kleen if (icpu->auto_demotion_disable_flags) 54339a74fdeSShaohua Li on_each_cpu(auto_demotion_disable, NULL, 1); 54446bcfad7SDeepthi Dharwar 54546bcfad7SDeepthi Dharwar return 0; 54646bcfad7SDeepthi Dharwar } 54746bcfad7SDeepthi Dharwar 54846bcfad7SDeepthi Dharwar 54946bcfad7SDeepthi Dharwar /* 55065b7f839SThomas Renninger * intel_idle_cpu_init() 55126717172SLen Brown * allocate, initialize, register cpuidle_devices 55265b7f839SThomas Renninger * @cpu: cpu/core to initialize 55326717172SLen Brown */ 55425ac7761SDaniel Lezcano static int intel_idle_cpu_init(int cpu) 55526717172SLen Brown { 55665b7f839SThomas Renninger int cstate; 55726717172SLen Brown struct cpuidle_device *dev; 55826717172SLen Brown 55965b7f839SThomas Renninger dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu); 56026717172SLen Brown 56126717172SLen Brown dev->state_count = 1; 56226717172SLen Brown 56326717172SLen Brown for (cstate = 1; cstate < MWAIT_MAX_NUM_CSTATES; ++cstate) { 56426717172SLen Brown int num_substates; 56526717172SLen Brown 56626717172SLen Brown if (cstate > max_cstate) { 567dc716e96SMarcos Paulo de Souza printk(PREFIX "max_cstate %d reached\n", max_cstate); 56826717172SLen Brown break; 56926717172SLen Brown } 57026717172SLen Brown 57126717172SLen Brown /* does the state exist in CPUID.MWAIT? */ 572c4236282SLen Brown num_substates = (mwait_substates >> ((cstate) * 4)) 57326717172SLen Brown & MWAIT_SUBSTATE_MASK; 57426717172SLen Brown if (num_substates == 0) 57526717172SLen Brown continue; 57626717172SLen Brown /* is the state not enabled? */ 57765b7f839SThomas Renninger if (cpuidle_state_table[cstate].enter == NULL) 57826717172SLen Brown continue; 57926717172SLen Brown 58026717172SLen Brown dev->state_count += 1; 58126717172SLen Brown } 582dc716e96SMarcos Paulo de Souza 58365b7f839SThomas Renninger dev->cpu = cpu; 58426717172SLen Brown 58526717172SLen Brown if (cpuidle_register_device(dev)) { 58665b7f839SThomas Renninger pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu); 58726717172SLen Brown intel_idle_cpuidle_devices_uninit(); 58826717172SLen Brown return -EIO; 58926717172SLen Brown } 59065b7f839SThomas Renninger 591b66b8b9aSAndi Kleen if (icpu->auto_demotion_disable_flags) 59265b7f839SThomas Renninger smp_call_function_single(cpu, auto_demotion_disable, NULL, 1); 59326717172SLen Brown 59426717172SLen Brown return 0; 59526717172SLen Brown } 59626717172SLen Brown 59726717172SLen Brown static int __init intel_idle_init(void) 59826717172SLen Brown { 59965b7f839SThomas Renninger int retval, i; 60026717172SLen Brown 601d1896049SThomas Renninger /* Do not load intel_idle at all for now if idle= is passed */ 602d1896049SThomas Renninger if (boot_option_idle_override != IDLE_NO_OVERRIDE) 603d1896049SThomas Renninger return -ENODEV; 604d1896049SThomas Renninger 60526717172SLen Brown retval = intel_idle_probe(); 60626717172SLen Brown if (retval) 60726717172SLen Brown return retval; 60826717172SLen Brown 60946bcfad7SDeepthi Dharwar intel_idle_cpuidle_driver_init(); 61026717172SLen Brown retval = cpuidle_register_driver(&intel_idle_driver); 61126717172SLen Brown if (retval) { 6123735d524SKonrad Rzeszutek Wilk struct cpuidle_driver *drv = cpuidle_get_driver(); 61326717172SLen Brown printk(KERN_DEBUG PREFIX "intel_idle yielding to %s", 6143735d524SKonrad Rzeszutek Wilk drv ? drv->name : "none"); 61526717172SLen Brown return retval; 61626717172SLen Brown } 61726717172SLen Brown 61865b7f839SThomas Renninger intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device); 61965b7f839SThomas Renninger if (intel_idle_cpuidle_devices == NULL) 62065b7f839SThomas Renninger return -ENOMEM; 62165b7f839SThomas Renninger 62265b7f839SThomas Renninger for_each_online_cpu(i) { 62365b7f839SThomas Renninger retval = intel_idle_cpu_init(i); 62426717172SLen Brown if (retval) { 62526717172SLen Brown cpuidle_unregister_driver(&intel_idle_driver); 62626717172SLen Brown return retval; 62726717172SLen Brown } 62865b7f839SThomas Renninger } 6296f8c2e79SKonrad Rzeszutek Wilk register_cpu_notifier(&cpu_hotplug_notifier); 63026717172SLen Brown 63126717172SLen Brown return 0; 63226717172SLen Brown } 63326717172SLen Brown 63426717172SLen Brown static void __exit intel_idle_exit(void) 63526717172SLen Brown { 63626717172SLen Brown intel_idle_cpuidle_devices_uninit(); 63726717172SLen Brown cpuidle_unregister_driver(&intel_idle_driver); 63826717172SLen Brown 63925ac7761SDaniel Lezcano 64025ac7761SDaniel Lezcano if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) 64139a74fdeSShaohua Li on_each_cpu(__setup_broadcast_timer, (void *)false, 1); 64225ac7761SDaniel Lezcano unregister_cpu_notifier(&cpu_hotplug_notifier); 6432a2d31c8SShaohua Li 64426717172SLen Brown return; 64526717172SLen Brown } 64626717172SLen Brown 64726717172SLen Brown module_init(intel_idle_init); 64826717172SLen Brown module_exit(intel_idle_exit); 64926717172SLen Brown 65026717172SLen Brown module_param(max_cstate, int, 0444); 65126717172SLen Brown 65226717172SLen Brown MODULE_AUTHOR("Len Brown <len.brown@intel.com>"); 65326717172SLen Brown MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION); 65426717172SLen Brown MODULE_LICENSE("GPL"); 655