xref: /openbmc/linux/drivers/i3c/master.c (revision f5ad1c74)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2018 Cadence Design Systems Inc.
4  *
5  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6  */
7 
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19 
20 #include "internals.h"
21 
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 
25 /**
26  * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27  * @bus: I3C bus to take the lock on
28  *
29  * This function takes the bus lock so that no other operations can occur on
30  * the bus. This is needed for all kind of bus maintenance operation, like
31  * - enabling/disabling slave events
32  * - re-triggering DAA
33  * - changing the dynamic address of a device
34  * - relinquishing mastership
35  * - ...
36  *
37  * The reason for this kind of locking is that we don't want drivers and core
38  * logic to rely on I3C device information that could be changed behind their
39  * back.
40  */
41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42 {
43 	down_write(&bus->lock);
44 }
45 
46 /**
47  * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48  *			      operation
49  * @bus: I3C bus to release the lock on
50  *
51  * Should be called when the bus maintenance operation is done. See
52  * i3c_bus_maintenance_lock() for more details on what these maintenance
53  * operations are.
54  */
55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56 {
57 	up_write(&bus->lock);
58 }
59 
60 /**
61  * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62  * @bus: I3C bus to take the lock on
63  *
64  * This function takes the bus lock for any operation that is not a maintenance
65  * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66  * maintenance operations). Basically all communications with I3C devices are
67  * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68  * state or I3C dynamic address).
69  *
70  * Note that this lock is not guaranteeing serialization of normal operations.
71  * In other words, transfer requests passed to the I3C master can be submitted
72  * in parallel and I3C master drivers have to use their own locking to make
73  * sure two different communications are not inter-mixed, or access to the
74  * output/input queue is not done while the engine is busy.
75  */
76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77 {
78 	down_read(&bus->lock);
79 }
80 
81 /**
82  * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83  * @bus: I3C bus to release the lock on
84  *
85  * Should be called when a normal operation is done. See
86  * i3c_bus_normaluse_lock() for more details on what these normal operations
87  * are.
88  */
89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90 {
91 	up_read(&bus->lock);
92 }
93 
94 static struct i3c_master_controller *
95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96 {
97 	return container_of(i3cbus, struct i3c_master_controller, bus);
98 }
99 
100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101 {
102 	return container_of(dev, struct i3c_master_controller, dev);
103 }
104 
105 static const struct device_type i3c_device_type;
106 
107 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108 {
109 	struct i3c_master_controller *master;
110 
111 	if (dev->type == &i3c_device_type)
112 		return dev_to_i3cdev(dev)->bus;
113 
114 	master = dev_to_i3cmaster(dev);
115 
116 	return &master->bus;
117 }
118 
119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120 {
121 	struct i3c_master_controller *master;
122 
123 	if (dev->type == &i3c_device_type)
124 		return dev_to_i3cdev(dev)->desc;
125 
126 	master = dev_to_i3cmaster(dev);
127 
128 	return master->this;
129 }
130 
131 static ssize_t bcr_show(struct device *dev,
132 			struct device_attribute *da,
133 			char *buf)
134 {
135 	struct i3c_bus *bus = dev_to_i3cbus(dev);
136 	struct i3c_dev_desc *desc;
137 	ssize_t ret;
138 
139 	i3c_bus_normaluse_lock(bus);
140 	desc = dev_to_i3cdesc(dev);
141 	ret = sprintf(buf, "%x\n", desc->info.bcr);
142 	i3c_bus_normaluse_unlock(bus);
143 
144 	return ret;
145 }
146 static DEVICE_ATTR_RO(bcr);
147 
148 static ssize_t dcr_show(struct device *dev,
149 			struct device_attribute *da,
150 			char *buf)
151 {
152 	struct i3c_bus *bus = dev_to_i3cbus(dev);
153 	struct i3c_dev_desc *desc;
154 	ssize_t ret;
155 
156 	i3c_bus_normaluse_lock(bus);
157 	desc = dev_to_i3cdesc(dev);
158 	ret = sprintf(buf, "%x\n", desc->info.dcr);
159 	i3c_bus_normaluse_unlock(bus);
160 
161 	return ret;
162 }
163 static DEVICE_ATTR_RO(dcr);
164 
165 static ssize_t pid_show(struct device *dev,
166 			struct device_attribute *da,
167 			char *buf)
168 {
169 	struct i3c_bus *bus = dev_to_i3cbus(dev);
170 	struct i3c_dev_desc *desc;
171 	ssize_t ret;
172 
173 	i3c_bus_normaluse_lock(bus);
174 	desc = dev_to_i3cdesc(dev);
175 	ret = sprintf(buf, "%llx\n", desc->info.pid);
176 	i3c_bus_normaluse_unlock(bus);
177 
178 	return ret;
179 }
180 static DEVICE_ATTR_RO(pid);
181 
182 static ssize_t dynamic_address_show(struct device *dev,
183 				    struct device_attribute *da,
184 				    char *buf)
185 {
186 	struct i3c_bus *bus = dev_to_i3cbus(dev);
187 	struct i3c_dev_desc *desc;
188 	ssize_t ret;
189 
190 	i3c_bus_normaluse_lock(bus);
191 	desc = dev_to_i3cdesc(dev);
192 	ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 	i3c_bus_normaluse_unlock(bus);
194 
195 	return ret;
196 }
197 static DEVICE_ATTR_RO(dynamic_address);
198 
199 static const char * const hdrcap_strings[] = {
200 	"hdr-ddr", "hdr-tsp", "hdr-tsl",
201 };
202 
203 static ssize_t hdrcap_show(struct device *dev,
204 			   struct device_attribute *da,
205 			   char *buf)
206 {
207 	struct i3c_bus *bus = dev_to_i3cbus(dev);
208 	struct i3c_dev_desc *desc;
209 	ssize_t offset = 0, ret;
210 	unsigned long caps;
211 	int mode;
212 
213 	i3c_bus_normaluse_lock(bus);
214 	desc = dev_to_i3cdesc(dev);
215 	caps = desc->info.hdr_cap;
216 	for_each_set_bit(mode, &caps, 8) {
217 		if (mode >= ARRAY_SIZE(hdrcap_strings))
218 			break;
219 
220 		if (!hdrcap_strings[mode])
221 			continue;
222 
223 		ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 			      hdrcap_strings[mode]);
225 		if (ret < 0)
226 			goto out;
227 
228 		offset += ret;
229 	}
230 
231 	ret = sprintf(buf + offset, "\n");
232 	if (ret < 0)
233 		goto out;
234 
235 	ret = offset + ret;
236 
237 out:
238 	i3c_bus_normaluse_unlock(bus);
239 
240 	return ret;
241 }
242 static DEVICE_ATTR_RO(hdrcap);
243 
244 static ssize_t modalias_show(struct device *dev,
245 			     struct device_attribute *da, char *buf)
246 {
247 	struct i3c_device *i3c = dev_to_i3cdev(dev);
248 	struct i3c_device_info devinfo;
249 	u16 manuf, part, ext;
250 
251 	i3c_device_get_info(i3c, &devinfo);
252 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 	part = I3C_PID_PART_ID(devinfo.pid);
254 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
255 
256 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 		return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
258 			       manuf);
259 
260 	return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 		       devinfo.dcr, manuf, part, ext);
262 }
263 static DEVICE_ATTR_RO(modalias);
264 
265 static struct attribute *i3c_device_attrs[] = {
266 	&dev_attr_bcr.attr,
267 	&dev_attr_dcr.attr,
268 	&dev_attr_pid.attr,
269 	&dev_attr_dynamic_address.attr,
270 	&dev_attr_hdrcap.attr,
271 	&dev_attr_modalias.attr,
272 	NULL,
273 };
274 ATTRIBUTE_GROUPS(i3c_device);
275 
276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
277 {
278 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 	struct i3c_device_info devinfo;
280 	u16 manuf, part, ext;
281 
282 	i3c_device_get_info(i3cdev, &devinfo);
283 	manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 	part = I3C_PID_PART_ID(devinfo.pid);
285 	ext = I3C_PID_EXTRA_INFO(devinfo.pid);
286 
287 	if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 		return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
289 				      devinfo.dcr, manuf);
290 
291 	return add_uevent_var(env,
292 			      "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293 			      devinfo.dcr, manuf, part, ext);
294 }
295 
296 static const struct device_type i3c_device_type = {
297 	.groups	= i3c_device_groups,
298 	.uevent = i3c_device_uevent,
299 };
300 
301 static int i3c_device_match(struct device *dev, struct device_driver *drv)
302 {
303 	struct i3c_device *i3cdev;
304 	struct i3c_driver *i3cdrv;
305 
306 	if (dev->type != &i3c_device_type)
307 		return 0;
308 
309 	i3cdev = dev_to_i3cdev(dev);
310 	i3cdrv = drv_to_i3cdrv(drv);
311 	if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
312 		return 1;
313 
314 	return 0;
315 }
316 
317 static int i3c_device_probe(struct device *dev)
318 {
319 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
321 
322 	return driver->probe(i3cdev);
323 }
324 
325 static int i3c_device_remove(struct device *dev)
326 {
327 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 	struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
329 	int ret;
330 
331 	ret = driver->remove(i3cdev);
332 	if (ret)
333 		return ret;
334 
335 	i3c_device_free_ibi(i3cdev);
336 
337 	return ret;
338 }
339 
340 struct bus_type i3c_bus_type = {
341 	.name = "i3c",
342 	.match = i3c_device_match,
343 	.probe = i3c_device_probe,
344 	.remove = i3c_device_remove,
345 };
346 
347 static enum i3c_addr_slot_status
348 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
349 {
350 	int status, bitpos = addr * 2;
351 
352 	if (addr > I2C_MAX_ADDR)
353 		return I3C_ADDR_SLOT_RSVD;
354 
355 	status = bus->addrslots[bitpos / BITS_PER_LONG];
356 	status >>= bitpos % BITS_PER_LONG;
357 
358 	return status & I3C_ADDR_SLOT_STATUS_MASK;
359 }
360 
361 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
362 					 enum i3c_addr_slot_status status)
363 {
364 	int bitpos = addr * 2;
365 	unsigned long *ptr;
366 
367 	if (addr > I2C_MAX_ADDR)
368 		return;
369 
370 	ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
371 	*ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
372 						(bitpos % BITS_PER_LONG));
373 	*ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
374 }
375 
376 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
377 {
378 	enum i3c_addr_slot_status status;
379 
380 	status = i3c_bus_get_addr_slot_status(bus, addr);
381 
382 	return status == I3C_ADDR_SLOT_FREE;
383 }
384 
385 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
386 {
387 	enum i3c_addr_slot_status status;
388 	u8 addr;
389 
390 	for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
391 		status = i3c_bus_get_addr_slot_status(bus, addr);
392 		if (status == I3C_ADDR_SLOT_FREE)
393 			return addr;
394 	}
395 
396 	return -ENOMEM;
397 }
398 
399 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
400 {
401 	int i;
402 
403 	/* Addresses 0 to 7 are reserved. */
404 	for (i = 0; i < 8; i++)
405 		i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
406 
407 	/*
408 	 * Reserve broadcast address and all addresses that might collide
409 	 * with the broadcast address when facing a single bit error.
410 	 */
411 	i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
412 				     I3C_ADDR_SLOT_RSVD);
413 	for (i = 0; i < 7; i++)
414 		i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
415 					     I3C_ADDR_SLOT_RSVD);
416 }
417 
418 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
419 {
420 	mutex_lock(&i3c_core_lock);
421 	idr_remove(&i3c_bus_idr, i3cbus->id);
422 	mutex_unlock(&i3c_core_lock);
423 }
424 
425 static int i3c_bus_init(struct i3c_bus *i3cbus)
426 {
427 	int ret;
428 
429 	init_rwsem(&i3cbus->lock);
430 	INIT_LIST_HEAD(&i3cbus->devs.i2c);
431 	INIT_LIST_HEAD(&i3cbus->devs.i3c);
432 	i3c_bus_init_addrslots(i3cbus);
433 	i3cbus->mode = I3C_BUS_MODE_PURE;
434 
435 	mutex_lock(&i3c_core_lock);
436 	ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
437 	mutex_unlock(&i3c_core_lock);
438 
439 	if (ret < 0)
440 		return ret;
441 
442 	i3cbus->id = ret;
443 
444 	return 0;
445 }
446 
447 static const char * const i3c_bus_mode_strings[] = {
448 	[I3C_BUS_MODE_PURE] = "pure",
449 	[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
450 	[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
451 	[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
452 };
453 
454 static ssize_t mode_show(struct device *dev,
455 			 struct device_attribute *da,
456 			 char *buf)
457 {
458 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
459 	ssize_t ret;
460 
461 	i3c_bus_normaluse_lock(i3cbus);
462 	if (i3cbus->mode < 0 ||
463 	    i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
464 	    !i3c_bus_mode_strings[i3cbus->mode])
465 		ret = sprintf(buf, "unknown\n");
466 	else
467 		ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
468 	i3c_bus_normaluse_unlock(i3cbus);
469 
470 	return ret;
471 }
472 static DEVICE_ATTR_RO(mode);
473 
474 static ssize_t current_master_show(struct device *dev,
475 				   struct device_attribute *da,
476 				   char *buf)
477 {
478 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
479 	ssize_t ret;
480 
481 	i3c_bus_normaluse_lock(i3cbus);
482 	ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
483 		      i3cbus->cur_master->info.pid);
484 	i3c_bus_normaluse_unlock(i3cbus);
485 
486 	return ret;
487 }
488 static DEVICE_ATTR_RO(current_master);
489 
490 static ssize_t i3c_scl_frequency_show(struct device *dev,
491 				      struct device_attribute *da,
492 				      char *buf)
493 {
494 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
495 	ssize_t ret;
496 
497 	i3c_bus_normaluse_lock(i3cbus);
498 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
499 	i3c_bus_normaluse_unlock(i3cbus);
500 
501 	return ret;
502 }
503 static DEVICE_ATTR_RO(i3c_scl_frequency);
504 
505 static ssize_t i2c_scl_frequency_show(struct device *dev,
506 				      struct device_attribute *da,
507 				      char *buf)
508 {
509 	struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
510 	ssize_t ret;
511 
512 	i3c_bus_normaluse_lock(i3cbus);
513 	ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
514 	i3c_bus_normaluse_unlock(i3cbus);
515 
516 	return ret;
517 }
518 static DEVICE_ATTR_RO(i2c_scl_frequency);
519 
520 static struct attribute *i3c_masterdev_attrs[] = {
521 	&dev_attr_mode.attr,
522 	&dev_attr_current_master.attr,
523 	&dev_attr_i3c_scl_frequency.attr,
524 	&dev_attr_i2c_scl_frequency.attr,
525 	&dev_attr_bcr.attr,
526 	&dev_attr_dcr.attr,
527 	&dev_attr_pid.attr,
528 	&dev_attr_dynamic_address.attr,
529 	&dev_attr_hdrcap.attr,
530 	NULL,
531 };
532 ATTRIBUTE_GROUPS(i3c_masterdev);
533 
534 static void i3c_masterdev_release(struct device *dev)
535 {
536 	struct i3c_master_controller *master = dev_to_i3cmaster(dev);
537 	struct i3c_bus *bus = dev_to_i3cbus(dev);
538 
539 	if (master->wq)
540 		destroy_workqueue(master->wq);
541 
542 	WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
543 	i3c_bus_cleanup(bus);
544 
545 	of_node_put(dev->of_node);
546 }
547 
548 static const struct device_type i3c_masterdev_type = {
549 	.groups	= i3c_masterdev_groups,
550 };
551 
552 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
553 			    unsigned long max_i2c_scl_rate)
554 {
555 	struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
556 
557 	i3cbus->mode = mode;
558 
559 	switch (i3cbus->mode) {
560 	case I3C_BUS_MODE_PURE:
561 		if (!i3cbus->scl_rate.i3c)
562 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
563 		break;
564 	case I3C_BUS_MODE_MIXED_FAST:
565 	case I3C_BUS_MODE_MIXED_LIMITED:
566 		if (!i3cbus->scl_rate.i3c)
567 			i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
568 		if (!i3cbus->scl_rate.i2c)
569 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
570 		break;
571 	case I3C_BUS_MODE_MIXED_SLOW:
572 		if (!i3cbus->scl_rate.i2c)
573 			i3cbus->scl_rate.i2c = max_i2c_scl_rate;
574 		if (!i3cbus->scl_rate.i3c ||
575 		    i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
576 			i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
577 		break;
578 	default:
579 		return -EINVAL;
580 	}
581 
582 	dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
583 		i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
584 
585 	/*
586 	 * I3C/I2C frequency may have been overridden, check that user-provided
587 	 * values are not exceeding max possible frequency.
588 	 */
589 	if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
590 	    i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
591 		return -EINVAL;
592 
593 	return 0;
594 }
595 
596 static struct i3c_master_controller *
597 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
598 {
599 	return container_of(adap, struct i3c_master_controller, i2c);
600 }
601 
602 static struct i2c_adapter *
603 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
604 {
605 	return &master->i2c;
606 }
607 
608 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
609 {
610 	kfree(dev);
611 }
612 
613 static struct i2c_dev_desc *
614 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
615 			 const struct i2c_dev_boardinfo *boardinfo)
616 {
617 	struct i2c_dev_desc *dev;
618 
619 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
620 	if (!dev)
621 		return ERR_PTR(-ENOMEM);
622 
623 	dev->common.master = master;
624 	dev->boardinfo = boardinfo;
625 	dev->addr = boardinfo->base.addr;
626 	dev->lvr = boardinfo->lvr;
627 
628 	return dev;
629 }
630 
631 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
632 				   u16 payloadlen)
633 {
634 	dest->addr = addr;
635 	dest->payload.len = payloadlen;
636 	if (payloadlen)
637 		dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
638 	else
639 		dest->payload.data = NULL;
640 
641 	return dest->payload.data;
642 }
643 
644 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
645 {
646 	kfree(dest->payload.data);
647 }
648 
649 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
650 			     struct i3c_ccc_cmd_dest *dests,
651 			     unsigned int ndests)
652 {
653 	cmd->rnw = rnw ? 1 : 0;
654 	cmd->id = id;
655 	cmd->dests = dests;
656 	cmd->ndests = ndests;
657 	cmd->err = I3C_ERROR_UNKNOWN;
658 }
659 
660 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
661 					  struct i3c_ccc_cmd *cmd)
662 {
663 	int ret;
664 
665 	if (!cmd || !master)
666 		return -EINVAL;
667 
668 	if (WARN_ON(master->init_done &&
669 		    !rwsem_is_locked(&master->bus.lock)))
670 		return -EINVAL;
671 
672 	if (!master->ops->send_ccc_cmd)
673 		return -ENOTSUPP;
674 
675 	if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
676 		return -EINVAL;
677 
678 	if (master->ops->supports_ccc_cmd &&
679 	    !master->ops->supports_ccc_cmd(master, cmd))
680 		return -ENOTSUPP;
681 
682 	ret = master->ops->send_ccc_cmd(master, cmd);
683 	if (ret) {
684 		if (cmd->err != I3C_ERROR_UNKNOWN)
685 			return cmd->err;
686 
687 		return ret;
688 	}
689 
690 	return 0;
691 }
692 
693 static struct i2c_dev_desc *
694 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
695 				u16 addr)
696 {
697 	struct i2c_dev_desc *dev;
698 
699 	i3c_bus_for_each_i2cdev(&master->bus, dev) {
700 		if (dev->boardinfo->base.addr == addr)
701 			return dev;
702 	}
703 
704 	return NULL;
705 }
706 
707 /**
708  * i3c_master_get_free_addr() - get a free address on the bus
709  * @master: I3C master object
710  * @start_addr: where to start searching
711  *
712  * This function must be called with the bus lock held in write mode.
713  *
714  * Return: the first free address starting at @start_addr (included) or -ENOMEM
715  * if there's no more address available.
716  */
717 int i3c_master_get_free_addr(struct i3c_master_controller *master,
718 			     u8 start_addr)
719 {
720 	return i3c_bus_get_free_addr(&master->bus, start_addr);
721 }
722 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
723 
724 static void i3c_device_release(struct device *dev)
725 {
726 	struct i3c_device *i3cdev = dev_to_i3cdev(dev);
727 
728 	WARN_ON(i3cdev->desc);
729 
730 	of_node_put(i3cdev->dev.of_node);
731 	kfree(i3cdev);
732 }
733 
734 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
735 {
736 	kfree(dev);
737 }
738 
739 static struct i3c_dev_desc *
740 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
741 			 const struct i3c_device_info *info)
742 {
743 	struct i3c_dev_desc *dev;
744 
745 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
746 	if (!dev)
747 		return ERR_PTR(-ENOMEM);
748 
749 	dev->common.master = master;
750 	dev->info = *info;
751 	mutex_init(&dev->ibi_lock);
752 
753 	return dev;
754 }
755 
756 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
757 				    u8 addr)
758 {
759 	enum i3c_addr_slot_status addrstat;
760 	struct i3c_ccc_cmd_dest dest;
761 	struct i3c_ccc_cmd cmd;
762 	int ret;
763 
764 	if (!master)
765 		return -EINVAL;
766 
767 	addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
768 	if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
769 		return -EINVAL;
770 
771 	i3c_ccc_cmd_dest_init(&dest, addr, 0);
772 	i3c_ccc_cmd_init(&cmd, false,
773 			 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
774 			 &dest, 1);
775 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
776 	i3c_ccc_cmd_dest_cleanup(&dest);
777 
778 	return ret;
779 }
780 
781 /**
782  * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
783  *				procedure
784  * @master: master used to send frames on the bus
785  *
786  * Send a ENTDAA CCC command to start a DAA procedure.
787  *
788  * Note that this function only sends the ENTDAA CCC command, all the logic
789  * behind dynamic address assignment has to be handled in the I3C master
790  * driver.
791  *
792  * This function must be called with the bus lock held in write mode.
793  *
794  * Return: 0 in case of success, a positive I3C error code if the error is
795  * one of the official Mx error codes, and a negative error code otherwise.
796  */
797 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
798 {
799 	struct i3c_ccc_cmd_dest dest;
800 	struct i3c_ccc_cmd cmd;
801 	int ret;
802 
803 	i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
804 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
805 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
806 	i3c_ccc_cmd_dest_cleanup(&dest);
807 
808 	return ret;
809 }
810 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
811 
812 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
813 					u8 addr, bool enable, u8 evts)
814 {
815 	struct i3c_ccc_events *events;
816 	struct i3c_ccc_cmd_dest dest;
817 	struct i3c_ccc_cmd cmd;
818 	int ret;
819 
820 	events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
821 	if (!events)
822 		return -ENOMEM;
823 
824 	events->events = evts;
825 	i3c_ccc_cmd_init(&cmd, false,
826 			 enable ?
827 			 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
828 			 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
829 			 &dest, 1);
830 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
831 	i3c_ccc_cmd_dest_cleanup(&dest);
832 
833 	return ret;
834 }
835 
836 /**
837  * i3c_master_disec_locked() - send a DISEC CCC command
838  * @master: master used to send frames on the bus
839  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
840  * @evts: events to disable
841  *
842  * Send a DISEC CCC command to disable some or all events coming from a
843  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
844  *
845  * This function must be called with the bus lock held in write mode.
846  *
847  * Return: 0 in case of success, a positive I3C error code if the error is
848  * one of the official Mx error codes, and a negative error code otherwise.
849  */
850 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
851 			    u8 evts)
852 {
853 	return i3c_master_enec_disec_locked(master, addr, false, evts);
854 }
855 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
856 
857 /**
858  * i3c_master_enec_locked() - send an ENEC CCC command
859  * @master: master used to send frames on the bus
860  * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
861  * @evts: events to disable
862  *
863  * Sends an ENEC CCC command to enable some or all events coming from a
864  * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
865  *
866  * This function must be called with the bus lock held in write mode.
867  *
868  * Return: 0 in case of success, a positive I3C error code if the error is
869  * one of the official Mx error codes, and a negative error code otherwise.
870  */
871 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
872 			   u8 evts)
873 {
874 	return i3c_master_enec_disec_locked(master, addr, true, evts);
875 }
876 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
877 
878 /**
879  * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
880  * @master: master used to send frames on the bus
881  *
882  * Send a DEFSLVS CCC command containing all the devices known to the @master.
883  * This is useful when you have secondary masters on the bus to propagate
884  * device information.
885  *
886  * This should be called after all I3C devices have been discovered (in other
887  * words, after the DAA procedure has finished) and instantiated in
888  * &i3c_master_controller_ops->bus_init().
889  * It should also be called if a master ACKed an Hot-Join request and assigned
890  * a dynamic address to the device joining the bus.
891  *
892  * This function must be called with the bus lock held in write mode.
893  *
894  * Return: 0 in case of success, a positive I3C error code if the error is
895  * one of the official Mx error codes, and a negative error code otherwise.
896  */
897 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
898 {
899 	struct i3c_ccc_defslvs *defslvs;
900 	struct i3c_ccc_dev_desc *desc;
901 	struct i3c_ccc_cmd_dest dest;
902 	struct i3c_dev_desc *i3cdev;
903 	struct i2c_dev_desc *i2cdev;
904 	struct i3c_ccc_cmd cmd;
905 	struct i3c_bus *bus;
906 	bool send = false;
907 	int ndevs = 0, ret;
908 
909 	if (!master)
910 		return -EINVAL;
911 
912 	bus = i3c_master_get_bus(master);
913 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
914 		ndevs++;
915 
916 		if (i3cdev == master->this)
917 			continue;
918 
919 		if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
920 		    I3C_BCR_I3C_MASTER)
921 			send = true;
922 	}
923 
924 	/* No other master on the bus, skip DEFSLVS. */
925 	if (!send)
926 		return 0;
927 
928 	i3c_bus_for_each_i2cdev(bus, i2cdev)
929 		ndevs++;
930 
931 	defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
932 					struct_size(defslvs, slaves,
933 						    ndevs - 1));
934 	if (!defslvs)
935 		return -ENOMEM;
936 
937 	defslvs->count = ndevs;
938 	defslvs->master.bcr = master->this->info.bcr;
939 	defslvs->master.dcr = master->this->info.dcr;
940 	defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
941 	defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
942 
943 	desc = defslvs->slaves;
944 	i3c_bus_for_each_i2cdev(bus, i2cdev) {
945 		desc->lvr = i2cdev->lvr;
946 		desc->static_addr = i2cdev->addr << 1;
947 		desc++;
948 	}
949 
950 	i3c_bus_for_each_i3cdev(bus, i3cdev) {
951 		/* Skip the I3C dev representing this master. */
952 		if (i3cdev == master->this)
953 			continue;
954 
955 		desc->bcr = i3cdev->info.bcr;
956 		desc->dcr = i3cdev->info.dcr;
957 		desc->dyn_addr = i3cdev->info.dyn_addr << 1;
958 		desc->static_addr = i3cdev->info.static_addr << 1;
959 		desc++;
960 	}
961 
962 	i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
963 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
964 	i3c_ccc_cmd_dest_cleanup(&dest);
965 
966 	return ret;
967 }
968 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
969 
970 static int i3c_master_setda_locked(struct i3c_master_controller *master,
971 				   u8 oldaddr, u8 newaddr, bool setdasa)
972 {
973 	struct i3c_ccc_cmd_dest dest;
974 	struct i3c_ccc_setda *setda;
975 	struct i3c_ccc_cmd cmd;
976 	int ret;
977 
978 	if (!oldaddr || !newaddr)
979 		return -EINVAL;
980 
981 	setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
982 	if (!setda)
983 		return -ENOMEM;
984 
985 	setda->addr = newaddr << 1;
986 	i3c_ccc_cmd_init(&cmd, false,
987 			 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
988 			 &dest, 1);
989 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
990 	i3c_ccc_cmd_dest_cleanup(&dest);
991 
992 	return ret;
993 }
994 
995 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
996 				     u8 static_addr, u8 dyn_addr)
997 {
998 	return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
999 }
1000 
1001 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1002 				      u8 oldaddr, u8 newaddr)
1003 {
1004 	return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1005 }
1006 
1007 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1008 				    struct i3c_device_info *info)
1009 {
1010 	struct i3c_ccc_cmd_dest dest;
1011 	struct i3c_ccc_mrl *mrl;
1012 	struct i3c_ccc_cmd cmd;
1013 	int ret;
1014 
1015 	mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1016 	if (!mrl)
1017 		return -ENOMEM;
1018 
1019 	/*
1020 	 * When the device does not have IBI payload GETMRL only returns 2
1021 	 * bytes of data.
1022 	 */
1023 	if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1024 		dest.payload.len -= 1;
1025 
1026 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1027 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1028 	if (ret)
1029 		goto out;
1030 
1031 	switch (dest.payload.len) {
1032 	case 3:
1033 		info->max_ibi_len = mrl->ibi_len;
1034 		fallthrough;
1035 	case 2:
1036 		info->max_read_len = be16_to_cpu(mrl->read_len);
1037 		break;
1038 	default:
1039 		ret = -EIO;
1040 		goto out;
1041 	}
1042 
1043 out:
1044 	i3c_ccc_cmd_dest_cleanup(&dest);
1045 
1046 	return ret;
1047 }
1048 
1049 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1050 				    struct i3c_device_info *info)
1051 {
1052 	struct i3c_ccc_cmd_dest dest;
1053 	struct i3c_ccc_mwl *mwl;
1054 	struct i3c_ccc_cmd cmd;
1055 	int ret;
1056 
1057 	mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1058 	if (!mwl)
1059 		return -ENOMEM;
1060 
1061 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1062 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1063 	if (ret)
1064 		goto out;
1065 
1066 	if (dest.payload.len != sizeof(*mwl)) {
1067 		ret = -EIO;
1068 		goto out;
1069 	}
1070 
1071 	info->max_write_len = be16_to_cpu(mwl->len);
1072 
1073 out:
1074 	i3c_ccc_cmd_dest_cleanup(&dest);
1075 
1076 	return ret;
1077 }
1078 
1079 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1080 				     struct i3c_device_info *info)
1081 {
1082 	struct i3c_ccc_getmxds *getmaxds;
1083 	struct i3c_ccc_cmd_dest dest;
1084 	struct i3c_ccc_cmd cmd;
1085 	int ret;
1086 
1087 	getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1088 					 sizeof(*getmaxds));
1089 	if (!getmaxds)
1090 		return -ENOMEM;
1091 
1092 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1093 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1094 	if (ret)
1095 		goto out;
1096 
1097 	if (dest.payload.len != 2 && dest.payload.len != 5) {
1098 		ret = -EIO;
1099 		goto out;
1100 	}
1101 
1102 	info->max_read_ds = getmaxds->maxrd;
1103 	info->max_write_ds = getmaxds->maxwr;
1104 	if (dest.payload.len == 5)
1105 		info->max_read_turnaround = getmaxds->maxrdturn[0] |
1106 					    ((u32)getmaxds->maxrdturn[1] << 8) |
1107 					    ((u32)getmaxds->maxrdturn[2] << 16);
1108 
1109 out:
1110 	i3c_ccc_cmd_dest_cleanup(&dest);
1111 
1112 	return ret;
1113 }
1114 
1115 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1116 				       struct i3c_device_info *info)
1117 {
1118 	struct i3c_ccc_gethdrcap *gethdrcap;
1119 	struct i3c_ccc_cmd_dest dest;
1120 	struct i3c_ccc_cmd cmd;
1121 	int ret;
1122 
1123 	gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1124 					  sizeof(*gethdrcap));
1125 	if (!gethdrcap)
1126 		return -ENOMEM;
1127 
1128 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1129 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1130 	if (ret)
1131 		goto out;
1132 
1133 	if (dest.payload.len != 1) {
1134 		ret = -EIO;
1135 		goto out;
1136 	}
1137 
1138 	info->hdr_cap = gethdrcap->modes;
1139 
1140 out:
1141 	i3c_ccc_cmd_dest_cleanup(&dest);
1142 
1143 	return ret;
1144 }
1145 
1146 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1147 				    struct i3c_device_info *info)
1148 {
1149 	struct i3c_ccc_getpid *getpid;
1150 	struct i3c_ccc_cmd_dest dest;
1151 	struct i3c_ccc_cmd cmd;
1152 	int ret, i;
1153 
1154 	getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1155 	if (!getpid)
1156 		return -ENOMEM;
1157 
1158 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1159 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1160 	if (ret)
1161 		goto out;
1162 
1163 	info->pid = 0;
1164 	for (i = 0; i < sizeof(getpid->pid); i++) {
1165 		int sft = (sizeof(getpid->pid) - i - 1) * 8;
1166 
1167 		info->pid |= (u64)getpid->pid[i] << sft;
1168 	}
1169 
1170 out:
1171 	i3c_ccc_cmd_dest_cleanup(&dest);
1172 
1173 	return ret;
1174 }
1175 
1176 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1177 				    struct i3c_device_info *info)
1178 {
1179 	struct i3c_ccc_getbcr *getbcr;
1180 	struct i3c_ccc_cmd_dest dest;
1181 	struct i3c_ccc_cmd cmd;
1182 	int ret;
1183 
1184 	getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1185 	if (!getbcr)
1186 		return -ENOMEM;
1187 
1188 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1189 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1190 	if (ret)
1191 		goto out;
1192 
1193 	info->bcr = getbcr->bcr;
1194 
1195 out:
1196 	i3c_ccc_cmd_dest_cleanup(&dest);
1197 
1198 	return ret;
1199 }
1200 
1201 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1202 				    struct i3c_device_info *info)
1203 {
1204 	struct i3c_ccc_getdcr *getdcr;
1205 	struct i3c_ccc_cmd_dest dest;
1206 	struct i3c_ccc_cmd cmd;
1207 	int ret;
1208 
1209 	getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1210 	if (!getdcr)
1211 		return -ENOMEM;
1212 
1213 	i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1214 	ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1215 	if (ret)
1216 		goto out;
1217 
1218 	info->dcr = getdcr->dcr;
1219 
1220 out:
1221 	i3c_ccc_cmd_dest_cleanup(&dest);
1222 
1223 	return ret;
1224 }
1225 
1226 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1227 {
1228 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1229 	enum i3c_addr_slot_status slot_status;
1230 	int ret;
1231 
1232 	if (!dev->info.dyn_addr)
1233 		return -EINVAL;
1234 
1235 	slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1236 						   dev->info.dyn_addr);
1237 	if (slot_status == I3C_ADDR_SLOT_RSVD ||
1238 	    slot_status == I3C_ADDR_SLOT_I2C_DEV)
1239 		return -EINVAL;
1240 
1241 	ret = i3c_master_getpid_locked(master, &dev->info);
1242 	if (ret)
1243 		return ret;
1244 
1245 	ret = i3c_master_getbcr_locked(master, &dev->info);
1246 	if (ret)
1247 		return ret;
1248 
1249 	ret = i3c_master_getdcr_locked(master, &dev->info);
1250 	if (ret)
1251 		return ret;
1252 
1253 	if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1254 		ret = i3c_master_getmxds_locked(master, &dev->info);
1255 		if (ret)
1256 			return ret;
1257 	}
1258 
1259 	if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1260 		dev->info.max_ibi_len = 1;
1261 
1262 	i3c_master_getmrl_locked(master, &dev->info);
1263 	i3c_master_getmwl_locked(master, &dev->info);
1264 
1265 	if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1266 		ret = i3c_master_gethdrcap_locked(master, &dev->info);
1267 		if (ret)
1268 			return ret;
1269 	}
1270 
1271 	return 0;
1272 }
1273 
1274 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1275 {
1276 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1277 
1278 	if (dev->info.static_addr)
1279 		i3c_bus_set_addr_slot_status(&master->bus,
1280 					     dev->info.static_addr,
1281 					     I3C_ADDR_SLOT_FREE);
1282 
1283 	if (dev->info.dyn_addr)
1284 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1285 					     I3C_ADDR_SLOT_FREE);
1286 
1287 	if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1288 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1289 					     I3C_ADDR_SLOT_FREE);
1290 }
1291 
1292 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1293 {
1294 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1295 	enum i3c_addr_slot_status status;
1296 
1297 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1298 		return 0;
1299 
1300 	if (dev->info.static_addr) {
1301 		status = i3c_bus_get_addr_slot_status(&master->bus,
1302 						      dev->info.static_addr);
1303 		if (status != I3C_ADDR_SLOT_FREE)
1304 			return -EBUSY;
1305 
1306 		i3c_bus_set_addr_slot_status(&master->bus,
1307 					     dev->info.static_addr,
1308 					     I3C_ADDR_SLOT_I3C_DEV);
1309 	}
1310 
1311 	/*
1312 	 * ->init_dyn_addr should have been reserved before that, so, if we're
1313 	 * trying to apply a pre-reserved dynamic address, we should not try
1314 	 * to reserve the address slot a second time.
1315 	 */
1316 	if (dev->info.dyn_addr &&
1317 	    (!dev->boardinfo ||
1318 	     dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1319 		status = i3c_bus_get_addr_slot_status(&master->bus,
1320 						      dev->info.dyn_addr);
1321 		if (status != I3C_ADDR_SLOT_FREE)
1322 			goto err_release_static_addr;
1323 
1324 		i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1325 					     I3C_ADDR_SLOT_I3C_DEV);
1326 	}
1327 
1328 	return 0;
1329 
1330 err_release_static_addr:
1331 	if (dev->info.static_addr)
1332 		i3c_bus_set_addr_slot_status(&master->bus,
1333 					     dev->info.static_addr,
1334 					     I3C_ADDR_SLOT_FREE);
1335 
1336 	return -EBUSY;
1337 }
1338 
1339 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1340 				     struct i3c_dev_desc *dev)
1341 {
1342 	int ret;
1343 
1344 	/*
1345 	 * We don't attach devices to the controller until they are
1346 	 * addressable on the bus.
1347 	 */
1348 	if (!dev->info.static_addr && !dev->info.dyn_addr)
1349 		return 0;
1350 
1351 	ret = i3c_master_get_i3c_addrs(dev);
1352 	if (ret)
1353 		return ret;
1354 
1355 	/* Do not attach the master device itself. */
1356 	if (master->this != dev && master->ops->attach_i3c_dev) {
1357 		ret = master->ops->attach_i3c_dev(dev);
1358 		if (ret) {
1359 			i3c_master_put_i3c_addrs(dev);
1360 			return ret;
1361 		}
1362 	}
1363 
1364 	list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1365 
1366 	return 0;
1367 }
1368 
1369 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1370 				       u8 old_dyn_addr)
1371 {
1372 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1373 	enum i3c_addr_slot_status status;
1374 	int ret;
1375 
1376 	if (dev->info.dyn_addr != old_dyn_addr &&
1377 	    (!dev->boardinfo ||
1378 	     dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1379 		status = i3c_bus_get_addr_slot_status(&master->bus,
1380 						      dev->info.dyn_addr);
1381 		if (status != I3C_ADDR_SLOT_FREE)
1382 			return -EBUSY;
1383 		i3c_bus_set_addr_slot_status(&master->bus,
1384 					     dev->info.dyn_addr,
1385 					     I3C_ADDR_SLOT_I3C_DEV);
1386 	}
1387 
1388 	if (master->ops->reattach_i3c_dev) {
1389 		ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1390 		if (ret) {
1391 			i3c_master_put_i3c_addrs(dev);
1392 			return ret;
1393 		}
1394 	}
1395 
1396 	return 0;
1397 }
1398 
1399 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1400 {
1401 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
1402 
1403 	/* Do not detach the master device itself. */
1404 	if (master->this != dev && master->ops->detach_i3c_dev)
1405 		master->ops->detach_i3c_dev(dev);
1406 
1407 	i3c_master_put_i3c_addrs(dev);
1408 	list_del(&dev->common.node);
1409 }
1410 
1411 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1412 				     struct i2c_dev_desc *dev)
1413 {
1414 	int ret;
1415 
1416 	if (master->ops->attach_i2c_dev) {
1417 		ret = master->ops->attach_i2c_dev(dev);
1418 		if (ret)
1419 			return ret;
1420 	}
1421 
1422 	list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1423 
1424 	return 0;
1425 }
1426 
1427 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1428 {
1429 	struct i3c_master_controller *master = i2c_dev_get_master(dev);
1430 
1431 	list_del(&dev->common.node);
1432 
1433 	if (master->ops->detach_i2c_dev)
1434 		master->ops->detach_i2c_dev(dev);
1435 }
1436 
1437 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1438 					  struct i3c_dev_boardinfo *boardinfo)
1439 {
1440 	struct i3c_device_info info = {
1441 		.static_addr = boardinfo->static_addr,
1442 	};
1443 	struct i3c_dev_desc *i3cdev;
1444 	int ret;
1445 
1446 	i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1447 	if (IS_ERR(i3cdev))
1448 		return -ENOMEM;
1449 
1450 	i3cdev->boardinfo = boardinfo;
1451 
1452 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1453 	if (ret)
1454 		goto err_free_dev;
1455 
1456 	ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1457 					i3cdev->boardinfo->init_dyn_addr);
1458 	if (ret)
1459 		goto err_detach_dev;
1460 
1461 	i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1462 	ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1463 	if (ret)
1464 		goto err_rstdaa;
1465 
1466 	ret = i3c_master_retrieve_dev_info(i3cdev);
1467 	if (ret)
1468 		goto err_rstdaa;
1469 
1470 	return 0;
1471 
1472 err_rstdaa:
1473 	i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1474 err_detach_dev:
1475 	i3c_master_detach_i3c_dev(i3cdev);
1476 err_free_dev:
1477 	i3c_master_free_i3c_dev(i3cdev);
1478 
1479 	return ret;
1480 }
1481 
1482 static void
1483 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1484 {
1485 	struct i3c_dev_desc *desc;
1486 	int ret;
1487 
1488 	if (!master->init_done)
1489 		return;
1490 
1491 	i3c_bus_for_each_i3cdev(&master->bus, desc) {
1492 		if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1493 			continue;
1494 
1495 		desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1496 		if (!desc->dev)
1497 			continue;
1498 
1499 		desc->dev->bus = &master->bus;
1500 		desc->dev->desc = desc;
1501 		desc->dev->dev.parent = &master->dev;
1502 		desc->dev->dev.type = &i3c_device_type;
1503 		desc->dev->dev.bus = &i3c_bus_type;
1504 		desc->dev->dev.release = i3c_device_release;
1505 		dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1506 			     desc->info.pid);
1507 
1508 		if (desc->boardinfo)
1509 			desc->dev->dev.of_node = desc->boardinfo->of_node;
1510 
1511 		ret = device_register(&desc->dev->dev);
1512 		if (ret)
1513 			dev_err(&master->dev,
1514 				"Failed to add I3C device (err = %d)\n", ret);
1515 	}
1516 }
1517 
1518 /**
1519  * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1520  * @master: master doing the DAA
1521  *
1522  * This function is instantiating an I3C device object and adding it to the
1523  * I3C device list. All device information are automatically retrieved using
1524  * standard CCC commands.
1525  *
1526  * The I3C device object is returned in case the master wants to attach
1527  * private data to it using i3c_dev_set_master_data().
1528  *
1529  * This function must be called with the bus lock held in write mode.
1530  *
1531  * Return: a 0 in case of success, an negative error code otherwise.
1532  */
1533 int i3c_master_do_daa(struct i3c_master_controller *master)
1534 {
1535 	int ret;
1536 
1537 	i3c_bus_maintenance_lock(&master->bus);
1538 	ret = master->ops->do_daa(master);
1539 	i3c_bus_maintenance_unlock(&master->bus);
1540 
1541 	if (ret)
1542 		return ret;
1543 
1544 	i3c_bus_normaluse_lock(&master->bus);
1545 	i3c_master_register_new_i3c_devs(master);
1546 	i3c_bus_normaluse_unlock(&master->bus);
1547 
1548 	return 0;
1549 }
1550 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1551 
1552 /**
1553  * i3c_master_set_info() - set master device information
1554  * @master: master used to send frames on the bus
1555  * @info: I3C device information
1556  *
1557  * Set master device info. This should be called from
1558  * &i3c_master_controller_ops->bus_init().
1559  *
1560  * Not all &i3c_device_info fields are meaningful for a master device.
1561  * Here is a list of fields that should be properly filled:
1562  *
1563  * - &i3c_device_info->dyn_addr
1564  * - &i3c_device_info->bcr
1565  * - &i3c_device_info->dcr
1566  * - &i3c_device_info->pid
1567  * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1568  *   &i3c_device_info->bcr
1569  *
1570  * This function must be called with the bus lock held in maintenance mode.
1571  *
1572  * Return: 0 if @info contains valid information (not every piece of
1573  * information can be checked, but we can at least make sure @info->dyn_addr
1574  * and @info->bcr are correct), -EINVAL otherwise.
1575  */
1576 int i3c_master_set_info(struct i3c_master_controller *master,
1577 			const struct i3c_device_info *info)
1578 {
1579 	struct i3c_dev_desc *i3cdev;
1580 	int ret;
1581 
1582 	if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1583 		return -EINVAL;
1584 
1585 	if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1586 	    master->secondary)
1587 		return -EINVAL;
1588 
1589 	if (master->this)
1590 		return -EINVAL;
1591 
1592 	i3cdev = i3c_master_alloc_i3c_dev(master, info);
1593 	if (IS_ERR(i3cdev))
1594 		return PTR_ERR(i3cdev);
1595 
1596 	master->this = i3cdev;
1597 	master->bus.cur_master = master->this;
1598 
1599 	ret = i3c_master_attach_i3c_dev(master, i3cdev);
1600 	if (ret)
1601 		goto err_free_dev;
1602 
1603 	return 0;
1604 
1605 err_free_dev:
1606 	i3c_master_free_i3c_dev(i3cdev);
1607 
1608 	return ret;
1609 }
1610 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1611 
1612 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1613 {
1614 	struct i3c_dev_desc *i3cdev, *i3ctmp;
1615 	struct i2c_dev_desc *i2cdev, *i2ctmp;
1616 
1617 	list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1618 				 common.node) {
1619 		i3c_master_detach_i3c_dev(i3cdev);
1620 
1621 		if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1622 			i3c_bus_set_addr_slot_status(&master->bus,
1623 					i3cdev->boardinfo->init_dyn_addr,
1624 					I3C_ADDR_SLOT_FREE);
1625 
1626 		i3c_master_free_i3c_dev(i3cdev);
1627 	}
1628 
1629 	list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1630 				 common.node) {
1631 		i3c_master_detach_i2c_dev(i2cdev);
1632 		i3c_bus_set_addr_slot_status(&master->bus,
1633 					     i2cdev->addr,
1634 					     I3C_ADDR_SLOT_FREE);
1635 		i3c_master_free_i2c_dev(i2cdev);
1636 	}
1637 }
1638 
1639 /**
1640  * i3c_master_bus_init() - initialize an I3C bus
1641  * @master: main master initializing the bus
1642  *
1643  * This function is following all initialisation steps described in the I3C
1644  * specification:
1645  *
1646  * 1. Attach I2C devs to the master so that the master can fill its internal
1647  *    device table appropriately
1648  *
1649  * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1650  *    the master controller. That's usually where the bus mode is selected
1651  *    (pure bus or mixed fast/slow bus)
1652  *
1653  * 3. Instruct all devices on the bus to drop their dynamic address. This is
1654  *    particularly important when the bus was previously configured by someone
1655  *    else (for example the bootloader)
1656  *
1657  * 4. Disable all slave events.
1658  *
1659  * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1660  *    also have static_addr, try to pre-assign dynamic addresses requested by
1661  *    the FW with SETDASA and attach corresponding statically defined I3C
1662  *    devices to the master.
1663  *
1664  * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1665  *    remaining I3C devices
1666  *
1667  * Once this is done, all I3C and I2C devices should be usable.
1668  *
1669  * Return: a 0 in case of success, an negative error code otherwise.
1670  */
1671 static int i3c_master_bus_init(struct i3c_master_controller *master)
1672 {
1673 	enum i3c_addr_slot_status status;
1674 	struct i2c_dev_boardinfo *i2cboardinfo;
1675 	struct i3c_dev_boardinfo *i3cboardinfo;
1676 	struct i2c_dev_desc *i2cdev;
1677 	int ret;
1678 
1679 	/*
1680 	 * First attach all devices with static definitions provided by the
1681 	 * FW.
1682 	 */
1683 	list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1684 		status = i3c_bus_get_addr_slot_status(&master->bus,
1685 						      i2cboardinfo->base.addr);
1686 		if (status != I3C_ADDR_SLOT_FREE) {
1687 			ret = -EBUSY;
1688 			goto err_detach_devs;
1689 		}
1690 
1691 		i3c_bus_set_addr_slot_status(&master->bus,
1692 					     i2cboardinfo->base.addr,
1693 					     I3C_ADDR_SLOT_I2C_DEV);
1694 
1695 		i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1696 		if (IS_ERR(i2cdev)) {
1697 			ret = PTR_ERR(i2cdev);
1698 			goto err_detach_devs;
1699 		}
1700 
1701 		ret = i3c_master_attach_i2c_dev(master, i2cdev);
1702 		if (ret) {
1703 			i3c_master_free_i2c_dev(i2cdev);
1704 			goto err_detach_devs;
1705 		}
1706 	}
1707 
1708 	/*
1709 	 * Now execute the controller specific ->bus_init() routine, which
1710 	 * might configure its internal logic to match the bus limitations.
1711 	 */
1712 	ret = master->ops->bus_init(master);
1713 	if (ret)
1714 		goto err_detach_devs;
1715 
1716 	/*
1717 	 * The master device should have been instantiated in ->bus_init(),
1718 	 * complain if this was not the case.
1719 	 */
1720 	if (!master->this) {
1721 		dev_err(&master->dev,
1722 			"master_set_info() was not called in ->bus_init()\n");
1723 		ret = -EINVAL;
1724 		goto err_bus_cleanup;
1725 	}
1726 
1727 	/*
1728 	 * Reset all dynamic address that may have been assigned before
1729 	 * (assigned by the bootloader for example).
1730 	 */
1731 	ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1732 	if (ret && ret != I3C_ERROR_M2)
1733 		goto err_bus_cleanup;
1734 
1735 	/* Disable all slave events before starting DAA. */
1736 	ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1737 				      I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1738 				      I3C_CCC_EVENT_HJ);
1739 	if (ret && ret != I3C_ERROR_M2)
1740 		goto err_bus_cleanup;
1741 
1742 	/*
1743 	 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1744 	 * address and retrieve device information if needed.
1745 	 * In case pre-assign dynamic address fails, setting dynamic address to
1746 	 * the requested init_dyn_addr is retried after DAA is done in
1747 	 * i3c_master_add_i3c_dev_locked().
1748 	 */
1749 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1750 
1751 		/*
1752 		 * We don't reserve a dynamic address for devices that
1753 		 * don't explicitly request one.
1754 		 */
1755 		if (!i3cboardinfo->init_dyn_addr)
1756 			continue;
1757 
1758 		ret = i3c_bus_get_addr_slot_status(&master->bus,
1759 						   i3cboardinfo->init_dyn_addr);
1760 		if (ret != I3C_ADDR_SLOT_FREE) {
1761 			ret = -EBUSY;
1762 			goto err_rstdaa;
1763 		}
1764 
1765 		i3c_bus_set_addr_slot_status(&master->bus,
1766 					     i3cboardinfo->init_dyn_addr,
1767 					     I3C_ADDR_SLOT_I3C_DEV);
1768 
1769 		/*
1770 		 * Only try to create/attach devices that have a static
1771 		 * address. Other devices will be created/attached when
1772 		 * DAA happens, and the requested dynamic address will
1773 		 * be set using SETNEWDA once those devices become
1774 		 * addressable.
1775 		 */
1776 
1777 		if (i3cboardinfo->static_addr)
1778 			i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1779 	}
1780 
1781 	ret = i3c_master_do_daa(master);
1782 	if (ret)
1783 		goto err_rstdaa;
1784 
1785 	return 0;
1786 
1787 err_rstdaa:
1788 	i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1789 
1790 err_bus_cleanup:
1791 	if (master->ops->bus_cleanup)
1792 		master->ops->bus_cleanup(master);
1793 
1794 err_detach_devs:
1795 	i3c_master_detach_free_devs(master);
1796 
1797 	return ret;
1798 }
1799 
1800 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1801 {
1802 	if (master->ops->bus_cleanup)
1803 		master->ops->bus_cleanup(master);
1804 
1805 	i3c_master_detach_free_devs(master);
1806 }
1807 
1808 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1809 {
1810 	struct i3c_master_controller *master = i3cdev->common.master;
1811 	struct i3c_dev_boardinfo *i3cboardinfo;
1812 
1813 	list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1814 		if (i3cdev->info.pid != i3cboardinfo->pid)
1815 			continue;
1816 
1817 		i3cdev->boardinfo = i3cboardinfo;
1818 		i3cdev->info.static_addr = i3cboardinfo->static_addr;
1819 		return;
1820 	}
1821 }
1822 
1823 static struct i3c_dev_desc *
1824 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1825 {
1826 	struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1827 	struct i3c_dev_desc *i3cdev;
1828 
1829 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1830 		if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1831 			return i3cdev;
1832 	}
1833 
1834 	return NULL;
1835 }
1836 
1837 /**
1838  * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1839  * @master: master used to send frames on the bus
1840  * @addr: I3C slave dynamic address assigned to the device
1841  *
1842  * This function is instantiating an I3C device object and adding it to the
1843  * I3C device list. All device information are automatically retrieved using
1844  * standard CCC commands.
1845  *
1846  * The I3C device object is returned in case the master wants to attach
1847  * private data to it using i3c_dev_set_master_data().
1848  *
1849  * This function must be called with the bus lock held in write mode.
1850  *
1851  * Return: a 0 in case of success, an negative error code otherwise.
1852  */
1853 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1854 				  u8 addr)
1855 {
1856 	struct i3c_device_info info = { .dyn_addr = addr };
1857 	struct i3c_dev_desc *newdev, *olddev;
1858 	u8 old_dyn_addr = addr, expected_dyn_addr;
1859 	struct i3c_ibi_setup ibireq = { };
1860 	bool enable_ibi = false;
1861 	int ret;
1862 
1863 	if (!master)
1864 		return -EINVAL;
1865 
1866 	newdev = i3c_master_alloc_i3c_dev(master, &info);
1867 	if (IS_ERR(newdev))
1868 		return PTR_ERR(newdev);
1869 
1870 	ret = i3c_master_attach_i3c_dev(master, newdev);
1871 	if (ret)
1872 		goto err_free_dev;
1873 
1874 	ret = i3c_master_retrieve_dev_info(newdev);
1875 	if (ret)
1876 		goto err_detach_dev;
1877 
1878 	i3c_master_attach_boardinfo(newdev);
1879 
1880 	olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1881 	if (olddev) {
1882 		newdev->dev = olddev->dev;
1883 		if (newdev->dev)
1884 			newdev->dev->desc = newdev;
1885 
1886 		/*
1887 		 * We need to restore the IBI state too, so let's save the
1888 		 * IBI information and try to restore them after olddev has
1889 		 * been detached+released and its IBI has been stopped and
1890 		 * the associated resources have been freed.
1891 		 */
1892 		mutex_lock(&olddev->ibi_lock);
1893 		if (olddev->ibi) {
1894 			ibireq.handler = olddev->ibi->handler;
1895 			ibireq.max_payload_len = olddev->ibi->max_payload_len;
1896 			ibireq.num_slots = olddev->ibi->num_slots;
1897 
1898 			if (olddev->ibi->enabled) {
1899 				enable_ibi = true;
1900 				i3c_dev_disable_ibi_locked(olddev);
1901 			}
1902 
1903 			i3c_dev_free_ibi_locked(olddev);
1904 		}
1905 		mutex_unlock(&olddev->ibi_lock);
1906 
1907 		old_dyn_addr = olddev->info.dyn_addr;
1908 
1909 		i3c_master_detach_i3c_dev(olddev);
1910 		i3c_master_free_i3c_dev(olddev);
1911 	}
1912 
1913 	ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1914 	if (ret)
1915 		goto err_detach_dev;
1916 
1917 	/*
1918 	 * Depending on our previous state, the expected dynamic address might
1919 	 * differ:
1920 	 * - if the device already had a dynamic address assigned, let's try to
1921 	 *   re-apply this one
1922 	 * - if the device did not have a dynamic address and the firmware
1923 	 *   requested a specific address, pick this one
1924 	 * - in any other case, keep the address automatically assigned by the
1925 	 *   master
1926 	 */
1927 	if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1928 		expected_dyn_addr = old_dyn_addr;
1929 	else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1930 		expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1931 	else
1932 		expected_dyn_addr = newdev->info.dyn_addr;
1933 
1934 	if (newdev->info.dyn_addr != expected_dyn_addr) {
1935 		/*
1936 		 * Try to apply the expected dynamic address. If it fails, keep
1937 		 * the address assigned by the master.
1938 		 */
1939 		ret = i3c_master_setnewda_locked(master,
1940 						 newdev->info.dyn_addr,
1941 						 expected_dyn_addr);
1942 		if (!ret) {
1943 			old_dyn_addr = newdev->info.dyn_addr;
1944 			newdev->info.dyn_addr = expected_dyn_addr;
1945 			i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1946 		} else {
1947 			dev_err(&master->dev,
1948 				"Failed to assign reserved/old address to device %d%llx",
1949 				master->bus.id, newdev->info.pid);
1950 		}
1951 	}
1952 
1953 	/*
1954 	 * Now is time to try to restore the IBI setup. If we're lucky,
1955 	 * everything works as before, otherwise, all we can do is complain.
1956 	 * FIXME: maybe we should add callback to inform the driver that it
1957 	 * should request the IBI again instead of trying to hide that from
1958 	 * him.
1959 	 */
1960 	if (ibireq.handler) {
1961 		mutex_lock(&newdev->ibi_lock);
1962 		ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1963 		if (ret) {
1964 			dev_err(&master->dev,
1965 				"Failed to request IBI on device %d-%llx",
1966 				master->bus.id, newdev->info.pid);
1967 		} else if (enable_ibi) {
1968 			ret = i3c_dev_enable_ibi_locked(newdev);
1969 			if (ret)
1970 				dev_err(&master->dev,
1971 					"Failed to re-enable IBI on device %d-%llx",
1972 					master->bus.id, newdev->info.pid);
1973 		}
1974 		mutex_unlock(&newdev->ibi_lock);
1975 	}
1976 
1977 	return 0;
1978 
1979 err_detach_dev:
1980 	if (newdev->dev && newdev->dev->desc)
1981 		newdev->dev->desc = NULL;
1982 
1983 	i3c_master_detach_i3c_dev(newdev);
1984 
1985 err_free_dev:
1986 	i3c_master_free_i3c_dev(newdev);
1987 
1988 	return ret;
1989 }
1990 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1991 
1992 #define OF_I3C_REG1_IS_I2C_DEV			BIT(31)
1993 
1994 static int
1995 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1996 				struct device_node *node, u32 *reg)
1997 {
1998 	struct i2c_dev_boardinfo *boardinfo;
1999 	struct device *dev = &master->dev;
2000 	int ret;
2001 
2002 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2003 	if (!boardinfo)
2004 		return -ENOMEM;
2005 
2006 	ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2007 	if (ret)
2008 		return ret;
2009 
2010 	/*
2011 	 * The I3C Specification does not clearly say I2C devices with 10-bit
2012 	 * address are supported. These devices can't be passed properly through
2013 	 * DEFSLVS command.
2014 	 */
2015 	if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2016 		dev_err(dev, "I2C device with 10 bit address not supported.");
2017 		return -ENOTSUPP;
2018 	}
2019 
2020 	/* LVR is encoded in reg[2]. */
2021 	boardinfo->lvr = reg[2];
2022 
2023 	list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2024 	of_node_get(node);
2025 
2026 	return 0;
2027 }
2028 
2029 static int
2030 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2031 				struct device_node *node, u32 *reg)
2032 {
2033 	struct i3c_dev_boardinfo *boardinfo;
2034 	struct device *dev = &master->dev;
2035 	enum i3c_addr_slot_status addrstatus;
2036 	u32 init_dyn_addr = 0;
2037 
2038 	boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2039 	if (!boardinfo)
2040 		return -ENOMEM;
2041 
2042 	if (reg[0]) {
2043 		if (reg[0] > I3C_MAX_ADDR)
2044 			return -EINVAL;
2045 
2046 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2047 							  reg[0]);
2048 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2049 			return -EINVAL;
2050 	}
2051 
2052 	boardinfo->static_addr = reg[0];
2053 
2054 	if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2055 		if (init_dyn_addr > I3C_MAX_ADDR)
2056 			return -EINVAL;
2057 
2058 		addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2059 							  init_dyn_addr);
2060 		if (addrstatus != I3C_ADDR_SLOT_FREE)
2061 			return -EINVAL;
2062 	}
2063 
2064 	boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2065 
2066 	if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2067 	    I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2068 		return -EINVAL;
2069 
2070 	boardinfo->init_dyn_addr = init_dyn_addr;
2071 	boardinfo->of_node = of_node_get(node);
2072 	list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2073 
2074 	return 0;
2075 }
2076 
2077 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2078 				 struct device_node *node)
2079 {
2080 	u32 reg[3];
2081 	int ret;
2082 
2083 	if (!master || !node)
2084 		return -EINVAL;
2085 
2086 	ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2087 	if (ret)
2088 		return ret;
2089 
2090 	/*
2091 	 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2092 	 * dealing with an I2C device.
2093 	 */
2094 	if (!reg[1])
2095 		ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2096 	else
2097 		ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2098 
2099 	return ret;
2100 }
2101 
2102 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2103 {
2104 	struct device *dev = &master->dev;
2105 	struct device_node *i3cbus_np = dev->of_node;
2106 	struct device_node *node;
2107 	int ret;
2108 	u32 val;
2109 
2110 	if (!i3cbus_np)
2111 		return 0;
2112 
2113 	for_each_available_child_of_node(i3cbus_np, node) {
2114 		ret = of_i3c_master_add_dev(master, node);
2115 		if (ret) {
2116 			of_node_put(node);
2117 			return ret;
2118 		}
2119 	}
2120 
2121 	/*
2122 	 * The user might want to limit I2C and I3C speed in case some devices
2123 	 * on the bus are not supporting typical rates, or if the bus topology
2124 	 * prevents it from using max possible rate.
2125 	 */
2126 	if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2127 		master->bus.scl_rate.i2c = val;
2128 
2129 	if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2130 		master->bus.scl_rate.i3c = val;
2131 
2132 	return 0;
2133 }
2134 
2135 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2136 				       struct i2c_msg *xfers, int nxfers)
2137 {
2138 	struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2139 	struct i2c_dev_desc *dev;
2140 	int i, ret;
2141 	u16 addr;
2142 
2143 	if (!xfers || !master || nxfers <= 0)
2144 		return -EINVAL;
2145 
2146 	if (!master->ops->i2c_xfers)
2147 		return -ENOTSUPP;
2148 
2149 	/* Doing transfers to different devices is not supported. */
2150 	addr = xfers[0].addr;
2151 	for (i = 1; i < nxfers; i++) {
2152 		if (addr != xfers[i].addr)
2153 			return -ENOTSUPP;
2154 	}
2155 
2156 	i3c_bus_normaluse_lock(&master->bus);
2157 	dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2158 	if (!dev)
2159 		ret = -ENOENT;
2160 	else
2161 		ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2162 	i3c_bus_normaluse_unlock(&master->bus);
2163 
2164 	return ret ? ret : nxfers;
2165 }
2166 
2167 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2168 {
2169 	return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2170 }
2171 
2172 static const struct i2c_algorithm i3c_master_i2c_algo = {
2173 	.master_xfer = i3c_master_i2c_adapter_xfer,
2174 	.functionality = i3c_master_i2c_funcs,
2175 };
2176 
2177 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2178 {
2179 	struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2180 	struct i2c_dev_desc *i2cdev;
2181 	int ret;
2182 
2183 	adap->dev.parent = master->dev.parent;
2184 	adap->owner = master->dev.parent->driver->owner;
2185 	adap->algo = &i3c_master_i2c_algo;
2186 	strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2187 
2188 	/* FIXME: Should we allow i3c masters to override these values? */
2189 	adap->timeout = 1000;
2190 	adap->retries = 3;
2191 
2192 	ret = i2c_add_adapter(adap);
2193 	if (ret)
2194 		return ret;
2195 
2196 	/*
2197 	 * We silently ignore failures here. The bus should keep working
2198 	 * correctly even if one or more i2c devices are not registered.
2199 	 */
2200 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2201 		i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base);
2202 
2203 	return 0;
2204 }
2205 
2206 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2207 {
2208 	struct i2c_dev_desc *i2cdev;
2209 
2210 	i2c_del_adapter(&master->i2c);
2211 
2212 	i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2213 		i2cdev->dev = NULL;
2214 }
2215 
2216 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2217 {
2218 	struct i3c_dev_desc *i3cdev;
2219 
2220 	i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2221 		if (!i3cdev->dev)
2222 			continue;
2223 
2224 		i3cdev->dev->desc = NULL;
2225 		if (device_is_registered(&i3cdev->dev->dev))
2226 			device_unregister(&i3cdev->dev->dev);
2227 		else
2228 			put_device(&i3cdev->dev->dev);
2229 		i3cdev->dev = NULL;
2230 	}
2231 }
2232 
2233 /**
2234  * i3c_master_queue_ibi() - Queue an IBI
2235  * @dev: the device this IBI is coming from
2236  * @slot: the IBI slot used to store the payload
2237  *
2238  * Queue an IBI to the controller workqueue. The IBI handler attached to
2239  * the dev will be called from a workqueue context.
2240  */
2241 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2242 {
2243 	atomic_inc(&dev->ibi->pending_ibis);
2244 	queue_work(dev->common.master->wq, &slot->work);
2245 }
2246 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2247 
2248 static void i3c_master_handle_ibi(struct work_struct *work)
2249 {
2250 	struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2251 						 work);
2252 	struct i3c_dev_desc *dev = slot->dev;
2253 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2254 	struct i3c_ibi_payload payload;
2255 
2256 	payload.data = slot->data;
2257 	payload.len = slot->len;
2258 
2259 	if (dev->dev)
2260 		dev->ibi->handler(dev->dev, &payload);
2261 
2262 	master->ops->recycle_ibi_slot(dev, slot);
2263 	if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2264 		complete(&dev->ibi->all_ibis_handled);
2265 }
2266 
2267 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2268 				     struct i3c_ibi_slot *slot)
2269 {
2270 	slot->dev = dev;
2271 	INIT_WORK(&slot->work, i3c_master_handle_ibi);
2272 }
2273 
2274 struct i3c_generic_ibi_slot {
2275 	struct list_head node;
2276 	struct i3c_ibi_slot base;
2277 };
2278 
2279 struct i3c_generic_ibi_pool {
2280 	spinlock_t lock;
2281 	unsigned int num_slots;
2282 	struct i3c_generic_ibi_slot *slots;
2283 	void *payload_buf;
2284 	struct list_head free_slots;
2285 	struct list_head pending;
2286 };
2287 
2288 /**
2289  * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2290  * @pool: the IBI pool to free
2291  *
2292  * Free all IBI slots allated by a generic IBI pool.
2293  */
2294 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2295 {
2296 	struct i3c_generic_ibi_slot *slot;
2297 	unsigned int nslots = 0;
2298 
2299 	while (!list_empty(&pool->free_slots)) {
2300 		slot = list_first_entry(&pool->free_slots,
2301 					struct i3c_generic_ibi_slot, node);
2302 		list_del(&slot->node);
2303 		nslots++;
2304 	}
2305 
2306 	/*
2307 	 * If the number of freed slots is not equal to the number of allocated
2308 	 * slots we have a leak somewhere.
2309 	 */
2310 	WARN_ON(nslots != pool->num_slots);
2311 
2312 	kfree(pool->payload_buf);
2313 	kfree(pool->slots);
2314 	kfree(pool);
2315 }
2316 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2317 
2318 /**
2319  * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2320  * @dev: the device this pool will be used for
2321  * @req: IBI setup request describing what the device driver expects
2322  *
2323  * Create a generic IBI pool based on the information provided in @req.
2324  *
2325  * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2326  */
2327 struct i3c_generic_ibi_pool *
2328 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2329 			   const struct i3c_ibi_setup *req)
2330 {
2331 	struct i3c_generic_ibi_pool *pool;
2332 	struct i3c_generic_ibi_slot *slot;
2333 	unsigned int i;
2334 	int ret;
2335 
2336 	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2337 	if (!pool)
2338 		return ERR_PTR(-ENOMEM);
2339 
2340 	spin_lock_init(&pool->lock);
2341 	INIT_LIST_HEAD(&pool->free_slots);
2342 	INIT_LIST_HEAD(&pool->pending);
2343 
2344 	pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2345 	if (!pool->slots) {
2346 		ret = -ENOMEM;
2347 		goto err_free_pool;
2348 	}
2349 
2350 	if (req->max_payload_len) {
2351 		pool->payload_buf = kcalloc(req->num_slots,
2352 					    req->max_payload_len, GFP_KERNEL);
2353 		if (!pool->payload_buf) {
2354 			ret = -ENOMEM;
2355 			goto err_free_pool;
2356 		}
2357 	}
2358 
2359 	for (i = 0; i < req->num_slots; i++) {
2360 		slot = &pool->slots[i];
2361 		i3c_master_init_ibi_slot(dev, &slot->base);
2362 
2363 		if (req->max_payload_len)
2364 			slot->base.data = pool->payload_buf +
2365 					  (i * req->max_payload_len);
2366 
2367 		list_add_tail(&slot->node, &pool->free_slots);
2368 		pool->num_slots++;
2369 	}
2370 
2371 	return pool;
2372 
2373 err_free_pool:
2374 	i3c_generic_ibi_free_pool(pool);
2375 	return ERR_PTR(ret);
2376 }
2377 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2378 
2379 /**
2380  * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2381  * @pool: the pool to query an IBI slot on
2382  *
2383  * Search for a free slot in a generic IBI pool.
2384  * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2385  * when it's no longer needed.
2386  *
2387  * Return: a pointer to a free slot, or NULL if there's no free slot available.
2388  */
2389 struct i3c_ibi_slot *
2390 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2391 {
2392 	struct i3c_generic_ibi_slot *slot;
2393 	unsigned long flags;
2394 
2395 	spin_lock_irqsave(&pool->lock, flags);
2396 	slot = list_first_entry_or_null(&pool->free_slots,
2397 					struct i3c_generic_ibi_slot, node);
2398 	if (slot)
2399 		list_del(&slot->node);
2400 	spin_unlock_irqrestore(&pool->lock, flags);
2401 
2402 	return slot ? &slot->base : NULL;
2403 }
2404 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2405 
2406 /**
2407  * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2408  * @pool: the pool to return the IBI slot to
2409  * @s: IBI slot to recycle
2410  *
2411  * Add an IBI slot back to its generic IBI pool. Should be called from the
2412  * master driver struct_master_controller_ops->recycle_ibi() method.
2413  */
2414 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2415 				  struct i3c_ibi_slot *s)
2416 {
2417 	struct i3c_generic_ibi_slot *slot;
2418 	unsigned long flags;
2419 
2420 	if (!s)
2421 		return;
2422 
2423 	slot = container_of(s, struct i3c_generic_ibi_slot, base);
2424 	spin_lock_irqsave(&pool->lock, flags);
2425 	list_add_tail(&slot->node, &pool->free_slots);
2426 	spin_unlock_irqrestore(&pool->lock, flags);
2427 }
2428 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2429 
2430 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2431 {
2432 	if (!ops || !ops->bus_init || !ops->priv_xfers ||
2433 	    !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2434 		return -EINVAL;
2435 
2436 	if (ops->request_ibi &&
2437 	    (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2438 	     !ops->recycle_ibi_slot))
2439 		return -EINVAL;
2440 
2441 	return 0;
2442 }
2443 
2444 /**
2445  * i3c_master_register() - register an I3C master
2446  * @master: master used to send frames on the bus
2447  * @parent: the parent device (the one that provides this I3C master
2448  *	    controller)
2449  * @ops: the master controller operations
2450  * @secondary: true if you are registering a secondary master. Will return
2451  *	       -ENOTSUPP if set to true since secondary masters are not yet
2452  *	       supported
2453  *
2454  * This function takes care of everything for you:
2455  *
2456  * - creates and initializes the I3C bus
2457  * - populates the bus with static I2C devs if @parent->of_node is not
2458  *   NULL
2459  * - registers all I3C devices added by the controller during bus
2460  *   initialization
2461  * - registers the I2C adapter and all I2C devices
2462  *
2463  * Return: 0 in case of success, a negative error code otherwise.
2464  */
2465 int i3c_master_register(struct i3c_master_controller *master,
2466 			struct device *parent,
2467 			const struct i3c_master_controller_ops *ops,
2468 			bool secondary)
2469 {
2470 	unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2471 	struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2472 	enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2473 	struct i2c_dev_boardinfo *i2cbi;
2474 	int ret;
2475 
2476 	/* We do not support secondary masters yet. */
2477 	if (secondary)
2478 		return -ENOTSUPP;
2479 
2480 	ret = i3c_master_check_ops(ops);
2481 	if (ret)
2482 		return ret;
2483 
2484 	master->dev.parent = parent;
2485 	master->dev.of_node = of_node_get(parent->of_node);
2486 	master->dev.bus = &i3c_bus_type;
2487 	master->dev.type = &i3c_masterdev_type;
2488 	master->dev.release = i3c_masterdev_release;
2489 	master->ops = ops;
2490 	master->secondary = secondary;
2491 	INIT_LIST_HEAD(&master->boardinfo.i2c);
2492 	INIT_LIST_HEAD(&master->boardinfo.i3c);
2493 
2494 	ret = i3c_bus_init(i3cbus);
2495 	if (ret)
2496 		return ret;
2497 
2498 	device_initialize(&master->dev);
2499 	dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2500 
2501 	ret = of_populate_i3c_bus(master);
2502 	if (ret)
2503 		goto err_put_dev;
2504 
2505 	list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2506 		switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2507 		case I3C_LVR_I2C_INDEX(0):
2508 			if (mode < I3C_BUS_MODE_MIXED_FAST)
2509 				mode = I3C_BUS_MODE_MIXED_FAST;
2510 			break;
2511 		case I3C_LVR_I2C_INDEX(1):
2512 			if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2513 				mode = I3C_BUS_MODE_MIXED_LIMITED;
2514 			break;
2515 		case I3C_LVR_I2C_INDEX(2):
2516 			if (mode < I3C_BUS_MODE_MIXED_SLOW)
2517 				mode = I3C_BUS_MODE_MIXED_SLOW;
2518 			break;
2519 		default:
2520 			ret = -EINVAL;
2521 			goto err_put_dev;
2522 		}
2523 
2524 		if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2525 			i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2526 	}
2527 
2528 	ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2529 	if (ret)
2530 		goto err_put_dev;
2531 
2532 	master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2533 	if (!master->wq) {
2534 		ret = -ENOMEM;
2535 		goto err_put_dev;
2536 	}
2537 
2538 	ret = i3c_master_bus_init(master);
2539 	if (ret)
2540 		goto err_put_dev;
2541 
2542 	ret = device_add(&master->dev);
2543 	if (ret)
2544 		goto err_cleanup_bus;
2545 
2546 	/*
2547 	 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2548 	 * through the I2C subsystem.
2549 	 */
2550 	ret = i3c_master_i2c_adapter_init(master);
2551 	if (ret)
2552 		goto err_del_dev;
2553 
2554 	/*
2555 	 * We're done initializing the bus and the controller, we can now
2556 	 * register I3C devices discovered during the initial DAA.
2557 	 */
2558 	master->init_done = true;
2559 	i3c_bus_normaluse_lock(&master->bus);
2560 	i3c_master_register_new_i3c_devs(master);
2561 	i3c_bus_normaluse_unlock(&master->bus);
2562 
2563 	return 0;
2564 
2565 err_del_dev:
2566 	device_del(&master->dev);
2567 
2568 err_cleanup_bus:
2569 	i3c_master_bus_cleanup(master);
2570 
2571 err_put_dev:
2572 	put_device(&master->dev);
2573 
2574 	return ret;
2575 }
2576 EXPORT_SYMBOL_GPL(i3c_master_register);
2577 
2578 /**
2579  * i3c_master_unregister() - unregister an I3C master
2580  * @master: master used to send frames on the bus
2581  *
2582  * Basically undo everything done in i3c_master_register().
2583  *
2584  * Return: 0 in case of success, a negative error code otherwise.
2585  */
2586 int i3c_master_unregister(struct i3c_master_controller *master)
2587 {
2588 	i3c_master_i2c_adapter_cleanup(master);
2589 	i3c_master_unregister_i3c_devs(master);
2590 	i3c_master_bus_cleanup(master);
2591 	device_unregister(&master->dev);
2592 
2593 	return 0;
2594 }
2595 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2596 
2597 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2598 				 struct i3c_priv_xfer *xfers,
2599 				 int nxfers)
2600 {
2601 	struct i3c_master_controller *master;
2602 
2603 	if (!dev)
2604 		return -ENOENT;
2605 
2606 	master = i3c_dev_get_master(dev);
2607 	if (!master || !xfers)
2608 		return -EINVAL;
2609 
2610 	if (!master->ops->priv_xfers)
2611 		return -ENOTSUPP;
2612 
2613 	return master->ops->priv_xfers(dev, xfers, nxfers);
2614 }
2615 
2616 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2617 {
2618 	struct i3c_master_controller *master;
2619 	int ret;
2620 
2621 	if (!dev->ibi)
2622 		return -EINVAL;
2623 
2624 	master = i3c_dev_get_master(dev);
2625 	ret = master->ops->disable_ibi(dev);
2626 	if (ret)
2627 		return ret;
2628 
2629 	reinit_completion(&dev->ibi->all_ibis_handled);
2630 	if (atomic_read(&dev->ibi->pending_ibis))
2631 		wait_for_completion(&dev->ibi->all_ibis_handled);
2632 
2633 	dev->ibi->enabled = false;
2634 
2635 	return 0;
2636 }
2637 
2638 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2639 {
2640 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2641 	int ret;
2642 
2643 	if (!dev->ibi)
2644 		return -EINVAL;
2645 
2646 	ret = master->ops->enable_ibi(dev);
2647 	if (!ret)
2648 		dev->ibi->enabled = true;
2649 
2650 	return ret;
2651 }
2652 
2653 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2654 			       const struct i3c_ibi_setup *req)
2655 {
2656 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2657 	struct i3c_device_ibi_info *ibi;
2658 	int ret;
2659 
2660 	if (!master->ops->request_ibi)
2661 		return -ENOTSUPP;
2662 
2663 	if (dev->ibi)
2664 		return -EBUSY;
2665 
2666 	ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2667 	if (!ibi)
2668 		return -ENOMEM;
2669 
2670 	atomic_set(&ibi->pending_ibis, 0);
2671 	init_completion(&ibi->all_ibis_handled);
2672 	ibi->handler = req->handler;
2673 	ibi->max_payload_len = req->max_payload_len;
2674 	ibi->num_slots = req->num_slots;
2675 
2676 	dev->ibi = ibi;
2677 	ret = master->ops->request_ibi(dev, req);
2678 	if (ret) {
2679 		kfree(ibi);
2680 		dev->ibi = NULL;
2681 	}
2682 
2683 	return ret;
2684 }
2685 
2686 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2687 {
2688 	struct i3c_master_controller *master = i3c_dev_get_master(dev);
2689 
2690 	if (!dev->ibi)
2691 		return;
2692 
2693 	if (WARN_ON(dev->ibi->enabled))
2694 		WARN_ON(i3c_dev_disable_ibi_locked(dev));
2695 
2696 	master->ops->free_ibi(dev);
2697 	kfree(dev->ibi);
2698 	dev->ibi = NULL;
2699 }
2700 
2701 static int __init i3c_init(void)
2702 {
2703 	return bus_register(&i3c_bus_type);
2704 }
2705 subsys_initcall(i3c_init);
2706 
2707 static void __exit i3c_exit(void)
2708 {
2709 	idr_destroy(&i3c_bus_idr);
2710 	bus_unregister(&i3c_bus_type);
2711 }
2712 module_exit(i3c_exit);
2713 
2714 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2715 MODULE_DESCRIPTION("I3C core");
2716 MODULE_LICENSE("GPL v2");
2717