1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/list.h> 15 #include <linux/of.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 #include <linux/workqueue.h> 19 20 #include "internals.h" 21 22 static DEFINE_IDR(i3c_bus_idr); 23 static DEFINE_MUTEX(i3c_core_lock); 24 static int __i3c_first_dynamic_bus_num; 25 26 /** 27 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 28 * @bus: I3C bus to take the lock on 29 * 30 * This function takes the bus lock so that no other operations can occur on 31 * the bus. This is needed for all kind of bus maintenance operation, like 32 * - enabling/disabling slave events 33 * - re-triggering DAA 34 * - changing the dynamic address of a device 35 * - relinquishing mastership 36 * - ... 37 * 38 * The reason for this kind of locking is that we don't want drivers and core 39 * logic to rely on I3C device information that could be changed behind their 40 * back. 41 */ 42 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 43 { 44 down_write(&bus->lock); 45 } 46 47 /** 48 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 49 * operation 50 * @bus: I3C bus to release the lock on 51 * 52 * Should be called when the bus maintenance operation is done. See 53 * i3c_bus_maintenance_lock() for more details on what these maintenance 54 * operations are. 55 */ 56 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 57 { 58 up_write(&bus->lock); 59 } 60 61 /** 62 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 63 * @bus: I3C bus to take the lock on 64 * 65 * This function takes the bus lock for any operation that is not a maintenance 66 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 67 * maintenance operations). Basically all communications with I3C devices are 68 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 69 * state or I3C dynamic address). 70 * 71 * Note that this lock is not guaranteeing serialization of normal operations. 72 * In other words, transfer requests passed to the I3C master can be submitted 73 * in parallel and I3C master drivers have to use their own locking to make 74 * sure two different communications are not inter-mixed, or access to the 75 * output/input queue is not done while the engine is busy. 76 */ 77 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 78 { 79 down_read(&bus->lock); 80 } 81 82 /** 83 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 84 * @bus: I3C bus to release the lock on 85 * 86 * Should be called when a normal operation is done. See 87 * i3c_bus_normaluse_lock() for more details on what these normal operations 88 * are. 89 */ 90 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 91 { 92 up_read(&bus->lock); 93 } 94 95 static struct i3c_master_controller * 96 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 97 { 98 return container_of(i3cbus, struct i3c_master_controller, bus); 99 } 100 101 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 102 { 103 return container_of(dev, struct i3c_master_controller, dev); 104 } 105 106 static const struct device_type i3c_device_type; 107 108 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 109 { 110 struct i3c_master_controller *master; 111 112 if (dev->type == &i3c_device_type) 113 return dev_to_i3cdev(dev)->bus; 114 115 master = dev_to_i3cmaster(dev); 116 117 return &master->bus; 118 } 119 120 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 121 { 122 struct i3c_master_controller *master; 123 124 if (dev->type == &i3c_device_type) 125 return dev_to_i3cdev(dev)->desc; 126 127 master = dev_to_i3cmaster(dev); 128 129 return master->this; 130 } 131 132 static ssize_t bcr_show(struct device *dev, 133 struct device_attribute *da, 134 char *buf) 135 { 136 struct i3c_bus *bus = dev_to_i3cbus(dev); 137 struct i3c_dev_desc *desc; 138 ssize_t ret; 139 140 i3c_bus_normaluse_lock(bus); 141 desc = dev_to_i3cdesc(dev); 142 ret = sprintf(buf, "%x\n", desc->info.bcr); 143 i3c_bus_normaluse_unlock(bus); 144 145 return ret; 146 } 147 static DEVICE_ATTR_RO(bcr); 148 149 static ssize_t dcr_show(struct device *dev, 150 struct device_attribute *da, 151 char *buf) 152 { 153 struct i3c_bus *bus = dev_to_i3cbus(dev); 154 struct i3c_dev_desc *desc; 155 ssize_t ret; 156 157 i3c_bus_normaluse_lock(bus); 158 desc = dev_to_i3cdesc(dev); 159 ret = sprintf(buf, "%x\n", desc->info.dcr); 160 i3c_bus_normaluse_unlock(bus); 161 162 return ret; 163 } 164 static DEVICE_ATTR_RO(dcr); 165 166 static ssize_t pid_show(struct device *dev, 167 struct device_attribute *da, 168 char *buf) 169 { 170 struct i3c_bus *bus = dev_to_i3cbus(dev); 171 struct i3c_dev_desc *desc; 172 ssize_t ret; 173 174 i3c_bus_normaluse_lock(bus); 175 desc = dev_to_i3cdesc(dev); 176 ret = sprintf(buf, "%llx\n", desc->info.pid); 177 i3c_bus_normaluse_unlock(bus); 178 179 return ret; 180 } 181 static DEVICE_ATTR_RO(pid); 182 183 static ssize_t dynamic_address_show(struct device *dev, 184 struct device_attribute *da, 185 char *buf) 186 { 187 struct i3c_bus *bus = dev_to_i3cbus(dev); 188 struct i3c_dev_desc *desc; 189 ssize_t ret; 190 191 i3c_bus_normaluse_lock(bus); 192 desc = dev_to_i3cdesc(dev); 193 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 194 i3c_bus_normaluse_unlock(bus); 195 196 return ret; 197 } 198 static DEVICE_ATTR_RO(dynamic_address); 199 200 static const char * const hdrcap_strings[] = { 201 "hdr-ddr", "hdr-tsp", "hdr-tsl", 202 }; 203 204 static ssize_t hdrcap_show(struct device *dev, 205 struct device_attribute *da, 206 char *buf) 207 { 208 struct i3c_bus *bus = dev_to_i3cbus(dev); 209 struct i3c_dev_desc *desc; 210 ssize_t offset = 0, ret; 211 unsigned long caps; 212 int mode; 213 214 i3c_bus_normaluse_lock(bus); 215 desc = dev_to_i3cdesc(dev); 216 caps = desc->info.hdr_cap; 217 for_each_set_bit(mode, &caps, 8) { 218 if (mode >= ARRAY_SIZE(hdrcap_strings)) 219 break; 220 221 if (!hdrcap_strings[mode]) 222 continue; 223 224 ret = sprintf(buf + offset, offset ? " %s" : "%s", 225 hdrcap_strings[mode]); 226 if (ret < 0) 227 goto out; 228 229 offset += ret; 230 } 231 232 ret = sprintf(buf + offset, "\n"); 233 if (ret < 0) 234 goto out; 235 236 ret = offset + ret; 237 238 out: 239 i3c_bus_normaluse_unlock(bus); 240 241 return ret; 242 } 243 static DEVICE_ATTR_RO(hdrcap); 244 245 static ssize_t modalias_show(struct device *dev, 246 struct device_attribute *da, char *buf) 247 { 248 struct i3c_device *i3c = dev_to_i3cdev(dev); 249 struct i3c_device_info devinfo; 250 u16 manuf, part, ext; 251 252 i3c_device_get_info(i3c, &devinfo); 253 manuf = I3C_PID_MANUF_ID(devinfo.pid); 254 part = I3C_PID_PART_ID(devinfo.pid); 255 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 256 257 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 258 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 259 manuf); 260 261 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 262 devinfo.dcr, manuf, part, ext); 263 } 264 static DEVICE_ATTR_RO(modalias); 265 266 static struct attribute *i3c_device_attrs[] = { 267 &dev_attr_bcr.attr, 268 &dev_attr_dcr.attr, 269 &dev_attr_pid.attr, 270 &dev_attr_dynamic_address.attr, 271 &dev_attr_hdrcap.attr, 272 &dev_attr_modalias.attr, 273 NULL, 274 }; 275 ATTRIBUTE_GROUPS(i3c_device); 276 277 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env) 278 { 279 const struct i3c_device *i3cdev = dev_to_i3cdev(dev); 280 struct i3c_device_info devinfo; 281 u16 manuf, part, ext; 282 283 if (i3cdev->desc) 284 devinfo = i3cdev->desc->info; 285 manuf = I3C_PID_MANUF_ID(devinfo.pid); 286 part = I3C_PID_PART_ID(devinfo.pid); 287 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 288 289 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 290 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 291 devinfo.dcr, manuf); 292 293 return add_uevent_var(env, 294 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 295 devinfo.dcr, manuf, part, ext); 296 } 297 298 static const struct device_type i3c_device_type = { 299 .groups = i3c_device_groups, 300 .uevent = i3c_device_uevent, 301 }; 302 303 static int i3c_device_match(struct device *dev, struct device_driver *drv) 304 { 305 struct i3c_device *i3cdev; 306 struct i3c_driver *i3cdrv; 307 308 if (dev->type != &i3c_device_type) 309 return 0; 310 311 i3cdev = dev_to_i3cdev(dev); 312 i3cdrv = drv_to_i3cdrv(drv); 313 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 314 return 1; 315 316 return 0; 317 } 318 319 static int i3c_device_probe(struct device *dev) 320 { 321 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 322 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 323 324 return driver->probe(i3cdev); 325 } 326 327 static void i3c_device_remove(struct device *dev) 328 { 329 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 330 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 331 332 if (driver->remove) 333 driver->remove(i3cdev); 334 335 i3c_device_free_ibi(i3cdev); 336 } 337 338 struct bus_type i3c_bus_type = { 339 .name = "i3c", 340 .match = i3c_device_match, 341 .probe = i3c_device_probe, 342 .remove = i3c_device_remove, 343 }; 344 345 static enum i3c_addr_slot_status 346 i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask) 347 { 348 unsigned long status; 349 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 350 351 if (addr > I2C_MAX_ADDR) 352 return I3C_ADDR_SLOT_RSVD; 353 354 status = bus->addrslots[bitpos / BITS_PER_LONG]; 355 status >>= bitpos % BITS_PER_LONG; 356 357 return status & mask; 358 } 359 360 static enum i3c_addr_slot_status 361 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 362 { 363 return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK); 364 } 365 366 static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, 367 enum i3c_addr_slot_status status, u32 mask) 368 { 369 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 370 unsigned long *ptr; 371 372 if (addr > I2C_MAX_ADDR) 373 return; 374 375 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 376 *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG)); 377 *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG); 378 } 379 380 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 381 enum i3c_addr_slot_status status) 382 { 383 i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK); 384 } 385 386 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 387 { 388 enum i3c_addr_slot_status status; 389 390 status = i3c_bus_get_addr_slot_status(bus, addr); 391 392 return status == I3C_ADDR_SLOT_FREE; 393 } 394 395 /* 396 * ┌────┬─────────────┬───┬─────────┬───┐ 397 * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐ 398 * └────┴─────────────┴───┴─────────┴───┘ │ 399 * ┌─────────────────────────────────────────┘ 400 * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐ 401 * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│ 402 * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘ 403 * Some master controllers (such as HCI) need to prepare the entire above transaction before 404 * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated 405 * before knowing the target device's UID information. 406 * 407 * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is 408 * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI 409 * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is 410 * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with 411 * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise, 412 * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be 413 * able to switch to its desired address. 414 * 415 * If the previous step fails, fallback returning one of the remaining unassigned address, 416 * regardless of its state in the desired list. 417 */ 418 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 419 { 420 enum i3c_addr_slot_status status; 421 u8 addr; 422 423 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 424 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 425 I3C_ADDR_SLOT_EXT_STATUS_MASK); 426 if (status == I3C_ADDR_SLOT_FREE) 427 return addr; 428 } 429 430 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 431 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 432 I3C_ADDR_SLOT_STATUS_MASK); 433 if (status == I3C_ADDR_SLOT_FREE) 434 return addr; 435 } 436 437 return -ENOMEM; 438 } 439 440 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 441 { 442 int i; 443 444 /* Addresses 0 to 7 are reserved. */ 445 for (i = 0; i < 8; i++) 446 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 447 448 /* 449 * Reserve broadcast address and all addresses that might collide 450 * with the broadcast address when facing a single bit error. 451 */ 452 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 453 I3C_ADDR_SLOT_RSVD); 454 for (i = 0; i < 7; i++) 455 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 456 I3C_ADDR_SLOT_RSVD); 457 } 458 459 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 460 { 461 mutex_lock(&i3c_core_lock); 462 idr_remove(&i3c_bus_idr, i3cbus->id); 463 mutex_unlock(&i3c_core_lock); 464 } 465 466 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) 467 { 468 int ret, start, end, id = -1; 469 470 init_rwsem(&i3cbus->lock); 471 INIT_LIST_HEAD(&i3cbus->devs.i2c); 472 INIT_LIST_HEAD(&i3cbus->devs.i3c); 473 i3c_bus_init_addrslots(i3cbus); 474 i3cbus->mode = I3C_BUS_MODE_PURE; 475 476 if (np) 477 id = of_alias_get_id(np, "i3c"); 478 479 mutex_lock(&i3c_core_lock); 480 if (id >= 0) { 481 start = id; 482 end = start + 1; 483 } else { 484 start = __i3c_first_dynamic_bus_num; 485 end = 0; 486 } 487 488 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL); 489 mutex_unlock(&i3c_core_lock); 490 491 if (ret < 0) 492 return ret; 493 494 i3cbus->id = ret; 495 496 return 0; 497 } 498 499 static const char * const i3c_bus_mode_strings[] = { 500 [I3C_BUS_MODE_PURE] = "pure", 501 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 502 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 503 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 504 }; 505 506 static ssize_t mode_show(struct device *dev, 507 struct device_attribute *da, 508 char *buf) 509 { 510 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 511 ssize_t ret; 512 513 i3c_bus_normaluse_lock(i3cbus); 514 if (i3cbus->mode < 0 || 515 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 516 !i3c_bus_mode_strings[i3cbus->mode]) 517 ret = sprintf(buf, "unknown\n"); 518 else 519 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 520 i3c_bus_normaluse_unlock(i3cbus); 521 522 return ret; 523 } 524 static DEVICE_ATTR_RO(mode); 525 526 static ssize_t current_master_show(struct device *dev, 527 struct device_attribute *da, 528 char *buf) 529 { 530 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 531 ssize_t ret; 532 533 i3c_bus_normaluse_lock(i3cbus); 534 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 535 i3cbus->cur_master->info.pid); 536 i3c_bus_normaluse_unlock(i3cbus); 537 538 return ret; 539 } 540 static DEVICE_ATTR_RO(current_master); 541 542 static ssize_t i3c_scl_frequency_show(struct device *dev, 543 struct device_attribute *da, 544 char *buf) 545 { 546 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 547 ssize_t ret; 548 549 i3c_bus_normaluse_lock(i3cbus); 550 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 551 i3c_bus_normaluse_unlock(i3cbus); 552 553 return ret; 554 } 555 static DEVICE_ATTR_RO(i3c_scl_frequency); 556 557 static ssize_t i2c_scl_frequency_show(struct device *dev, 558 struct device_attribute *da, 559 char *buf) 560 { 561 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 562 ssize_t ret; 563 564 i3c_bus_normaluse_lock(i3cbus); 565 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 566 i3c_bus_normaluse_unlock(i3cbus); 567 568 return ret; 569 } 570 static DEVICE_ATTR_RO(i2c_scl_frequency); 571 572 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) 573 { 574 int ret; 575 576 if (!master || !master->ops) 577 return -EINVAL; 578 579 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin) 580 return -EINVAL; 581 582 i3c_bus_normaluse_lock(&master->bus); 583 584 if (enable) 585 ret = master->ops->enable_hotjoin(master); 586 else 587 ret = master->ops->disable_hotjoin(master); 588 589 master->hotjoin = enable; 590 591 i3c_bus_normaluse_unlock(&master->bus); 592 593 return ret; 594 } 595 596 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr, 597 const char *buf, size_t count) 598 { 599 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 600 int ret; 601 bool res; 602 603 if (!i3cbus->cur_master) 604 return -EINVAL; 605 606 if (kstrtobool(buf, &res)) 607 return -EINVAL; 608 609 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res); 610 if (ret) 611 return ret; 612 613 return count; 614 } 615 616 /* 617 * i3c_master_enable_hotjoin - Enable hotjoin 618 * @master: I3C master object 619 * 620 * Return: a 0 in case of success, an negative error code otherwise. 621 */ 622 int i3c_master_enable_hotjoin(struct i3c_master_controller *master) 623 { 624 return i3c_set_hotjoin(master, true); 625 } 626 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin); 627 628 /* 629 * i3c_master_disable_hotjoin - Disable hotjoin 630 * @master: I3C master object 631 * 632 * Return: a 0 in case of success, an negative error code otherwise. 633 */ 634 int i3c_master_disable_hotjoin(struct i3c_master_controller *master) 635 { 636 return i3c_set_hotjoin(master, false); 637 } 638 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin); 639 640 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf) 641 { 642 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 643 ssize_t ret; 644 645 i3c_bus_normaluse_lock(i3cbus); 646 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin); 647 i3c_bus_normaluse_unlock(i3cbus); 648 649 return ret; 650 } 651 652 static DEVICE_ATTR_RW(hotjoin); 653 654 static struct attribute *i3c_masterdev_attrs[] = { 655 &dev_attr_mode.attr, 656 &dev_attr_current_master.attr, 657 &dev_attr_i3c_scl_frequency.attr, 658 &dev_attr_i2c_scl_frequency.attr, 659 &dev_attr_bcr.attr, 660 &dev_attr_dcr.attr, 661 &dev_attr_pid.attr, 662 &dev_attr_dynamic_address.attr, 663 &dev_attr_hdrcap.attr, 664 &dev_attr_hotjoin.attr, 665 NULL, 666 }; 667 ATTRIBUTE_GROUPS(i3c_masterdev); 668 669 static void i3c_masterdev_release(struct device *dev) 670 { 671 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 672 struct i3c_bus *bus = dev_to_i3cbus(dev); 673 674 if (master->wq) 675 destroy_workqueue(master->wq); 676 677 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 678 i3c_bus_cleanup(bus); 679 680 of_node_put(dev->of_node); 681 } 682 683 static const struct device_type i3c_masterdev_type = { 684 .groups = i3c_masterdev_groups, 685 }; 686 687 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 688 unsigned long max_i2c_scl_rate) 689 { 690 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 691 692 i3cbus->mode = mode; 693 694 switch (i3cbus->mode) { 695 case I3C_BUS_MODE_PURE: 696 if (!i3cbus->scl_rate.i3c) 697 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 698 break; 699 case I3C_BUS_MODE_MIXED_FAST: 700 case I3C_BUS_MODE_MIXED_LIMITED: 701 if (!i3cbus->scl_rate.i3c) 702 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 703 if (!i3cbus->scl_rate.i2c) 704 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 705 break; 706 case I3C_BUS_MODE_MIXED_SLOW: 707 if (!i3cbus->scl_rate.i2c) 708 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 709 if (!i3cbus->scl_rate.i3c || 710 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 711 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 712 break; 713 default: 714 return -EINVAL; 715 } 716 717 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 718 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 719 720 /* 721 * I3C/I2C frequency may have been overridden, check that user-provided 722 * values are not exceeding max possible frequency. 723 */ 724 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 725 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 726 return -EINVAL; 727 728 return 0; 729 } 730 731 static struct i3c_master_controller * 732 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 733 { 734 return container_of(adap, struct i3c_master_controller, i2c); 735 } 736 737 static struct i2c_adapter * 738 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 739 { 740 return &master->i2c; 741 } 742 743 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 744 { 745 kfree(dev); 746 } 747 748 static struct i2c_dev_desc * 749 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 750 u16 addr, u8 lvr) 751 { 752 struct i2c_dev_desc *dev; 753 754 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 755 if (!dev) 756 return ERR_PTR(-ENOMEM); 757 758 dev->common.master = master; 759 dev->addr = addr; 760 dev->lvr = lvr; 761 762 return dev; 763 } 764 765 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 766 u16 payloadlen) 767 { 768 dest->addr = addr; 769 dest->payload.len = payloadlen; 770 if (payloadlen) 771 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 772 else 773 dest->payload.data = NULL; 774 775 return dest->payload.data; 776 } 777 778 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 779 { 780 kfree(dest->payload.data); 781 } 782 783 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 784 struct i3c_ccc_cmd_dest *dests, 785 unsigned int ndests) 786 { 787 cmd->rnw = rnw ? 1 : 0; 788 cmd->id = id; 789 cmd->dests = dests; 790 cmd->ndests = ndests; 791 cmd->err = I3C_ERROR_UNKNOWN; 792 } 793 794 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 795 struct i3c_ccc_cmd *cmd) 796 { 797 int ret; 798 799 if (!cmd || !master) 800 return -EINVAL; 801 802 if (WARN_ON(master->init_done && 803 !rwsem_is_locked(&master->bus.lock))) 804 return -EINVAL; 805 806 if (!master->ops->send_ccc_cmd) 807 return -ENOTSUPP; 808 809 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 810 return -EINVAL; 811 812 if (master->ops->supports_ccc_cmd && 813 !master->ops->supports_ccc_cmd(master, cmd)) 814 return -ENOTSUPP; 815 816 ret = master->ops->send_ccc_cmd(master, cmd); 817 if (ret) { 818 if (cmd->err != I3C_ERROR_UNKNOWN) 819 return cmd->err; 820 821 return ret; 822 } 823 824 return 0; 825 } 826 827 static struct i2c_dev_desc * 828 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 829 u16 addr) 830 { 831 struct i2c_dev_desc *dev; 832 833 i3c_bus_for_each_i2cdev(&master->bus, dev) { 834 if (dev->addr == addr) 835 return dev; 836 } 837 838 return NULL; 839 } 840 841 /** 842 * i3c_master_get_free_addr() - get a free address on the bus 843 * @master: I3C master object 844 * @start_addr: where to start searching 845 * 846 * This function must be called with the bus lock held in write mode. 847 * 848 * Return: the first free address starting at @start_addr (included) or -ENOMEM 849 * if there's no more address available. 850 */ 851 int i3c_master_get_free_addr(struct i3c_master_controller *master, 852 u8 start_addr) 853 { 854 return i3c_bus_get_free_addr(&master->bus, start_addr); 855 } 856 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 857 858 static void i3c_device_release(struct device *dev) 859 { 860 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 861 862 WARN_ON(i3cdev->desc); 863 864 of_node_put(i3cdev->dev.of_node); 865 kfree(i3cdev); 866 } 867 868 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 869 { 870 kfree(dev); 871 } 872 873 static struct i3c_dev_desc * 874 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 875 const struct i3c_device_info *info) 876 { 877 struct i3c_dev_desc *dev; 878 879 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 880 if (!dev) 881 return ERR_PTR(-ENOMEM); 882 883 dev->common.master = master; 884 dev->info = *info; 885 mutex_init(&dev->ibi_lock); 886 887 return dev; 888 } 889 890 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 891 u8 addr) 892 { 893 enum i3c_addr_slot_status addrstat; 894 struct i3c_ccc_cmd_dest dest; 895 struct i3c_ccc_cmd cmd; 896 int ret; 897 898 if (!master) 899 return -EINVAL; 900 901 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 902 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 903 return -EINVAL; 904 905 i3c_ccc_cmd_dest_init(&dest, addr, 0); 906 i3c_ccc_cmd_init(&cmd, false, 907 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 908 &dest, 1); 909 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 910 i3c_ccc_cmd_dest_cleanup(&dest); 911 912 return ret; 913 } 914 915 /** 916 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 917 * procedure 918 * @master: master used to send frames on the bus 919 * 920 * Send a ENTDAA CCC command to start a DAA procedure. 921 * 922 * Note that this function only sends the ENTDAA CCC command, all the logic 923 * behind dynamic address assignment has to be handled in the I3C master 924 * driver. 925 * 926 * This function must be called with the bus lock held in write mode. 927 * 928 * Return: 0 in case of success, a positive I3C error code if the error is 929 * one of the official Mx error codes, and a negative error code otherwise. 930 */ 931 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 932 { 933 struct i3c_ccc_cmd_dest dest; 934 struct i3c_ccc_cmd cmd; 935 int ret; 936 937 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 938 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 939 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 940 i3c_ccc_cmd_dest_cleanup(&dest); 941 942 return ret; 943 } 944 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 945 946 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 947 u8 addr, bool enable, u8 evts) 948 { 949 struct i3c_ccc_events *events; 950 struct i3c_ccc_cmd_dest dest; 951 struct i3c_ccc_cmd cmd; 952 int ret; 953 954 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 955 if (!events) 956 return -ENOMEM; 957 958 events->events = evts; 959 i3c_ccc_cmd_init(&cmd, false, 960 enable ? 961 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 962 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 963 &dest, 1); 964 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 965 i3c_ccc_cmd_dest_cleanup(&dest); 966 967 return ret; 968 } 969 970 /** 971 * i3c_master_disec_locked() - send a DISEC CCC command 972 * @master: master used to send frames on the bus 973 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 974 * @evts: events to disable 975 * 976 * Send a DISEC CCC command to disable some or all events coming from a 977 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 978 * 979 * This function must be called with the bus lock held in write mode. 980 * 981 * Return: 0 in case of success, a positive I3C error code if the error is 982 * one of the official Mx error codes, and a negative error code otherwise. 983 */ 984 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 985 u8 evts) 986 { 987 return i3c_master_enec_disec_locked(master, addr, false, evts); 988 } 989 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 990 991 /** 992 * i3c_master_enec_locked() - send an ENEC CCC command 993 * @master: master used to send frames on the bus 994 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 995 * @evts: events to disable 996 * 997 * Sends an ENEC CCC command to enable some or all events coming from a 998 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 999 * 1000 * This function must be called with the bus lock held in write mode. 1001 * 1002 * Return: 0 in case of success, a positive I3C error code if the error is 1003 * one of the official Mx error codes, and a negative error code otherwise. 1004 */ 1005 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 1006 u8 evts) 1007 { 1008 return i3c_master_enec_disec_locked(master, addr, true, evts); 1009 } 1010 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 1011 1012 /** 1013 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 1014 * @master: master used to send frames on the bus 1015 * 1016 * Send a DEFSLVS CCC command containing all the devices known to the @master. 1017 * This is useful when you have secondary masters on the bus to propagate 1018 * device information. 1019 * 1020 * This should be called after all I3C devices have been discovered (in other 1021 * words, after the DAA procedure has finished) and instantiated in 1022 * &i3c_master_controller_ops->bus_init(). 1023 * It should also be called if a master ACKed an Hot-Join request and assigned 1024 * a dynamic address to the device joining the bus. 1025 * 1026 * This function must be called with the bus lock held in write mode. 1027 * 1028 * Return: 0 in case of success, a positive I3C error code if the error is 1029 * one of the official Mx error codes, and a negative error code otherwise. 1030 */ 1031 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 1032 { 1033 struct i3c_ccc_defslvs *defslvs; 1034 struct i3c_ccc_dev_desc *desc; 1035 struct i3c_ccc_cmd_dest dest; 1036 struct i3c_dev_desc *i3cdev; 1037 struct i2c_dev_desc *i2cdev; 1038 struct i3c_ccc_cmd cmd; 1039 struct i3c_bus *bus; 1040 bool send = false; 1041 int ndevs = 0, ret; 1042 1043 if (!master) 1044 return -EINVAL; 1045 1046 bus = i3c_master_get_bus(master); 1047 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1048 ndevs++; 1049 1050 if (i3cdev == master->this) 1051 continue; 1052 1053 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 1054 I3C_BCR_I3C_MASTER) 1055 send = true; 1056 } 1057 1058 /* No other master on the bus, skip DEFSLVS. */ 1059 if (!send) 1060 return 0; 1061 1062 i3c_bus_for_each_i2cdev(bus, i2cdev) 1063 ndevs++; 1064 1065 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 1066 struct_size(defslvs, slaves, 1067 ndevs - 1)); 1068 if (!defslvs) 1069 return -ENOMEM; 1070 1071 defslvs->count = ndevs; 1072 defslvs->master.bcr = master->this->info.bcr; 1073 defslvs->master.dcr = master->this->info.dcr; 1074 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 1075 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 1076 1077 desc = defslvs->slaves; 1078 i3c_bus_for_each_i2cdev(bus, i2cdev) { 1079 desc->lvr = i2cdev->lvr; 1080 desc->static_addr = i2cdev->addr << 1; 1081 desc++; 1082 } 1083 1084 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1085 /* Skip the I3C dev representing this master. */ 1086 if (i3cdev == master->this) 1087 continue; 1088 1089 desc->bcr = i3cdev->info.bcr; 1090 desc->dcr = i3cdev->info.dcr; 1091 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 1092 desc->static_addr = i3cdev->info.static_addr << 1; 1093 desc++; 1094 } 1095 1096 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 1097 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1098 i3c_ccc_cmd_dest_cleanup(&dest); 1099 1100 return ret; 1101 } 1102 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 1103 1104 static int i3c_master_setda_locked(struct i3c_master_controller *master, 1105 u8 oldaddr, u8 newaddr, bool setdasa) 1106 { 1107 struct i3c_ccc_cmd_dest dest; 1108 struct i3c_ccc_setda *setda; 1109 struct i3c_ccc_cmd cmd; 1110 int ret; 1111 1112 if (!oldaddr || !newaddr) 1113 return -EINVAL; 1114 1115 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 1116 if (!setda) 1117 return -ENOMEM; 1118 1119 setda->addr = newaddr << 1; 1120 i3c_ccc_cmd_init(&cmd, false, 1121 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 1122 &dest, 1); 1123 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1124 i3c_ccc_cmd_dest_cleanup(&dest); 1125 1126 return ret; 1127 } 1128 1129 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 1130 u8 static_addr, u8 dyn_addr) 1131 { 1132 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 1133 } 1134 1135 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1136 u8 oldaddr, u8 newaddr) 1137 { 1138 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1139 } 1140 1141 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1142 struct i3c_device_info *info) 1143 { 1144 struct i3c_ccc_cmd_dest dest; 1145 struct i3c_ccc_mrl *mrl; 1146 struct i3c_ccc_cmd cmd; 1147 int ret; 1148 1149 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1150 if (!mrl) 1151 return -ENOMEM; 1152 1153 /* 1154 * When the device does not have IBI payload GETMRL only returns 2 1155 * bytes of data. 1156 */ 1157 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1158 dest.payload.len -= 1; 1159 1160 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1161 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1162 if (ret) 1163 goto out; 1164 1165 switch (dest.payload.len) { 1166 case 3: 1167 info->max_ibi_len = mrl->ibi_len; 1168 fallthrough; 1169 case 2: 1170 info->max_read_len = be16_to_cpu(mrl->read_len); 1171 break; 1172 default: 1173 ret = -EIO; 1174 goto out; 1175 } 1176 1177 out: 1178 i3c_ccc_cmd_dest_cleanup(&dest); 1179 1180 return ret; 1181 } 1182 1183 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1184 struct i3c_device_info *info) 1185 { 1186 struct i3c_ccc_cmd_dest dest; 1187 struct i3c_ccc_mwl *mwl; 1188 struct i3c_ccc_cmd cmd; 1189 int ret; 1190 1191 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1192 if (!mwl) 1193 return -ENOMEM; 1194 1195 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1196 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1197 if (ret) 1198 goto out; 1199 1200 if (dest.payload.len != sizeof(*mwl)) { 1201 ret = -EIO; 1202 goto out; 1203 } 1204 1205 info->max_write_len = be16_to_cpu(mwl->len); 1206 1207 out: 1208 i3c_ccc_cmd_dest_cleanup(&dest); 1209 1210 return ret; 1211 } 1212 1213 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1214 struct i3c_device_info *info) 1215 { 1216 struct i3c_ccc_getmxds *getmaxds; 1217 struct i3c_ccc_cmd_dest dest; 1218 struct i3c_ccc_cmd cmd; 1219 int ret; 1220 1221 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1222 sizeof(*getmaxds)); 1223 if (!getmaxds) 1224 return -ENOMEM; 1225 1226 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1227 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1228 if (ret) 1229 goto out; 1230 1231 if (dest.payload.len != 2 && dest.payload.len != 5) { 1232 ret = -EIO; 1233 goto out; 1234 } 1235 1236 info->max_read_ds = getmaxds->maxrd; 1237 info->max_write_ds = getmaxds->maxwr; 1238 if (dest.payload.len == 5) 1239 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1240 ((u32)getmaxds->maxrdturn[1] << 8) | 1241 ((u32)getmaxds->maxrdturn[2] << 16); 1242 1243 out: 1244 i3c_ccc_cmd_dest_cleanup(&dest); 1245 1246 return ret; 1247 } 1248 1249 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1250 struct i3c_device_info *info) 1251 { 1252 struct i3c_ccc_gethdrcap *gethdrcap; 1253 struct i3c_ccc_cmd_dest dest; 1254 struct i3c_ccc_cmd cmd; 1255 int ret; 1256 1257 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1258 sizeof(*gethdrcap)); 1259 if (!gethdrcap) 1260 return -ENOMEM; 1261 1262 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1263 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1264 if (ret) 1265 goto out; 1266 1267 if (dest.payload.len != 1) { 1268 ret = -EIO; 1269 goto out; 1270 } 1271 1272 info->hdr_cap = gethdrcap->modes; 1273 1274 out: 1275 i3c_ccc_cmd_dest_cleanup(&dest); 1276 1277 return ret; 1278 } 1279 1280 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1281 struct i3c_device_info *info) 1282 { 1283 struct i3c_ccc_getpid *getpid; 1284 struct i3c_ccc_cmd_dest dest; 1285 struct i3c_ccc_cmd cmd; 1286 int ret, i; 1287 1288 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1289 if (!getpid) 1290 return -ENOMEM; 1291 1292 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1293 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1294 if (ret) 1295 goto out; 1296 1297 info->pid = 0; 1298 for (i = 0; i < sizeof(getpid->pid); i++) { 1299 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1300 1301 info->pid |= (u64)getpid->pid[i] << sft; 1302 } 1303 1304 out: 1305 i3c_ccc_cmd_dest_cleanup(&dest); 1306 1307 return ret; 1308 } 1309 1310 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1311 struct i3c_device_info *info) 1312 { 1313 struct i3c_ccc_getbcr *getbcr; 1314 struct i3c_ccc_cmd_dest dest; 1315 struct i3c_ccc_cmd cmd; 1316 int ret; 1317 1318 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1319 if (!getbcr) 1320 return -ENOMEM; 1321 1322 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1323 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1324 if (ret) 1325 goto out; 1326 1327 info->bcr = getbcr->bcr; 1328 1329 out: 1330 i3c_ccc_cmd_dest_cleanup(&dest); 1331 1332 return ret; 1333 } 1334 1335 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1336 struct i3c_device_info *info) 1337 { 1338 struct i3c_ccc_getdcr *getdcr; 1339 struct i3c_ccc_cmd_dest dest; 1340 struct i3c_ccc_cmd cmd; 1341 int ret; 1342 1343 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1344 if (!getdcr) 1345 return -ENOMEM; 1346 1347 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1348 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1349 if (ret) 1350 goto out; 1351 1352 info->dcr = getdcr->dcr; 1353 1354 out: 1355 i3c_ccc_cmd_dest_cleanup(&dest); 1356 1357 return ret; 1358 } 1359 1360 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1361 { 1362 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1363 enum i3c_addr_slot_status slot_status; 1364 int ret; 1365 1366 if (!dev->info.dyn_addr) 1367 return -EINVAL; 1368 1369 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1370 dev->info.dyn_addr); 1371 if (slot_status == I3C_ADDR_SLOT_RSVD || 1372 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1373 return -EINVAL; 1374 1375 ret = i3c_master_getpid_locked(master, &dev->info); 1376 if (ret) 1377 return ret; 1378 1379 ret = i3c_master_getbcr_locked(master, &dev->info); 1380 if (ret) 1381 return ret; 1382 1383 ret = i3c_master_getdcr_locked(master, &dev->info); 1384 if (ret) 1385 return ret; 1386 1387 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1388 ret = i3c_master_getmxds_locked(master, &dev->info); 1389 if (ret) 1390 return ret; 1391 } 1392 1393 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1394 dev->info.max_ibi_len = 1; 1395 1396 i3c_master_getmrl_locked(master, &dev->info); 1397 i3c_master_getmwl_locked(master, &dev->info); 1398 1399 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1400 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1401 if (ret) 1402 return ret; 1403 } 1404 1405 return 0; 1406 } 1407 1408 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1409 { 1410 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1411 1412 if (dev->info.static_addr) 1413 i3c_bus_set_addr_slot_status(&master->bus, 1414 dev->info.static_addr, 1415 I3C_ADDR_SLOT_FREE); 1416 1417 if (dev->info.dyn_addr) 1418 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1419 I3C_ADDR_SLOT_FREE); 1420 1421 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1422 i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr, 1423 I3C_ADDR_SLOT_FREE); 1424 } 1425 1426 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1427 { 1428 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1429 enum i3c_addr_slot_status status; 1430 1431 if (!dev->info.static_addr && !dev->info.dyn_addr) 1432 return 0; 1433 1434 if (dev->info.static_addr) { 1435 status = i3c_bus_get_addr_slot_status(&master->bus, 1436 dev->info.static_addr); 1437 /* Since static address and assigned dynamic address can be 1438 * equal, allow this case to pass. 1439 */ 1440 if (status != I3C_ADDR_SLOT_FREE && 1441 dev->info.static_addr != dev->boardinfo->init_dyn_addr) 1442 return -EBUSY; 1443 1444 i3c_bus_set_addr_slot_status(&master->bus, 1445 dev->info.static_addr, 1446 I3C_ADDR_SLOT_I3C_DEV); 1447 } 1448 1449 /* 1450 * ->init_dyn_addr should have been reserved before that, so, if we're 1451 * trying to apply a pre-reserved dynamic address, we should not try 1452 * to reserve the address slot a second time. 1453 */ 1454 if (dev->info.dyn_addr && 1455 (!dev->boardinfo || 1456 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1457 status = i3c_bus_get_addr_slot_status(&master->bus, 1458 dev->info.dyn_addr); 1459 if (status != I3C_ADDR_SLOT_FREE) 1460 goto err_release_static_addr; 1461 1462 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1463 I3C_ADDR_SLOT_I3C_DEV); 1464 } 1465 1466 return 0; 1467 1468 err_release_static_addr: 1469 if (dev->info.static_addr) 1470 i3c_bus_set_addr_slot_status(&master->bus, 1471 dev->info.static_addr, 1472 I3C_ADDR_SLOT_FREE); 1473 1474 return -EBUSY; 1475 } 1476 1477 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1478 struct i3c_dev_desc *dev) 1479 { 1480 int ret; 1481 1482 /* 1483 * We don't attach devices to the controller until they are 1484 * addressable on the bus. 1485 */ 1486 if (!dev->info.static_addr && !dev->info.dyn_addr) 1487 return 0; 1488 1489 ret = i3c_master_get_i3c_addrs(dev); 1490 if (ret) 1491 return ret; 1492 1493 /* Do not attach the master device itself. */ 1494 if (master->this != dev && master->ops->attach_i3c_dev) { 1495 ret = master->ops->attach_i3c_dev(dev); 1496 if (ret) { 1497 i3c_master_put_i3c_addrs(dev); 1498 return ret; 1499 } 1500 } 1501 1502 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1503 1504 return 0; 1505 } 1506 1507 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1508 u8 old_dyn_addr) 1509 { 1510 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1511 int ret; 1512 1513 if (dev->info.dyn_addr != old_dyn_addr) { 1514 i3c_bus_set_addr_slot_status(&master->bus, 1515 dev->info.dyn_addr, 1516 I3C_ADDR_SLOT_I3C_DEV); 1517 if (old_dyn_addr) 1518 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr, 1519 I3C_ADDR_SLOT_FREE); 1520 } 1521 1522 if (master->ops->reattach_i3c_dev) { 1523 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1524 if (ret) { 1525 i3c_master_put_i3c_addrs(dev); 1526 return ret; 1527 } 1528 } 1529 1530 return 0; 1531 } 1532 1533 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1534 { 1535 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1536 1537 /* Do not detach the master device itself. */ 1538 if (master->this != dev && master->ops->detach_i3c_dev) 1539 master->ops->detach_i3c_dev(dev); 1540 1541 i3c_master_put_i3c_addrs(dev); 1542 list_del(&dev->common.node); 1543 } 1544 1545 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1546 struct i2c_dev_desc *dev) 1547 { 1548 int ret; 1549 1550 if (master->ops->attach_i2c_dev) { 1551 ret = master->ops->attach_i2c_dev(dev); 1552 if (ret) 1553 return ret; 1554 } 1555 1556 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1557 1558 return 0; 1559 } 1560 1561 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1562 { 1563 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1564 1565 list_del(&dev->common.node); 1566 1567 if (master->ops->detach_i2c_dev) 1568 master->ops->detach_i2c_dev(dev); 1569 } 1570 1571 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1572 struct i3c_dev_boardinfo *boardinfo) 1573 { 1574 struct i3c_device_info info = { 1575 .static_addr = boardinfo->static_addr, 1576 .pid = boardinfo->pid, 1577 }; 1578 struct i3c_dev_desc *i3cdev; 1579 int ret; 1580 1581 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1582 if (IS_ERR(i3cdev)) 1583 return -ENOMEM; 1584 1585 i3cdev->boardinfo = boardinfo; 1586 1587 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1588 if (ret) 1589 goto err_free_dev; 1590 1591 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1592 i3cdev->boardinfo->init_dyn_addr); 1593 if (ret) 1594 goto err_detach_dev; 1595 1596 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1597 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1598 if (ret) 1599 goto err_rstdaa; 1600 1601 ret = i3c_master_retrieve_dev_info(i3cdev); 1602 if (ret) 1603 goto err_rstdaa; 1604 1605 return 0; 1606 1607 err_rstdaa: 1608 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1609 err_detach_dev: 1610 i3c_master_detach_i3c_dev(i3cdev); 1611 err_free_dev: 1612 i3c_master_free_i3c_dev(i3cdev); 1613 1614 return ret; 1615 } 1616 1617 static void 1618 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1619 { 1620 struct i3c_dev_desc *desc; 1621 int ret; 1622 1623 if (!master->init_done) 1624 return; 1625 1626 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1627 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1628 continue; 1629 1630 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1631 if (!desc->dev) 1632 continue; 1633 1634 desc->dev->bus = &master->bus; 1635 desc->dev->desc = desc; 1636 desc->dev->dev.parent = &master->dev; 1637 desc->dev->dev.type = &i3c_device_type; 1638 desc->dev->dev.bus = &i3c_bus_type; 1639 desc->dev->dev.release = i3c_device_release; 1640 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1641 desc->info.pid); 1642 1643 if (desc->boardinfo) 1644 desc->dev->dev.of_node = desc->boardinfo->of_node; 1645 1646 ret = device_register(&desc->dev->dev); 1647 if (ret) { 1648 dev_err(&master->dev, 1649 "Failed to add I3C device (err = %d)\n", ret); 1650 put_device(&desc->dev->dev); 1651 } 1652 } 1653 } 1654 1655 /** 1656 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1657 * @master: master doing the DAA 1658 * 1659 * This function is instantiating an I3C device object and adding it to the 1660 * I3C device list. All device information are automatically retrieved using 1661 * standard CCC commands. 1662 * 1663 * The I3C device object is returned in case the master wants to attach 1664 * private data to it using i3c_dev_set_master_data(). 1665 * 1666 * This function must be called with the bus lock held in write mode. 1667 * 1668 * Return: a 0 in case of success, an negative error code otherwise. 1669 */ 1670 int i3c_master_do_daa(struct i3c_master_controller *master) 1671 { 1672 int ret; 1673 1674 i3c_bus_maintenance_lock(&master->bus); 1675 ret = master->ops->do_daa(master); 1676 i3c_bus_maintenance_unlock(&master->bus); 1677 1678 if (ret) 1679 return ret; 1680 1681 i3c_bus_normaluse_lock(&master->bus); 1682 i3c_master_register_new_i3c_devs(master); 1683 i3c_bus_normaluse_unlock(&master->bus); 1684 1685 return 0; 1686 } 1687 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1688 1689 /** 1690 * i3c_master_set_info() - set master device information 1691 * @master: master used to send frames on the bus 1692 * @info: I3C device information 1693 * 1694 * Set master device info. This should be called from 1695 * &i3c_master_controller_ops->bus_init(). 1696 * 1697 * Not all &i3c_device_info fields are meaningful for a master device. 1698 * Here is a list of fields that should be properly filled: 1699 * 1700 * - &i3c_device_info->dyn_addr 1701 * - &i3c_device_info->bcr 1702 * - &i3c_device_info->dcr 1703 * - &i3c_device_info->pid 1704 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1705 * &i3c_device_info->bcr 1706 * 1707 * This function must be called with the bus lock held in maintenance mode. 1708 * 1709 * Return: 0 if @info contains valid information (not every piece of 1710 * information can be checked, but we can at least make sure @info->dyn_addr 1711 * and @info->bcr are correct), -EINVAL otherwise. 1712 */ 1713 int i3c_master_set_info(struct i3c_master_controller *master, 1714 const struct i3c_device_info *info) 1715 { 1716 struct i3c_dev_desc *i3cdev; 1717 int ret; 1718 1719 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1720 return -EINVAL; 1721 1722 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1723 master->secondary) 1724 return -EINVAL; 1725 1726 if (master->this) 1727 return -EINVAL; 1728 1729 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1730 if (IS_ERR(i3cdev)) 1731 return PTR_ERR(i3cdev); 1732 1733 master->this = i3cdev; 1734 master->bus.cur_master = master->this; 1735 1736 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1737 if (ret) 1738 goto err_free_dev; 1739 1740 return 0; 1741 1742 err_free_dev: 1743 i3c_master_free_i3c_dev(i3cdev); 1744 1745 return ret; 1746 } 1747 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1748 1749 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1750 { 1751 struct i3c_dev_desc *i3cdev, *i3ctmp; 1752 struct i2c_dev_desc *i2cdev, *i2ctmp; 1753 1754 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1755 common.node) { 1756 i3c_master_detach_i3c_dev(i3cdev); 1757 1758 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1759 i3c_bus_set_addr_slot_status(&master->bus, 1760 i3cdev->boardinfo->init_dyn_addr, 1761 I3C_ADDR_SLOT_FREE); 1762 1763 i3c_master_free_i3c_dev(i3cdev); 1764 } 1765 1766 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1767 common.node) { 1768 i3c_master_detach_i2c_dev(i2cdev); 1769 i3c_bus_set_addr_slot_status(&master->bus, 1770 i2cdev->addr, 1771 I3C_ADDR_SLOT_FREE); 1772 i3c_master_free_i2c_dev(i2cdev); 1773 } 1774 } 1775 1776 /** 1777 * i3c_master_bus_init() - initialize an I3C bus 1778 * @master: main master initializing the bus 1779 * 1780 * This function is following all initialisation steps described in the I3C 1781 * specification: 1782 * 1783 * 1. Attach I2C devs to the master so that the master can fill its internal 1784 * device table appropriately 1785 * 1786 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1787 * the master controller. That's usually where the bus mode is selected 1788 * (pure bus or mixed fast/slow bus) 1789 * 1790 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1791 * particularly important when the bus was previously configured by someone 1792 * else (for example the bootloader) 1793 * 1794 * 4. Disable all slave events. 1795 * 1796 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1797 * also have static_addr, try to pre-assign dynamic addresses requested by 1798 * the FW with SETDASA and attach corresponding statically defined I3C 1799 * devices to the master. 1800 * 1801 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1802 * remaining I3C devices 1803 * 1804 * Once this is done, all I3C and I2C devices should be usable. 1805 * 1806 * Return: a 0 in case of success, an negative error code otherwise. 1807 */ 1808 static int i3c_master_bus_init(struct i3c_master_controller *master) 1809 { 1810 enum i3c_addr_slot_status status; 1811 struct i2c_dev_boardinfo *i2cboardinfo; 1812 struct i3c_dev_boardinfo *i3cboardinfo; 1813 struct i2c_dev_desc *i2cdev; 1814 int ret; 1815 1816 /* 1817 * First attach all devices with static definitions provided by the 1818 * FW. 1819 */ 1820 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1821 status = i3c_bus_get_addr_slot_status(&master->bus, 1822 i2cboardinfo->base.addr); 1823 if (status != I3C_ADDR_SLOT_FREE) { 1824 ret = -EBUSY; 1825 goto err_detach_devs; 1826 } 1827 1828 i3c_bus_set_addr_slot_status(&master->bus, 1829 i2cboardinfo->base.addr, 1830 I3C_ADDR_SLOT_I2C_DEV); 1831 1832 i2cdev = i3c_master_alloc_i2c_dev(master, 1833 i2cboardinfo->base.addr, 1834 i2cboardinfo->lvr); 1835 if (IS_ERR(i2cdev)) { 1836 ret = PTR_ERR(i2cdev); 1837 goto err_detach_devs; 1838 } 1839 1840 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1841 if (ret) { 1842 i3c_master_free_i2c_dev(i2cdev); 1843 goto err_detach_devs; 1844 } 1845 } 1846 1847 /* 1848 * Now execute the controller specific ->bus_init() routine, which 1849 * might configure its internal logic to match the bus limitations. 1850 */ 1851 ret = master->ops->bus_init(master); 1852 if (ret) 1853 goto err_detach_devs; 1854 1855 /* 1856 * The master device should have been instantiated in ->bus_init(), 1857 * complain if this was not the case. 1858 */ 1859 if (!master->this) { 1860 dev_err(&master->dev, 1861 "master_set_info() was not called in ->bus_init()\n"); 1862 ret = -EINVAL; 1863 goto err_bus_cleanup; 1864 } 1865 1866 if (master->ops->set_speed) { 1867 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED); 1868 if (ret) 1869 goto err_bus_cleanup; 1870 } 1871 1872 /* 1873 * Reset all dynamic address that may have been assigned before 1874 * (assigned by the bootloader for example). 1875 */ 1876 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1877 if (ret && ret != I3C_ERROR_M2) 1878 goto err_bus_cleanup; 1879 1880 if (master->ops->set_speed) { 1881 master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED); 1882 if (ret) 1883 goto err_bus_cleanup; 1884 } 1885 1886 /* Disable all slave events before starting DAA. */ 1887 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1888 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1889 I3C_CCC_EVENT_HJ); 1890 if (ret && ret != I3C_ERROR_M2) 1891 goto err_bus_cleanup; 1892 1893 /* 1894 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1895 * address and retrieve device information if needed. 1896 * In case pre-assign dynamic address fails, setting dynamic address to 1897 * the requested init_dyn_addr is retried after DAA is done in 1898 * i3c_master_add_i3c_dev_locked(). 1899 */ 1900 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1901 1902 /* 1903 * We don't reserve a dynamic address for devices that 1904 * don't explicitly request one. 1905 */ 1906 if (!i3cboardinfo->init_dyn_addr) 1907 continue; 1908 1909 ret = i3c_bus_get_addr_slot_status(&master->bus, 1910 i3cboardinfo->init_dyn_addr); 1911 if (ret != I3C_ADDR_SLOT_FREE) { 1912 ret = -EBUSY; 1913 goto err_rstdaa; 1914 } 1915 1916 /* Do not mark as occupied until real device exist in bus */ 1917 i3c_bus_set_addr_slot_status_mask(&master->bus, 1918 i3cboardinfo->init_dyn_addr, 1919 I3C_ADDR_SLOT_EXT_DESIRED, 1920 I3C_ADDR_SLOT_EXT_STATUS_MASK); 1921 1922 /* 1923 * Only try to create/attach devices that have a static 1924 * address. Other devices will be created/attached when 1925 * DAA happens, and the requested dynamic address will 1926 * be set using SETNEWDA once those devices become 1927 * addressable. 1928 */ 1929 1930 if (i3cboardinfo->static_addr) 1931 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1932 } 1933 1934 ret = i3c_master_do_daa(master); 1935 if (ret) 1936 goto err_rstdaa; 1937 1938 return 0; 1939 1940 err_rstdaa: 1941 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1942 1943 err_bus_cleanup: 1944 if (master->ops->bus_cleanup) 1945 master->ops->bus_cleanup(master); 1946 1947 err_detach_devs: 1948 i3c_master_detach_free_devs(master); 1949 1950 return ret; 1951 } 1952 1953 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1954 { 1955 if (master->ops->bus_cleanup) 1956 master->ops->bus_cleanup(master); 1957 1958 i3c_master_detach_free_devs(master); 1959 } 1960 1961 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1962 { 1963 struct i3c_master_controller *master = i3cdev->common.master; 1964 struct i3c_dev_boardinfo *i3cboardinfo; 1965 1966 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1967 if (i3cdev->info.pid != i3cboardinfo->pid) 1968 continue; 1969 1970 i3cdev->boardinfo = i3cboardinfo; 1971 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1972 return; 1973 } 1974 } 1975 1976 static struct i3c_dev_desc * 1977 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1978 { 1979 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1980 struct i3c_dev_desc *i3cdev; 1981 1982 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1983 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1984 return i3cdev; 1985 } 1986 1987 return NULL; 1988 } 1989 1990 /** 1991 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1992 * @master: master used to send frames on the bus 1993 * @addr: I3C slave dynamic address assigned to the device 1994 * 1995 * This function is instantiating an I3C device object and adding it to the 1996 * I3C device list. All device information are automatically retrieved using 1997 * standard CCC commands. 1998 * 1999 * The I3C device object is returned in case the master wants to attach 2000 * private data to it using i3c_dev_set_master_data(). 2001 * 2002 * This function must be called with the bus lock held in write mode. 2003 * 2004 * Return: a 0 in case of success, an negative error code otherwise. 2005 */ 2006 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 2007 u8 addr) 2008 { 2009 struct i3c_device_info info = { .dyn_addr = addr }; 2010 struct i3c_dev_desc *newdev, *olddev; 2011 u8 old_dyn_addr = addr, expected_dyn_addr; 2012 struct i3c_ibi_setup ibireq = { }; 2013 bool enable_ibi = false; 2014 int ret; 2015 2016 if (!master) 2017 return -EINVAL; 2018 2019 newdev = i3c_master_alloc_i3c_dev(master, &info); 2020 if (IS_ERR(newdev)) 2021 return PTR_ERR(newdev); 2022 2023 ret = i3c_master_attach_i3c_dev(master, newdev); 2024 if (ret) 2025 goto err_free_dev; 2026 2027 ret = i3c_master_retrieve_dev_info(newdev); 2028 if (ret) 2029 goto err_detach_dev; 2030 2031 i3c_master_attach_boardinfo(newdev); 2032 2033 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 2034 if (olddev) { 2035 newdev->dev = olddev->dev; 2036 if (newdev->dev) 2037 newdev->dev->desc = newdev; 2038 2039 /* 2040 * We need to restore the IBI state too, so let's save the 2041 * IBI information and try to restore them after olddev has 2042 * been detached+released and its IBI has been stopped and 2043 * the associated resources have been freed. 2044 */ 2045 mutex_lock(&olddev->ibi_lock); 2046 if (olddev->ibi) { 2047 ibireq.handler = olddev->ibi->handler; 2048 ibireq.max_payload_len = olddev->ibi->max_payload_len; 2049 ibireq.num_slots = olddev->ibi->num_slots; 2050 2051 if (olddev->ibi->enabled) 2052 enable_ibi = true; 2053 /* 2054 * The olddev should not receive any commands on the 2055 * i3c bus as it does not exist and has been assigned 2056 * a new address. This will result in NACK or timeout. 2057 * So, update the olddev->ibi->enabled flag to false 2058 * to avoid DISEC with OldAddr. 2059 */ 2060 olddev->ibi->enabled = false; 2061 i3c_dev_free_ibi_locked(olddev); 2062 } 2063 mutex_unlock(&olddev->ibi_lock); 2064 2065 old_dyn_addr = olddev->info.dyn_addr; 2066 2067 i3c_master_detach_i3c_dev(olddev); 2068 i3c_master_free_i3c_dev(olddev); 2069 } 2070 2071 /* 2072 * Depending on our previous state, the expected dynamic address might 2073 * differ: 2074 * - if the device already had a dynamic address assigned, let's try to 2075 * re-apply this one 2076 * - if the device did not have a dynamic address and the firmware 2077 * requested a specific address, pick this one 2078 * - in any other case, keep the address automatically assigned by the 2079 * master 2080 */ 2081 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 2082 expected_dyn_addr = old_dyn_addr; 2083 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 2084 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 2085 else 2086 expected_dyn_addr = newdev->info.dyn_addr; 2087 2088 if (newdev->info.dyn_addr != expected_dyn_addr && 2089 i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) { 2090 /* 2091 * Try to apply the expected dynamic address. If it fails, keep 2092 * the address assigned by the master. 2093 */ 2094 ret = i3c_master_setnewda_locked(master, 2095 newdev->info.dyn_addr, 2096 expected_dyn_addr); 2097 if (!ret) { 2098 old_dyn_addr = newdev->info.dyn_addr; 2099 newdev->info.dyn_addr = expected_dyn_addr; 2100 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 2101 } else { 2102 dev_err(&master->dev, 2103 "Failed to assign reserved/old address to device %d%llx", 2104 master->bus.id, newdev->info.pid); 2105 } 2106 } 2107 2108 /* 2109 * Now is time to try to restore the IBI setup. If we're lucky, 2110 * everything works as before, otherwise, all we can do is complain. 2111 * FIXME: maybe we should add callback to inform the driver that it 2112 * should request the IBI again instead of trying to hide that from 2113 * him. 2114 */ 2115 if (ibireq.handler) { 2116 mutex_lock(&newdev->ibi_lock); 2117 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 2118 if (ret) { 2119 dev_err(&master->dev, 2120 "Failed to request IBI on device %d-%llx", 2121 master->bus.id, newdev->info.pid); 2122 } else if (enable_ibi) { 2123 ret = i3c_dev_enable_ibi_locked(newdev); 2124 if (ret) 2125 dev_err(&master->dev, 2126 "Failed to re-enable IBI on device %d-%llx", 2127 master->bus.id, newdev->info.pid); 2128 } 2129 mutex_unlock(&newdev->ibi_lock); 2130 } 2131 2132 return 0; 2133 2134 err_detach_dev: 2135 if (newdev->dev && newdev->dev->desc) 2136 newdev->dev->desc = NULL; 2137 2138 i3c_master_detach_i3c_dev(newdev); 2139 2140 err_free_dev: 2141 i3c_master_free_i3c_dev(newdev); 2142 2143 return ret; 2144 } 2145 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 2146 2147 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 2148 2149 static int 2150 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 2151 struct device_node *node, u32 *reg) 2152 { 2153 struct i2c_dev_boardinfo *boardinfo; 2154 struct device *dev = &master->dev; 2155 int ret; 2156 2157 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2158 if (!boardinfo) 2159 return -ENOMEM; 2160 2161 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2162 if (ret) 2163 return ret; 2164 2165 /* 2166 * The I3C Specification does not clearly say I2C devices with 10-bit 2167 * address are supported. These devices can't be passed properly through 2168 * DEFSLVS command. 2169 */ 2170 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2171 dev_err(dev, "I2C device with 10 bit address not supported."); 2172 return -ENOTSUPP; 2173 } 2174 2175 /* LVR is encoded in reg[2]. */ 2176 boardinfo->lvr = reg[2]; 2177 2178 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2179 of_node_get(node); 2180 2181 return 0; 2182 } 2183 2184 static int 2185 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2186 struct device_node *node, u32 *reg) 2187 { 2188 struct i3c_dev_boardinfo *boardinfo; 2189 struct device *dev = &master->dev; 2190 enum i3c_addr_slot_status addrstatus; 2191 u32 init_dyn_addr = 0; 2192 2193 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2194 if (!boardinfo) 2195 return -ENOMEM; 2196 2197 if (reg[0]) { 2198 if (reg[0] > I3C_MAX_ADDR) 2199 return -EINVAL; 2200 2201 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2202 reg[0]); 2203 if (addrstatus != I3C_ADDR_SLOT_FREE) 2204 return -EINVAL; 2205 } 2206 2207 boardinfo->static_addr = reg[0]; 2208 2209 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2210 if (init_dyn_addr > I3C_MAX_ADDR) 2211 return -EINVAL; 2212 2213 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2214 init_dyn_addr); 2215 if (addrstatus != I3C_ADDR_SLOT_FREE) 2216 return -EINVAL; 2217 } 2218 2219 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2220 2221 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2222 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2223 return -EINVAL; 2224 2225 boardinfo->init_dyn_addr = init_dyn_addr; 2226 boardinfo->of_node = of_node_get(node); 2227 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2228 2229 return 0; 2230 } 2231 2232 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2233 struct device_node *node) 2234 { 2235 u32 reg[3]; 2236 int ret; 2237 2238 if (!master || !node) 2239 return -EINVAL; 2240 2241 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2242 if (ret) 2243 return ret; 2244 2245 /* 2246 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2247 * dealing with an I2C device. 2248 */ 2249 if (!reg[1]) 2250 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2251 else 2252 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2253 2254 return ret; 2255 } 2256 2257 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2258 { 2259 struct device *dev = &master->dev; 2260 struct device_node *i3cbus_np = dev->of_node; 2261 struct device_node *node; 2262 int ret; 2263 u32 val; 2264 2265 if (!i3cbus_np) 2266 return 0; 2267 2268 for_each_available_child_of_node(i3cbus_np, node) { 2269 ret = of_i3c_master_add_dev(master, node); 2270 if (ret) { 2271 of_node_put(node); 2272 return ret; 2273 } 2274 } 2275 2276 /* 2277 * The user might want to limit I2C and I3C speed in case some devices 2278 * on the bus are not supporting typical rates, or if the bus topology 2279 * prevents it from using max possible rate. 2280 */ 2281 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2282 master->bus.scl_rate.i2c = val; 2283 2284 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2285 master->bus.scl_rate.i3c = val; 2286 2287 return 0; 2288 } 2289 2290 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2291 struct i2c_msg *xfers, int nxfers) 2292 { 2293 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2294 struct i2c_dev_desc *dev; 2295 int i, ret; 2296 u16 addr; 2297 2298 if (!xfers || !master || nxfers <= 0) 2299 return -EINVAL; 2300 2301 if (!master->ops->i2c_xfers) 2302 return -ENOTSUPP; 2303 2304 /* Doing transfers to different devices is not supported. */ 2305 addr = xfers[0].addr; 2306 for (i = 1; i < nxfers; i++) { 2307 if (addr != xfers[i].addr) 2308 return -ENOTSUPP; 2309 } 2310 2311 i3c_bus_normaluse_lock(&master->bus); 2312 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2313 if (!dev) 2314 ret = -ENOENT; 2315 else 2316 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2317 i3c_bus_normaluse_unlock(&master->bus); 2318 2319 return ret ? ret : nxfers; 2320 } 2321 2322 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2323 { 2324 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2325 } 2326 2327 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client) 2328 { 2329 /* Fall back to no spike filters and FM bus mode. */ 2330 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; 2331 2332 if (client->dev.of_node) { 2333 u32 reg[3]; 2334 2335 if (!of_property_read_u32_array(client->dev.of_node, "reg", 2336 reg, ARRAY_SIZE(reg))) 2337 lvr = reg[2]; 2338 } 2339 2340 return lvr; 2341 } 2342 2343 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client) 2344 { 2345 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2346 enum i3c_addr_slot_status status; 2347 struct i2c_dev_desc *i2cdev; 2348 int ret; 2349 2350 /* Already added by board info? */ 2351 if (i3c_master_find_i2c_dev_by_addr(master, client->addr)) 2352 return 0; 2353 2354 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr); 2355 if (status != I3C_ADDR_SLOT_FREE) 2356 return -EBUSY; 2357 2358 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2359 I3C_ADDR_SLOT_I2C_DEV); 2360 2361 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr, 2362 i3c_master_i2c_get_lvr(client)); 2363 if (IS_ERR(i2cdev)) { 2364 ret = PTR_ERR(i2cdev); 2365 goto out_clear_status; 2366 } 2367 2368 ret = i3c_master_attach_i2c_dev(master, i2cdev); 2369 if (ret) 2370 goto out_free_dev; 2371 2372 return 0; 2373 2374 out_free_dev: 2375 i3c_master_free_i2c_dev(i2cdev); 2376 out_clear_status: 2377 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2378 I3C_ADDR_SLOT_FREE); 2379 2380 return ret; 2381 } 2382 2383 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client) 2384 { 2385 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2386 struct i2c_dev_desc *dev; 2387 2388 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr); 2389 if (!dev) 2390 return -ENODEV; 2391 2392 i3c_master_detach_i2c_dev(dev); 2393 i3c_bus_set_addr_slot_status(&master->bus, dev->addr, 2394 I3C_ADDR_SLOT_FREE); 2395 i3c_master_free_i2c_dev(dev); 2396 2397 return 0; 2398 } 2399 2400 static const struct i2c_algorithm i3c_master_i2c_algo = { 2401 .master_xfer = i3c_master_i2c_adapter_xfer, 2402 .functionality = i3c_master_i2c_funcs, 2403 }; 2404 2405 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action, 2406 void *data) 2407 { 2408 struct i2c_adapter *adap; 2409 struct i2c_client *client; 2410 struct device *dev = data; 2411 struct i3c_master_controller *master; 2412 int ret; 2413 2414 if (dev->type != &i2c_client_type) 2415 return 0; 2416 2417 client = to_i2c_client(dev); 2418 adap = client->adapter; 2419 2420 if (adap->algo != &i3c_master_i2c_algo) 2421 return 0; 2422 2423 master = i2c_adapter_to_i3c_master(adap); 2424 2425 i3c_bus_maintenance_lock(&master->bus); 2426 switch (action) { 2427 case BUS_NOTIFY_ADD_DEVICE: 2428 ret = i3c_master_i2c_attach(adap, client); 2429 break; 2430 case BUS_NOTIFY_DEL_DEVICE: 2431 ret = i3c_master_i2c_detach(adap, client); 2432 break; 2433 } 2434 i3c_bus_maintenance_unlock(&master->bus); 2435 2436 return ret; 2437 } 2438 2439 static struct notifier_block i2cdev_notifier = { 2440 .notifier_call = i3c_i2c_notifier_call, 2441 }; 2442 2443 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2444 { 2445 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2446 struct i2c_dev_desc *i2cdev; 2447 struct i2c_dev_boardinfo *i2cboardinfo; 2448 int ret; 2449 2450 adap->dev.parent = master->dev.parent; 2451 adap->owner = master->dev.parent->driver->owner; 2452 adap->algo = &i3c_master_i2c_algo; 2453 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2454 2455 /* FIXME: Should we allow i3c masters to override these values? */ 2456 adap->timeout = 1000; 2457 adap->retries = 3; 2458 2459 ret = i2c_add_adapter(adap); 2460 if (ret) 2461 return ret; 2462 2463 /* 2464 * We silently ignore failures here. The bus should keep working 2465 * correctly even if one or more i2c devices are not registered. 2466 */ 2467 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 2468 i2cdev = i3c_master_find_i2c_dev_by_addr(master, 2469 i2cboardinfo->base.addr); 2470 if (WARN_ON(!i2cdev)) 2471 continue; 2472 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base); 2473 } 2474 2475 return 0; 2476 } 2477 2478 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2479 { 2480 struct i2c_dev_desc *i2cdev; 2481 2482 i2c_del_adapter(&master->i2c); 2483 2484 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2485 i2cdev->dev = NULL; 2486 } 2487 2488 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2489 { 2490 struct i3c_dev_desc *i3cdev; 2491 2492 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2493 if (!i3cdev->dev) 2494 continue; 2495 2496 i3cdev->dev->desc = NULL; 2497 if (device_is_registered(&i3cdev->dev->dev)) 2498 device_unregister(&i3cdev->dev->dev); 2499 else 2500 put_device(&i3cdev->dev->dev); 2501 i3cdev->dev = NULL; 2502 } 2503 } 2504 2505 /** 2506 * i3c_master_queue_ibi() - Queue an IBI 2507 * @dev: the device this IBI is coming from 2508 * @slot: the IBI slot used to store the payload 2509 * 2510 * Queue an IBI to the controller workqueue. The IBI handler attached to 2511 * the dev will be called from a workqueue context. 2512 */ 2513 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2514 { 2515 atomic_inc(&dev->ibi->pending_ibis); 2516 queue_work(dev->common.master->wq, &slot->work); 2517 } 2518 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2519 2520 static void i3c_master_handle_ibi(struct work_struct *work) 2521 { 2522 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2523 work); 2524 struct i3c_dev_desc *dev = slot->dev; 2525 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2526 struct i3c_ibi_payload payload; 2527 2528 payload.data = slot->data; 2529 payload.len = slot->len; 2530 2531 if (dev->dev) 2532 dev->ibi->handler(dev->dev, &payload); 2533 2534 master->ops->recycle_ibi_slot(dev, slot); 2535 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2536 complete(&dev->ibi->all_ibis_handled); 2537 } 2538 2539 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2540 struct i3c_ibi_slot *slot) 2541 { 2542 slot->dev = dev; 2543 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2544 } 2545 2546 struct i3c_generic_ibi_slot { 2547 struct list_head node; 2548 struct i3c_ibi_slot base; 2549 }; 2550 2551 struct i3c_generic_ibi_pool { 2552 spinlock_t lock; 2553 unsigned int num_slots; 2554 struct i3c_generic_ibi_slot *slots; 2555 void *payload_buf; 2556 struct list_head free_slots; 2557 struct list_head pending; 2558 }; 2559 2560 /** 2561 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2562 * @pool: the IBI pool to free 2563 * 2564 * Free all IBI slots allated by a generic IBI pool. 2565 */ 2566 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2567 { 2568 struct i3c_generic_ibi_slot *slot; 2569 unsigned int nslots = 0; 2570 2571 while (!list_empty(&pool->free_slots)) { 2572 slot = list_first_entry(&pool->free_slots, 2573 struct i3c_generic_ibi_slot, node); 2574 list_del(&slot->node); 2575 nslots++; 2576 } 2577 2578 /* 2579 * If the number of freed slots is not equal to the number of allocated 2580 * slots we have a leak somewhere. 2581 */ 2582 WARN_ON(nslots != pool->num_slots); 2583 2584 kfree(pool->payload_buf); 2585 kfree(pool->slots); 2586 kfree(pool); 2587 } 2588 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2589 2590 /** 2591 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2592 * @dev: the device this pool will be used for 2593 * @req: IBI setup request describing what the device driver expects 2594 * 2595 * Create a generic IBI pool based on the information provided in @req. 2596 * 2597 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2598 */ 2599 struct i3c_generic_ibi_pool * 2600 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2601 const struct i3c_ibi_setup *req) 2602 { 2603 struct i3c_generic_ibi_pool *pool; 2604 struct i3c_generic_ibi_slot *slot; 2605 unsigned int i; 2606 int ret; 2607 2608 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2609 if (!pool) 2610 return ERR_PTR(-ENOMEM); 2611 2612 spin_lock_init(&pool->lock); 2613 INIT_LIST_HEAD(&pool->free_slots); 2614 INIT_LIST_HEAD(&pool->pending); 2615 2616 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2617 if (!pool->slots) { 2618 ret = -ENOMEM; 2619 goto err_free_pool; 2620 } 2621 2622 if (req->max_payload_len) { 2623 pool->payload_buf = kcalloc(req->num_slots, 2624 req->max_payload_len, GFP_KERNEL); 2625 if (!pool->payload_buf) { 2626 ret = -ENOMEM; 2627 goto err_free_pool; 2628 } 2629 } 2630 2631 for (i = 0; i < req->num_slots; i++) { 2632 slot = &pool->slots[i]; 2633 i3c_master_init_ibi_slot(dev, &slot->base); 2634 2635 if (req->max_payload_len) 2636 slot->base.data = pool->payload_buf + 2637 (i * req->max_payload_len); 2638 2639 list_add_tail(&slot->node, &pool->free_slots); 2640 pool->num_slots++; 2641 } 2642 2643 return pool; 2644 2645 err_free_pool: 2646 i3c_generic_ibi_free_pool(pool); 2647 return ERR_PTR(ret); 2648 } 2649 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2650 2651 /** 2652 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2653 * @pool: the pool to query an IBI slot on 2654 * 2655 * Search for a free slot in a generic IBI pool. 2656 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2657 * when it's no longer needed. 2658 * 2659 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2660 */ 2661 struct i3c_ibi_slot * 2662 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2663 { 2664 struct i3c_generic_ibi_slot *slot; 2665 unsigned long flags; 2666 2667 spin_lock_irqsave(&pool->lock, flags); 2668 slot = list_first_entry_or_null(&pool->free_slots, 2669 struct i3c_generic_ibi_slot, node); 2670 if (slot) 2671 list_del(&slot->node); 2672 spin_unlock_irqrestore(&pool->lock, flags); 2673 2674 return slot ? &slot->base : NULL; 2675 } 2676 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2677 2678 /** 2679 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2680 * @pool: the pool to return the IBI slot to 2681 * @s: IBI slot to recycle 2682 * 2683 * Add an IBI slot back to its generic IBI pool. Should be called from the 2684 * master driver struct_master_controller_ops->recycle_ibi() method. 2685 */ 2686 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2687 struct i3c_ibi_slot *s) 2688 { 2689 struct i3c_generic_ibi_slot *slot; 2690 unsigned long flags; 2691 2692 if (!s) 2693 return; 2694 2695 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2696 spin_lock_irqsave(&pool->lock, flags); 2697 list_add_tail(&slot->node, &pool->free_slots); 2698 spin_unlock_irqrestore(&pool->lock, flags); 2699 } 2700 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2701 2702 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2703 { 2704 if (!ops || !ops->bus_init || !ops->priv_xfers || 2705 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2706 return -EINVAL; 2707 2708 if (ops->request_ibi && 2709 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2710 !ops->recycle_ibi_slot)) 2711 return -EINVAL; 2712 2713 return 0; 2714 } 2715 2716 /** 2717 * i3c_master_register() - register an I3C master 2718 * @master: master used to send frames on the bus 2719 * @parent: the parent device (the one that provides this I3C master 2720 * controller) 2721 * @ops: the master controller operations 2722 * @secondary: true if you are registering a secondary master. Will return 2723 * -ENOTSUPP if set to true since secondary masters are not yet 2724 * supported 2725 * 2726 * This function takes care of everything for you: 2727 * 2728 * - creates and initializes the I3C bus 2729 * - populates the bus with static I2C devs if @parent->of_node is not 2730 * NULL 2731 * - registers all I3C devices added by the controller during bus 2732 * initialization 2733 * - registers the I2C adapter and all I2C devices 2734 * 2735 * Return: 0 in case of success, a negative error code otherwise. 2736 */ 2737 int i3c_master_register(struct i3c_master_controller *master, 2738 struct device *parent, 2739 const struct i3c_master_controller_ops *ops, 2740 bool secondary) 2741 { 2742 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2743 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2744 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2745 struct i2c_dev_boardinfo *i2cbi; 2746 int ret; 2747 2748 /* We do not support secondary masters yet. */ 2749 if (secondary) 2750 return -ENOTSUPP; 2751 2752 ret = i3c_master_check_ops(ops); 2753 if (ret) 2754 return ret; 2755 2756 master->dev.parent = parent; 2757 master->dev.of_node = of_node_get(parent->of_node); 2758 master->dev.bus = &i3c_bus_type; 2759 master->dev.type = &i3c_masterdev_type; 2760 master->dev.release = i3c_masterdev_release; 2761 master->ops = ops; 2762 master->secondary = secondary; 2763 INIT_LIST_HEAD(&master->boardinfo.i2c); 2764 INIT_LIST_HEAD(&master->boardinfo.i3c); 2765 2766 ret = i3c_bus_init(i3cbus, master->dev.of_node); 2767 if (ret) 2768 return ret; 2769 2770 device_initialize(&master->dev); 2771 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2772 2773 ret = of_populate_i3c_bus(master); 2774 if (ret) 2775 goto err_put_dev; 2776 2777 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2778 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2779 case I3C_LVR_I2C_INDEX(0): 2780 if (mode < I3C_BUS_MODE_MIXED_FAST) 2781 mode = I3C_BUS_MODE_MIXED_FAST; 2782 break; 2783 case I3C_LVR_I2C_INDEX(1): 2784 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2785 mode = I3C_BUS_MODE_MIXED_LIMITED; 2786 break; 2787 case I3C_LVR_I2C_INDEX(2): 2788 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2789 mode = I3C_BUS_MODE_MIXED_SLOW; 2790 break; 2791 default: 2792 ret = -EINVAL; 2793 goto err_put_dev; 2794 } 2795 2796 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2797 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2798 } 2799 2800 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2801 if (ret) 2802 goto err_put_dev; 2803 2804 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2805 if (!master->wq) { 2806 ret = -ENOMEM; 2807 goto err_put_dev; 2808 } 2809 2810 ret = i3c_master_bus_init(master); 2811 if (ret) 2812 goto err_put_dev; 2813 2814 ret = device_add(&master->dev); 2815 if (ret) 2816 goto err_cleanup_bus; 2817 2818 /* 2819 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2820 * through the I2C subsystem. 2821 */ 2822 ret = i3c_master_i2c_adapter_init(master); 2823 if (ret) 2824 goto err_del_dev; 2825 2826 /* 2827 * We're done initializing the bus and the controller, we can now 2828 * register I3C devices discovered during the initial DAA. 2829 */ 2830 master->init_done = true; 2831 i3c_bus_normaluse_lock(&master->bus); 2832 i3c_master_register_new_i3c_devs(master); 2833 i3c_bus_normaluse_unlock(&master->bus); 2834 2835 return 0; 2836 2837 err_del_dev: 2838 device_del(&master->dev); 2839 2840 err_cleanup_bus: 2841 i3c_master_bus_cleanup(master); 2842 2843 err_put_dev: 2844 put_device(&master->dev); 2845 2846 return ret; 2847 } 2848 EXPORT_SYMBOL_GPL(i3c_master_register); 2849 2850 /** 2851 * i3c_master_unregister() - unregister an I3C master 2852 * @master: master used to send frames on the bus 2853 * 2854 * Basically undo everything done in i3c_master_register(). 2855 */ 2856 void i3c_master_unregister(struct i3c_master_controller *master) 2857 { 2858 i3c_master_i2c_adapter_cleanup(master); 2859 i3c_master_unregister_i3c_devs(master); 2860 i3c_master_bus_cleanup(master); 2861 device_unregister(&master->dev); 2862 } 2863 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2864 2865 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) 2866 { 2867 struct i3c_master_controller *master; 2868 2869 if (!dev) 2870 return -ENOENT; 2871 2872 master = i3c_dev_get_master(dev); 2873 if (!master) 2874 return -EINVAL; 2875 2876 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || 2877 !dev->boardinfo->static_addr) 2878 return -EINVAL; 2879 2880 return i3c_master_setdasa_locked(master, dev->info.static_addr, 2881 dev->boardinfo->init_dyn_addr); 2882 } 2883 2884 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2885 struct i3c_priv_xfer *xfers, 2886 int nxfers) 2887 { 2888 struct i3c_master_controller *master; 2889 2890 if (!dev) 2891 return -ENOENT; 2892 2893 master = i3c_dev_get_master(dev); 2894 if (!master || !xfers) 2895 return -EINVAL; 2896 2897 if (!master->ops->priv_xfers) 2898 return -ENOTSUPP; 2899 2900 return master->ops->priv_xfers(dev, xfers, nxfers); 2901 } 2902 2903 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2904 { 2905 struct i3c_master_controller *master; 2906 int ret; 2907 2908 if (!dev->ibi) 2909 return -EINVAL; 2910 2911 master = i3c_dev_get_master(dev); 2912 ret = master->ops->disable_ibi(dev); 2913 if (ret) 2914 return ret; 2915 2916 reinit_completion(&dev->ibi->all_ibis_handled); 2917 if (atomic_read(&dev->ibi->pending_ibis)) 2918 wait_for_completion(&dev->ibi->all_ibis_handled); 2919 2920 dev->ibi->enabled = false; 2921 2922 return 0; 2923 } 2924 2925 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2926 { 2927 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2928 int ret; 2929 2930 if (!dev->ibi) 2931 return -EINVAL; 2932 2933 ret = master->ops->enable_ibi(dev); 2934 if (!ret) 2935 dev->ibi->enabled = true; 2936 2937 return ret; 2938 } 2939 2940 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2941 const struct i3c_ibi_setup *req) 2942 { 2943 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2944 struct i3c_device_ibi_info *ibi; 2945 int ret; 2946 2947 if (!master->ops->request_ibi) 2948 return -ENOTSUPP; 2949 2950 if (dev->ibi) 2951 return -EBUSY; 2952 2953 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2954 if (!ibi) 2955 return -ENOMEM; 2956 2957 atomic_set(&ibi->pending_ibis, 0); 2958 init_completion(&ibi->all_ibis_handled); 2959 ibi->handler = req->handler; 2960 ibi->max_payload_len = req->max_payload_len; 2961 ibi->num_slots = req->num_slots; 2962 2963 dev->ibi = ibi; 2964 ret = master->ops->request_ibi(dev, req); 2965 if (ret) { 2966 kfree(ibi); 2967 dev->ibi = NULL; 2968 } 2969 2970 return ret; 2971 } 2972 2973 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2974 { 2975 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2976 2977 if (!dev->ibi) 2978 return; 2979 2980 if (WARN_ON(dev->ibi->enabled)) 2981 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2982 2983 master->ops->free_ibi(dev); 2984 kfree(dev->ibi); 2985 dev->ibi = NULL; 2986 } 2987 2988 static int __init i3c_init(void) 2989 { 2990 int res; 2991 2992 res = of_alias_get_highest_id("i3c"); 2993 if (res >= 0) { 2994 mutex_lock(&i3c_core_lock); 2995 __i3c_first_dynamic_bus_num = res + 1; 2996 mutex_unlock(&i3c_core_lock); 2997 } 2998 2999 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier); 3000 if (res) 3001 return res; 3002 3003 res = bus_register(&i3c_bus_type); 3004 if (res) 3005 goto out_unreg_notifier; 3006 3007 return 0; 3008 3009 out_unreg_notifier: 3010 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3011 3012 return res; 3013 } 3014 subsys_initcall(i3c_init); 3015 3016 static void __exit i3c_exit(void) 3017 { 3018 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3019 idr_destroy(&i3c_bus_idr); 3020 bus_unregister(&i3c_bus_type); 3021 } 3022 module_exit(i3c_exit); 3023 3024 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 3025 MODULE_DESCRIPTION("I3C core"); 3026 MODULE_LICENSE("GPL v2"); 3027