1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8 #include <linux/atomic.h> 9 #include <linux/bug.h> 10 #include <linux/device.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/kernel.h> 14 #include <linux/list.h> 15 #include <linux/of.h> 16 #include <linux/slab.h> 17 #include <linux/spinlock.h> 18 #include <linux/workqueue.h> 19 20 #include "internals.h" 21 22 static DEFINE_IDR(i3c_bus_idr); 23 static DEFINE_MUTEX(i3c_core_lock); 24 static int __i3c_first_dynamic_bus_num; 25 26 /** 27 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 28 * @bus: I3C bus to take the lock on 29 * 30 * This function takes the bus lock so that no other operations can occur on 31 * the bus. This is needed for all kind of bus maintenance operation, like 32 * - enabling/disabling slave events 33 * - re-triggering DAA 34 * - changing the dynamic address of a device 35 * - relinquishing mastership 36 * - ... 37 * 38 * The reason for this kind of locking is that we don't want drivers and core 39 * logic to rely on I3C device information that could be changed behind their 40 * back. 41 */ 42 static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 43 { 44 down_write(&bus->lock); 45 } 46 47 /** 48 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 49 * operation 50 * @bus: I3C bus to release the lock on 51 * 52 * Should be called when the bus maintenance operation is done. See 53 * i3c_bus_maintenance_lock() for more details on what these maintenance 54 * operations are. 55 */ 56 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 57 { 58 up_write(&bus->lock); 59 } 60 61 /** 62 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 63 * @bus: I3C bus to take the lock on 64 * 65 * This function takes the bus lock for any operation that is not a maintenance 66 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 67 * maintenance operations). Basically all communications with I3C devices are 68 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 69 * state or I3C dynamic address). 70 * 71 * Note that this lock is not guaranteeing serialization of normal operations. 72 * In other words, transfer requests passed to the I3C master can be submitted 73 * in parallel and I3C master drivers have to use their own locking to make 74 * sure two different communications are not inter-mixed, or access to the 75 * output/input queue is not done while the engine is busy. 76 */ 77 void i3c_bus_normaluse_lock(struct i3c_bus *bus) 78 { 79 down_read(&bus->lock); 80 } 81 82 /** 83 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 84 * @bus: I3C bus to release the lock on 85 * 86 * Should be called when a normal operation is done. See 87 * i3c_bus_normaluse_lock() for more details on what these normal operations 88 * are. 89 */ 90 void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 91 { 92 up_read(&bus->lock); 93 } 94 95 static struct i3c_master_controller * 96 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 97 { 98 return container_of(i3cbus, struct i3c_master_controller, bus); 99 } 100 101 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 102 { 103 return container_of(dev, struct i3c_master_controller, dev); 104 } 105 106 static const struct device_type i3c_device_type; 107 108 static struct i3c_bus *dev_to_i3cbus(struct device *dev) 109 { 110 struct i3c_master_controller *master; 111 112 if (dev->type == &i3c_device_type) 113 return dev_to_i3cdev(dev)->bus; 114 115 master = dev_to_i3cmaster(dev); 116 117 return &master->bus; 118 } 119 120 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 121 { 122 struct i3c_master_controller *master; 123 124 if (dev->type == &i3c_device_type) 125 return dev_to_i3cdev(dev)->desc; 126 127 master = dev_to_i3cmaster(dev); 128 129 return master->this; 130 } 131 132 static ssize_t bcr_show(struct device *dev, 133 struct device_attribute *da, 134 char *buf) 135 { 136 struct i3c_bus *bus = dev_to_i3cbus(dev); 137 struct i3c_dev_desc *desc; 138 ssize_t ret; 139 140 i3c_bus_normaluse_lock(bus); 141 desc = dev_to_i3cdesc(dev); 142 ret = sprintf(buf, "%x\n", desc->info.bcr); 143 i3c_bus_normaluse_unlock(bus); 144 145 return ret; 146 } 147 static DEVICE_ATTR_RO(bcr); 148 149 static ssize_t dcr_show(struct device *dev, 150 struct device_attribute *da, 151 char *buf) 152 { 153 struct i3c_bus *bus = dev_to_i3cbus(dev); 154 struct i3c_dev_desc *desc; 155 ssize_t ret; 156 157 i3c_bus_normaluse_lock(bus); 158 desc = dev_to_i3cdesc(dev); 159 ret = sprintf(buf, "%x\n", desc->info.dcr); 160 i3c_bus_normaluse_unlock(bus); 161 162 return ret; 163 } 164 static DEVICE_ATTR_RO(dcr); 165 166 static ssize_t pid_show(struct device *dev, 167 struct device_attribute *da, 168 char *buf) 169 { 170 struct i3c_bus *bus = dev_to_i3cbus(dev); 171 struct i3c_dev_desc *desc; 172 ssize_t ret; 173 174 i3c_bus_normaluse_lock(bus); 175 desc = dev_to_i3cdesc(dev); 176 ret = sprintf(buf, "%llx\n", desc->info.pid); 177 i3c_bus_normaluse_unlock(bus); 178 179 return ret; 180 } 181 static DEVICE_ATTR_RO(pid); 182 183 static ssize_t dynamic_address_show(struct device *dev, 184 struct device_attribute *da, 185 char *buf) 186 { 187 struct i3c_bus *bus = dev_to_i3cbus(dev); 188 struct i3c_dev_desc *desc; 189 ssize_t ret; 190 191 i3c_bus_normaluse_lock(bus); 192 desc = dev_to_i3cdesc(dev); 193 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 194 i3c_bus_normaluse_unlock(bus); 195 196 return ret; 197 } 198 static DEVICE_ATTR_RO(dynamic_address); 199 200 static const char * const hdrcap_strings[] = { 201 "hdr-ddr", "hdr-tsp", "hdr-tsl", 202 }; 203 204 static ssize_t hdrcap_show(struct device *dev, 205 struct device_attribute *da, 206 char *buf) 207 { 208 struct i3c_bus *bus = dev_to_i3cbus(dev); 209 struct i3c_dev_desc *desc; 210 ssize_t offset = 0, ret; 211 unsigned long caps; 212 int mode; 213 214 i3c_bus_normaluse_lock(bus); 215 desc = dev_to_i3cdesc(dev); 216 caps = desc->info.hdr_cap; 217 for_each_set_bit(mode, &caps, 8) { 218 if (mode >= ARRAY_SIZE(hdrcap_strings)) 219 break; 220 221 if (!hdrcap_strings[mode]) 222 continue; 223 224 ret = sprintf(buf + offset, offset ? " %s" : "%s", 225 hdrcap_strings[mode]); 226 if (ret < 0) 227 goto out; 228 229 offset += ret; 230 } 231 232 ret = sprintf(buf + offset, "\n"); 233 if (ret < 0) 234 goto out; 235 236 ret = offset + ret; 237 238 out: 239 i3c_bus_normaluse_unlock(bus); 240 241 return ret; 242 } 243 static DEVICE_ATTR_RO(hdrcap); 244 245 static ssize_t modalias_show(struct device *dev, 246 struct device_attribute *da, char *buf) 247 { 248 struct i3c_device *i3c = dev_to_i3cdev(dev); 249 struct i3c_device_info devinfo; 250 u16 manuf, part, ext; 251 252 i3c_device_get_info(i3c, &devinfo); 253 manuf = I3C_PID_MANUF_ID(devinfo.pid); 254 part = I3C_PID_PART_ID(devinfo.pid); 255 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 256 257 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 258 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 259 manuf); 260 261 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 262 devinfo.dcr, manuf, part, ext); 263 } 264 static DEVICE_ATTR_RO(modalias); 265 266 static struct attribute *i3c_device_attrs[] = { 267 &dev_attr_bcr.attr, 268 &dev_attr_dcr.attr, 269 &dev_attr_pid.attr, 270 &dev_attr_dynamic_address.attr, 271 &dev_attr_hdrcap.attr, 272 &dev_attr_modalias.attr, 273 NULL, 274 }; 275 ATTRIBUTE_GROUPS(i3c_device); 276 277 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env) 278 { 279 const struct i3c_device *i3cdev = dev_to_i3cdev(dev); 280 struct i3c_device_info devinfo; 281 u16 manuf, part, ext; 282 283 i3c_device_get_info(i3cdev, &devinfo); 284 manuf = I3C_PID_MANUF_ID(devinfo.pid); 285 part = I3C_PID_PART_ID(devinfo.pid); 286 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 287 288 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 289 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 290 devinfo.dcr, manuf); 291 292 return add_uevent_var(env, 293 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 294 devinfo.dcr, manuf, part, ext); 295 } 296 297 static const struct device_type i3c_device_type = { 298 .groups = i3c_device_groups, 299 .uevent = i3c_device_uevent, 300 }; 301 302 static int i3c_device_match(struct device *dev, struct device_driver *drv) 303 { 304 struct i3c_device *i3cdev; 305 struct i3c_driver *i3cdrv; 306 307 if (dev->type != &i3c_device_type) 308 return 0; 309 310 i3cdev = dev_to_i3cdev(dev); 311 i3cdrv = drv_to_i3cdrv(drv); 312 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 313 return 1; 314 315 return 0; 316 } 317 318 static int i3c_device_probe(struct device *dev) 319 { 320 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 321 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 322 323 return driver->probe(i3cdev); 324 } 325 326 static void i3c_device_remove(struct device *dev) 327 { 328 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 329 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 330 331 if (driver->remove) 332 driver->remove(i3cdev); 333 334 i3c_device_free_ibi(i3cdev); 335 } 336 337 struct bus_type i3c_bus_type = { 338 .name = "i3c", 339 .match = i3c_device_match, 340 .probe = i3c_device_probe, 341 .remove = i3c_device_remove, 342 }; 343 344 static enum i3c_addr_slot_status 345 i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask) 346 { 347 unsigned long status; 348 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 349 350 if (addr > I2C_MAX_ADDR) 351 return I3C_ADDR_SLOT_RSVD; 352 353 status = bus->addrslots[bitpos / BITS_PER_LONG]; 354 status >>= bitpos % BITS_PER_LONG; 355 356 return status & mask; 357 } 358 359 static enum i3c_addr_slot_status 360 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 361 { 362 return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK); 363 } 364 365 static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, 366 enum i3c_addr_slot_status status, u32 mask) 367 { 368 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS; 369 unsigned long *ptr; 370 371 if (addr > I2C_MAX_ADDR) 372 return; 373 374 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 375 *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG)); 376 *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG); 377 } 378 379 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 380 enum i3c_addr_slot_status status) 381 { 382 i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK); 383 } 384 385 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 386 { 387 enum i3c_addr_slot_status status; 388 389 status = i3c_bus_get_addr_slot_status(bus, addr); 390 391 return status == I3C_ADDR_SLOT_FREE; 392 } 393 394 /* 395 * ┌────┬─────────────┬───┬─────────┬───┐ 396 * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐ 397 * └────┴─────────────┴───┴─────────┴───┘ │ 398 * ┌─────────────────────────────────────────┘ 399 * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐ 400 * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│ 401 * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘ 402 * Some master controllers (such as HCI) need to prepare the entire above transaction before 403 * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated 404 * before knowing the target device's UID information. 405 * 406 * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is 407 * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI 408 * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is 409 * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with 410 * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise, 411 * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be 412 * able to switch to its desired address. 413 * 414 * If the previous step fails, fallback returning one of the remaining unassigned address, 415 * regardless of its state in the desired list. 416 */ 417 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 418 { 419 enum i3c_addr_slot_status status; 420 u8 addr; 421 422 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 423 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 424 I3C_ADDR_SLOT_EXT_STATUS_MASK); 425 if (status == I3C_ADDR_SLOT_FREE) 426 return addr; 427 } 428 429 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 430 status = i3c_bus_get_addr_slot_status_mask(bus, addr, 431 I3C_ADDR_SLOT_STATUS_MASK); 432 if (status == I3C_ADDR_SLOT_FREE) 433 return addr; 434 } 435 436 return -ENOMEM; 437 } 438 439 static void i3c_bus_init_addrslots(struct i3c_bus *bus) 440 { 441 int i; 442 443 /* Addresses 0 to 7 are reserved. */ 444 for (i = 0; i < 8; i++) 445 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 446 447 /* 448 * Reserve broadcast address and all addresses that might collide 449 * with the broadcast address when facing a single bit error. 450 */ 451 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 452 I3C_ADDR_SLOT_RSVD); 453 for (i = 0; i < 7; i++) 454 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 455 I3C_ADDR_SLOT_RSVD); 456 } 457 458 static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 459 { 460 mutex_lock(&i3c_core_lock); 461 idr_remove(&i3c_bus_idr, i3cbus->id); 462 mutex_unlock(&i3c_core_lock); 463 } 464 465 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) 466 { 467 int ret, start, end, id = -1; 468 469 init_rwsem(&i3cbus->lock); 470 INIT_LIST_HEAD(&i3cbus->devs.i2c); 471 INIT_LIST_HEAD(&i3cbus->devs.i3c); 472 i3c_bus_init_addrslots(i3cbus); 473 i3cbus->mode = I3C_BUS_MODE_PURE; 474 475 if (np) 476 id = of_alias_get_id(np, "i3c"); 477 478 mutex_lock(&i3c_core_lock); 479 if (id >= 0) { 480 start = id; 481 end = start + 1; 482 } else { 483 start = __i3c_first_dynamic_bus_num; 484 end = 0; 485 } 486 487 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL); 488 mutex_unlock(&i3c_core_lock); 489 490 if (ret < 0) 491 return ret; 492 493 i3cbus->id = ret; 494 495 return 0; 496 } 497 498 static const char * const i3c_bus_mode_strings[] = { 499 [I3C_BUS_MODE_PURE] = "pure", 500 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 501 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 502 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 503 }; 504 505 static ssize_t mode_show(struct device *dev, 506 struct device_attribute *da, 507 char *buf) 508 { 509 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 510 ssize_t ret; 511 512 i3c_bus_normaluse_lock(i3cbus); 513 if (i3cbus->mode < 0 || 514 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 515 !i3c_bus_mode_strings[i3cbus->mode]) 516 ret = sprintf(buf, "unknown\n"); 517 else 518 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 519 i3c_bus_normaluse_unlock(i3cbus); 520 521 return ret; 522 } 523 static DEVICE_ATTR_RO(mode); 524 525 static ssize_t current_master_show(struct device *dev, 526 struct device_attribute *da, 527 char *buf) 528 { 529 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 530 ssize_t ret; 531 532 i3c_bus_normaluse_lock(i3cbus); 533 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 534 i3cbus->cur_master->info.pid); 535 i3c_bus_normaluse_unlock(i3cbus); 536 537 return ret; 538 } 539 static DEVICE_ATTR_RO(current_master); 540 541 static ssize_t i3c_scl_frequency_show(struct device *dev, 542 struct device_attribute *da, 543 char *buf) 544 { 545 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 546 ssize_t ret; 547 548 i3c_bus_normaluse_lock(i3cbus); 549 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 550 i3c_bus_normaluse_unlock(i3cbus); 551 552 return ret; 553 } 554 static DEVICE_ATTR_RO(i3c_scl_frequency); 555 556 static ssize_t i2c_scl_frequency_show(struct device *dev, 557 struct device_attribute *da, 558 char *buf) 559 { 560 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 561 ssize_t ret; 562 563 i3c_bus_normaluse_lock(i3cbus); 564 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 565 i3c_bus_normaluse_unlock(i3cbus); 566 567 return ret; 568 } 569 static DEVICE_ATTR_RO(i2c_scl_frequency); 570 571 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable) 572 { 573 int ret; 574 575 if (!master || !master->ops) 576 return -EINVAL; 577 578 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin) 579 return -EINVAL; 580 581 i3c_bus_normaluse_lock(&master->bus); 582 583 if (enable) 584 ret = master->ops->enable_hotjoin(master); 585 else 586 ret = master->ops->disable_hotjoin(master); 587 588 master->hotjoin = enable; 589 590 i3c_bus_normaluse_unlock(&master->bus); 591 592 return ret; 593 } 594 595 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr, 596 const char *buf, size_t count) 597 { 598 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 599 int ret; 600 bool res; 601 602 if (!i3cbus->cur_master) 603 return -EINVAL; 604 605 if (kstrtobool(buf, &res)) 606 return -EINVAL; 607 608 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res); 609 if (ret) 610 return ret; 611 612 return count; 613 } 614 615 /* 616 * i3c_master_enable_hotjoin - Enable hotjoin 617 * @master: I3C master object 618 * 619 * Return: a 0 in case of success, an negative error code otherwise. 620 */ 621 int i3c_master_enable_hotjoin(struct i3c_master_controller *master) 622 { 623 return i3c_set_hotjoin(master, true); 624 } 625 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin); 626 627 /* 628 * i3c_master_disable_hotjoin - Disable hotjoin 629 * @master: I3C master object 630 * 631 * Return: a 0 in case of success, an negative error code otherwise. 632 */ 633 int i3c_master_disable_hotjoin(struct i3c_master_controller *master) 634 { 635 return i3c_set_hotjoin(master, false); 636 } 637 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin); 638 639 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf) 640 { 641 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 642 ssize_t ret; 643 644 i3c_bus_normaluse_lock(i3cbus); 645 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin); 646 i3c_bus_normaluse_unlock(i3cbus); 647 648 return ret; 649 } 650 651 static DEVICE_ATTR_RW(hotjoin); 652 653 static struct attribute *i3c_masterdev_attrs[] = { 654 &dev_attr_mode.attr, 655 &dev_attr_current_master.attr, 656 &dev_attr_i3c_scl_frequency.attr, 657 &dev_attr_i2c_scl_frequency.attr, 658 &dev_attr_bcr.attr, 659 &dev_attr_dcr.attr, 660 &dev_attr_pid.attr, 661 &dev_attr_dynamic_address.attr, 662 &dev_attr_hdrcap.attr, 663 &dev_attr_hotjoin.attr, 664 NULL, 665 }; 666 ATTRIBUTE_GROUPS(i3c_masterdev); 667 668 static void i3c_masterdev_release(struct device *dev) 669 { 670 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 671 struct i3c_bus *bus = dev_to_i3cbus(dev); 672 673 if (master->wq) 674 destroy_workqueue(master->wq); 675 676 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 677 i3c_bus_cleanup(bus); 678 679 of_node_put(dev->of_node); 680 } 681 682 static const struct device_type i3c_masterdev_type = { 683 .groups = i3c_masterdev_groups, 684 }; 685 686 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 687 unsigned long max_i2c_scl_rate) 688 { 689 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 690 691 i3cbus->mode = mode; 692 693 switch (i3cbus->mode) { 694 case I3C_BUS_MODE_PURE: 695 if (!i3cbus->scl_rate.i3c) 696 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 697 break; 698 case I3C_BUS_MODE_MIXED_FAST: 699 case I3C_BUS_MODE_MIXED_LIMITED: 700 if (!i3cbus->scl_rate.i3c) 701 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 702 if (!i3cbus->scl_rate.i2c) 703 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 704 break; 705 case I3C_BUS_MODE_MIXED_SLOW: 706 if (!i3cbus->scl_rate.i2c) 707 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 708 if (!i3cbus->scl_rate.i3c || 709 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 710 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 711 break; 712 default: 713 return -EINVAL; 714 } 715 716 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 717 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 718 719 /* 720 * I3C/I2C frequency may have been overridden, check that user-provided 721 * values are not exceeding max possible frequency. 722 */ 723 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 724 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 725 return -EINVAL; 726 727 return 0; 728 } 729 730 static struct i3c_master_controller * 731 i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 732 { 733 return container_of(adap, struct i3c_master_controller, i2c); 734 } 735 736 static struct i2c_adapter * 737 i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 738 { 739 return &master->i2c; 740 } 741 742 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 743 { 744 kfree(dev); 745 } 746 747 static struct i2c_dev_desc * 748 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 749 u16 addr, u8 lvr) 750 { 751 struct i2c_dev_desc *dev; 752 753 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 754 if (!dev) 755 return ERR_PTR(-ENOMEM); 756 757 dev->common.master = master; 758 dev->addr = addr; 759 dev->lvr = lvr; 760 761 return dev; 762 } 763 764 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 765 u16 payloadlen) 766 { 767 dest->addr = addr; 768 dest->payload.len = payloadlen; 769 if (payloadlen) 770 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 771 else 772 dest->payload.data = NULL; 773 774 return dest->payload.data; 775 } 776 777 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 778 { 779 kfree(dest->payload.data); 780 } 781 782 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 783 struct i3c_ccc_cmd_dest *dests, 784 unsigned int ndests) 785 { 786 cmd->rnw = rnw ? 1 : 0; 787 cmd->id = id; 788 cmd->dests = dests; 789 cmd->ndests = ndests; 790 cmd->err = I3C_ERROR_UNKNOWN; 791 } 792 793 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 794 struct i3c_ccc_cmd *cmd) 795 { 796 int ret; 797 798 if (!cmd || !master) 799 return -EINVAL; 800 801 if (WARN_ON(master->init_done && 802 !rwsem_is_locked(&master->bus.lock))) 803 return -EINVAL; 804 805 if (!master->ops->send_ccc_cmd) 806 return -ENOTSUPP; 807 808 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 809 return -EINVAL; 810 811 if (master->ops->supports_ccc_cmd && 812 !master->ops->supports_ccc_cmd(master, cmd)) 813 return -ENOTSUPP; 814 815 ret = master->ops->send_ccc_cmd(master, cmd); 816 if (ret) { 817 if (cmd->err != I3C_ERROR_UNKNOWN) 818 return cmd->err; 819 820 return ret; 821 } 822 823 return 0; 824 } 825 826 static struct i2c_dev_desc * 827 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 828 u16 addr) 829 { 830 struct i2c_dev_desc *dev; 831 832 i3c_bus_for_each_i2cdev(&master->bus, dev) { 833 if (dev->addr == addr) 834 return dev; 835 } 836 837 return NULL; 838 } 839 840 /** 841 * i3c_master_get_free_addr() - get a free address on the bus 842 * @master: I3C master object 843 * @start_addr: where to start searching 844 * 845 * This function must be called with the bus lock held in write mode. 846 * 847 * Return: the first free address starting at @start_addr (included) or -ENOMEM 848 * if there's no more address available. 849 */ 850 int i3c_master_get_free_addr(struct i3c_master_controller *master, 851 u8 start_addr) 852 { 853 return i3c_bus_get_free_addr(&master->bus, start_addr); 854 } 855 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 856 857 static void i3c_device_release(struct device *dev) 858 { 859 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 860 861 WARN_ON(i3cdev->desc); 862 863 of_node_put(i3cdev->dev.of_node); 864 kfree(i3cdev); 865 } 866 867 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 868 { 869 kfree(dev); 870 } 871 872 static struct i3c_dev_desc * 873 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 874 const struct i3c_device_info *info) 875 { 876 struct i3c_dev_desc *dev; 877 878 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 879 if (!dev) 880 return ERR_PTR(-ENOMEM); 881 882 dev->common.master = master; 883 dev->info = *info; 884 mutex_init(&dev->ibi_lock); 885 886 return dev; 887 } 888 889 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 890 u8 addr) 891 { 892 enum i3c_addr_slot_status addrstat; 893 struct i3c_ccc_cmd_dest dest; 894 struct i3c_ccc_cmd cmd; 895 int ret; 896 897 if (!master) 898 return -EINVAL; 899 900 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 901 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 902 return -EINVAL; 903 904 i3c_ccc_cmd_dest_init(&dest, addr, 0); 905 i3c_ccc_cmd_init(&cmd, false, 906 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 907 &dest, 1); 908 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 909 i3c_ccc_cmd_dest_cleanup(&dest); 910 911 return ret; 912 } 913 914 /** 915 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 916 * procedure 917 * @master: master used to send frames on the bus 918 * 919 * Send a ENTDAA CCC command to start a DAA procedure. 920 * 921 * Note that this function only sends the ENTDAA CCC command, all the logic 922 * behind dynamic address assignment has to be handled in the I3C master 923 * driver. 924 * 925 * This function must be called with the bus lock held in write mode. 926 * 927 * Return: 0 in case of success, a positive I3C error code if the error is 928 * one of the official Mx error codes, and a negative error code otherwise. 929 */ 930 int i3c_master_entdaa_locked(struct i3c_master_controller *master) 931 { 932 struct i3c_ccc_cmd_dest dest; 933 struct i3c_ccc_cmd cmd; 934 int ret; 935 936 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 937 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 938 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 939 i3c_ccc_cmd_dest_cleanup(&dest); 940 941 return ret; 942 } 943 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 944 945 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 946 u8 addr, bool enable, u8 evts) 947 { 948 struct i3c_ccc_events *events; 949 struct i3c_ccc_cmd_dest dest; 950 struct i3c_ccc_cmd cmd; 951 int ret; 952 953 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 954 if (!events) 955 return -ENOMEM; 956 957 events->events = evts; 958 i3c_ccc_cmd_init(&cmd, false, 959 enable ? 960 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 961 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 962 &dest, 1); 963 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 964 i3c_ccc_cmd_dest_cleanup(&dest); 965 966 return ret; 967 } 968 969 /** 970 * i3c_master_disec_locked() - send a DISEC CCC command 971 * @master: master used to send frames on the bus 972 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 973 * @evts: events to disable 974 * 975 * Send a DISEC CCC command to disable some or all events coming from a 976 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 977 * 978 * This function must be called with the bus lock held in write mode. 979 * 980 * Return: 0 in case of success, a positive I3C error code if the error is 981 * one of the official Mx error codes, and a negative error code otherwise. 982 */ 983 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 984 u8 evts) 985 { 986 return i3c_master_enec_disec_locked(master, addr, false, evts); 987 } 988 EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 989 990 /** 991 * i3c_master_enec_locked() - send an ENEC CCC command 992 * @master: master used to send frames on the bus 993 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 994 * @evts: events to disable 995 * 996 * Sends an ENEC CCC command to enable some or all events coming from a 997 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 998 * 999 * This function must be called with the bus lock held in write mode. 1000 * 1001 * Return: 0 in case of success, a positive I3C error code if the error is 1002 * one of the official Mx error codes, and a negative error code otherwise. 1003 */ 1004 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 1005 u8 evts) 1006 { 1007 return i3c_master_enec_disec_locked(master, addr, true, evts); 1008 } 1009 EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 1010 1011 /** 1012 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 1013 * @master: master used to send frames on the bus 1014 * 1015 * Send a DEFSLVS CCC command containing all the devices known to the @master. 1016 * This is useful when you have secondary masters on the bus to propagate 1017 * device information. 1018 * 1019 * This should be called after all I3C devices have been discovered (in other 1020 * words, after the DAA procedure has finished) and instantiated in 1021 * &i3c_master_controller_ops->bus_init(). 1022 * It should also be called if a master ACKed an Hot-Join request and assigned 1023 * a dynamic address to the device joining the bus. 1024 * 1025 * This function must be called with the bus lock held in write mode. 1026 * 1027 * Return: 0 in case of success, a positive I3C error code if the error is 1028 * one of the official Mx error codes, and a negative error code otherwise. 1029 */ 1030 int i3c_master_defslvs_locked(struct i3c_master_controller *master) 1031 { 1032 struct i3c_ccc_defslvs *defslvs; 1033 struct i3c_ccc_dev_desc *desc; 1034 struct i3c_ccc_cmd_dest dest; 1035 struct i3c_dev_desc *i3cdev; 1036 struct i2c_dev_desc *i2cdev; 1037 struct i3c_ccc_cmd cmd; 1038 struct i3c_bus *bus; 1039 bool send = false; 1040 int ndevs = 0, ret; 1041 1042 if (!master) 1043 return -EINVAL; 1044 1045 bus = i3c_master_get_bus(master); 1046 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1047 ndevs++; 1048 1049 if (i3cdev == master->this) 1050 continue; 1051 1052 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 1053 I3C_BCR_I3C_MASTER) 1054 send = true; 1055 } 1056 1057 /* No other master on the bus, skip DEFSLVS. */ 1058 if (!send) 1059 return 0; 1060 1061 i3c_bus_for_each_i2cdev(bus, i2cdev) 1062 ndevs++; 1063 1064 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 1065 struct_size(defslvs, slaves, 1066 ndevs - 1)); 1067 if (!defslvs) 1068 return -ENOMEM; 1069 1070 defslvs->count = ndevs; 1071 defslvs->master.bcr = master->this->info.bcr; 1072 defslvs->master.dcr = master->this->info.dcr; 1073 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 1074 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 1075 1076 desc = defslvs->slaves; 1077 i3c_bus_for_each_i2cdev(bus, i2cdev) { 1078 desc->lvr = i2cdev->lvr; 1079 desc->static_addr = i2cdev->addr << 1; 1080 desc++; 1081 } 1082 1083 i3c_bus_for_each_i3cdev(bus, i3cdev) { 1084 /* Skip the I3C dev representing this master. */ 1085 if (i3cdev == master->this) 1086 continue; 1087 1088 desc->bcr = i3cdev->info.bcr; 1089 desc->dcr = i3cdev->info.dcr; 1090 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 1091 desc->static_addr = i3cdev->info.static_addr << 1; 1092 desc++; 1093 } 1094 1095 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 1096 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1097 i3c_ccc_cmd_dest_cleanup(&dest); 1098 1099 return ret; 1100 } 1101 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 1102 1103 static int i3c_master_setda_locked(struct i3c_master_controller *master, 1104 u8 oldaddr, u8 newaddr, bool setdasa) 1105 { 1106 struct i3c_ccc_cmd_dest dest; 1107 struct i3c_ccc_setda *setda; 1108 struct i3c_ccc_cmd cmd; 1109 int ret; 1110 1111 if (!oldaddr || !newaddr) 1112 return -EINVAL; 1113 1114 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 1115 if (!setda) 1116 return -ENOMEM; 1117 1118 setda->addr = newaddr << 1; 1119 i3c_ccc_cmd_init(&cmd, false, 1120 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 1121 &dest, 1); 1122 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1123 i3c_ccc_cmd_dest_cleanup(&dest); 1124 1125 return ret; 1126 } 1127 1128 static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 1129 u8 static_addr, u8 dyn_addr) 1130 { 1131 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 1132 } 1133 1134 static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1135 u8 oldaddr, u8 newaddr) 1136 { 1137 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1138 } 1139 1140 static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1141 struct i3c_device_info *info) 1142 { 1143 struct i3c_ccc_cmd_dest dest; 1144 struct i3c_ccc_mrl *mrl; 1145 struct i3c_ccc_cmd cmd; 1146 int ret; 1147 1148 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1149 if (!mrl) 1150 return -ENOMEM; 1151 1152 /* 1153 * When the device does not have IBI payload GETMRL only returns 2 1154 * bytes of data. 1155 */ 1156 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1157 dest.payload.len -= 1; 1158 1159 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1160 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1161 if (ret) 1162 goto out; 1163 1164 switch (dest.payload.len) { 1165 case 3: 1166 info->max_ibi_len = mrl->ibi_len; 1167 fallthrough; 1168 case 2: 1169 info->max_read_len = be16_to_cpu(mrl->read_len); 1170 break; 1171 default: 1172 ret = -EIO; 1173 goto out; 1174 } 1175 1176 out: 1177 i3c_ccc_cmd_dest_cleanup(&dest); 1178 1179 return ret; 1180 } 1181 1182 static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1183 struct i3c_device_info *info) 1184 { 1185 struct i3c_ccc_cmd_dest dest; 1186 struct i3c_ccc_mwl *mwl; 1187 struct i3c_ccc_cmd cmd; 1188 int ret; 1189 1190 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1191 if (!mwl) 1192 return -ENOMEM; 1193 1194 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1195 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1196 if (ret) 1197 goto out; 1198 1199 if (dest.payload.len != sizeof(*mwl)) { 1200 ret = -EIO; 1201 goto out; 1202 } 1203 1204 info->max_write_len = be16_to_cpu(mwl->len); 1205 1206 out: 1207 i3c_ccc_cmd_dest_cleanup(&dest); 1208 1209 return ret; 1210 } 1211 1212 static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1213 struct i3c_device_info *info) 1214 { 1215 struct i3c_ccc_getmxds *getmaxds; 1216 struct i3c_ccc_cmd_dest dest; 1217 struct i3c_ccc_cmd cmd; 1218 int ret; 1219 1220 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1221 sizeof(*getmaxds)); 1222 if (!getmaxds) 1223 return -ENOMEM; 1224 1225 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1226 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1227 if (ret) 1228 goto out; 1229 1230 if (dest.payload.len != 2 && dest.payload.len != 5) { 1231 ret = -EIO; 1232 goto out; 1233 } 1234 1235 info->max_read_ds = getmaxds->maxrd; 1236 info->max_write_ds = getmaxds->maxwr; 1237 if (dest.payload.len == 5) 1238 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1239 ((u32)getmaxds->maxrdturn[1] << 8) | 1240 ((u32)getmaxds->maxrdturn[2] << 16); 1241 1242 out: 1243 i3c_ccc_cmd_dest_cleanup(&dest); 1244 1245 return ret; 1246 } 1247 1248 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1249 struct i3c_device_info *info) 1250 { 1251 struct i3c_ccc_gethdrcap *gethdrcap; 1252 struct i3c_ccc_cmd_dest dest; 1253 struct i3c_ccc_cmd cmd; 1254 int ret; 1255 1256 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1257 sizeof(*gethdrcap)); 1258 if (!gethdrcap) 1259 return -ENOMEM; 1260 1261 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1262 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1263 if (ret) 1264 goto out; 1265 1266 if (dest.payload.len != 1) { 1267 ret = -EIO; 1268 goto out; 1269 } 1270 1271 info->hdr_cap = gethdrcap->modes; 1272 1273 out: 1274 i3c_ccc_cmd_dest_cleanup(&dest); 1275 1276 return ret; 1277 } 1278 1279 static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1280 struct i3c_device_info *info) 1281 { 1282 struct i3c_ccc_getpid *getpid; 1283 struct i3c_ccc_cmd_dest dest; 1284 struct i3c_ccc_cmd cmd; 1285 int ret, i; 1286 1287 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1288 if (!getpid) 1289 return -ENOMEM; 1290 1291 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1292 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1293 if (ret) 1294 goto out; 1295 1296 info->pid = 0; 1297 for (i = 0; i < sizeof(getpid->pid); i++) { 1298 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1299 1300 info->pid |= (u64)getpid->pid[i] << sft; 1301 } 1302 1303 out: 1304 i3c_ccc_cmd_dest_cleanup(&dest); 1305 1306 return ret; 1307 } 1308 1309 static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1310 struct i3c_device_info *info) 1311 { 1312 struct i3c_ccc_getbcr *getbcr; 1313 struct i3c_ccc_cmd_dest dest; 1314 struct i3c_ccc_cmd cmd; 1315 int ret; 1316 1317 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1318 if (!getbcr) 1319 return -ENOMEM; 1320 1321 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1322 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1323 if (ret) 1324 goto out; 1325 1326 info->bcr = getbcr->bcr; 1327 1328 out: 1329 i3c_ccc_cmd_dest_cleanup(&dest); 1330 1331 return ret; 1332 } 1333 1334 static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1335 struct i3c_device_info *info) 1336 { 1337 struct i3c_ccc_getdcr *getdcr; 1338 struct i3c_ccc_cmd_dest dest; 1339 struct i3c_ccc_cmd cmd; 1340 int ret; 1341 1342 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1343 if (!getdcr) 1344 return -ENOMEM; 1345 1346 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1347 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1348 if (ret) 1349 goto out; 1350 1351 info->dcr = getdcr->dcr; 1352 1353 out: 1354 i3c_ccc_cmd_dest_cleanup(&dest); 1355 1356 return ret; 1357 } 1358 1359 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1360 { 1361 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1362 enum i3c_addr_slot_status slot_status; 1363 int ret; 1364 1365 if (!dev->info.dyn_addr) 1366 return -EINVAL; 1367 1368 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1369 dev->info.dyn_addr); 1370 if (slot_status == I3C_ADDR_SLOT_RSVD || 1371 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1372 return -EINVAL; 1373 1374 ret = i3c_master_getpid_locked(master, &dev->info); 1375 if (ret) 1376 return ret; 1377 1378 ret = i3c_master_getbcr_locked(master, &dev->info); 1379 if (ret) 1380 return ret; 1381 1382 ret = i3c_master_getdcr_locked(master, &dev->info); 1383 if (ret) 1384 return ret; 1385 1386 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1387 ret = i3c_master_getmxds_locked(master, &dev->info); 1388 if (ret) 1389 return ret; 1390 } 1391 1392 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1393 dev->info.max_ibi_len = 1; 1394 1395 i3c_master_getmrl_locked(master, &dev->info); 1396 i3c_master_getmwl_locked(master, &dev->info); 1397 1398 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1399 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1400 if (ret) 1401 return ret; 1402 } 1403 1404 return 0; 1405 } 1406 1407 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1408 { 1409 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1410 1411 if (dev->info.static_addr) 1412 i3c_bus_set_addr_slot_status(&master->bus, 1413 dev->info.static_addr, 1414 I3C_ADDR_SLOT_FREE); 1415 1416 if (dev->info.dyn_addr) 1417 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1418 I3C_ADDR_SLOT_FREE); 1419 1420 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1421 i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr, 1422 I3C_ADDR_SLOT_FREE); 1423 } 1424 1425 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1426 { 1427 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1428 enum i3c_addr_slot_status status; 1429 1430 if (!dev->info.static_addr && !dev->info.dyn_addr) 1431 return 0; 1432 1433 if (dev->info.static_addr) { 1434 status = i3c_bus_get_addr_slot_status(&master->bus, 1435 dev->info.static_addr); 1436 /* Since static address and assigned dynamic address can be 1437 * equal, allow this case to pass. 1438 */ 1439 if (status != I3C_ADDR_SLOT_FREE && 1440 dev->info.static_addr != dev->boardinfo->init_dyn_addr) 1441 return -EBUSY; 1442 1443 i3c_bus_set_addr_slot_status(&master->bus, 1444 dev->info.static_addr, 1445 I3C_ADDR_SLOT_I3C_DEV); 1446 } 1447 1448 /* 1449 * ->init_dyn_addr should have been reserved before that, so, if we're 1450 * trying to apply a pre-reserved dynamic address, we should not try 1451 * to reserve the address slot a second time. 1452 */ 1453 if (dev->info.dyn_addr && 1454 (!dev->boardinfo || 1455 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1456 status = i3c_bus_get_addr_slot_status(&master->bus, 1457 dev->info.dyn_addr); 1458 if (status != I3C_ADDR_SLOT_FREE) 1459 goto err_release_static_addr; 1460 1461 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1462 I3C_ADDR_SLOT_I3C_DEV); 1463 } 1464 1465 return 0; 1466 1467 err_release_static_addr: 1468 if (dev->info.static_addr) 1469 i3c_bus_set_addr_slot_status(&master->bus, 1470 dev->info.static_addr, 1471 I3C_ADDR_SLOT_FREE); 1472 1473 return -EBUSY; 1474 } 1475 1476 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1477 struct i3c_dev_desc *dev) 1478 { 1479 int ret; 1480 1481 /* 1482 * We don't attach devices to the controller until they are 1483 * addressable on the bus. 1484 */ 1485 if (!dev->info.static_addr && !dev->info.dyn_addr) 1486 return 0; 1487 1488 ret = i3c_master_get_i3c_addrs(dev); 1489 if (ret) 1490 return ret; 1491 1492 /* Do not attach the master device itself. */ 1493 if (master->this != dev && master->ops->attach_i3c_dev) { 1494 ret = master->ops->attach_i3c_dev(dev); 1495 if (ret) { 1496 i3c_master_put_i3c_addrs(dev); 1497 return ret; 1498 } 1499 } 1500 1501 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1502 1503 return 0; 1504 } 1505 1506 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1507 u8 old_dyn_addr) 1508 { 1509 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1510 int ret; 1511 1512 if (dev->info.dyn_addr != old_dyn_addr) { 1513 i3c_bus_set_addr_slot_status(&master->bus, 1514 dev->info.dyn_addr, 1515 I3C_ADDR_SLOT_I3C_DEV); 1516 if (old_dyn_addr) 1517 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr, 1518 I3C_ADDR_SLOT_FREE); 1519 } 1520 1521 if (master->ops->reattach_i3c_dev) { 1522 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1523 if (ret) { 1524 i3c_master_put_i3c_addrs(dev); 1525 return ret; 1526 } 1527 } 1528 1529 return 0; 1530 } 1531 1532 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1533 { 1534 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1535 1536 /* Do not detach the master device itself. */ 1537 if (master->this != dev && master->ops->detach_i3c_dev) 1538 master->ops->detach_i3c_dev(dev); 1539 1540 i3c_master_put_i3c_addrs(dev); 1541 list_del(&dev->common.node); 1542 } 1543 1544 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1545 struct i2c_dev_desc *dev) 1546 { 1547 int ret; 1548 1549 if (master->ops->attach_i2c_dev) { 1550 ret = master->ops->attach_i2c_dev(dev); 1551 if (ret) 1552 return ret; 1553 } 1554 1555 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1556 1557 return 0; 1558 } 1559 1560 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1561 { 1562 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1563 1564 list_del(&dev->common.node); 1565 1566 if (master->ops->detach_i2c_dev) 1567 master->ops->detach_i2c_dev(dev); 1568 } 1569 1570 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1571 struct i3c_dev_boardinfo *boardinfo) 1572 { 1573 struct i3c_device_info info = { 1574 .static_addr = boardinfo->static_addr, 1575 .pid = boardinfo->pid, 1576 }; 1577 struct i3c_dev_desc *i3cdev; 1578 int ret; 1579 1580 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1581 if (IS_ERR(i3cdev)) 1582 return -ENOMEM; 1583 1584 i3cdev->boardinfo = boardinfo; 1585 1586 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1587 if (ret) 1588 goto err_free_dev; 1589 1590 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1591 i3cdev->boardinfo->init_dyn_addr); 1592 if (ret) 1593 goto err_detach_dev; 1594 1595 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1596 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1597 if (ret) 1598 goto err_rstdaa; 1599 1600 ret = i3c_master_retrieve_dev_info(i3cdev); 1601 if (ret) 1602 goto err_rstdaa; 1603 1604 return 0; 1605 1606 err_rstdaa: 1607 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1608 err_detach_dev: 1609 i3c_master_detach_i3c_dev(i3cdev); 1610 err_free_dev: 1611 i3c_master_free_i3c_dev(i3cdev); 1612 1613 return ret; 1614 } 1615 1616 static void 1617 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1618 { 1619 struct i3c_dev_desc *desc; 1620 int ret; 1621 1622 if (!master->init_done) 1623 return; 1624 1625 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1626 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1627 continue; 1628 1629 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1630 if (!desc->dev) 1631 continue; 1632 1633 desc->dev->bus = &master->bus; 1634 desc->dev->desc = desc; 1635 desc->dev->dev.parent = &master->dev; 1636 desc->dev->dev.type = &i3c_device_type; 1637 desc->dev->dev.bus = &i3c_bus_type; 1638 desc->dev->dev.release = i3c_device_release; 1639 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1640 desc->info.pid); 1641 1642 if (desc->boardinfo) 1643 desc->dev->dev.of_node = desc->boardinfo->of_node; 1644 1645 ret = device_register(&desc->dev->dev); 1646 if (ret) { 1647 dev_err(&master->dev, 1648 "Failed to add I3C device (err = %d)\n", ret); 1649 put_device(&desc->dev->dev); 1650 } 1651 } 1652 } 1653 1654 /** 1655 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1656 * @master: master doing the DAA 1657 * 1658 * This function is instantiating an I3C device object and adding it to the 1659 * I3C device list. All device information are automatically retrieved using 1660 * standard CCC commands. 1661 * 1662 * The I3C device object is returned in case the master wants to attach 1663 * private data to it using i3c_dev_set_master_data(). 1664 * 1665 * This function must be called with the bus lock held in write mode. 1666 * 1667 * Return: a 0 in case of success, an negative error code otherwise. 1668 */ 1669 int i3c_master_do_daa(struct i3c_master_controller *master) 1670 { 1671 int ret; 1672 1673 i3c_bus_maintenance_lock(&master->bus); 1674 ret = master->ops->do_daa(master); 1675 i3c_bus_maintenance_unlock(&master->bus); 1676 1677 if (ret) 1678 return ret; 1679 1680 i3c_bus_normaluse_lock(&master->bus); 1681 i3c_master_register_new_i3c_devs(master); 1682 i3c_bus_normaluse_unlock(&master->bus); 1683 1684 return 0; 1685 } 1686 EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1687 1688 /** 1689 * i3c_master_set_info() - set master device information 1690 * @master: master used to send frames on the bus 1691 * @info: I3C device information 1692 * 1693 * Set master device info. This should be called from 1694 * &i3c_master_controller_ops->bus_init(). 1695 * 1696 * Not all &i3c_device_info fields are meaningful for a master device. 1697 * Here is a list of fields that should be properly filled: 1698 * 1699 * - &i3c_device_info->dyn_addr 1700 * - &i3c_device_info->bcr 1701 * - &i3c_device_info->dcr 1702 * - &i3c_device_info->pid 1703 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1704 * &i3c_device_info->bcr 1705 * 1706 * This function must be called with the bus lock held in maintenance mode. 1707 * 1708 * Return: 0 if @info contains valid information (not every piece of 1709 * information can be checked, but we can at least make sure @info->dyn_addr 1710 * and @info->bcr are correct), -EINVAL otherwise. 1711 */ 1712 int i3c_master_set_info(struct i3c_master_controller *master, 1713 const struct i3c_device_info *info) 1714 { 1715 struct i3c_dev_desc *i3cdev; 1716 int ret; 1717 1718 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1719 return -EINVAL; 1720 1721 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1722 master->secondary) 1723 return -EINVAL; 1724 1725 if (master->this) 1726 return -EINVAL; 1727 1728 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1729 if (IS_ERR(i3cdev)) 1730 return PTR_ERR(i3cdev); 1731 1732 master->this = i3cdev; 1733 master->bus.cur_master = master->this; 1734 1735 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1736 if (ret) 1737 goto err_free_dev; 1738 1739 return 0; 1740 1741 err_free_dev: 1742 i3c_master_free_i3c_dev(i3cdev); 1743 1744 return ret; 1745 } 1746 EXPORT_SYMBOL_GPL(i3c_master_set_info); 1747 1748 static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1749 { 1750 struct i3c_dev_desc *i3cdev, *i3ctmp; 1751 struct i2c_dev_desc *i2cdev, *i2ctmp; 1752 1753 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1754 common.node) { 1755 i3c_master_detach_i3c_dev(i3cdev); 1756 1757 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1758 i3c_bus_set_addr_slot_status(&master->bus, 1759 i3cdev->boardinfo->init_dyn_addr, 1760 I3C_ADDR_SLOT_FREE); 1761 1762 i3c_master_free_i3c_dev(i3cdev); 1763 } 1764 1765 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1766 common.node) { 1767 i3c_master_detach_i2c_dev(i2cdev); 1768 i3c_bus_set_addr_slot_status(&master->bus, 1769 i2cdev->addr, 1770 I3C_ADDR_SLOT_FREE); 1771 i3c_master_free_i2c_dev(i2cdev); 1772 } 1773 } 1774 1775 /** 1776 * i3c_master_bus_init() - initialize an I3C bus 1777 * @master: main master initializing the bus 1778 * 1779 * This function is following all initialisation steps described in the I3C 1780 * specification: 1781 * 1782 * 1. Attach I2C devs to the master so that the master can fill its internal 1783 * device table appropriately 1784 * 1785 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1786 * the master controller. That's usually where the bus mode is selected 1787 * (pure bus or mixed fast/slow bus) 1788 * 1789 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1790 * particularly important when the bus was previously configured by someone 1791 * else (for example the bootloader) 1792 * 1793 * 4. Disable all slave events. 1794 * 1795 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1796 * also have static_addr, try to pre-assign dynamic addresses requested by 1797 * the FW with SETDASA and attach corresponding statically defined I3C 1798 * devices to the master. 1799 * 1800 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1801 * remaining I3C devices 1802 * 1803 * Once this is done, all I3C and I2C devices should be usable. 1804 * 1805 * Return: a 0 in case of success, an negative error code otherwise. 1806 */ 1807 static int i3c_master_bus_init(struct i3c_master_controller *master) 1808 { 1809 enum i3c_addr_slot_status status; 1810 struct i2c_dev_boardinfo *i2cboardinfo; 1811 struct i3c_dev_boardinfo *i3cboardinfo; 1812 struct i2c_dev_desc *i2cdev; 1813 int ret; 1814 1815 /* 1816 * First attach all devices with static definitions provided by the 1817 * FW. 1818 */ 1819 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1820 status = i3c_bus_get_addr_slot_status(&master->bus, 1821 i2cboardinfo->base.addr); 1822 if (status != I3C_ADDR_SLOT_FREE) { 1823 ret = -EBUSY; 1824 goto err_detach_devs; 1825 } 1826 1827 i3c_bus_set_addr_slot_status(&master->bus, 1828 i2cboardinfo->base.addr, 1829 I3C_ADDR_SLOT_I2C_DEV); 1830 1831 i2cdev = i3c_master_alloc_i2c_dev(master, 1832 i2cboardinfo->base.addr, 1833 i2cboardinfo->lvr); 1834 if (IS_ERR(i2cdev)) { 1835 ret = PTR_ERR(i2cdev); 1836 goto err_detach_devs; 1837 } 1838 1839 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1840 if (ret) { 1841 i3c_master_free_i2c_dev(i2cdev); 1842 goto err_detach_devs; 1843 } 1844 } 1845 1846 /* 1847 * Now execute the controller specific ->bus_init() routine, which 1848 * might configure its internal logic to match the bus limitations. 1849 */ 1850 ret = master->ops->bus_init(master); 1851 if (ret) 1852 goto err_detach_devs; 1853 1854 /* 1855 * The master device should have been instantiated in ->bus_init(), 1856 * complain if this was not the case. 1857 */ 1858 if (!master->this) { 1859 dev_err(&master->dev, 1860 "master_set_info() was not called in ->bus_init()\n"); 1861 ret = -EINVAL; 1862 goto err_bus_cleanup; 1863 } 1864 1865 if (master->ops->set_speed) { 1866 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED); 1867 if (ret) 1868 goto err_bus_cleanup; 1869 } 1870 1871 /* 1872 * Reset all dynamic address that may have been assigned before 1873 * (assigned by the bootloader for example). 1874 */ 1875 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1876 if (ret && ret != I3C_ERROR_M2) 1877 goto err_bus_cleanup; 1878 1879 if (master->ops->set_speed) { 1880 master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED); 1881 if (ret) 1882 goto err_bus_cleanup; 1883 } 1884 1885 /* Disable all slave events before starting DAA. */ 1886 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1887 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1888 I3C_CCC_EVENT_HJ); 1889 if (ret && ret != I3C_ERROR_M2) 1890 goto err_bus_cleanup; 1891 1892 /* 1893 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1894 * address and retrieve device information if needed. 1895 * In case pre-assign dynamic address fails, setting dynamic address to 1896 * the requested init_dyn_addr is retried after DAA is done in 1897 * i3c_master_add_i3c_dev_locked(). 1898 */ 1899 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1900 1901 /* 1902 * We don't reserve a dynamic address for devices that 1903 * don't explicitly request one. 1904 */ 1905 if (!i3cboardinfo->init_dyn_addr) 1906 continue; 1907 1908 ret = i3c_bus_get_addr_slot_status(&master->bus, 1909 i3cboardinfo->init_dyn_addr); 1910 if (ret != I3C_ADDR_SLOT_FREE) { 1911 ret = -EBUSY; 1912 goto err_rstdaa; 1913 } 1914 1915 /* Do not mark as occupied until real device exist in bus */ 1916 i3c_bus_set_addr_slot_status_mask(&master->bus, 1917 i3cboardinfo->init_dyn_addr, 1918 I3C_ADDR_SLOT_EXT_DESIRED, 1919 I3C_ADDR_SLOT_EXT_STATUS_MASK); 1920 1921 /* 1922 * Only try to create/attach devices that have a static 1923 * address. Other devices will be created/attached when 1924 * DAA happens, and the requested dynamic address will 1925 * be set using SETNEWDA once those devices become 1926 * addressable. 1927 */ 1928 1929 if (i3cboardinfo->static_addr) 1930 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1931 } 1932 1933 ret = i3c_master_do_daa(master); 1934 if (ret) 1935 goto err_rstdaa; 1936 1937 return 0; 1938 1939 err_rstdaa: 1940 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1941 1942 err_bus_cleanup: 1943 if (master->ops->bus_cleanup) 1944 master->ops->bus_cleanup(master); 1945 1946 err_detach_devs: 1947 i3c_master_detach_free_devs(master); 1948 1949 return ret; 1950 } 1951 1952 static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1953 { 1954 if (master->ops->bus_cleanup) 1955 master->ops->bus_cleanup(master); 1956 1957 i3c_master_detach_free_devs(master); 1958 } 1959 1960 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1961 { 1962 struct i3c_master_controller *master = i3cdev->common.master; 1963 struct i3c_dev_boardinfo *i3cboardinfo; 1964 1965 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1966 if (i3cdev->info.pid != i3cboardinfo->pid) 1967 continue; 1968 1969 i3cdev->boardinfo = i3cboardinfo; 1970 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1971 return; 1972 } 1973 } 1974 1975 static struct i3c_dev_desc * 1976 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1977 { 1978 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1979 struct i3c_dev_desc *i3cdev; 1980 1981 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1982 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1983 return i3cdev; 1984 } 1985 1986 return NULL; 1987 } 1988 1989 /** 1990 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1991 * @master: master used to send frames on the bus 1992 * @addr: I3C slave dynamic address assigned to the device 1993 * 1994 * This function is instantiating an I3C device object and adding it to the 1995 * I3C device list. All device information are automatically retrieved using 1996 * standard CCC commands. 1997 * 1998 * The I3C device object is returned in case the master wants to attach 1999 * private data to it using i3c_dev_set_master_data(). 2000 * 2001 * This function must be called with the bus lock held in write mode. 2002 * 2003 * Return: a 0 in case of success, an negative error code otherwise. 2004 */ 2005 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 2006 u8 addr) 2007 { 2008 struct i3c_device_info info = { .dyn_addr = addr }; 2009 struct i3c_dev_desc *newdev, *olddev; 2010 u8 old_dyn_addr = addr, expected_dyn_addr; 2011 struct i3c_ibi_setup ibireq = { }; 2012 bool enable_ibi = false; 2013 int ret; 2014 2015 if (!master) 2016 return -EINVAL; 2017 2018 newdev = i3c_master_alloc_i3c_dev(master, &info); 2019 if (IS_ERR(newdev)) 2020 return PTR_ERR(newdev); 2021 2022 ret = i3c_master_attach_i3c_dev(master, newdev); 2023 if (ret) 2024 goto err_free_dev; 2025 2026 ret = i3c_master_retrieve_dev_info(newdev); 2027 if (ret) 2028 goto err_detach_dev; 2029 2030 i3c_master_attach_boardinfo(newdev); 2031 2032 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 2033 if (olddev) { 2034 newdev->dev = olddev->dev; 2035 if (newdev->dev) 2036 newdev->dev->desc = newdev; 2037 2038 /* 2039 * We need to restore the IBI state too, so let's save the 2040 * IBI information and try to restore them after olddev has 2041 * been detached+released and its IBI has been stopped and 2042 * the associated resources have been freed. 2043 */ 2044 mutex_lock(&olddev->ibi_lock); 2045 if (olddev->ibi) { 2046 ibireq.handler = olddev->ibi->handler; 2047 ibireq.max_payload_len = olddev->ibi->max_payload_len; 2048 ibireq.num_slots = olddev->ibi->num_slots; 2049 2050 if (olddev->ibi->enabled) { 2051 enable_ibi = true; 2052 i3c_dev_disable_ibi_locked(olddev); 2053 } 2054 2055 i3c_dev_free_ibi_locked(olddev); 2056 } 2057 mutex_unlock(&olddev->ibi_lock); 2058 2059 old_dyn_addr = olddev->info.dyn_addr; 2060 2061 i3c_master_detach_i3c_dev(olddev); 2062 i3c_master_free_i3c_dev(olddev); 2063 } 2064 2065 /* 2066 * Depending on our previous state, the expected dynamic address might 2067 * differ: 2068 * - if the device already had a dynamic address assigned, let's try to 2069 * re-apply this one 2070 * - if the device did not have a dynamic address and the firmware 2071 * requested a specific address, pick this one 2072 * - in any other case, keep the address automatically assigned by the 2073 * master 2074 */ 2075 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 2076 expected_dyn_addr = old_dyn_addr; 2077 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 2078 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 2079 else 2080 expected_dyn_addr = newdev->info.dyn_addr; 2081 2082 if (newdev->info.dyn_addr != expected_dyn_addr && 2083 i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) { 2084 /* 2085 * Try to apply the expected dynamic address. If it fails, keep 2086 * the address assigned by the master. 2087 */ 2088 ret = i3c_master_setnewda_locked(master, 2089 newdev->info.dyn_addr, 2090 expected_dyn_addr); 2091 if (!ret) { 2092 old_dyn_addr = newdev->info.dyn_addr; 2093 newdev->info.dyn_addr = expected_dyn_addr; 2094 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 2095 } else { 2096 dev_err(&master->dev, 2097 "Failed to assign reserved/old address to device %d%llx", 2098 master->bus.id, newdev->info.pid); 2099 } 2100 } 2101 2102 /* 2103 * Now is time to try to restore the IBI setup. If we're lucky, 2104 * everything works as before, otherwise, all we can do is complain. 2105 * FIXME: maybe we should add callback to inform the driver that it 2106 * should request the IBI again instead of trying to hide that from 2107 * him. 2108 */ 2109 if (ibireq.handler) { 2110 mutex_lock(&newdev->ibi_lock); 2111 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 2112 if (ret) { 2113 dev_err(&master->dev, 2114 "Failed to request IBI on device %d-%llx", 2115 master->bus.id, newdev->info.pid); 2116 } else if (enable_ibi) { 2117 ret = i3c_dev_enable_ibi_locked(newdev); 2118 if (ret) 2119 dev_err(&master->dev, 2120 "Failed to re-enable IBI on device %d-%llx", 2121 master->bus.id, newdev->info.pid); 2122 } 2123 mutex_unlock(&newdev->ibi_lock); 2124 } 2125 2126 return 0; 2127 2128 err_detach_dev: 2129 if (newdev->dev && newdev->dev->desc) 2130 newdev->dev->desc = NULL; 2131 2132 i3c_master_detach_i3c_dev(newdev); 2133 2134 err_free_dev: 2135 i3c_master_free_i3c_dev(newdev); 2136 2137 return ret; 2138 } 2139 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 2140 2141 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) 2142 2143 static int 2144 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 2145 struct device_node *node, u32 *reg) 2146 { 2147 struct i2c_dev_boardinfo *boardinfo; 2148 struct device *dev = &master->dev; 2149 int ret; 2150 2151 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2152 if (!boardinfo) 2153 return -ENOMEM; 2154 2155 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2156 if (ret) 2157 return ret; 2158 2159 /* 2160 * The I3C Specification does not clearly say I2C devices with 10-bit 2161 * address are supported. These devices can't be passed properly through 2162 * DEFSLVS command. 2163 */ 2164 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2165 dev_err(dev, "I2C device with 10 bit address not supported."); 2166 return -ENOTSUPP; 2167 } 2168 2169 /* LVR is encoded in reg[2]. */ 2170 boardinfo->lvr = reg[2]; 2171 2172 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2173 of_node_get(node); 2174 2175 return 0; 2176 } 2177 2178 static int 2179 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2180 struct device_node *node, u32 *reg) 2181 { 2182 struct i3c_dev_boardinfo *boardinfo; 2183 struct device *dev = &master->dev; 2184 enum i3c_addr_slot_status addrstatus; 2185 u32 init_dyn_addr = 0; 2186 2187 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2188 if (!boardinfo) 2189 return -ENOMEM; 2190 2191 if (reg[0]) { 2192 if (reg[0] > I3C_MAX_ADDR) 2193 return -EINVAL; 2194 2195 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2196 reg[0]); 2197 if (addrstatus != I3C_ADDR_SLOT_FREE) 2198 return -EINVAL; 2199 } 2200 2201 boardinfo->static_addr = reg[0]; 2202 2203 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2204 if (init_dyn_addr > I3C_MAX_ADDR) 2205 return -EINVAL; 2206 2207 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2208 init_dyn_addr); 2209 if (addrstatus != I3C_ADDR_SLOT_FREE) 2210 return -EINVAL; 2211 } 2212 2213 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2214 2215 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2216 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2217 return -EINVAL; 2218 2219 boardinfo->init_dyn_addr = init_dyn_addr; 2220 boardinfo->of_node = of_node_get(node); 2221 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2222 2223 return 0; 2224 } 2225 2226 static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2227 struct device_node *node) 2228 { 2229 u32 reg[3]; 2230 int ret; 2231 2232 if (!master || !node) 2233 return -EINVAL; 2234 2235 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2236 if (ret) 2237 return ret; 2238 2239 /* 2240 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2241 * dealing with an I2C device. 2242 */ 2243 if (!reg[1]) 2244 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2245 else 2246 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2247 2248 return ret; 2249 } 2250 2251 static int of_populate_i3c_bus(struct i3c_master_controller *master) 2252 { 2253 struct device *dev = &master->dev; 2254 struct device_node *i3cbus_np = dev->of_node; 2255 struct device_node *node; 2256 int ret; 2257 u32 val; 2258 2259 if (!i3cbus_np) 2260 return 0; 2261 2262 for_each_available_child_of_node(i3cbus_np, node) { 2263 ret = of_i3c_master_add_dev(master, node); 2264 if (ret) { 2265 of_node_put(node); 2266 return ret; 2267 } 2268 } 2269 2270 /* 2271 * The user might want to limit I2C and I3C speed in case some devices 2272 * on the bus are not supporting typical rates, or if the bus topology 2273 * prevents it from using max possible rate. 2274 */ 2275 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2276 master->bus.scl_rate.i2c = val; 2277 2278 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2279 master->bus.scl_rate.i3c = val; 2280 2281 return 0; 2282 } 2283 2284 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2285 struct i2c_msg *xfers, int nxfers) 2286 { 2287 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2288 struct i2c_dev_desc *dev; 2289 int i, ret; 2290 u16 addr; 2291 2292 if (!xfers || !master || nxfers <= 0) 2293 return -EINVAL; 2294 2295 if (!master->ops->i2c_xfers) 2296 return -ENOTSUPP; 2297 2298 /* Doing transfers to different devices is not supported. */ 2299 addr = xfers[0].addr; 2300 for (i = 1; i < nxfers; i++) { 2301 if (addr != xfers[i].addr) 2302 return -ENOTSUPP; 2303 } 2304 2305 i3c_bus_normaluse_lock(&master->bus); 2306 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2307 if (!dev) 2308 ret = -ENOENT; 2309 else 2310 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2311 i3c_bus_normaluse_unlock(&master->bus); 2312 2313 return ret ? ret : nxfers; 2314 } 2315 2316 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2317 { 2318 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2319 } 2320 2321 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client) 2322 { 2323 /* Fall back to no spike filters and FM bus mode. */ 2324 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; 2325 2326 if (client->dev.of_node) { 2327 u32 reg[3]; 2328 2329 if (!of_property_read_u32_array(client->dev.of_node, "reg", 2330 reg, ARRAY_SIZE(reg))) 2331 lvr = reg[2]; 2332 } 2333 2334 return lvr; 2335 } 2336 2337 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client) 2338 { 2339 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2340 enum i3c_addr_slot_status status; 2341 struct i2c_dev_desc *i2cdev; 2342 int ret; 2343 2344 /* Already added by board info? */ 2345 if (i3c_master_find_i2c_dev_by_addr(master, client->addr)) 2346 return 0; 2347 2348 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr); 2349 if (status != I3C_ADDR_SLOT_FREE) 2350 return -EBUSY; 2351 2352 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2353 I3C_ADDR_SLOT_I2C_DEV); 2354 2355 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr, 2356 i3c_master_i2c_get_lvr(client)); 2357 if (IS_ERR(i2cdev)) { 2358 ret = PTR_ERR(i2cdev); 2359 goto out_clear_status; 2360 } 2361 2362 ret = i3c_master_attach_i2c_dev(master, i2cdev); 2363 if (ret) 2364 goto out_free_dev; 2365 2366 return 0; 2367 2368 out_free_dev: 2369 i3c_master_free_i2c_dev(i2cdev); 2370 out_clear_status: 2371 i3c_bus_set_addr_slot_status(&master->bus, client->addr, 2372 I3C_ADDR_SLOT_FREE); 2373 2374 return ret; 2375 } 2376 2377 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client) 2378 { 2379 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2380 struct i2c_dev_desc *dev; 2381 2382 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr); 2383 if (!dev) 2384 return -ENODEV; 2385 2386 i3c_master_detach_i2c_dev(dev); 2387 i3c_bus_set_addr_slot_status(&master->bus, dev->addr, 2388 I3C_ADDR_SLOT_FREE); 2389 i3c_master_free_i2c_dev(dev); 2390 2391 return 0; 2392 } 2393 2394 static const struct i2c_algorithm i3c_master_i2c_algo = { 2395 .master_xfer = i3c_master_i2c_adapter_xfer, 2396 .functionality = i3c_master_i2c_funcs, 2397 }; 2398 2399 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action, 2400 void *data) 2401 { 2402 struct i2c_adapter *adap; 2403 struct i2c_client *client; 2404 struct device *dev = data; 2405 struct i3c_master_controller *master; 2406 int ret; 2407 2408 if (dev->type != &i2c_client_type) 2409 return 0; 2410 2411 client = to_i2c_client(dev); 2412 adap = client->adapter; 2413 2414 if (adap->algo != &i3c_master_i2c_algo) 2415 return 0; 2416 2417 master = i2c_adapter_to_i3c_master(adap); 2418 2419 i3c_bus_maintenance_lock(&master->bus); 2420 switch (action) { 2421 case BUS_NOTIFY_ADD_DEVICE: 2422 ret = i3c_master_i2c_attach(adap, client); 2423 break; 2424 case BUS_NOTIFY_DEL_DEVICE: 2425 ret = i3c_master_i2c_detach(adap, client); 2426 break; 2427 } 2428 i3c_bus_maintenance_unlock(&master->bus); 2429 2430 return ret; 2431 } 2432 2433 static struct notifier_block i2cdev_notifier = { 2434 .notifier_call = i3c_i2c_notifier_call, 2435 }; 2436 2437 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2438 { 2439 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2440 struct i2c_dev_desc *i2cdev; 2441 struct i2c_dev_boardinfo *i2cboardinfo; 2442 int ret; 2443 2444 adap->dev.parent = master->dev.parent; 2445 adap->owner = master->dev.parent->driver->owner; 2446 adap->algo = &i3c_master_i2c_algo; 2447 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2448 2449 /* FIXME: Should we allow i3c masters to override these values? */ 2450 adap->timeout = 1000; 2451 adap->retries = 3; 2452 2453 ret = i2c_add_adapter(adap); 2454 if (ret) 2455 return ret; 2456 2457 /* 2458 * We silently ignore failures here. The bus should keep working 2459 * correctly even if one or more i2c devices are not registered. 2460 */ 2461 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 2462 i2cdev = i3c_master_find_i2c_dev_by_addr(master, 2463 i2cboardinfo->base.addr); 2464 if (WARN_ON(!i2cdev)) 2465 continue; 2466 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base); 2467 } 2468 2469 return 0; 2470 } 2471 2472 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2473 { 2474 struct i2c_dev_desc *i2cdev; 2475 2476 i2c_del_adapter(&master->i2c); 2477 2478 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2479 i2cdev->dev = NULL; 2480 } 2481 2482 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2483 { 2484 struct i3c_dev_desc *i3cdev; 2485 2486 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2487 if (!i3cdev->dev) 2488 continue; 2489 2490 i3cdev->dev->desc = NULL; 2491 if (device_is_registered(&i3cdev->dev->dev)) 2492 device_unregister(&i3cdev->dev->dev); 2493 else 2494 put_device(&i3cdev->dev->dev); 2495 i3cdev->dev = NULL; 2496 } 2497 } 2498 2499 /** 2500 * i3c_master_queue_ibi() - Queue an IBI 2501 * @dev: the device this IBI is coming from 2502 * @slot: the IBI slot used to store the payload 2503 * 2504 * Queue an IBI to the controller workqueue. The IBI handler attached to 2505 * the dev will be called from a workqueue context. 2506 */ 2507 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2508 { 2509 atomic_inc(&dev->ibi->pending_ibis); 2510 queue_work(dev->common.master->wq, &slot->work); 2511 } 2512 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2513 2514 static void i3c_master_handle_ibi(struct work_struct *work) 2515 { 2516 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2517 work); 2518 struct i3c_dev_desc *dev = slot->dev; 2519 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2520 struct i3c_ibi_payload payload; 2521 2522 payload.data = slot->data; 2523 payload.len = slot->len; 2524 2525 if (dev->dev) 2526 dev->ibi->handler(dev->dev, &payload); 2527 2528 master->ops->recycle_ibi_slot(dev, slot); 2529 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2530 complete(&dev->ibi->all_ibis_handled); 2531 } 2532 2533 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2534 struct i3c_ibi_slot *slot) 2535 { 2536 slot->dev = dev; 2537 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2538 } 2539 2540 struct i3c_generic_ibi_slot { 2541 struct list_head node; 2542 struct i3c_ibi_slot base; 2543 }; 2544 2545 struct i3c_generic_ibi_pool { 2546 spinlock_t lock; 2547 unsigned int num_slots; 2548 struct i3c_generic_ibi_slot *slots; 2549 void *payload_buf; 2550 struct list_head free_slots; 2551 struct list_head pending; 2552 }; 2553 2554 /** 2555 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2556 * @pool: the IBI pool to free 2557 * 2558 * Free all IBI slots allated by a generic IBI pool. 2559 */ 2560 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2561 { 2562 struct i3c_generic_ibi_slot *slot; 2563 unsigned int nslots = 0; 2564 2565 while (!list_empty(&pool->free_slots)) { 2566 slot = list_first_entry(&pool->free_slots, 2567 struct i3c_generic_ibi_slot, node); 2568 list_del(&slot->node); 2569 nslots++; 2570 } 2571 2572 /* 2573 * If the number of freed slots is not equal to the number of allocated 2574 * slots we have a leak somewhere. 2575 */ 2576 WARN_ON(nslots != pool->num_slots); 2577 2578 kfree(pool->payload_buf); 2579 kfree(pool->slots); 2580 kfree(pool); 2581 } 2582 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2583 2584 /** 2585 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2586 * @dev: the device this pool will be used for 2587 * @req: IBI setup request describing what the device driver expects 2588 * 2589 * Create a generic IBI pool based on the information provided in @req. 2590 * 2591 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2592 */ 2593 struct i3c_generic_ibi_pool * 2594 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2595 const struct i3c_ibi_setup *req) 2596 { 2597 struct i3c_generic_ibi_pool *pool; 2598 struct i3c_generic_ibi_slot *slot; 2599 unsigned int i; 2600 int ret; 2601 2602 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2603 if (!pool) 2604 return ERR_PTR(-ENOMEM); 2605 2606 spin_lock_init(&pool->lock); 2607 INIT_LIST_HEAD(&pool->free_slots); 2608 INIT_LIST_HEAD(&pool->pending); 2609 2610 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2611 if (!pool->slots) { 2612 ret = -ENOMEM; 2613 goto err_free_pool; 2614 } 2615 2616 if (req->max_payload_len) { 2617 pool->payload_buf = kcalloc(req->num_slots, 2618 req->max_payload_len, GFP_KERNEL); 2619 if (!pool->payload_buf) { 2620 ret = -ENOMEM; 2621 goto err_free_pool; 2622 } 2623 } 2624 2625 for (i = 0; i < req->num_slots; i++) { 2626 slot = &pool->slots[i]; 2627 i3c_master_init_ibi_slot(dev, &slot->base); 2628 2629 if (req->max_payload_len) 2630 slot->base.data = pool->payload_buf + 2631 (i * req->max_payload_len); 2632 2633 list_add_tail(&slot->node, &pool->free_slots); 2634 pool->num_slots++; 2635 } 2636 2637 return pool; 2638 2639 err_free_pool: 2640 i3c_generic_ibi_free_pool(pool); 2641 return ERR_PTR(ret); 2642 } 2643 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2644 2645 /** 2646 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2647 * @pool: the pool to query an IBI slot on 2648 * 2649 * Search for a free slot in a generic IBI pool. 2650 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2651 * when it's no longer needed. 2652 * 2653 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2654 */ 2655 struct i3c_ibi_slot * 2656 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2657 { 2658 struct i3c_generic_ibi_slot *slot; 2659 unsigned long flags; 2660 2661 spin_lock_irqsave(&pool->lock, flags); 2662 slot = list_first_entry_or_null(&pool->free_slots, 2663 struct i3c_generic_ibi_slot, node); 2664 if (slot) 2665 list_del(&slot->node); 2666 spin_unlock_irqrestore(&pool->lock, flags); 2667 2668 return slot ? &slot->base : NULL; 2669 } 2670 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2671 2672 /** 2673 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2674 * @pool: the pool to return the IBI slot to 2675 * @s: IBI slot to recycle 2676 * 2677 * Add an IBI slot back to its generic IBI pool. Should be called from the 2678 * master driver struct_master_controller_ops->recycle_ibi() method. 2679 */ 2680 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2681 struct i3c_ibi_slot *s) 2682 { 2683 struct i3c_generic_ibi_slot *slot; 2684 unsigned long flags; 2685 2686 if (!s) 2687 return; 2688 2689 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2690 spin_lock_irqsave(&pool->lock, flags); 2691 list_add_tail(&slot->node, &pool->free_slots); 2692 spin_unlock_irqrestore(&pool->lock, flags); 2693 } 2694 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2695 2696 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2697 { 2698 if (!ops || !ops->bus_init || !ops->priv_xfers || 2699 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2700 return -EINVAL; 2701 2702 if (ops->request_ibi && 2703 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2704 !ops->recycle_ibi_slot)) 2705 return -EINVAL; 2706 2707 return 0; 2708 } 2709 2710 /** 2711 * i3c_master_register() - register an I3C master 2712 * @master: master used to send frames on the bus 2713 * @parent: the parent device (the one that provides this I3C master 2714 * controller) 2715 * @ops: the master controller operations 2716 * @secondary: true if you are registering a secondary master. Will return 2717 * -ENOTSUPP if set to true since secondary masters are not yet 2718 * supported 2719 * 2720 * This function takes care of everything for you: 2721 * 2722 * - creates and initializes the I3C bus 2723 * - populates the bus with static I2C devs if @parent->of_node is not 2724 * NULL 2725 * - registers all I3C devices added by the controller during bus 2726 * initialization 2727 * - registers the I2C adapter and all I2C devices 2728 * 2729 * Return: 0 in case of success, a negative error code otherwise. 2730 */ 2731 int i3c_master_register(struct i3c_master_controller *master, 2732 struct device *parent, 2733 const struct i3c_master_controller_ops *ops, 2734 bool secondary) 2735 { 2736 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2737 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2738 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2739 struct i2c_dev_boardinfo *i2cbi; 2740 int ret; 2741 2742 /* We do not support secondary masters yet. */ 2743 if (secondary) 2744 return -ENOTSUPP; 2745 2746 ret = i3c_master_check_ops(ops); 2747 if (ret) 2748 return ret; 2749 2750 master->dev.parent = parent; 2751 master->dev.of_node = of_node_get(parent->of_node); 2752 master->dev.bus = &i3c_bus_type; 2753 master->dev.type = &i3c_masterdev_type; 2754 master->dev.release = i3c_masterdev_release; 2755 master->ops = ops; 2756 master->secondary = secondary; 2757 INIT_LIST_HEAD(&master->boardinfo.i2c); 2758 INIT_LIST_HEAD(&master->boardinfo.i3c); 2759 2760 ret = i3c_bus_init(i3cbus, master->dev.of_node); 2761 if (ret) 2762 return ret; 2763 2764 device_initialize(&master->dev); 2765 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2766 2767 ret = of_populate_i3c_bus(master); 2768 if (ret) 2769 goto err_put_dev; 2770 2771 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2772 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2773 case I3C_LVR_I2C_INDEX(0): 2774 if (mode < I3C_BUS_MODE_MIXED_FAST) 2775 mode = I3C_BUS_MODE_MIXED_FAST; 2776 break; 2777 case I3C_LVR_I2C_INDEX(1): 2778 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2779 mode = I3C_BUS_MODE_MIXED_LIMITED; 2780 break; 2781 case I3C_LVR_I2C_INDEX(2): 2782 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2783 mode = I3C_BUS_MODE_MIXED_SLOW; 2784 break; 2785 default: 2786 ret = -EINVAL; 2787 goto err_put_dev; 2788 } 2789 2790 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2791 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2792 } 2793 2794 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2795 if (ret) 2796 goto err_put_dev; 2797 2798 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2799 if (!master->wq) { 2800 ret = -ENOMEM; 2801 goto err_put_dev; 2802 } 2803 2804 ret = i3c_master_bus_init(master); 2805 if (ret) 2806 goto err_put_dev; 2807 2808 ret = device_add(&master->dev); 2809 if (ret) 2810 goto err_cleanup_bus; 2811 2812 /* 2813 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2814 * through the I2C subsystem. 2815 */ 2816 ret = i3c_master_i2c_adapter_init(master); 2817 if (ret) 2818 goto err_del_dev; 2819 2820 /* 2821 * We're done initializing the bus and the controller, we can now 2822 * register I3C devices discovered during the initial DAA. 2823 */ 2824 master->init_done = true; 2825 i3c_bus_normaluse_lock(&master->bus); 2826 i3c_master_register_new_i3c_devs(master); 2827 i3c_bus_normaluse_unlock(&master->bus); 2828 2829 return 0; 2830 2831 err_del_dev: 2832 device_del(&master->dev); 2833 2834 err_cleanup_bus: 2835 i3c_master_bus_cleanup(master); 2836 2837 err_put_dev: 2838 put_device(&master->dev); 2839 2840 return ret; 2841 } 2842 EXPORT_SYMBOL_GPL(i3c_master_register); 2843 2844 /** 2845 * i3c_master_unregister() - unregister an I3C master 2846 * @master: master used to send frames on the bus 2847 * 2848 * Basically undo everything done in i3c_master_register(). 2849 */ 2850 void i3c_master_unregister(struct i3c_master_controller *master) 2851 { 2852 i3c_master_i2c_adapter_cleanup(master); 2853 i3c_master_unregister_i3c_devs(master); 2854 i3c_master_bus_cleanup(master); 2855 device_unregister(&master->dev); 2856 } 2857 EXPORT_SYMBOL_GPL(i3c_master_unregister); 2858 2859 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) 2860 { 2861 struct i3c_master_controller *master; 2862 2863 if (!dev) 2864 return -ENOENT; 2865 2866 master = i3c_dev_get_master(dev); 2867 if (!master) 2868 return -EINVAL; 2869 2870 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr || 2871 !dev->boardinfo->static_addr) 2872 return -EINVAL; 2873 2874 return i3c_master_setdasa_locked(master, dev->info.static_addr, 2875 dev->boardinfo->init_dyn_addr); 2876 } 2877 2878 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2879 struct i3c_priv_xfer *xfers, 2880 int nxfers) 2881 { 2882 struct i3c_master_controller *master; 2883 2884 if (!dev) 2885 return -ENOENT; 2886 2887 master = i3c_dev_get_master(dev); 2888 if (!master || !xfers) 2889 return -EINVAL; 2890 2891 if (!master->ops->priv_xfers) 2892 return -ENOTSUPP; 2893 2894 return master->ops->priv_xfers(dev, xfers, nxfers); 2895 } 2896 2897 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2898 { 2899 struct i3c_master_controller *master; 2900 int ret; 2901 2902 if (!dev->ibi) 2903 return -EINVAL; 2904 2905 master = i3c_dev_get_master(dev); 2906 ret = master->ops->disable_ibi(dev); 2907 if (ret) 2908 return ret; 2909 2910 reinit_completion(&dev->ibi->all_ibis_handled); 2911 if (atomic_read(&dev->ibi->pending_ibis)) 2912 wait_for_completion(&dev->ibi->all_ibis_handled); 2913 2914 dev->ibi->enabled = false; 2915 2916 return 0; 2917 } 2918 2919 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2920 { 2921 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2922 int ret; 2923 2924 if (!dev->ibi) 2925 return -EINVAL; 2926 2927 ret = master->ops->enable_ibi(dev); 2928 if (!ret) 2929 dev->ibi->enabled = true; 2930 2931 return ret; 2932 } 2933 2934 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2935 const struct i3c_ibi_setup *req) 2936 { 2937 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2938 struct i3c_device_ibi_info *ibi; 2939 int ret; 2940 2941 if (!master->ops->request_ibi) 2942 return -ENOTSUPP; 2943 2944 if (dev->ibi) 2945 return -EBUSY; 2946 2947 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2948 if (!ibi) 2949 return -ENOMEM; 2950 2951 atomic_set(&ibi->pending_ibis, 0); 2952 init_completion(&ibi->all_ibis_handled); 2953 ibi->handler = req->handler; 2954 ibi->max_payload_len = req->max_payload_len; 2955 ibi->num_slots = req->num_slots; 2956 2957 dev->ibi = ibi; 2958 ret = master->ops->request_ibi(dev, req); 2959 if (ret) { 2960 kfree(ibi); 2961 dev->ibi = NULL; 2962 } 2963 2964 return ret; 2965 } 2966 2967 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2968 { 2969 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2970 2971 if (!dev->ibi) 2972 return; 2973 2974 if (WARN_ON(dev->ibi->enabled)) 2975 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2976 2977 master->ops->free_ibi(dev); 2978 kfree(dev->ibi); 2979 dev->ibi = NULL; 2980 } 2981 2982 static int __init i3c_init(void) 2983 { 2984 int res; 2985 2986 res = of_alias_get_highest_id("i3c"); 2987 if (res >= 0) { 2988 mutex_lock(&i3c_core_lock); 2989 __i3c_first_dynamic_bus_num = res + 1; 2990 mutex_unlock(&i3c_core_lock); 2991 } 2992 2993 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier); 2994 if (res) 2995 return res; 2996 2997 res = bus_register(&i3c_bus_type); 2998 if (res) 2999 goto out_unreg_notifier; 3000 3001 return 0; 3002 3003 out_unreg_notifier: 3004 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3005 3006 return res; 3007 } 3008 subsys_initcall(i3c_init); 3009 3010 static void __exit i3c_exit(void) 3011 { 3012 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier); 3013 idr_destroy(&i3c_bus_idr); 3014 bus_unregister(&i3c_bus_type); 3015 } 3016 module_exit(i3c_exit); 3017 3018 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 3019 MODULE_DESCRIPTION("I3C core"); 3020 MODULE_LICENSE("GPL v2"); 3021